|Publication number||US3370203 A|
|Publication date||Feb 20, 1968|
|Filing date||Jul 19, 1965|
|Priority date||Jul 19, 1965|
|Publication number||US 3370203 A, US 3370203A, US-A-3370203, US3370203 A, US3370203A|
|Inventors||Winsker Herbert, Bernard L Kravitz|
|Original Assignee||United Aircraft Corp|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (7), Referenced by (97), Classifications (18)|
|External Links: USPTO, USPTO Assignment, Espacenet|
1963 B. L. KRAVITZ ETAL 3,37
INTEGRATED CIRCUIT MODULES I Filed July 19, 1965 TT e E .s WWW kw t S m 4 my 5H mm A TTOPNE Y5 B. L. KRAVITZ ETAL 3,370,203
INTEGRATED CIRCUIT MODULES Feb. 20, 1968 Filed July 19, 1965 4 Sheets-Sheet 2 W WW t Ep 0 VKW E m 4* M i g 5 M 5 E 5 Y ,|.||.|jl.| B 333 M v. Z
\ mfTwiwlwmL B. L. KRAVITZ ETAL INTEGRATED CIRCUIT MODULES Feb. 20, 1968 4 Sheets-Sheet :5
Filed July 19, 1965 INVENTORS KRnv/TZ I WINS/(ER 4 C BER/Mk0 L lf/5R5 Em? 9 T TORNEYS 1968 B; L KRAV ITZ ETAL 3 5 INTEGRATED CIRCUIT MODULES 4 Sheets-Sheet 4 Filed July 19, 1965 INVENTORS BERNHAD L. KPflV/TZ BY Hseeser W/A/SKER 'O co-P HTTOPNEYS United States Patent 3,370,203 INTEGRATED CIRCUIT MODULES Bernard L. Kravitz, Forest Hills, and Herbert Winsker,
Brewster, N.Y., assignors to United Aircraft Corporation, East Hartford, Conn., a corporation of Delaware Filed July 19, 1965, Ser. No. 473,023 9 Claims. (Cl. 317101) ABSTRACT OF THE DISCLOSURE An integrated circuit module in which each of a stack of insulating frames of refractory material is provided with wall grooves for receiving the respective generally coplanar leads of a flat circuit package with the leads extending to the frame periphery. A plurality of frames together with a cover and a header are bonded in stacked relationship to form a hollow hermetic housing to a wall of which a conductive pattern is applied to connect said leads in a predetermined pattern.
Our invention relates to circuit component modules and more particularly to a three-dimensional integrated circuit module which does not require cast-encapsulation.
Integrated circuits in which active and passive circuits elements are deposited on or diffused into planar substrates are becoming increasingly important components in the electronics industry owing to their small size,
potentially low cost and ruggedness in comparison with other miniature circuitry.
A particularly advantageous lead arrangement for integrated circuits known in the art is one in which the leads are substantially coplanar with the substrate, preserving the planar geometry of the substrate and thus providing a volumetrically efficient configuration.
As will be appreciated by those skilled in the art, the organization and assembly of integrated circuits of the type described above into more complex circuits is advantageously achieved by means of three-dimensional subassemblies of electrically interconnected circuits encapsulated to form a unitary block. These sub-assemblies, known in the art as modules, preferably perform a complete circuit function such as that of a four-bit-counter, for example.
Cast-encapsulated three-dimensional integrated circuit modules have been suggested in the prior art for integrated circuits. They suffer from the defects that potting material prevents the efiicient dissipation of heat from the circuits in the module and increases its weight. Then too a potting compound makes replacement of individual integrated circuits substantially impossible or impractical since injury to components will usually occur if replacement is attempted. Furthermore, since it is difficult precisely to match the thermal expansion characteristics of the potting compound and the circuits, differential expansion in response to temperature often produces a stress which causes failure of a circuit in the module with resultant failure of the entire module.
Owing to the small size of each integrated circuit and the delicateness of its leads, which are easily bent or misaligned, integrated circuit modules have heretofore been necessarily hand assembled so that integrated circuit modules of the prior art are not only unsatisfactory in terms of weight, maintenance and heat dissipation, but also in terms of cost. Thus, many of the advantages inherent in integrated circuit components per se have heretofore been diminished when the circuits are assembled into modules.
We have invented an improved module for integrated circuits in which cast-encapsulation is eliminated, thus retaining the inherent advantages of integrated circuit assemblies. Our invention, further, provides for the support and protection of the integrated circuit and its leads during manufacture to enable automated assembly of modules.
One object of our invention is to provide a threedimensional module which is not cast-encapsulated.
Another object of our invention is to provide a mount Which facilitates the handling of integrated circuits.
Still another object of our invention is to provide a three-dimensional module in which defective circuits can be replaced without destroying the entire module,
Yet another object of our invention is to provide a module in which the circuit leads are accurately positioned so that they can be readily interconnected by a batch process such as vapor depositing a lead pattern or by other similar processes.
A further object of our invention is to provide a mount which accurately positions the coplanar leads of an integrated circuit in a module.
An additional object of our invention is to provide a mount which facilitates the packaging of integrated circuits in flat packages and permits testing thereof during the packaging process.
A still further object of our invention is to provide an improved integrated circuit module which is simple, more reliable and lighter than are modules of the prior art.
Other and further objects of our invention will appear from the following description.
In general our invention contemplates the provision of an integrated circuit module in which box-like frames or mounts supporting flat integrated circuits with their leads secured in grooves in one surface thereof are stacked and then bonded to encapsulate the circuits. The leads extend in accurate pattern to the outer surface of the stack Where they may expeditiously be interconnected in a suitable manner known in the art. We provide a cover for protecting the uppermost circuit and a header equipped with circuit connecting pins adjacent the lowermost circuit, both of which form an integral part of our assembly.
In the accompanying drawings which form part of the instant specification and which are to be read in conjunction therewith and in which like reference numerals are used to indicate like parts in the various views:
FIGURE 1 is a perspective view of an embodiment of our new module seen from one side;
FIGURE 2 is a perspective view of the module shown in FIGURE 1 seen from the opposite side;
FIGURE 3 is a perspective view drawn on an enlarged scale of the module shown in FIGURES 1 and 2 with parts broken away and with other parts shown in phantom;
FIGURE 4 is a perspective view of an embodiment of our box frame;
FIGURE 5 is a plan view of one type of flat package known to the prior art;
FIGURE 6 is a plan view of a flat package of the type shown in FIGURE 5 secured to the box frame illus-. trated in FIGURE 4;
FIGURE 7 is a sectional view drawn on an enlarged scale taken along the line 77 of FIGURE 1;
FIGURE 8 is a side elevation, partially in section, of another embodiment of our module;
FIGURE 9 is a sectional view taken along the line 9-9 of FIGURE 8; and
FIGURE 10 is a perspective view of a jig which may be used in assembling our new module.
More particularly, referring now to the drawings, FIG- URES l and 2 show the exterior appearance of our new three-dimensional module which comprises a stack of er and cover together into a rigid housing or capsule. An integrated circuit, generally indicated by the reference numeral 18 in FIGURES 3 and 7, is mounted on each frame 12 with its coplanar leads 22 secured in accurately located rectangular rabbets or grooves 24 formed in the upper surface of the frame 12. An epoxy resin or other suitable adhesive material known in the art can be used for bonding the leads in the grooves. The leads 22 should be substantially flush with or Slightly below the upper surface of the frame.
The cover 14 is a solid member that fits on the uppermost frame of the module to seal it. The underside of the cove-r 14 is recessed in the region 24 to provide space for the circuit 18 mounted on the uppermost frame of the module.
The header 16 has four rows of L-shaped leads 26 bonded in accurately positioned grooves 25 and holes 27. The frames 12 are made of any suitable insulating material known in the art as will be described in more detail hereinafter. The cover 14 and header 16 are conveniently made of the same material as the frames.
A typical module has from two to ten integrated circuits depending chiefly on the complexity of the overall function to be performed by the module and the particular integrated circuits used. Shift registers, operational amplifiers, four-bit counters, integrators, binary counters, ripple-through counters, and the like, or components of these are examples of the overall functions performed by a typical module. Advantageously, the dimensions of the frames 12 are such that integrated circuits which have slightly different dimensions can be mounted thereon, owing to the fact that several different types of integral circuit and integrated circuits from different sources of supply are often advantageously incorporated in a single module. For example, it is sometimes desirable to use in a single module circuits formed by depositing thin films on an insulating substrate and integrated circuits by depositing suitable dopants in discrete regions of a semiconducting silicon substrate. Hybrid combinations of various types of integrated circuits which are known to the art can be assembled in our module.
Referring to FIGURE 7, levels indicated by the letter A represent integrated circuits electrically designed specifically for the module, and packaged by bonding a particular circuit chip to a commercially available fiat package. The level indicated by the letter B represents an integrated circuit of the type formed by depositing thin films on an insulating substrate. The levels indicated by the letter C represent integrated circuits or functional electronic blocks which are commercially available, off-the-shelf items. These circuits have the common characteristic of being fiat and of having all leads lying generally in a plane. It will be noted, however, that the respective dimensions of each type vary slightly which is a typical situation encountered in the art.
We have ascertained that in the present state of the art a rectangular frame, whose walls are about 0.050 inch wide and 0.070 inch thick and enclose an area 0.450 inch by 0.300 inch, is satisfactory. The grooves 24 are typically disposed on 0.050 inch centers and are 0.018 inch wide and 0.006 inch deep. It will be understood that the particular dimensions of our frame are not critical and will be dictated by available integrated circuits.
Typically, we provide nine aligned grooves 24 on each side of the frame. A typical circuit has an aggregate of from three to sixteen leads 22 generally symmetrically arranged. In any grooves that are not used by a particular circuit 18 we place a feed through lead 34.
It will be appreciated tht we place a completely assembled circuit in the frame 12 with its leads in the frame channels 24. Our frame, in addition to facilitating the assembly of a module and housing the circuits in the assembled module, may also be advantageously used in the assembly of the integrated circuits. For example, re-
ferring to FIGURE 5, one type of fiat package known in the art includes a shallow rectangular receptacle, the walls 36 of which are usually made of borosilicate glass and the base 35 of which is usually made of Kovar or a ceramic, depending upon the design requirements. Kovar is an alloy consisting of 20% nickel, 17% cobalt, 0.2% manganese, and the balance iron, and is manufactured and sold under that trademark by the Westinghouse Electric Company. Flat leads 22 (0.005 inch by 0.015 inch) pass through the borosilicate walls on 0.050 inch centers and are bonded thereto. As will be appreciated by those skilled in the art, both leads 22 and the mounting bases are commonly electrolytically gold plated to permit easy mounting of the integrated circuit chip or chips and lead attachment thereto. The leads 22 do not contact receptacle coating to prevent them from being short circuited. A thin, metal lead frame 38 integral with or secured to the leads 22 supports them and maintains their spacing. A completely packaged solid state circuit chip 39 is shown partially in section in FIGURE 7. Before mounting chip 39 in the receptacle 36, we place the hat package in our frame 12 and secure the leads 22 in the grooves 24 as shown in FIGURE 6. The temporary lead frame 38 is cut off after the package is secured in the frame 12 thus permitting testing of the integrated circuit during the packaging process. The circuit chip 39 is bonded in the receptacle, the leads 22 are connected to certain areas of the chip, and a cover 41 is bonded in place in any suitable known manner. Since these steps frequently require temperatures in excess of 400 C., the frame 12 preferably should be made of an insulating refractory material such as glass, glass-bonded mica, or a ceramic such as aluminum oxide. Organic materials and other insulating materials known in the art would not be satisfactory in this use of our frame if high temperatures are to be employed.
The frames 12 must be manufactured to very exacting tolerances in order to permit accurate positioning of the leads 22. Suitable frames can be made by the transfer molding of glass-bonded mica, or by oven glazing of a ceramic, or press-powder molding of glass, or other appropriate process known in the art. It will be readily appreciated that the package and frame can advantageously be manufactured as a single unit, if desired. Where relatively high temperatures are not involved in the use of the frames any suitable insulating material such as an appropriate synthetic resin known in the art may be employed.
After the circuits have been mounted in the frames 12, we coat the upper and lower surface of each frame 12 with a thin layer of a suitable structural adhesive 32, such as an epoxy resin or polyester resin, for example. The coating is carefully applied to insure a thin, evenly distributed layer which covers only the surface of the frame and does not flow over and cover the ends of the leads 22.
We bond leads 26 in grooves 25 and holes 27 formed in the header 16 by means of the structural adhesive 32, filling the holes and grooves completely with adhesive and covering :the entire upper surface of header 16 with a thin layer of adhesive while leaving the ends of leads 26 exposed.
in assembling our module we stack the header 16, the box frame 12 on which the circuits 18 are mounted, and the cover 14 in a suitable jig. The header 16 is placed at bottom, and the frames 12 are stacked in a predetermined order, dictated by the module circuit design. Finally we place the cover .14 on uppermost frame 12 in the stack. Notches 28 in the frames 12, header 16 and cover 14 -fit keying members on the jig, insuring that the frames are correctly oriented when they are placed in the jig. If desired, frames 12 can also be coded in any suitable manner, such as color coding, to assist in stacking them in the correct sequence.
We apply a carefully controlled pressure and may apply heat to the stack, causing the adhesive layers 32 to bond the frames 12 and the cover 14 and the header 16 into a rigid hermetically sealed shell. The pressure required for bonding may conveniently be obtained by placing a weight on the cover 14, or axially clam-ping the stack in a suitable vise. The required heat if used may be obtained by the use of radiant heaters. It will be appreciated that the resulting adhesive layers 32 joining frames together should be of a predetermined uniform thickness to insure that the leads 22 are accurately positioned at the surface of the shell.
Preferably, we establish a partial vacuum or provide an inert gas at reduced pressure within the sealed shell to prevent its internal pressure from becoming excessively high at elevated temperatures, and to prevent oxidation or contamination of the circuits and leads within the module. A convenient way to establish a partial vacuum or to furnish an inert atmosphere in the shell is to form the module within a vacuum chamber. We place the jig in a suitable chamber after stacking the header and frames before positioning the cover 14. Then we evacuate the chamber. The cover is then placed on the uppermost frame while maintaining the vacuum in the chamber. The bonding of the header, the frames, and the cover together is then accomplished by applying pressure and heat if desired as previously described. If an inert atmosphere is desired within the module we admit a small amount of inert gas, such as argon, into the evacuated chamber before placing cover 14 in position.
It should be noted that for some applications the module need not be hermetically sealed, in which case openings can be provided in the cover 14 to permit the passage of air to and from the interior of the module.
The leads 22 extend to the outer surface at two opposite sides of the assembled shell and form a pattern of the overall module circuit. Advantageously the conductors 45 and 47 are coated with a thin lacquer coating to protect them from mechanical abrasion and oxidation.
Because each lead 22 is accurately positioned at a predetermined location on the face of the shell, the interconnecting conductors 45 and 47 can advantageously be formed by an automated or semi-automated hatch process. For example a frame-supported, preformed interconnection pattern may be conductively attached to the leads 22. Alternatively interconnections may be deposited on the shell in a pattern either by depositing the interconnections through a mask to form the pattern .directly or by depositing a conductive film over the entire interconnecting surface and forming the pattern by photoetching techniques known in the art. The conductors 45 and 47 interconnect the leads 22 with the L-shaped leads 26,
which are transitional connections, permitting the module to be connected to other modules and'other equipment at its base.
The leads 22 can also be interconnected by wire wrapping known in the art. If this interconnection technique is to be used the leads 22 are permitted to extend beyond the edges of the frames 12 instead of cutting them flush with the outer edge as shown in FIGURE 6.
The feed through leads 34 permit the interconnection of leads at opposite surfaces of the module. If needed, dummy frames 12 which have only feed through leads 34 can be incorporated in the module.
FIGURES 8 and 9 show an embodiment of our invention that has a number of thin metal plates 42 for dissipating heat generated by the circuits. It should be noted that, owing to their low power, digital circuits do not ordinarily require any heat dissipating plates or other auxiliary heat dissipating apparatus. The use of heat dissipating plates for certain other circuits, on the other hand, is often advantageous where heat is generated at greater rates.
The heat conducting plates 42 extend between the ends of the frames 12, passing beneath and contacting the substrate circuits 18. Each plate 42 is secured in a saddle 44 at each end of the frame 12 by an epoxy glue or any other suitable means known in the art. Preferably the upper surface of plate 42 is flush with the upper surface of frame 12. Usually, the plates 42 extend beyond the surface of the module, providing thermal radiating fins which can be cooled by convection. If desired, however, the ends of plates 42 can be flush with the surface of the module and connected to a suitable heat sink. It should be noted that the plates 42 provide some electrostatic shielding between circuits in the module.
An alternative method for dissipating heat from the module which can sometimes be used, if desired, is to fill the void within the shell with a metal oxide that is electrically insulating but thermally conducting.
It should be noted that the substrate circuit 18 shown in plan in FIGURE 9 is of the type in which the components are formed by depositing thin films on an insulating substrate. Ordinarily this surface of such circuit is coated with a suitable passivating material and no packaging other than the module itself is usually required.
FIGURE 10 shows a suitable jig in which the header 16, the frames 12 and the cover 14 can be stacked for assembling our module. Ithas a pedestal 52 on which the header 16 is placed with its leads 26 extending through an opening 54. We affix upstanding walls 56 to the pedestal 52. Keys 58 formed on each end of the walls 56 engage corresponding notches 28 on the header 16, cover 14, and frames 12. Slots cut in the end walls of the jig shown in FIGURE 10 accommodate the plates 42. The embodiment of our invention shown in FIGURES 8 and 9 uses a slightly different arrangement of keying notches 28 than the embodiment shown in FIGURES 1 to 7 because of the plates 42. The particular keying members 58 shown in FIGURE 10 are adapted to engage the notches shown in the embodiment of FIGURES 8 and 9.
'In summary, we mount our circuit on a rigid, modular box frame-which maintains the alignment of its input and output leads and facilitates automated assembly of these circuits into more complex circuits. We stack these frames and bond them together forming a shell thereof which shell encapsulates the circuits. The input and output leads are embedded in and extend to the outer surface of the wall of the shell in a predetermined matrix 'so'that the leads can be expeditiously interconnected by,
a suitable batch process.
It will be appreciated by those skilled in the art that our invention is not limited to integrated circuits. Microminiature circuits which are known in the art can be mounted on our frames and incorporated in a module which includes integrated circuits or other microminiature circuits. Moreover, individual components such as miniature inductor coils can also be advantageously mounted on a frame and incorporated in a module of integrated circuits.
Thus, it will be seen, we have accomplished the objects of our invention. We have provided a three-dimensional module which is not cast-encapsulated. Our box frame facilitates the handling of substrate circuits and accurately positions the circuit leads in the module. Our frame facilitates packaging of solid state circuits and permits them to be tested during the packaging process. Defective integrated circuits in a module can be replaced by cutting or breaking a frame out of a module and combinations are of utility and may be employed without reference to other features and subcombinations. This is contemplated by and is within the scope of our claims. It is further obvious that various changes may be made in details within the scope of our claims without departing from the spirit of our invention. It is therefore to be understood that our invention is not to be limited to the specific details shown and described.
Having thus described our invention, what we claim is:
1. A module comprising a plurality of mounts forming openings, a cover plate, a header plate, a plurality of flat circuits each of which has a plurality of coplanar leads, means securing said circuits respectively to said mounts in said openings, means adhesively joining said mounts and said cover plate and said header plate to form a hollow hermetic housing therefrom for encapsulating said circuits, said housing having an exterior surface formed by said mounts, said leads extending to said exterior surface, and means formed on said surface electrically interconnecting certain of said leads.
2. A module as in claim 8 including means disposed within said housing for conducting heat away from said circuits.
3. An assembly of generally planar circuits each having a plurality of generally coplanar leads including in combination a plurality of frames of insulating material, said frames forming openings, means mounting each of said circuits in a respective frame opening with its leads extending to the outer edge of the frame, and an insulating adhesive for assembling said frames in stacked relationship, said adhesive disposed around said frames to form a hollow hermetic housing with said leads extending to the outer surface of said housing.
4. A module comprising a stack of frames, each of said frames forming an opening, a plurality of fiat circuits each of which has a plurality of coplanar leads, means securing said circuits respectively to said frames in said openings, an adhesive extending around and confined between adjacent surfaces of said frames joining said frames together to a form a hollow housing for hermetically encapsulating said circuits, said housing having an exterior surface formed by said frames, said leads being embedded between said adjacent frame surfaces and extending to said housing exterior surface, and a conductive pattern on said housing exterior surface electrically interconnecting certain of said leads.
5. A module comprising in combination a stack of contiguous hollow mounts, a plurality of flat circuits, each of said circuits secured to each of said mounts respectively, a continuous layer of insulating adhesive hermetically joining said mounts together aroundtheir interfaces to form a sealed hollow housing thereof which encapsulates said circuits, and means electrically interconnecting said circuits.
6. An integrated circuit module including in combination, a plurality of flat circuits each having a plurality of generally coplanar leads preformed with a certain interlead spacing, a plurality of frames of insulating material, each of said frames having an opening formed by a wall, a plurality of channels extending through the wall of each of said frames, said channels having a spacing corresponding to said interlead spacing, said circuits being disposed within the respective frame openings with said leads disposed in said channels and with the leads of each circuit extending to the periphery of the associated frame, a cover plate, a header plate, means for bonding said cover plate and said-frames and said header plate in stacked relationship to form a hollow hermetically sealed housing having a wall formed by said frame walls and a pattern of conductive material on the external surface of-sai d housing wall for connecting certain of said leads.
7. A module as in claim 6 in which said frames are formed of refractory material.
8. A module comprising a stack of frames, a cover plate, a base plate, a plurality of fiat circuits each of which has a-component and a plurality of coplanar leads, means securing said circuits respectively within said frames with the leads of each circuit extending to the peripheral surface of the corresponding frame, means for adhesively joining together said cover plate and said frames and said base plate in superposed relationship to form a hollow hermatic housing for encapsulating said circuits, said frames forming a housing wall and said frame peripheral surface forming an exterior housing surface, said leads embedded in said wall and extending to said exterior surface and means on said exterior surface interconnecting certain of said leads.
9. In an integrated circuit module a plurality of flat circuits, each having a plurality of coplanar leads with a certain interlead spacing, a plurality of frames of insulating material, each of said frames having a wall, a plurality of channels extending through the wall of each of said frames, said channels having a spacing corresponding to said interlead spacing, said circuits being disposed within the respective frames with said leads disposed in said channels and with said leads of each circuit extending to the periphery of the associated frame, means assembling said frames in superposed relationship and a pattern of conductive material on the external surfaces of the frame walls for connecting certain of said leads.
References Cited UNITED STATES PATENTS 2,786,969 3/ 1957 Blitz. 3,243,661 3/1966 Ullery. 3,271,625 9/ 1966 Caracciolo. 2,821,669 1/ 8 Christian. 3,029,495 4/ 1962 Doctor. 3,212,047 10/ 1965 McDonough. 3,239,719 4/ 1966 Shower.
ROBERT K. SCHAEFER, Primary Examiner.
- D. SMITH, Assistant Examiner
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US2786969 *||Jan 28, 1954||Mar 26, 1957||Sanders Associates Inc||Electronic module structure|
|US2821669 *||Jun 26, 1956||Jan 28, 1958||Siemens Edison Swan Ltd||Mounting electrical circuit components|
|US3029495 *||Apr 6, 1959||Apr 17, 1962||Doctor Norman J||Electrical interconnection of miniaturized modules|
|US3212047 *||Jul 31, 1962||Oct 12, 1965||United Carr Inc||Miniaturized module interconnection|
|US3239719 *||Jul 8, 1963||Mar 8, 1966||Sperry Rand Corp||Packaging and circuit connection means for microelectronic circuitry|
|US3243661 *||Jun 25, 1963||Mar 29, 1966||United Aircraft Corp||Enhanced micro-modules|
|US3271625 *||Dec 9, 1963||Sep 6, 1966||Signetics Corp||Electronic package assembly|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US3614541 *||Apr 8, 1969||Oct 19, 1971||North American Rockwell||Package for an electronic assembly|
|US3621338 *||Jan 2, 1970||Nov 16, 1971||Fairchild Camera Instr Co||Diaphragm-connected, leadless package for semiconductor devices|
|US3671813 *||Dec 10, 1970||Jun 20, 1972||Texas Instruments Inc||Panel board system and components thereof with connector and integrated circuit device|
|US4012579 *||Feb 21, 1975||Mar 15, 1977||Allen-Bradley Company||Encapsulated microcircuit package and method for assembly thereof|
|US4345300 *||Dec 18, 1979||Aug 17, 1982||Cts Corporation||Recessed circuit module|
|US4398235 *||Sep 11, 1980||Aug 9, 1983||General Motors Corporation||Vertical integrated circuit package integration|
|US4463409 *||Mar 22, 1983||Jul 31, 1984||Westinghouse Electric Corp.||Attitude independent evaporative cooling system|
|US4590538 *||Nov 18, 1982||May 20, 1986||Cray Research, Inc.||Immersion cooled high density electronic assembly|
|US4601526 *||Aug 28, 1985||Jul 22, 1986||Honeywell Inc.||Integrated circuit chip carrier|
|US4628411 *||May 2, 1985||Dec 9, 1986||International Business Machines Corporation||Apparatus for directly powering a multi-chip module from a power distribution bus|
|US4872843 *||Mar 24, 1987||Oct 10, 1989||Dowty Electronic Components Limited||Interconnection systems for electrical circuits|
|US5107586 *||Mar 15, 1991||Apr 28, 1992||General Electric Company||Method for interconnecting a stack of integrated circuits at a very high density|
|US5123848 *||Jul 20, 1990||Jun 23, 1992||Cray Research, Inc.||Computer signal interconnect apparatus|
|US5200363 *||Nov 20, 1991||Apr 6, 1993||Robert Bosch Gmbh||Method for manufacturing a semiconductor package including a glass support|
|US5310701 *||Jan 13, 1993||May 10, 1994||Eupec Europaeische Gesellschaft fur Leistungshalbleiter mbH&Co||Method for fixing semiconductor bodies on a substrate using wires|
|US5426566 *||Jan 4, 1993||Jun 20, 1995||International Business Machines Corporation||Multichip integrated circuit packages and systems|
|US5455385 *||Jun 28, 1993||Oct 3, 1995||Harris Corporation||Multilayer LTCC tub architecture for hermetically sealing semiconductor die, external electrical access for which is provided by way of sidewall recesses|
|US5502667 *||Sep 13, 1993||Mar 26, 1996||International Business Machines Corporation||Integrated multichip memory module structure|
|US5517754 *||Jun 2, 1994||May 21, 1996||International Business Machines Corporation||Fabrication processes for monolithic electronic modules|
|US5526230 *||Sep 21, 1993||Jun 11, 1996||Thomson-Csf||3D interconnection process for electronic component packages and resulting 3D components|
|US5561622 *||Sep 13, 1993||Oct 1, 1996||International Business Machines Corporation||Integrated memory cube structure|
|US5587341 *||Oct 18, 1994||Dec 24, 1996||Hitachi, Ltd.||Process for manufacturing a stacked integrated circuit package|
|US5622588 *||Feb 2, 1995||Apr 22, 1997||Hestia Technologies, Inc.||Methods of making multi-tier laminate substrates for electronic device packaging|
|US5656548 *||Sep 19, 1995||Aug 12, 1997||Kopin Corporation||Method for forming three dimensional processor using transferred thin film circuits|
|US5688721 *||Mar 26, 1996||Nov 18, 1997||Irvine Sensors Corporation||3D stack of IC chips having leads reached by vias through passivation covering access plane|
|US5702984 *||Nov 14, 1996||Dec 30, 1997||International Business Machines Corporation||Integrated mulitchip memory module, structure and fabrication|
|US5708298 *||Dec 10, 1996||Jan 13, 1998||Hitachi Ltd.||Semiconductor memory module having double-sided stacked memory chip layout|
|US5798014 *||Oct 16, 1996||Aug 25, 1998||Hestia Technologies, Inc.||Methods of making multi-tier laminate substrates for electronic device packaging|
|US5885850 *||Mar 10, 1993||Mar 23, 1999||Thomson-Csf||Method for the 3D interconnection of packages of electronic components, and device obtained by this method|
|US5910685 *||Dec 3, 1997||Jun 8, 1999||Hitachi Ltd.||Semiconductor memory module having double-sided stacked memory chip layout|
|US5952611 *||Dec 19, 1997||Sep 14, 1999||Texas Instruments Incorporated||Flexible pin location integrated circuit package|
|US5956233 *||Dec 19, 1997||Sep 21, 1999||Texas Instruments Incorporated||High density single inline memory module|
|US5986894 *||Mar 19, 1998||Nov 16, 1999||Pulse Engineering, Inc.||Microelectronic component carrier and method of its manufacture|
|US5998860 *||Dec 19, 1997||Dec 7, 1999||Texas Instruments Incorporated||Double sided single inline memory module|
|US6014809 *||Mar 3, 1998||Jan 18, 2000||International Business Machines Corporation||Method for circuitizing over an edge of a circuit card|
|US6049129 *||Dec 19, 1997||Apr 11, 2000||Texas Instruments Incorporated||Chip size integrated circuit package|
|US6059917 *||Dec 6, 1996||May 9, 2000||Texas Instruments Incorporated||Control of parallelism during semiconductor die attach|
|US6084306 *||May 29, 1998||Jul 4, 2000||Texas Instruments Incorporated||Bridging method of interconnects for integrated circuit packages|
|US6087203 *||Dec 19, 1997||Jul 11, 2000||Texas Instruments Incorporated||Method for adhering and sealing a silicon chip in an integrated circuit package|
|US6089095 *||Dec 19, 1997||Jul 18, 2000||Texas Instruments Incorporated||Method and apparatus for nondestructive inspection and defect detection in packaged integrated circuits|
|US6177723||Dec 17, 1997||Jan 23, 2001||Texas Instruments Incorporated||Integrated circuit package and flat plate molding process for integrated circuit package|
|US6188128 *||Feb 9, 1998||Feb 13, 2001||Alcatel||Monoblock structure for stacked components|
|US6262488||Apr 16, 1999||Jul 17, 2001||Hitachi Ltd.||Semiconductor memory module having double-sided memory chip layout|
|US6274929||Sep 1, 1998||Aug 14, 2001||Texas Instruments Incorporated||Stacked double sided integrated circuit package|
|US6320126 *||Jul 14, 1998||Nov 20, 2001||Texas Instruments Incorporated||Vertical ball grid array integrated circuit package|
|US6387729||Jul 6, 2001||May 14, 2002||Texas Instruments Incorporated||Method for adhering and sealing a silicon chip in an integrated circuit package|
|US6392293||Jun 3, 1999||May 21, 2002||Kabushiki Kaisha Toshiba||Semiconductor package with sloped outer leads|
|US6420782||Jan 6, 2000||Jul 16, 2002||Texas Instruments Incorporated||Vertical ball grid array integrated circuit package|
|US6424030||May 24, 2001||Jul 23, 2002||Hitachi, Ltd.||Semiconductor memory module having double-sided stacked memory chip layout|
|US6521993||Apr 18, 2002||Feb 18, 2003||Hitachi, Ltd.||Semiconductor memory module having double-sided stacked memory chip layout|
|US6573460||Sep 20, 2001||Jun 3, 2003||Dpac Technologies Corp||Post in ring interconnect using for 3-D stacking|
|US6573461||Sep 20, 2001||Jun 3, 2003||Dpac Technologies Corp||Retaining ring interconnect used for 3-D stacking|
|US6667560||May 27, 1997||Dec 23, 2003||Texas Instruments Incorporated||Board on chip ball grid array|
|US6693346||Jan 14, 2003||Feb 17, 2004||Hitachi, Ltd.||Semiconductor memory module having double-sided stacked memory chip layout|
|US6716672 *||Jan 30, 2001||Apr 6, 2004||3D Plus||Three dimensional interconnection method and electronic device obtained by same|
|US6768646||Jul 14, 1998||Jul 27, 2004||Texas Instruments Incorporated||High density internal ball grid array integrated circuit package|
|US6856010||Jul 14, 2003||Feb 15, 2005||Staktek Group L.P.||Thin scale outline package|
|US6928725 *||Nov 17, 2003||Aug 16, 2005||Delta Electronics, Inc.||Method for packing electronic device by interconnecting frame body and frame leads with insulating block and its packing structure|
|US7291910||Jun 5, 2002||Nov 6, 2007||Tessera, Inc.||Semiconductor chip assemblies, methods of making same and components for same|
|US7298622 *||Jun 15, 2005||Nov 20, 2007||Tyco Electronics Corporation||Modular heat sink assembly|
|US7390973 *||Feb 17, 2006||Jun 24, 2008||Samsung Electronics Co., Ltd.||Memory module and signal line arrangement method thereof|
|US7777321||Oct 25, 2005||Aug 17, 2010||Gann Keith D||Stacked microelectronic layer and module with three-axis channel T-connects|
|US7829991||Oct 18, 2007||Nov 9, 2010||Micron Technology, Inc.||Stackable ceramic FBGA for high thermal applications|
|US7872339 *||Oct 19, 2004||Jan 18, 2011||Keith Gann||Vertically stacked pre-packaged integrated circuit chips|
|US7928549 *||Sep 19, 2006||Apr 19, 2011||Taiwan Semiconductor Manufacturing Co., Ltd.||Integrated circuit devices with multi-dimensional pad structures|
|US8012803||Sep 27, 2010||Sep 6, 2011||Aprolase Development Co., Llc||Vertically stacked pre-packaged integrated circuit chips|
|US8072082||May 28, 2008||Dec 6, 2011||Micron Technology, Inc.||Pre-encapsulated cavity interposer|
|US8399297||Oct 20, 2011||Mar 19, 2013||Micron Technology, Inc.||Methods of forming and assembling pre-encapsulated assemblies and of forming associated semiconductor device packages|
|US8567051 *||Oct 24, 2008||Oct 29, 2013||3D Plus||Process for the vertical interconnection of 3D electronic modules by vias|
|US9123690||Oct 18, 2013||Sep 1, 2015||University Of South Florida||Systems and methods for forming contact definitions|
|US9324565||Jul 20, 2015||Apr 26, 2016||University Of South Florida||Systems and methods for forming contact definitions|
|US20020155728 *||Jun 5, 2002||Oct 24, 2002||Tessera, Inc.||Semiconductor chip assemblies, methods of making same and components for same|
|US20030002267 *||Jun 3, 2002||Jan 2, 2003||Mantz Frank E.||I/O interface structure|
|US20030013231 *||Jan 30, 2001||Jan 16, 2003||Christian Val||Three dimensionals interconnection method and electronic device obtained by same|
|US20030051911 *||Apr 5, 2002||Mar 20, 2003||Roeters Glen E.||Post in ring interconnect using 3-D stacking|
|US20040095737 *||Nov 17, 2003||May 20, 2004||Delta Electronics, Inc||Method for packing electronic device by interconnecting frame body and frame leads with insulating block and its packing structure|
|US20040108584 *||Jul 14, 2003||Jun 10, 2004||Roeters Glen E.||Thin scale outline package|
|US20040207990 *||Apr 21, 2003||Oct 21, 2004||Rose Andrew C.||Stair-step signal routing|
|US20050077621 *||Oct 19, 2004||Apr 14, 2005||Keith Gann||Vertically stacked pre-packaged integrated circuit chips|
|US20050218495 *||Jun 1, 2005||Oct 6, 2005||Tessera, Inc.||Microelectronic assembly having encapsulated wire bonding leads|
|US20060043563 *||Oct 25, 2005||Mar 2, 2006||Gann Keith D||Stacked microelectronic layer and module with three-axis channel T-connects|
|US20060207788 *||Feb 17, 2006||Sep 21, 2006||Chil-Nam Yoon||Memory module and signal line arrangement method thereof|
|US20060285297 *||Jun 15, 2005||Dec 21, 2006||Tyco Electronics Corporation||Modular heat sink assembly|
|US20080042252 *||Oct 18, 2007||Feb 21, 2008||Micron Technology, Inc.||Stackable ceramic fbga for high thermal applications|
|US20080067657 *||Sep 19, 2006||Mar 20, 2008||Taiwan Semiconductor Manufacturing Co., Ltd.||Integrated circuit devices with multi-dimensional pad structures|
|US20090260228 *||Oct 24, 2008||Oct 22, 2009||3D Plus||Process for the vertical interconnection of 3d electronic modules by vias|
|US20090267171 *||May 28, 2008||Oct 29, 2009||Micron Technology, Inc.||Pre-encapsulated cavity interposer|
|US20100009499 *||Sep 18, 2009||Jan 14, 2010||Gann Keith D||Stacked microelectronic layer and module with three-axis channel t-connects|
|US20110045635 *||Sep 27, 2010||Feb 24, 2011||Keith Gann||Vertically stacked pre-packaged integrated circuit chips|
|US20150048344 *||Aug 5, 2014||Feb 19, 2015||Samsung Display Co., Ltd.||Organic light emitting diode display|
|DE3723209A1 *||Jul 14, 1987||Jan 26, 1989||Semikron Elektronik Gmbh||Semiconductor arrangement|
|EP0070533A2 *||Jul 16, 1982||Jan 26, 1983||International Business Machines Corporation||Substrate for semiconductor chips|
|EP0070533A3 *||Jul 16, 1982||Jan 30, 1985||International Business Machines Corporation||Substrate for semiconductor chips|
|WO1995025341A1 *||Mar 7, 1995||Sep 21, 1995||Irvine Sensors Corporation||3d stack of ic chips having leads reached by vias through passivation covering access plane|
|WO1996023612A1 *||Feb 2, 1996||Aug 8, 1996||Hestia Technologies, Inc.||Methods of making multi-layer laminate substrates for electronic device packaging|
|WO1999017317A1 *||Sep 28, 1998||Apr 8, 1999||Pulse Engineering, Inc.||Microelectronic component carrier and method of its manufacture|
|WO2001059841A1 *||Jan 30, 2001||Aug 16, 2001||3D Plus||Three-dimensional interconnection method and electronic device obtained by same|
|U.S. Classification||361/730, 257/686, 29/830, 361/783, 438/109, 439/485, 257/E25.23, 257/E23.172, 439/76.1|
|International Classification||H01L25/10, H01H51/28, H01L23/538|
|Cooperative Classification||H01H51/28, H01L25/105, H01L23/5385|
|European Classification||H01L23/538F, H01L25/10J, H01H51/28|