Search Images Maps Play YouTube News Gmail Drive More »
Sign in
Screen reader users: click this link for accessible mode. Accessible mode has the same essential features but works better with your reader.

Patents

  1. Advanced Patent Search
Publication numberUS3381245 A
Publication typeGrant
Publication dateApr 30, 1968
Filing dateFeb 23, 1966
Priority dateFeb 26, 1965
Also published asDE1290584B
Publication numberUS 3381245 A, US 3381245A, US-A-3381245, US3381245 A, US3381245A
InventorsGustav Guanella
Original AssigneePatelhold Patentverwertung
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Compensation system having feedforward and feedback circuits for canceling leading and trailing edge distortion of signal pulses
US 3381245 A
Abstract  available in
Images(4)
Previous page
Next page
Claims  available in
Description  (OCR text may contain errors)

April 30, 1968 G. GUANELLA COMPENSATION SYSTEM HAVING FEEDFORWARD AND FEEDBACK CIRCUITS FOR CANCELING LEADING AND TRAILING EDGE DISTORTION OF SIGNAL PULSES 4 Sheets-Sheet l Filed Feb. 23, 1966 O 6 l p2 f w PR mm2 M E T w C V\/Y/`|%|v KM) I f ATTORNEY April 30, 1968 G. GUANELLA 3,381,245

COMPENSATION SYSTEM HAVING FEEDFORWARD AND FEEDBACK CIRCUITS FOR CANCELING LEADING AND TRAILING EDGE DIsToRTIoN oF SIGNAL PULsEs Filed Feb. 23, 1966 4 Sheets-Sheet 2 T 1 5- Prior A/Z C DELA/Y c/ecU/T j' Z 11544)/ c/eca/r C .2 -F L e -0 d fi @Z /2/ l CSS? L Lsg/ Y' 1 E. l q l( T 1 EIO- 13a/4V p P C//acu/r c e c f 2 e fC INVENTOR ATTORNEY QasmVaA/ELL/Q BY Heel. faam April 30, 1968 G. GUANELLA 3,381,245

COMPENSATION SYSTEM HAVING FEEDFORWARD AND FEEDBACK CIRCUITS FOR CANCELING LEADING ANDTBAILING EDGE DISTORTION OF SIGNAL PULSES iNvENToR $05741/ @7M/v5.4 4

BY fnv/ez, RArf/ April 30, 1968 G. GUANELLA 3,381,245

COMPENSATION SYSTEM HAVING FEEDFORWARD AND FEEDBACK CIRCUITS FOR CANCELING LEADING AND TRAILING EDGE DIsToRTIoN oF smNAL PuLsEs Filed Feb. 23, 1966 4 Sheets-Sheet 4 ,ya Cf X, 62 '/0 E 5 2 E 3 2 E 2 E .9

2 J? z? 2 E T1 Il.

ATTORNEY United States Patent O 3,381,245 COMPENSATION SYSTEM HAVING FEEDFOR- WARD AND FEEDBACK CIRCUITS FOR CAN- CELING LEADING AND TRAILING EDGE DISTORTION OF SIGNAL PULSES Gustav Guanella, Zurich, Switzerland, assignor to Patelhold Patentverwertungsund Electro-Holding AG., Glarus, Switzerland Filed Feb. 23, 1966, Ser. No. 529,434 Claims priority, application Switzerland, Feb. 26, 1965, 2,705/65 8 Claims. (Cl. S33-20) ABSTRACT OF THE DISCLOSURE In signal transmission by means of equi-spaced signal pulses through a transmission path subjecting the pulses to Widening or dispersion involving both leading and tr-ailing disturbing components preceding and following', respectively, a signal pulse, both the leading and trailing distortion is eliminated or minimized by a compensator comprising a single delay device having at least one input and at least one output coupling point, further means being provided for passing the pulses to be corrected from said input to said output coupling point with the dilerence in transit time of said device between said coupling points being equal to the spacing intervals between the signal pulses. In order to compensate for the trailing distortion components, there is provided a unidirectional feedforward circuit, in respect to the signal passing direction through said device, between said input and said output coupling points, and in order to compensate for the leading distortion components, there is provided a unidirectional feedback circuit, in respect to the signal passing direction through said device, between said output and said input coupling points. By the further provision of suitable amplitude control and polarity adjusting devices in both said feedforward and feed-back circuits, there is achieved a substantial cancellation of both the leading and trailing disturbing signal components by the use of a single delay device. If the signal pulses are distorted by two or more disturbing components spaced by intervals equal to the pulse spacing intervals, compensation of all components, both leading and trailing, may be effected by providing said device with a corresponding number of coupling points, spaced as to transmit time by differences equal to the pulse spacing intervals and connected to individual feedforward and feedback circuits each including its own vamplitude control and polarity adjusting device.

The present invention relates to distortion compensation in electrical pulsed signal transmission by means of equispaced signal pulses modulated in accordance with the variations of a signal `or information to be transmitted.

In the transmission of lmodulated electric signal pulses through a transmission path or channel, the unavoidable -linear distortion, as a result of the frequency-dependent amplitude and/ or phase variations produced by the transmission channel, has the effect of both broadening or increasing the width of the pulses as well as changing the instantaneous or peak amplitudes thereof. As a consequence, the received pulse signals at a receiving station start prematurely in respect to their peak value or exhibit -an increased rise time, this distortion being referred to as leading pulse distortion for the purpose of this specification, and, in addition, the pulses are retarded relatively to their peak values or in reaching the final Zero value, the latter distortion being hereafter referred to as trailing pulses distortion for the purpose of this specification. As a further result of the leading and trailing distortions,

amplitude distortion or variation of the peak values of the pulses may occur to a greater or lesser extent.

Where the pulses are transmitted with constant spacing intervals, such as in pulse amplitude modulation or pulse code modulation transmission, the leading and trailing distortions of the pulses may give rise to undesirable interference or crosstalk in that each pulse of a transmission signal pulse series carries with it interfering leading and trailing pulses or components liable to encroach upon the preceding and next following pulse or pulses, aside from the resultant amplitude or peak value distortion of the pulses referred to hereinbefore.

Moreover, it may be diicult, if not impossible, depending upon the extent or degree of the prevailing distortions, to segregate the individual pulses clearly, aside from the ditiiculty to determine their original amplitude accurately and faithfully at the utilization or receiving station.

One way of -resolving the resultant problem in pulse signal transmission of the referred-to type is the utilization at the receiving station of means to restore the distorted pulses to their original shape and amplitude, at least to such an extent as to enable a clear and satisfactory identiiication and subsequent demodulation of the received signal pulses.

Various means and devices have already become known in the past for effecting a solution of the foregoing problem all of which involve the provision of a delay device or network at the receiving station for the production of compensating or correcting signals or pulses adapted to cancel or suppress the interfering pulse or signal components. All of the known devices operate to compensate or correct either the leading distortion or the trailing distortion only of the received pulses, the elimination of the trailing distortion alone being sutiicient in certain limited cases for the desired purpose. In all other cases, separate cascaded delay or compensating arrangements are required, to sequentially correct or eliminate both the leading and trailing distortion of the received signal pulses. Arrangements of the latter type are relatively costly aside from other obvious defects and disadvantages.

Accordingly, an important object of the present invention is the provision of an improved distortion compensating device or network of the referred-to type for correcting `both the leading and trailing distortion in a pulsed signal transmission system which device is both simple in design and construction as well as eicient in operation and may be produced at relatively low cost.

A more specific object of the invention is the provision of an improved distortion compensating -device of the referred-to type utilizing a single delay device or network for the compensation or suppression of both the leading and trailing distortion components of the pulses in a pulse signal transmission system.

Another object of the invention is the provision of a pulse distortion correcting `system of the referred-to type suitable for suppressing distortion directly originating in a first transmission channel as well as distortion originating from a neighboring transmission channel due to mutual coupling obtaining between said channels.

The invention, both as to the foregoing and ancillary objects as well as novel aspects thereof, will be better understood from the following detailed description, taken in conjunction with the accompanying drawings forming part of this specification and in which:

FIG. 1 shows in block diagram form a normally distortion-free signal transmission path including a pair of substitute devices or networks for the simulation or articial production of leading and trailing pulse distortion, representing the conditions of an actual transmission channel or circuit;

FIG. 2 shows, in greater detail and by way of example,

a pair of distorting networks embodied in the transmission channel of FIG. 1;

FIGS. 3a, 3b, and 3c illustrate, respectively, an original pulse signal, the same signal subjected to leading distortion, and after additional trailing distortion by the networks of FIG. 2;

FIG. 4 shows a general distortion compensating network of known construction for correcting a distorted pulse signal, such for instance of the type according to FIG. 3c;

FIG. 5 shows a modification of FIG. 4;

FIG. 6 shows the improved distortion compensating network constructed in accordance with the principles of the invention;

FIG. 6a shows a simplified compensating system of the type of FIG. 6;

FIG. 7 shows, in a manner similar to FIG. 1 and in block diagram form, a pair of mutually coupled transmission channels embodying networks or devices for the production of both direct and mutual distortion, leading as well as trailing, of the pulses transmitted through said channels;

FIG. 8, being analogous to FIG. 2` shows, more clearly and by way of example, the delay devices of FIG. 7 for producing both single-channel (direct) and doublechannel (mutual) distortion of the signal pulses;

FIG. 9 shows, in general block diagram form, a system for compensating the distortion produced by the substitute networks of FIGS. 7 and 8;

FIG. 10 illustrates in greater detail and by way of example, a practical realization of a compensating system according to FIG. 9;

FIG. 11a shows one form of a charge-transfer delay device or network suitable for use in connection with the invention;

FIG. 11b shows an example of a passive delay network suitable for carrying into effect the invention;

FIG. 12a shows a switching sequence table for the device yaccording to FIG. 11a;

FIG. 12b shows another embodiment of charge-transfer delay device suitable for use in connection with the invention;

FIG. 13 shows, in block diagram form, a delay device embodying an analog-digital and digital-analog converter;

FIG. 14a is a block diagram of a transmitting system comprising a signal transmitter, a receiver and distortion compensator according to the invention; and

FIG. 14b is a diagram similar to FIG. 14a and showing a modification of the latter.

Like reference characters denote like parts and magnitudes throughout the different views of the drawings.

With the foregoing objects in view, the improved distortion correcting system or network according to the invention, according to one aspect thereof, involves generally the provision of a pulse delay device, such as a delay line or -the like storage and delay network, having an input and an output for passing therethrough a series of signal pulses to be corrected, said device having a delay time substantially equal to a whole number, including unity, multiple of the spacing interval between the pulses. There is furthermore provided at least one feedforward circuit branch between said input and said output and at least one feedback circuit branch between said output and said input, suitable current amplitude and polarity control means being inserted in said branch circuits, whereby both leading and trailing distortion of the pulses may be corrected or compensated by the aid of a single or delay device or network.

In its simplest embodiment, the delay device may have a delay time equal to a single pulse spacing interval for the correction of leading and trailing pulse distortion originating from a single preceding and following pulse in a series. Where distortion caused by more than a single ad joining pulse, i.e. both leading and trailing, is to be corrected, the delay device has a total delay time equal to a .4 multiple of a pulse spacing interval with suitable tap or intermediate coupling points being provided upon said device spaced by a pulse spacing interval, for deriving properly timed feed forward and feedback correcting signals or pulses. In this case, that is, where more than one correcting or compensating pulse is involved, the latter are combined by a pair of summation circuits or networks supplying the correcting pulses or signals for both the leading and trailing distortion correction, respectively, from the common delay device or network, in a manner as will become further apparent as the description proceeds. The proper transmission directions in the feedforward and feedback circuits or branches may be achieved either by the use of a uni-directional delay device 0r by the provision of uni-directional conducting devices in the circuits, such as amplifiers, rectifiers, etc.

Referring more particularly to FIG. 1, there is shown an equivalent circuit of a distorting transmission channel connecting a transmitting point A with a receiving point or station B by `a distortion-free transmitting path or circuit including a pair of cascaded leading and trailing distortion producing devices or networks HV and HN, respectively, designed to result in a distorted received pulse signal c from an original transmitted signal a simulating the actual distortion conditions prevailing in an ordinary transmission line or channel, in the manner more clearly illustrated by FIGS. 3a-3c. This simulation of an actual transmission channel is presented for explanatory purposes, to afford a better understanding of the design and operation of the distortion compensating device described in the following.

This distortion producing networks HV and HN of FIG. 1 may consist of a first and second delay device or network Ll and L2, FIG. 2, from which the leading and trailing distorting pulses or components are derived through suitable adjustable amplitude control and polarity adjusting devices R 1, R1 and R2 in the example illustrated. The derived distorting signals are combined in the summation circuits or devices SSV and SSN of the networks HV and HN which are connected in cascade, to first produce a signal b from the signal a subjected to leading distortion in HV and to thereafter subject the signal b to trailing distortion in the device HN, to result in the final signal distorted c. The delay times of the networks or systems L1 and L2 correspond substantially to the intervals T between the pulses being transmitted, or whole-number multiples thereof.

More specifically, each of the distorting networks HV and HN comprises a delay line or the like L1 and L2, respectively, an input of each said lines, and an output in the form of a summation device or circuit SSV and SSN, respectively. The summation circuit of each line is connected to a plurality of points of the respective delay line spaced by distances corresponding substantially to the spacing intervals of the pulses to be distorted, with suitable amplitude control and polarity adjusting devices R 1, R1 and R2 being inserted in the branch circuits between the summation circuits and associated delay lines, excepting either the branch farthest from the input of the line, as in HV, for the production of the leading distortion of the pulses, and the 'branch circuit being closest to the input terminal 'of the line, as in HN, for the production of the leading distortion of the pulses respectively.

Thus, considering the distorting circuit as a parallel network comprising a direct branch in the main signal path and a shunt branch including the delay device in parallel to said main branch, the signal attenuator and polarity adjusting device is inserted either in series with the main branch yas in HV, FIG. 2, to produce leading pulse distortion, or in series with the shunt branch as in HN, to produce trailing pulse distortion, respectively.

FIGS. 3ft-3c more clearly illustrate the distortion of the pulses by the networks of FIG. 2, it being assumed that the original signal or transmitted pulse a has an instantaneous amplitude or peak value An in accordance with FIG. 3a. Leading distortion in HV, FIG. 2, then produces from the signal a a signal b in accordance with FIG. 3b, signal b having an instantaneous peak An at the instant (IH-DT and an instantaneous value r 1An at the instant nT, wherein r 1 represents the coupling or transmission coefficient of the coupling device R 1. In a similar manner, trailing distortion of the signal b in HN results in the final signal c, FIG. 3c, the latter having a value r1An .at the instant (n-|-2)T, a value r2An at the instant (n-|-3)T, the latter being assumed as negative in the example illustrated compared with 1'1An, and an instantaneous or peak amplitude .4-j-11r 1An with r1 and r2 again representing the transmitting coeiiicients of the devices R1 and R2, respectively, in the manner shown and further understood from the drawing.

With the pulses c being distorted, such as in the manner shown in FIG. 3c, to simulate the conditions of an actual transmission line or circuit, the problem now arises of producing once again from the signal c, having instantaneous values Cn, CM1, CM2, Cn+3, a non-distorted signal a having a peak amplitude An, FIG. 3a.

As can be readily seen from the foregoing, distortion of the signal c can be removed or corrected by means of a compensating device or network being similar to the distorting network of FIG. 2 and shown specifically in FIG. 4.

In the latter, wherein KV represents the leading distortion compensator and KN represents the trailing distortion compensator, it has been assumed that the pulses have been subjected to both leading and trailing distortion 1by more than one preceding and following pulse, respectively, with the control devices P 1 and P 2 assumed to compensate the leading distortion (negative subscripts) and the control devices P1 and P2 assumed to compensate the trailing distortion of the pulses (positive subscripts), respectively. Besides, the polarities of the correcting pulses are indicated, in the drawing, by way of examples, by the minus signs adjoining the arrows leading from P1 and P2.

An important factor in the arrangement according to FIG. 4, with the summation devices of both lines L1 and L2 being combined into a common device or circuit SS, is the sequence of the delay lines or systems L1 and L2, that is, such that compensation is iirst effected of the leading distortion of the pulses and thereafter of the trailing distortion. In other words, in the system according to FIG. 4 different signals are applied to or present, at a given instant, at the inputs of the delay devices L1 and L2.

It can be shown that distortion may also be corrected or removed by means of a modified arrangement of the compensator as shown in FIG. 5, wherein, in contrast to FIG. 4, the trailing distortion of the input signal is first of all compensated in KN comprising the delay network L2 and the summation circuit SS2, whereupon the resultant intermediate signal d is freed from its leading distortion in KV comprising the delay line L1 and summation circuit SS1, to obtain a final distortion-free signal e. In other words, in FIG. 5 separate delay lines as well as separate summation circuits are required for the suppression of both the leading and trailing distortion components of the pulses, it being of particular significance here that the input signals to both delay circuits L1 and L2 are identical, being derived from the same summation device or bus bar SS2.

It is thus possible, in the manner described, to correct or compensate both leading and trailing distortion of a pulse signal by the proper design of the delay devices L1 and L2, as well as of the transmission coefficients and polarities of the devices P 1, PL2, P1 and P2 to correspond to or be properly related to those of an equivalent or substitute network simulating the transmission path to be corrected.

According to the improvement of the present invention, the same effect and results described in the foregoing are Aadheved with a simplified distortion compensating network or arrangement as shown by FIG. 6, wherein both delay lines L1 and L2 of FIG. 5 are combined into a single line or delay device L0. More specifically, the circuit of the :invention comprises the common delay line or device LO for removing or correcting both the leading and trailing distortions of an incoming signal c. The syste-m for the removal of the trailing distortion, comprising the devices P1 and P2, and summation circuit SS2, is again designated by KN as in FIG. 5 and fra-med in a corresponding fashion in FIG. 6'. The circuit and adjustment of this part of the network are identical to those shown in FIG. 5, whereby the intermediate signal d also appears at the input of the delay l-ine L0 in FIG. 6.

The Kdelay system for removing the leading distortion designated in FIG. 5 by Kv is associated with the same delay line or device L11 in FIG. 6. Again, the signal d is derived from the delay line or system L2 as in FIG. 5 via the output devices P 1 and P 2 and fed to the summation circuit SS1. As a consequence, the final output signal e of the device according to FIG. 6 is the same as the output signal in FIG. 5 and, accordingly likewise corresponds, except for negligible departures, to the original non-distorted signal a.

In other words, in FIG. 6, the input signal c applied to S82 and passed, in the direction of the arrow, to SS1 through L0 is corrected at point 1 of L0 by the feedback signals of both P1 and P2, to remove the trailing distortion from the signal in the manner pointed out, or to produce an intermediate signal d which is then, in turn, corrected at point 3 of L0 by the forward feed signals of lboth P 1 and P 2, to remove the leading distortion from the signal d, to result in the final corrected signal e.

If the delay device L0 is of the unidirectional type, as indicated by the arrow and constructed for instance as shown by FIGS. lla :and 12a, the feedforward and feedback circuits may be connected in the manner shown. If, on the other hand, the delay device is of the bidirectional type, as shown by FIG. 11b, suitable unidirectional conducting ydevices (amplifiers, diodes, etc.) may be inserted in the circuits, as indicated Iby the additional arrows adjoining the summation circuits.

FIG. 6a shows a simplified compensator arrangement according to the invention for the special case where the signal pulses c to be corrected have been subjected to both leading and trailing distortion by a single preceding and following pulse only, whereby the line L0 may have a length corresponding to a single spacing interval between the pulses, compared with the line L0 of twice said interval in FIG. 6.

With reference to the removal or suppression of the amplitude distortion, let it lbe assumed that the amplitude values transmitted by the coupling members R 1, R2, R3 for the leading distortion of the system L1 of the FIG. 2 are designated by r 1, r1, r2. In this case, it may be calculated that the following coupling factors will result in a substantial compensation of the leading distortion in KV of both FIGS. 5 and 6:

In order to compensate for the trailing distortion, the same coupling factors p1=r1 and p2=r2 may be used in KN as in the simulation HN of the transmission channel of FIG. 2. This, in turn, leads to an instantaneous value En of the output signal e substantially agreeing, with the exception of a small error, with the instantaneous values An 1 of the original signal, being three steps in adv-ance, as follows:

The error r3 1 is in general comparatively small, that is, the amplitude distortion is reduced to a negligible value. If required, the error may be further reduced by an increase of the number of stages of the delay device.

The transmission system may comprise several parallel transmission channels with a certain amount of mutual coupling obtaining between neighboring channels. These couplings produce additional distortion, which may be likewise corrected by the improved compensating means according to the invention.

FIGS. 7 and 8 illustrate, by way of example, the simulation of two adjacent transmission channels, connecting a transmitter A with a receiver B, with the input signals of the channels being designated by a and a", and with the output signals being designated by c and c", respectively. Each channel comprises a leading distorter HV and II"V and a trailing distorter H'N and IIN, respectively as in FIG. l. Again, if there is mutual coupling between the channels, a distinction must be made between the leading and trailing mutual distortions., the occurrence f which is represented by the additional distorting circuits or networks I-Iw, H"W and HM, I-IM, respectively.

Experience has shown that the leading distortion acting on a neighboring channel usually is of little importance in practice. The corresponding networks HW are accordingly indicated by dashed lines in FIGS. 7 and 8, as also are the corresponding correction networks KW in FIGS. 9 and l0. From the intermediate signals b', b, trailing distortion in HN and HM produce the final distorted or output signals c and c of the transmission channels.

In FIG. 8, which substantially corresponds to FIG. 7, the various distorting networks HV, HN, HW and HM are shown in greater detail and by way of example, the direct leading distortion couplings being designated by R 1 and R 1, the direct trailing distortion couplings being designated by P'1, P2 and P1, P2, the leading mutual distortion couplings being designated by S'o, and S 1 and S0, S" 1 and with the trailing mutual distortion coupling being designated by Q'o, Q'i, Qz, and Q0, Q"1, Q"2, respectively.

FIG. 9 shows in general block diagram form a distortion correcting system for removing the leading direct and mutual distortions by the networks KN, KN and K'M, KM, and for removing the trailing direct and mutual distortion by the networks Kv, K"v and K'W, KW, respectively, to convert the received distorted signals c and c into the linal distortion-free signals e and e via the intermediate signals d and d, respectively.

FIG. shows, by way of example, a more detailed distortion compensating system according to the invention embodying two delay lines L'o and L0 only for the removal of all the direct and mutual distortions, both leading and trailing, from the signals c and c, the leading and trailing distortion couplings for one channel being designated by P 1, P 2 and Pl, P2, the leading and trailing distortion couplings for the other channel being designated by PLl, P 2 and P1, P"2, the mutual leading and trailing distortion couplings for the rst channel being designated by QLO, Q' 1, Q 2 and Qo, Qi, Qg, and the mutual leading and trailing distortion couplings of the second channel being designated by Q" 0, Q" 1, Q" 2, and Q0, Q1, Q2, respectively. Connection of the coupling devices with the associated delay devices LO and L0 and summation circuits SS1, SS"1, SS'2 and SS2 is substantially the same as in FIG. 6, whereby to provide direct leading distortion compensators KN, KN, direct trailing distortion compensators Kv KV, mutual leading distortion compensators KM, KM, and mutual trailing distortion compensators KW, KW, respectively, in the manner shown and understood from the foregoing.

If no leading distortion between the channels has to be taken into account, the distorting networks HW indicated by dashed lines in FIGS. 7 and 8 may be omitted, as may be the distortion-removing networks KW indicated in dashed form in FIGS. 9 and 10.

It may again be shown by calculation that, in order to remove a substantial amount of the distortion, the following coupling values p l, p 2 may be used advantageously for the leading distortion removers KV and K"V:

p 1=r 1; P 2=r2c1 Il H ll rl P 1:I 1, P 2=f 2 1 As a consequence, there are obtained the following instantaneous values of the corrected output signal:

The factors r3 1 may in general be neglected, that is, the instantaneous values En of the received and corrected signals correspond with a high degree of accuracy to the instantaneous values An 3 three steps in advance of the transmitted signals.

In the device according to FIG. 10, a single delay systern in each case, Lo, or L0, is sutiicient to correct for leading and trailing distort-ion within a channel, and these systems additionally serve to correct for coupling distortion between the channels, whereby to result in quite a considerable reduction of parts or apparatus compared with the known compensating devices or systems according to the prior art.

FIG. lla shows, by way of example, an active unidirectional delay devi-ce, operating on the principle of electric charge storage and transfer and being suited for the purposes of the invention. In the arrangement shown, the terminals 1, 2, 3 correspond to those of the device L0 of FIG. 6. In operation, let it be assumed that the capacitors C1 and C2 have been charged to a dcnite instantaneous value of a signal pulse to be delayed or transmitted. The electronic switches X1-X4 are nowbrietly closed one after another in rapid sequence, such as by means of an electron beam distributor X cooperating with said switches as indicated schematically by the dot-dash lines x, in a manner first to discharge the capacitor C2 via X1, to subsequently transfer the charge of C1 to C2 via X2, and to finally completely discharge C1 via X3 and to recharge the same via X4 to the instantaneous voltage appearing at the terminal 1 at the commencement of a new operating or switching cycle. As a consequence, provided the use of a sufficiently high switching frequency compared with the pulse recurrence frequency, the instantaneous values of the applied pulse signals will be delayed by the sequential charging and discharging of the capacitors C1 and C2, to provide suitable correcting signals or pulses at the terminals 1, 2, 3 in the manner described and understood from the foregoing. If desired or necessary, additional capacitors and asso'ciated charging and discharging switches may be interposed between the capacitors C1 and C2, to increase the number of incremental charges and transfers, or resulting delays of the pulses being transmitted.

lFIG. 1lb is a circuit diagram a distortion compensator a'ccording to the invention utilizing a passive bidirectional delay line or circuit L0 comprised in a known manner of series inductances `1 and parallel capacities c, the input signal c being applied to and the feedback signals being derived from said line through coupling transformers T1, T2, T3 via feedback regulators P1, P2, and the output signal e and feedforward signals being derived from said line through coupling transformers Tl, T2, T3, respectively, and via feedfonward regulators P 1, P 2, in substantially the same manner as in FIG. 6. In this case, the polarities of the correcting signals or pulses may be simply controlled by the proper Winding sense or connection of the coupling transformers.

A further example of an active delay system suitable for use in connection with the invention is shown by FIG. 12b. In this gure, the connections disposed on zl, as indicated by the circles in the drawing, are first closed by electronic switches, so that the voltages on the terminals 1, 2, 3 appear across the capacitors C4, C3, C2. Dur-ing the next step of switching, the connections disposed on Z1 are opened and the connections disposed on z2 closed. The voltages previously appearing on 1, 2

now appear at .2, 3. At the same time, the capacitor C2 being discharged via E and C1 is connected to the terminal I1. The connections on z3, Z4, Z1 are closed in further steps and in periodic sequence, whereby to cause the stored quantities to change over each time from 1 to 2 and from 2 to 3i, respectively. Thus, in the case of this switching system, the storage capacitors C1-C4 are connected in cyclic sequence, according to the program of FIG. 12b, to the terminals 1, 2, 3 and E.

In the examples of FIGS. lla and 12b, each instantaneous signal value is stored in analog form as a voltage of corresponding amplitude. According to an improved feature of the invention, as shown in FIG. 13, the instantaneous signal values applied by way of the terminal 1 may be converted, prior to their being stored, into digital pulse trains by binary coding in the analog-digital converter AD, whereby they provide, for instance, simultaneous output pulses D1-D4n at the output of AD. The latter pulses are then stored by one interval in the digital delay device LD at the output of which will appear the simultaneous pulses D1 1D4n 1 coordinated to the preceding instantaneous value Dn 1. This instantaneous value thus appears at the output of the digital-analog converter DA, and is derived via terminal 2. The instantaneous value Dn 2, which is delayed by .a further step, is generated in the same manner in LD2 and DA2 and appears at terminal 3.

The device shown in FIG. 6 may naturally also be constructed in digital fashion. In this case, the input signal c is changed into digital form by known means and the output signal e is re-converted into analog form. The regulators P z, P 1, P1, P2 then take the form of product forming circuits or networks in which the signals derived in binary form via 1, 2, 3 are multiplied in accordance with the rules of digital calculation, with each of the respective coupling values likewise being provided in binary form. In this case, the summation circuits SS1 and SSZ are also constructed in accordance with the rules of binary addition.

It should iinally be noted that digital or coded signals may also be utilized in connection with a delay device according to FIG. 12b. In this case, 4the terminals 1, 2, 3 may be replaced by four connections via which corresponding coded pulse trains are introduced and derived, respectively, instead of the analog signals. The capacitors C1, C2 must also be replaced by four capacitors, and likewise the change-over points disposed on z1, z2. This enables the corresponding coded pulse trains, designated by D1n D4n in FIG. 13, to be stored instead of the single analog signals, designated by Dn in the figures. Finally, the digital delay system may use other known storage or delay devices, such for example, as magnetic ring stores, taking the place of the storage capacitors.

In FIG. 14a, there is shown, in block diagram form, a complete transmission channel including a signal transmitter T and a signal receiver. The distortion correction device K is arranged at the receiving end or station that is, following the distorting transmission channel indicated by H. Alternatively, the distortion correcting device K may also be disposed at the transmitting end as shown by FIG. l4b, whereby the pre-distorted signals c, appear at the input of the transmission system H. In this case distortion is also completely removed from the received signal in the manner described, the sequence of the networks H and K having no effect if correctly designed or matched to the transmitted signal a.

A certain disadvantage of the arrangement according to FIG. 14a is the fact that any interference appearing in the received signal c will be amplified by the action of the pulse correction device K. The cause of this undesired phenomenon resides in the fact that Ithe signal e at the output of the correction device, for example in FIG. 6, corresponds not only to a deinite instantaneous value of the applied interfering signal, but rather to the sum of the values of several preceding interference signals. This disadvantage is avoided with the device according to FIG. 14b, since, in the absence of a correction at the receiving end, only the instantaneous value of the received interference is contained at any particular time in the signal c. There is nevertheless the disadvantage in this case that it is somewhat more difficult to adjust the correction device, since the corrective action at the transmitting is less easily recognized.

In certain cases, the correction may also be subdivided and it is then advantageous to arrange for a coarse correction at the transmitting end and for fine correction at the receiving end, respectively.

There is thus provided by the invention a relatively simple and eicient distortion correcting system or device for removing both leading and trailing pulse distortion in a pulse signal transmission system. The invention, while being of special use in pulse amplitude modulation by suppressing or minimizing amplitude distortion and improving the quality of the signal transmission, equally applies to either transmission systems utilizing equi-spaced pulses for the prevention of crosstalk, such as in timedivision multiplex transmission, or generally for the reshaping or restoring of the pulses distorted by a transmission line or channel.

In the foregoing Ithe invention has been described in reference to a specific illustrative device or embodiment. It will be evident, however, that variations and modifications, as well as the substitution of equivalent elements or circuits for those shown herein for illustration, may be made without departing from the broader scope and spirit of the invention as set forth in the appended claims. The specification and drawings are accordingly to be regarded in an illustrative rather than in a restrictive sense.

I claim:

1. A pulse distortion correcting system for use in electric signal transmission by means of equi-spaced signal pulses, preceded and followed, respectively, by 'both leading and trailing distorting components, comprising in combination:

(l) a single delay device having at least one input and one output coupling point with means for passing the pulses to be corrected from said input coupling point to said output coupling point,

(2) the difference in transmit time of said device between said coupling points being equal to the spacing intervals between said signal pulses,

(3) at least one unidirectional feedforward circuit, in respect to the signal passing direction through said device, between said input and said output coupling points,

(4) at least one unidirectional feedback circuit, in respect to the signal passing direction through said device, between said output and said input coupling points, and

(5) current amplitude control and polarity adjusting means in both said feedforward and feedback circuits,

(6) to substantially cancel, in the output of said device, both the leading and trailing distorting components of said signal pulses.

2. A pulse distortion correcting system as claimed in claim 1, said delay device including analog-digital converting means to convert instantaneous signal values of the pulses to be delayed into digital pulse trains, digital storage and delay means to delay said digital pulse trains, and digital-analog converting means to re-convert the delayed digital pulse trains into corresponding analog signal values.

3. A pulse distortion correcting system as claimed in claim 1, said device having a transit time equal to a multiple of the pulse spacing interval, additional feedforward and feedback branch circuits connected to intermediate coupling points of said device spaced in respect to the signal transit time from each other and said input and output coupling points by intervals equal to the pulse spacing interval, respectively, and further current amplitude and polarity control means inserted in said additional circuits.

4. A pulse distortion correcting system as claimed in claim 3, said delay device being comprised of an artificial delay line.

5. A pulse distortion correcting system as claimed in claim 3, said delay device being comprised of a plurality of storage capacitors in cascade and periodic switching means to sequentially charge one capacitor by instantaneous signal values of a pulse to be delayed and to transfer the charge stored to the next following capacitor at a switching frequency being high compared with the pulse recurrence frequency.

6. A pulse distortion correcting system for use in electric signal transmission by means of equispaced signal pulses, preceded and followed, respectively, by both leading and trailing distorting components, said system comprising in combination:

(1) a single delay device having an input and an output coupling point,

(2) a first summation device having a tirst input with means to apply thereto the signal pulses to be corrected, a second input, and an output connected to the input coupling point of said delay device,

(3) a second summation device having a first input connected to the output coupling point of said delay device, a second input, and an output with means to derive therefrom the corrected signal pulses,

(4) a plurality of unidirectional feedforward circuits connected between the input coupling point and at least one intermediate coupling point of said delay device, on the one hand, and the remaining input of said second summation device, on the other hand,

(5) a plurality of unidirectional feedback circuits connected between the output coupling point and at least one intermediate coupling point of said delay device, on the one hand, and the remaining input of said rst summation device, on the other hand,

(6) the difference in transit time in said delay device for the signal between adjacent input, intermediate and output coupling points thereof being equal to the spacing intervals of said signal pulses, and

(7) current amplitude control and polarity adjusting means in each of said feedforward and feedback circuits,

(8) to substantially cancel, in the output of said second summation device, both the leading and trailing distorting components of said signal pulses.

7. In combination with a multi-channel transmission system comprising at least two channels, each including a distortion correcting network according to claim 6, means to correct mutual distortion `between neighboring channels comprising additional first and second sets of compensating (feedforward and feedback) circuits for the delay devices in each said channels, corresponding connecting points of the compensating circuits of the additional sets of the delay device of one channel being crosscoupled with corresponding connecting points of the compensating circuits of the additional sets of the delay device of the other channel.

8. In a pulse distortion correcting system according to claim 7, wherein the delay device in each said channels is provided with a rst pair of sets of compensating circuits designed to correct direct distortion, both leading and trailing, originating in the respective channels, and wherein each delay device is further provided with a second pair of sets of compensating circuits being mutually cross-coupled and designed to correct at least the mutual trailing distortion between the channels.

References Cited UNITED STATES PATENTS 3,068,417 12/1962 Fiske. 3,305,798 2/ 1967 Rappeport 333-28 X HERMAN KARL SAALBACH, Primary Examiner.

PAUL GENSLER, Examiner.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US3068417 *Jul 24, 1959Dec 11, 1962Fiske Paul EPulse stretcher and shaper
US3305798 *Dec 27, 1963Feb 21, 1967Bell Telephone Labor IncPhase equalizer concatenated with transversal equalizer wherein both are automatically controlled to minimize pulse distortion and minimize burden of transversal filter
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3539722 *Oct 28, 1968Nov 10, 1970Scm CorpNoise rejection circuit
US3648171 *May 4, 1970Mar 7, 1972Bell Telephone Labor IncAdaptive equalizer for digital data systems
US3737808 *Dec 29, 1971Jun 5, 1973Honeywell Inf SystemsPulse shaping network
US4176285 *Jan 11, 1978Nov 27, 1979The United States Of America As Represented By The United States Department Of EnergyElectrical pulse generator
US7072415 *Sep 27, 2001Jul 4, 2006Rambus Inc.Method and apparatus for generating multi-level reference voltage in systems using equalization or crosstalk cancellation
US7093145Jul 30, 2004Aug 15, 2006Rambus Inc.Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signals
US7456778Mar 29, 2006Nov 25, 2008Rambus Inc.Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signals
US7859436Oct 24, 2008Dec 28, 2010Rambus Inc.Memory device receiver
US7873115Nov 12, 2008Jan 18, 2011Rambus Inc.Selectable-tap equalizer
US8023584Nov 12, 2008Sep 20, 2011Rambus Inc.Selectable-tap equalizer
US8199859Oct 4, 2010Jun 12, 2012Rambus Inc.Integrating receiver with precharge circuitry
US8320494Jun 15, 2006Nov 27, 2012Rambus Inc.Method and apparatus for generating reference voltage to adjust for attenuation
US8467437Nov 12, 2008Jun 18, 2013Rambus Inc.Selectable-Tap Equalizer
US8472511Dec 13, 2011Jun 25, 2013Rambus Inc.Selectable-tap equalizer
US8634452Jun 7, 2012Jan 21, 2014Rambus Inc.Multiphase receiver with equalization circuitry
US8654829Dec 28, 2012Feb 18, 2014Rambus Inc.Selectable-tap equalizer
US8861667Jul 12, 2002Oct 14, 2014Rambus Inc.Clock data recovery circuit with equalizer clock calibration
US9106397Feb 6, 2015Aug 11, 2015Rambus Inc.Selectable-tap equalizer
US9419825Jul 1, 2015Aug 16, 2016Rambus Inc.Selectable-tap equalizer
US9544169Jan 17, 2014Jan 10, 2017Rambus Inc.Multiphase receiver with equalization circuitry
US9660840Jul 13, 2016May 23, 2017Rambus Inc.Selectable-tap equalizer
US20020075968 *Sep 27, 2001Jun 20, 2002Jared ZerbeMethod and apparatus for generating multi-level reference voltage in systems using equalization or crosstalk cancellation
US20040165671 *Feb 25, 2003Aug 26, 2004Roy Aninda K.Nyquist pulse driver for data transmission
US20060186915 *Mar 29, 2006Aug 24, 2006Carl WernerMethod and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signals
US20060233278 *Jun 15, 2006Oct 19, 2006Rambus Inc.Method and apparatus for generating multi-level reference voltage in systems using equalization or crosstalk cancellation
US20090060017 *Nov 12, 2008Mar 5, 2009Rambus Inc.Selectable-Tap Equalizer
US20090067482 *Nov 12, 2008Mar 12, 2009Rambus Inc.Selectable-Tap Equalizer
US20090067484 *Nov 12, 2008Mar 12, 2009Rambus Inc.Selectable-Tap Equalizer
US20090097338 *Oct 24, 2008Apr 16, 2009Carl WernerMemory Device Receiver
US20110140741 *Oct 4, 2010Jun 16, 2011Zerbe Jared LIntegrating receiver with precharge circuitry
Classifications
U.S. Classification333/20, 333/12, 333/138, 178/69.00A, 375/229, 333/1
International ClassificationH04L25/03, H03K5/06, H03K5/00, H04J3/02, H04J3/10, H03K5/04
Cooperative ClassificationH04L25/03127, H03K5/00, H04L25/03146, H03K5/065, H03K5/06, H04J3/10, H04L25/03031
European ClassificationH03K5/06, H03K5/06B, H04J3/10, H04L25/03B1A3, H04L25/03B1N7, H04L25/03B1N3, H03K5/00