US 3439214 A
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April 15, 1969 J. IKABELL I 3,439,214
BEAM-JUNCTION SCAN CONVERTER Filed March 4, 1968 Sheet of 2 CHA RGE- SENSING TRANSISTOR ARRAY FIG. I. A
48 60 F 7 2O OUTPUT I i I MEANs I g I 54 I81!) I I\ I ACCEL. FUNCTION VOLTAGE GENERATOR I MEANS MEANS IO I2 22 50 SAMPLING SCAN 52 GENERATOR .5 I MEANs FIG. 2. I
4 45 4s m 43 AMI INVENTOR.
LOUIS J. KABELL,
ATTORNEY A ril 15, 1969 L. J. KABELL 3,439,214
"BEAM-JUNCTION sow couvmnzma Fil ed March 4, 1968 Sheet 2/ of 2 INVENTOR.
BY LOUIS J. KABELL ATTORNEY United States Patent U.S. Cl. 315-41 7 Claims ABSTRACT OF THE DISCLOSURE This invention provides a semiconductor means for converting a transient electrical signal into a spatial varying charge pattern that may be converted to a time varying signal on an expanded time base independent of that of the input signal. Specifically, an array of charge sensing transistors or similar devices operated in the storage mode are scanned by a stream of charged particles, with the flux thereof modified by an input signal. Read-out of the charge sensing device is accomplished by an electrical sampling means.
Background of the invention In the past, instrumentation Oscilloscopes and similar devices employed for viewing electrical phenomena have largely relied upon screens employing phosphors and similar materials. These devices while being extremely useful, have limited application for viewing high speed electrical transients. The reason for this is that the writing or response of such devices is limited by the beam current density that can be achieved for a given resolution element size and acceleration voltage. Increasing acceleration voltages will increase the display brightness (i.e., energy) available per resolution element, but this increases the difliculty of deflecting the electron beam and limits this approach. Thus, for extremely high-speed electrical transient signals, conventional instrumentation Oscilloscopes are relatively ineifective.
Attempts to avoid the above prior art limitations have been made. One prior art approach to the solution of this problem has been the development of sampling oscilloscopes. Other approaches to the problem have involved microtubes and sophisticated optics. In general, while these devices have proven useful to a certain extent, they have been expensive, relatively complex and limited in application.
Summary of the invention Briefly, this invention solves the above problems by employing the following generalized structure: means for supplying a stream of charged particles in a scan across an area and for modifying the flux of the stream of charged particles in accordance with an input signal; an array of charge-sensing devices forming part of a substrate located to be scanned by the stream of charged particles, the charge-sensing devices including a plurality of junctions; a circuit means connected for charging and reverse biasing a first junction with a second junction forward biased and for then reversing biasing both junctions, the circuit means sequentially operating each of the devices in said array; an output means for providing a manifestation proportional to the charge supplied to the first junction. The application of an input signal to the input terminal results in the flux of the charged particles being modified in proportion thereto. This in turn aflects the charge stored in the junctions of the transistors as the transistors are scanned by the stream of charged particles. The transistors are then sequentially sampled to determine the value of the input signal supplied to the input terminal. The ionization multiplication factor greatly contributes to detectability of the input slgnal when a suitable charge particle means is employed.
Brief description of the drawings A preferred and an alternative embodiment of the above described generalized structure will now be explained in connection with the drawings wherein:
FIGURE 1 is a schematic representation of the invention;
FIGURE 2 is a cross-sectional view showing one form of the charge-sensing device;
FIGURE 3 is a top view of the charge-sensing device of FIGURE 2 with the passivating layers and conductive material removed therefrom;
FIGURE 4 is a cross-sectional view showing an alternative form of the charge-sensing device.
Description of the preferred embodiments Referring to FIGURE 1, there is shown an electron gun means 10, an array of charge-sensing devices 30 and a circuit means for operating the sensing array 30 as will be explained later in the specification. The electron gun means 10 provides a stream of charged particles in a scan pattern and modifies the flux of the charged particles in accordance with an input signal. Specifically, gun means 10 includes accelerator voltage means 12 which includes conventional circuitry to provide a stream of charged particles such as electrons from the cathode 14. The accelerator voltage means 12 is energized by a relat ively large DC. voltage such as a 10 kv. voltage source provides a high-velocity stream of electrons. The flux of the stream of electrons that impinges upon the surface 32 of sensor array 30 is controlled by a grid 16 which is connected to an input signal terminal 18. The input signal applied to terminal 18 creates a potential which modifies the flux of the charged particles passed by grid 16. It should be understood that when operating accelerator voltage means 12 at relatively high voltages (e.g., 10 kilovolts), the impinging charged particles result in an electron beam ionization multiplication in the order of two to three thousand. Thus, the input signal supplied to terminal 18 will be in effect amplified by this multiplication factor.
The stream of charged particles is scanned across and over the sensing array 39 by a conventional deflection electrode arrangement 20 which is connected to a function generator means 22 such as a conventional linear ramp deflection signal generator. The signal applied by generator means 22 to deflection electrode 20 causes the stream of charged particles to impinge upon the transistors in the array 30 in a sequential manner. Thus, it can be seen that gun means It) provides a stream of charged particles which have a flux dependent upon the input signal and which impinge upon the array 30 in a programmed or sequential manner.
The sensing array 30 is preferably a monolithic semiconductor array of bipolar transistors having a collectorbase structure suitable for sensing charged particles and constructed according to silicon planar technology. It is, of course, within the broad scope of the invention to employ other charge sensing arrays such as hybrid integrated circuits, thin film arrays, MOS transistor arrays, and backto-back diodes. With respect to the details of construction for the preferred monolithic semiconductor array, one bipolar transistor of this array is schematically shown in FIGURE 2. It is understood that the array would contain many such bipolar transistors which would be of substantially identical construction. Briefly, the bipolar transistor construction includes a first region or wafer 34 of n'type monocrystalline silicon. A second region 36 of opposite conductivity type (p-type) is formed in said first region 34. A third region 38 is nested within region 36 in an offset relationship thereto and having conductivity type opposite to region 36 such as n-type. The offset arrangement of region 38 with respect to region 36 is to provide a large target area for the stream of charged particles.
The wafer 34 has a passivating and protective layer 40 over surface 42 which protects and maintains the physical and chemical condition of the active regions and junctions. A layer 44 of conductive material is formed over a portion of the passivating layer 40 and a thinner portion 43 of layer 44 extends to make contact with the region 36. A similar conductive layer 46 overlies another portion of layer 40 and extends to make contact with the region 38. The layers 44 and 46 are preferably constructed of aluminum or other conductive materials capable of forming a suitable electric contact with the various semiconductor regions. The conductive material should also have the characteristic of being reflective to any stray or ambient illumination not intended to affect the device while permitting the charged particles to penetrate therethrough to the target area. This is accomplished by employing aluminum and making the layer 44 of at least two thicknesses. In the area overlying passivating layer 40, the material is made sufficiently thick to reflect any stray or ambient illumination and also sufficiently thick to prevent the penetration of the stream of charged particles to the passivating layer 40 which would result in charge buildup in the layer 40. Such a build-up would have a detrimental effect on the operating characteristics of the device. For example, with a stream of charged particles having an energy of kiloelectron volts, the thickness of layer 44 should be approximately 5,000 to 15,000 angstroms. A much thinner portion 43 of layer 44 is extended to make contact with region 36 (base). Note that when the interconnection layer is approximately 10,000 angstroms thick, layer 43 should be approximately 900 to 1200 angstroms in thickness. The thickness of the layer 44 in this area is such that the stream of charged particles easily penetrates and impinges upon region 36 and yet it is sufficiently thick to reflect any stray or ambient illumination. The layer 46 which forms the electrical connection to the region 38 (emitter) of the charge sensing transistor has substantially the same thickness throughout.
Another layer 48 of conductive material is formed over region 34 (collector) and forms an electrical contact therewith to the collector of the bipolar transistor. In the storage mode of operation an electrical connection to the base circuit is not always necessary. This will be understood by reference to US. patent application 529,358 filed by Gene P. Weckler on February 23, 1966, and assigned to the assignee of this application, which is incorporated herein by reference thereto.
The bipolar transistors in array 30 are connected to operate in a storage mode. The circuit and method of operation in a storage mode were described in detail in the above-mentioned US. patent application. In the storage mode, one junction of a bipolar transistor is reversed biased to act as a capacitor with the other junction forward biased to provide a path to a current source. After the one junction is charged, the other junction is open circuited (reversed biased so that both junctions are reverse biased). The charged junction discharges slowly as thermally generated electrons and holes (leakage current) recombine with the stored charges on each side of the junction. This discharge takes place with a time constant in the range of several seconds. If high energy charged particles bombard the junction, electrons and holes are created that also cause discharge. The charge-generated current is usually much higher than the leakage current and increases the discharge rate by a factor of about a thousand. This factor is, of course, dependent upon the intensity of the incident particle flux as the charge-generated current is proportional thereto. Thus, in a given interval, the amount of stored charge removed from the junction capacitance is proportional to the total number of particles falling on a junction. To determine the amount of charge removed during a given interval, the initial condition is reestablished and the charge to do so is measured. The result of this measurement is proportional to the total integrated charged particle flux. Typically, the base-collector junction acts as the charge-sensitive junction. A few of the advantages of the storage mode include improved response resulting from integration of the incident charged particles and electronic control of response by varying the integration time, thereby permitting a wide dynamic range. When a bipolar transistor is employed in the storage mode, the transistor gain also improves operation.
To operate in the storage mode a device or devices are employed which include a charge storage element (e.g., base-collector junction); a current generator, the output of which depends on the incident charged particle flux; and a switch (emitter-base junction) to open circuit the storage element during the discharge portion of the operation and to close a circuit to the storage element during charging and measurement. In the preferred embodiment of this invention, a charge-sensing bipolar transistor similar to a bipolar photo transistor is employed to perform all of these functions and to provide the additional advantage of extra gain resulting from the beta plus one (3+1) current gain factor. The bipolar transistor employed in the invention is as described in connection with FIG- URES 2 and 3.
When connected in a storage mode, the bipolar transistor has layer 48 connected to an output means 60 and layer 46 is connected to the sampling scan generator means 52 which forms part of a circuit means 50. The circuit means 50 connects the bipolar transistors so that the base is open circuited and the collector and the emitter are in a series with a resistive load 54. The sampling scan generator means 52 sequentially applies a negative pulse to the emitter terminals via layer 46 of each bipolar transistor. This forward biases the emitter-base junction and reverse biases the base-collector junction. During this condition, the depletion layer capacitance of the base-collector junction charges to about the peak value of the pulse. During this interval the bipolar transistor is conventionally biased to attain a current gain. The current flowing in the resistor 54 is i while the charging current for the capacitor is i (5+1). The current gain is thus (5+1). This current gain is manifested by the output means 60 which responds thereto. When the pulse is terminated, the emitter-base junction becomes reversed bias and thus isolates the collector-base junction from the external circuit. Thus, the reverse bias emitter-base junction functions as an effective means for open circuiting the storage element formed by the base-collector junction.
The double-diffused planar charge-sensing bipolar transistor of FIGURES 2 and 3 is preferred because the emitter-base junction leakage current is much lower than the base-collector junction leakage for identical reverse bias conditions. This is because the emitter-base junction area is smaller than the base-collector junction and because the emitter-base junction has a much narrower depletion layer. These factors tend to reduce the leakage current and enable it to perform as an efficient switch. In addition, the output signal from the planar construction is obtained at the collector terminal requiring only one output terminal for an integrated array.
The sampling scan generator 52 is a logic circuit which provides appropriate polarity and width pulses to the emitters of the various transistors in accordance with a predetermined program. The particular magnitude and shape of the pulse as well as its timing will in part be dependent upon the nature of the signal that is provided at input terminal 18, the size of the array (i.e., the number of charge sensors in the array) and the characteristics of the particular bipolar photo-transistor employed. The particular construction of the circuit forms no part of this invention and it is well within the art to provide various circuits to perform this function.
-In operation circuit means 50 operates to sequentially apply a pulse to conductors 46 to sequentially charge the base-collector junctions. This charging of the junctions results in an output signal being supplied to output means 60 which records or displays the amount of charge required to charge each of the bipolar transistors in array 30. With the base-collector junctions recharged, a transient or other type of input signal is applied to input terminal 18. The signal may have a duration of a nanosecond magnitude. This signal varies the flux of the stream of charged particles provided by voltage means 112 and electrode 14 which stream of particles is scanned across the charged junctions by deflection plates The impinging particles cause the junctions to discharge in proportion to the flux of the impinging particles. At the termination of the input signal at terminal 18 a pattern of discharge of the junctions exists which may then be read out by operation of circuit means 50' and output means 60. Read out times as long as several seconds are possible. Thus, a transient signal in the nanosecond range is converted to a signal that may be accessed in several seconds. This enables phenomena heretofore very difficult, if not impossible, to be recorded and analyzed by a relatively simple device. In addition to simplicity, the device has the advantage of relatively high gain attributable to the ionization multiplication factor and the (5+ 1) gain of the bipolar transistors.
As an example of an alternative form of the converter of FIGURE 1, transistors having the basic metal-oxidesilicon (MOS) structure are selected to form the chargesensing array (which in the preferred embodiment comprised bipolar transistors). Also, appropriate modifications are made in the connections to the sampling scan generating means 52 and the output means 60, and a biasing means (not shown) has been added. With the alternative embodiment, input signals from the sampling scan generating means 52 go to the gate electrodes of the MOS transistors. Each of the MOS bulk electrodes are connected to ground. Signals from the drain electrodes of the MOS transistors are coupled to one terminal of the output means 60 and to one terminal of the load resistance 54. Rather than being coupled to ground, the second terminal of the load resistance 54 is coupled to a second terminal (not shown) of the output means and to a biasing means (not shown). Also, with this configuration, the source electrode of each MOS transistor has been formed so that it is sensitive to an incident electron beam impinging thereon. Other than the changes mentioned, the invented converter is essentially the same as that of FIGURE 1.
In FIGURE 4 is shown a cross-sectional view of the charge-sensing device for the alternative form of the invention. The MOS transistor structure illustrated comprises a monocrystalline semiconductor substrate 80 of a one conductivity material (N type) into which are disposed two semiconductor regions '81 and 82 of an opposite conductivity material (P type), each region forming a respective PN junction 84 and 85 with the substrate 80, each junction '84 and 85 having an edge at the upper surface 87. The two regions 81 and 82 are spaced apart from each other, forming a channel region 89 there between. Region 8 1 is designated the drain region, and region 82 is designated the source region. Overlying a portion of the upper surface 87, at least where each of the edges of the respective junctions 84 and 85 appear at the surface and the surface above the channel region 89, is a passivating and protective layer 91 suitably formed to expose portions of the source and drain regions 81 and 82. The protective layer 91 may comprise an oxide, such as silicon dioxide. A gate electrode 93, suitably of a conductive material such as aluminum, rests atop the portion of protective material 91 overlying the channel region 89. Ohmic contact to the drain region 81 is made by an interconnection layer 95 of a conductive material, such as aluminum, sufficiently thick to reflect any stray or ambient illumination and to prevent the stream of charged particles (from the electron gun means 10) from penetrating into the protective layer 91 and detrimentally accumulating there. For example, with a stream of charged particles having an energy of 10 kiloelectron volts, the thickness of interconnection layer 95 should be approximately 10,000 angstroms. Another layer 97 of approximately the same conductive material as that of layer 95 is formed over a portion of the protective layer 91 overlying the upper surface edge of the PN junction 85. A much thinner portion 98 of layer 97 extends to overlie and make contact to the source region 82, portion 98 being sufficiently thin to permit the stream of charged particles easily to penetrate therethrough and impinge upon the source region 82, the rest of layer 97 being sufliciently thick to reflect any stray or ambient illumination. For example, when the interconnection layer 95 is approximately 10,000 angstroms thick, layer 98 should be approximately 900 to 1200 angstroms in thickness.
Operation of the alternative form of the invention is similar to that using bipolar transistors described above, except that with MOS transistors, no built in gain means is achieved. Drain region 81 and source region 82 with respect to the semiconductor substrate may be thought of as a pair of diodes back biased having PN junctions capable of operation in the storage mode (see above reference). In this way, a more uniform response from the device can be achieved.
Operation of the device commences by placing an electrical charge on the source PN junction 85. (Reference should be made to FIGURE 4, except where designated otherwise.) A voltage signal from a biasing means (not shown) is applied across the load resistor 54 (FIGURE 1) and through the interconnection layer 95 to the drain region 81, thereby placing a charge on the drain PN junction 84. With an enhancement-mode MOS transistor, an appropriate pulse in the form of a voltage level from the sampling scan generator means 52 (FIGURE 1) is applied to the gate electrode 93 to induce a conductive path in the channel region 89 between the respective source and drain region junctions '84 and hence, a charge stored on junction 84 can be transferred to junction 85.
The pulse is then removed from the gate electrode 93, permitting the channel region 89 to return to its nonconductive state and isolating junction 85 from junction 84. The biasing means (not shown) can now place another charge on drain junction 84, the amount of charge needed being directly proportional to the amount transferred to the source junction 85. This charge is measured by the output means 60 (FIGURE 1).
Next, an incident electron beam is applied to the thin metal overlayer 98, resulting in electrons penetrating therethrough and into the source region 82, and eventually causing the charge stored on PN junction 85 to be dis charged. Then, when another pulse from the sampling scan generator means 52 (FIGURE 1) is applied to the gate electrode 93, a conductive path is again created across channel region 89 between junctions 84 and 85. The charge stored in the PN junction 84 is transferred to junction 85. After the pulse is removed from the gate electrode 93, the channel region 89 returns to its nonconductive state, and junction 85 is again isolated. The biasing means (not shown) places another charge on the drain junction 84. Each time, the amount of charge needed, which is detected by the output means 60 (FIGURE 1) is proportional to the intensity of the incident electron beam striking the thin portion 98 of layer 97. This sequence of charge, discharge, and recharge to detect the electron beam intensity is repeated throughout the MOS array, with selection of individual MOS transistors provided by the sampling scan generator means 52 (FIGURE 1).
Although this invention has been disclosed and illustrated with reference to particular applications, the principles involved are susceptible of numerous other applications which will be apparent to persons skilled in the art.
I claim: 1. A vacuum tube for recording transient phenomena comprising:
a means for supplying a stream of charged particles in a scan across an area and for modifying the flux of said stream of charged particles in accordance with an input signal, said means having an input terminal for receiving said input signal; an array of charge-sensing devices forming part of a substrate located to be scanned by said stream of charged particles, said charge-sensing devices including a plurality of junctions; circuit means connected to said charge-sensing devices for charging and reverse biasing a first junction with a second junction forward biased and for then reverse biasing both junctions, said circuit means sequentially operating said charge sensing devices of said array; and, output means for providing a manifestation proportional to the charge supplied to said first junction, whereby the application of an input signal to said input terminal results in the flux of the charged particles being modified in accordance therewith which in turn affects the charge stored in the junctions of said charge sensing devices as the transistors are scanned by the stream of charged particles. 2. The structure recited in claim 1 wherein said chargesensing device is a transistor.
3. The structure recited in claim 2, wherein said array of transistors are a monolithic planar construction and said charged particles are electrons.
4. The structure recited in claim 3, wherein the portion of the transistor that is affected by the impinging electrons has a layer of conductive material over at least part of the surface thereof for making contact thereto, said conductive material having a thickness which is transparent to said electrons, a substantial portion of the remainder of said transistor structure having a coating of material thereover which impedes said electrons.
5. The structure recited in claim 4, wherein said conductive material and said coating of material is the same material wherein said material impedes said electrons by an increased thickness.
6. The structure recited in claim 5, wherein said transistors are bipolar.
7. The structure recited in claim 6, wherein said transistors are metal-oxide-silicon (MOS).
References Cited UNITED STATES PATENTS 3,403,284 9/1968 Bucket a1. 315-11 RICHARD A. FARLEY, Primary Examiner.
CHARLES E. WANDS, Assistant Examiner.