Search Images Maps Play YouTube News Gmail Drive More »
Sign in
Screen reader users: click this link for accessible mode. Accessible mode has the same essential features but works better with your reader.

Patents

  1. Advanced Patent Search
Publication numberUS3471631 A
Publication typeGrant
Publication dateOct 7, 1969
Filing dateApr 3, 1968
Priority dateApr 3, 1968
Publication numberUS 3471631 A, US 3471631A, US-A-3471631, US3471631 A, US3471631A
InventorsLeo J Quintana
Original AssigneeUs Air Force
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Fabrication of microminiature multilayer circuit boards
US 3471631 A
Abstract  available in
Images(1)
Previous page
Next page
Claims  available in
Description  (OCR text may contain errors)

Oct. 7, 1969 L, J, QUINTANA 3,471,631

FABRICATION OF MICROMINIATURE MULTILAYER CIRCUIT BOARDS Filed April 5, 1968 mVENTOR L E O J. QUINTANA 54 mmw XI'TORNEZ United States Patent US. Cl. 174-685 4 Claims ABSTRACT OF THE DISCLOSURE A product and method for fabricating a sequentially laminated multilayer circuit board with chemically drilled holes and electroplated interconnections. The interconnecting holes are off-set to the right and to the left in the alternating laminations. Microminiature circuits are thus produced in three dimensions, with greater circuit density at less cost than has heretofore been possible.

Background of the invention This invention relates generally to the fabrication of multilayer interconnected circuit boards. Multilayer circuit boards are presently being fabricated by a number of processes. Holes are drilled mechanically through the circuit board. Plated-thru holes and alloy filled holes are in use for the conducting medium from one lamination to another. There is mechanical breakage attendant upon the mechanical drilling of the holes, and the process is time-consuming and expensive. The plated-thru hole technique does not in itself provide for a suflicient circuit density. The alloy filled hole process is capable of producing greater circuit densities, but this process is very costly, accounting for approximately one-half the material cost of the board. Accomplishing this process is also time-consuming and costly.

Summary of the invention A circuit is produced in three dimensions comprised of printed circuit boards in laminated relationship having a circuit of standard grid pattern functioning between the layers, and printed on one of the abutting laminations. Plated-thru holes carry the conductive connection from one layer to another. The hole patterns are shifted to the right and to the left alternately in alternate laminations. By this method it is possible to produce a micro module of greater density than has hitherto been produced.

The objects of the invention are to produce a micro module of greater density at a much lower cost than has heretofore been possible.

The steps in the process in summary form are as follows: A nonconducting plate, such as epoxy glass, is copper coated on both sides, and may be used to form the central layer of a laminated block. Subsequent abut ting laminations will have photo-etching and plating on the exposed side only. If a photosensitive resin or lacquer is used, this first double-clad plate is coated with it and the hole pattern is applied and exposed. The holes are of the order of .0125". This pattern is shifted to a distance of the order of .010" to the right or to the left of the normal grid pattern.

The hole pattern is etched by a suitable copper etchant such as ferric chloride. Then the holes are chemically drilled or etched through the epoxy glass substance of the plate by any suitable etchant, such as sulfuric acid and hydrofluoric acid. Any overhanging fringe of copper is removed by again exposing the unit to the copper etchant material. The copper plating on the lower surface of the board is left intact. The holes are then platedthru. A thin layer of copper is applied by chemical means,

'ice

and then a layer of copper is applied to both hole and upper surface by electroplating. The holes are filled with epoxy resin or equivalent and the epoxy is cured to protect the plating in the holes during subsequent etching processes. The circuit pattern is then imprinted on the surface in any desired manner and the surface copper is etched away with ferric chloride, or equivalent etching material, leaving the circuit imprinted in copper on the plate. The plated-thru holes contact the circuit pads, but are positioned to the right. Laminations are then added.

One method is to add a single clad board to each side of the treated board with the unclad surfaces inward. This laminated unit now presents opposite coppered surfaces and is subjected to the steps of the process outlined above. The hole pattern will again be shifted. If, in the first instance the shift was to the right, it will now be shifted to the left. Further laminations are applied as desired with the hole patterns applied to alternate pairs of layers being shifted alternately to the right and to the left.

Other combinations of hole pattern shift and grid pattern shift may be worked out within the scope of the invention.

The treatment of the holes in the final layer is optional. They may be filled with resin, spray-metal filled, alloy filled, left unfilled, or treated in any other manner found desirable.

These and other advantages, features and objects of the invention will become more apparent from the following description taken in connection with the illustrative embodiment in the accompanying drawings, wherein:

Description of the drawings In the drawings, the FIGURES l to 7 show the successive steps in the process beginning with step IV, which is the chemical drilling of the holes in the epoxy glass plate and continuing to the final steps of laminating a series of plated-thru boards.

Description of the preferred embodiment The process is described in twelve steps.

Step I.A sheet of epoxy glass, or equal, 10 is coated on both sides with a layer of copper shown at 12. and 14 in FIGURES 1, 2, 3 and 4 of the drawing. It is then coated with a photosensitive lacquer.

Step II.The hole pattern is light exposed on the top side 12 of the board 10. The holes are of the order of .0125 in diameter, and the hole pattern is shifted to the right of the normal grid pattern. The shift is of the order of .010".

Step III.--Tl1e hole pattern is now established in the copper layer 12, and the etching is accomplished by means of ferric chloride or other suitable etchant for etching in copper.

Step IV.The holes 16 are etched through the epoxy glass by a suitable glass etchant such as H2SO4+HF. The hole 16 is thus chemically drilled through the epoxy glass plate 10, leaving intact the copper plate 14. FIGURE 1 of the drawing shows the plate 10 at this point in the process.

Step V.The hole 16 is left with an overhanging fringe of copper 18, and this is removed by placing the board in the etchant again, suitable techniques being employed to keep the lower layer intact as indicated above.

Step VI.The holes 16 are then plated-thru by an electroless technique to provide a layer of copper 20. A layer of copper 22 is then deposited by electroplating over the layer 12.

Step VII.The holes 16 are now filled with epoxy resin, or any other termo-setting resin, which is then oven cured. The time found effective is from 5-10 minutes, but the invention is not so limited. The purpose is the protec- 3 tion of the copper plating in the holes from corrosion in subsequent etching processes.

Step VlII.The whole board is now coated on both sides With photosensitive resin, such as KPR, and the circuit pattern is exposed.

Step IX.Ferric chloride or equivalent is used for etching away the unexposed copper and establishing the circuit on both sides of the board 10. The pattern is designed and placed so that the plated-thru holes 16, with their conducting plating 20 are now located to the right of the remaining portion of copper which is now the conducting pad 26. It will be seen that their position is almost tangent to the circuit carrying element 26. See FIGURES 5, 6 and 7.

Step X .-A laminated unit 27 is now formed by placing single clad epoxy layers 28 and 30 in juxtaposition on each side of the board 10. The boards 28 and 30 carry copper layers 32 and 34, respectively, which form the outer surfaces of the new unit 27, see FIGURE 6.

Step XI.--The exposed surfaces 32 and 34 are coated with photosensitive material such as KPR and each is light exposed in a hole pattern which has been shifted to the left of the normal grid pattern a distance of the order of .010".

Step XII.The desired hole pattern is thus imprinted on the surfaces 32 and 34; etching is done and Steps III through X are repeated until the desired number of circuit layers has been achieved. FIGURE 7 shows a laminated block of five layers. It will be noted that the hole patterns are shifted in the pairs of alternate laminations, alternately to the right and to the left.

It will thus be realized that a greater density can be accomplished by this means than the now known processes.

I claim:

1. A laminated multilayer circuit board comprising a center plate of nonconducting material having plated-thru holes and a circuit of standard grid pattern imprinted on both sides, the plated-thru hole pattern being shifted to one side of the standard grid pattern and providing conduction from one lamination to another, a second plate and a third plate of nonconducting material placed in abutting relationship on either side of said center plate, plated-thru holes in said second and third plates, a printed circuit of standard form imprinted on each of said second and third plates on the exposed side of each plate, said plated-thru holes in said second and third nonconducting plates, forming conduction from the circuits of the central plate to those of the second and third plates, the plated-thru holes of said second and third plates being shifted in a direction opposite to the direction of shift above noted.

2. A device as claimed in claim 1 including further,

single clad laminations placed in abutting relationship to the said second and third plates, the hole patterns of successive pairs of laminations being shifted alternately to the right and to the left.

3. The method of fabricating laminated multilayer circuit boards, said method comprising the steps of:

(1) etching a hole pattern in the copper on the upper side of a double clad epoxy glass circuit board, the hole pattern being shifted to the right in relation to a standard circuit pattern to be later imprinted on each side of said board;

(2) drilling holes in the epoxy glass circuit board by chemical means and from the upper side only, leaving intact the copper plating on the lower side of the board;

(3) copper plating the surfaces of the holes thus drilled;

(4) filling the holes with thermo setting resin;

(5) coating the board on the upper side with photosensitive resin and exposing it to a circuit pattern;

(6) etching a circuit pattern in upper and lower copper layers, the plated-thru holes positioned in conducting continuity relationship to the conducting elements of the circuits, and shifted to the right;

(7) laminating both sides of the circuit board with a single copper clad epoxy glass board, the copper coated sides of the boards being placed outward;

(8) etching holes in both boards thus added as per (9) drilling holes in the added boards by chemical means as per step (2) (10) copper plating as per step (3);

(ll) filling holes as per step (4);

(l2) coating both exposed sides with photosensitive resin and exposing said laminated board to a circuit pattern;

(13) repeating step (6), shifting the hole pattern to the left.

4. The process as claimed in claim 3, wherein further laminations are added by repeating steps (7) through (13), shifting the hole pattern in alternate layers alternately to the right and to the left.

References Cited UNITED STATES PATENTS 3,264,402 8/1966 Shaheen et al. 174-685 3,319,317 5/1967 Roche et a1. 174 68.5 XR

DARRELL L. CLAY, Primary Examiner US. Cl. X.R.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US3264402 *Mar 23, 1964Aug 2, 1966North American Aviation IncMultilayer printed-wiring boards
US3319317 *Dec 23, 1963May 16, 1967IbmMethod of making a multilayered laminated circuit board
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3663866 *Mar 27, 1970May 16, 1972Rogers CorpBack plane
US3953664 *Oct 25, 1974Apr 27, 1976Matsushita Electric, Wireless Research LaboratoryPrinted circuit board
US4064623 *Oct 28, 1976Dec 27, 1977International Telephone And Telegraph CorporationMethod of making conductive elastomer connectors
US4163086 *Mar 31, 1978Jul 31, 1979Basf Wyandotte CorporationPolyurethanes
US4243474 *Mar 26, 1979Jan 6, 1981Shin-Kobe, Electric Machinery Co., Ltd.Process of producing a printed wiring board
US4628598 *Oct 2, 1984Dec 16, 1986The United States Of America As Represented By The Secretary Of The Air ForceMechanical locking between multi-layer printed wiring board conductors and through-hole plating
US4701424 *Oct 30, 1986Oct 20, 1987Ford Motor CompanySilicon, gold eutetics; diffusion barriers
US4783815 *Nov 12, 1987Nov 8, 1988Siemens AktiengesellschaftManufacturing miniature hearing aid having a multi-layer circuit arrangement
US4812191 *Jun 1, 1987Mar 14, 1989Digital Equipment CorporationMethod of forming a multilevel interconnection device
US4915795 *Feb 23, 1989Apr 10, 1990Rockwell International CorporationPlated-through hole plugs for eliminating solder seepage
US4915983 *Jun 10, 1985Apr 10, 1990The Foxboro CompanyFlexible design possibilities
US4927983 *Dec 16, 1988May 22, 1990International Business Machines CorporationCircuit board
US5023994 *Sep 29, 1988Jun 18, 1991Microwave Power, Inc.Method of manufacturing a microwave intergrated circuit substrate including metal lined via holes
US5227588 *Mar 25, 1991Jul 13, 1993Hughes Aircraft CompanyInterconnection of opposite sides of a circuit board
US5401913 *Jun 8, 1993Mar 28, 1995Minnesota Mining And Manufacturing CompanyElectrical interconnections between adjacent circuit board layers of a multi-layer circuit board
US5639389 *Feb 16, 1995Jun 17, 1997Dyconex Patente AgProcess for the production of structures
US5935452 *Nov 10, 1998Aug 10, 1999Hitachi Chemical Company, Ltd.Resin composition and its use in production of multilayer printed circuit board
US5956843 *Feb 4, 1997Sep 28, 1999International Business MachinesMultilayer printed wiring board and method of making same
US6204456 *Sep 24, 1998Mar 20, 2001International Business Machines CorporationFilling open through holes in a multilayer board
US6303881 *Aug 25, 2000Oct 16, 2001Viasystems, Inc.Via connector and method of making same
US6326559 *May 28, 1999Dec 4, 2001Matsushita Electric Works, Ltd.Multilayer printed wiring board and method for manufacturing same
US6441314 *Mar 23, 2001Aug 27, 2002Shinko Electric Industries Co., Inc.Multilayered substrate for semiconductor device
US6534723 *Nov 24, 2000Mar 18, 2003Ibiden Co., Ltd.Multilayer printed-circuit board and semiconductor device
US6598291Apr 23, 2001Jul 29, 2003Viasystems, Inc.Via connector and method of making same
US6670718 *Dec 19, 2001Dec 30, 2003Hitachi Cable, Ltd.Wiring board utilizing a conductive member having a reduced thickness
US6691408 *Oct 10, 2001Feb 17, 2004Mack Technologies Florida, Inc.Printed circuit board electrical interconnects
US6717070 *Jul 6, 2001Apr 6, 2004Kabushiki Kaisha ToshibaPrinted wiring board having via and method of manufacturing the same
US6803528 *Oct 31, 2000Oct 12, 20043M Innovative Properties CompanyMulti-layer double-sided wiring board and method of fabricating the same
US6931724Jul 30, 2002Aug 23, 2005Shinko Electric Industries Co., Ltd.Insulated multilayered substrate having connecting leads for mounting a semiconductor element thereon
US6943100Oct 15, 2003Sep 13, 2005Hitachi Cable, Ltd.Method of fabricating a wiring board utilizing a conductive member having a reduced thickness
US7402758Oct 9, 2003Jul 22, 2008Qualcomm IncorporatedTelescoping blind via in three-layer core
US7759582 *Jul 6, 2006Jul 20, 2010Ibiden Co., Ltd.Multilayer printed wiring board
US7763809Aug 18, 2004Jul 27, 2010Shink Electric Industries Co., Inc.Multilayered substrate for semiconductor device and method of manufacturing same
US7834273Jul 6, 2006Nov 16, 2010Ibiden Co., Ltd.Multilayer printed wiring board
US7838779 *Jun 15, 2006Nov 23, 2010Nec CorporationWiring board, method for manufacturing same, and semiconductor package
US7973249Feb 26, 2010Jul 5, 2011Ibiden Co., Ltd.Multilayer printed wiring board
US7985930 *Aug 19, 2004Jul 26, 2011Ibiden Co., Ltd.Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board
US8181341Jun 22, 2009May 22, 2012Ibiden Co., Ltd.Method of forming a multilayer printed wiring board having a bulged via
US8212363Jun 21, 2010Jul 3, 2012Ibiden Co., Ltd.Multilayer printed wiring board
US8242379 *Nov 5, 2007Aug 14, 2012Ibiden Co., Ltd.Multilayered printed wiring board with a multilayered core substrate
US8283573Jan 27, 2010Oct 9, 2012Ibiden Co., Ltd.Multi-layer printed circuit board and method of manufacturing multilayer printed circuit board
US8288664Jul 11, 2008Oct 16, 2012Ibiden Co., Ltd.Multi-layer printed circuit board and method of manufacturing multilayer printed circuit board
US8288665Oct 27, 2010Oct 16, 2012Ibiden Co., Ltd.Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board
US8481424Sep 23, 2011Jul 9, 2013Ibiden Co., Ltd.Multilayer printed wiring board
US8745863Jun 27, 2011Jun 10, 2014Ibiden Co., Ltd.Method of manufacturing multi-layer printed circuit board
US8782882Jun 27, 2011Jul 22, 2014Ibiden Co., Ltd.Method of manufacturing multi-layer printed circuit board
US8822828Apr 19, 2011Sep 2, 2014Ibiden Co., Ltd.Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board
US8822830Mar 28, 2012Sep 2, 2014Ibiden Co., Ltd.Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board
US20080107863 *Nov 5, 2007May 8, 2008Ibiden Co., LtdMultilayered printed wiring board
DE2645947A1 *Oct 12, 1976Apr 28, 1977Int Computers LtdVerfahren zur herstellung gedruckter schaltungen
EP0130417A2 *Jun 8, 1984Jan 9, 1985International Business Machines CorporationA method of fabricating an electrical interconnection structure for an integrated circuit module
EP0668712A1 *Feb 8, 1995Aug 23, 1995Dyconex Patente AgProcess for producing structures
EP0727926A2 *Jan 26, 1996Aug 21, 1996International Business Machines CorporationMultilayer printed writing board and method of manufacturing such a board
EP0969707A2 *May 28, 1999Jan 5, 2000Matsushita Electric Works, Ltd.Multilayer printed wiring board and method for manufacturing same
EP1437928A1 *Sep 30, 2002Jul 14, 2004Toppan Printing Co., Ltd.Multi-layer wiring board, ic package, and method of manufacturing multi-layer wiring boards
WO1988004877A1 *Dec 17, 1986Jun 30, 1988Foxboro CoMultilayer circuit board fabrication process
WO2000003305A1 *Jul 8, 1999Jan 20, 2000Photocircuits CorpA method for making a printed wiring board with heavy and thin conductive traces
WO2000004753A2 *Jul 16, 1999Jan 27, 2000Edward A BurtonAlignment of vias in circuit boards or similar structures
WO2005036940A1 *Oct 8, 2004Apr 21, 2005Qualcomm IncTelescoping blind via in three-layer core
Classifications
U.S. Classification174/264, 216/20, 216/52, 216/18, 361/792
International ClassificationH05K3/46, H05K1/11, H05K3/18, H05K3/00
Cooperative ClassificationH05K3/181, H05K2201/09509, H05K2203/0346, H05K3/0055, H05K2201/09627, H05K2203/0353, H05K3/002, H05K2203/0554, H05K3/0094, H05K2201/0959, H05K2201/0355, H05K1/115, H05K3/4652
European ClassificationH05K3/46C4, H05K1/11D, H05K3/00K3C