|Publication number||US3488558 A|
|Publication date||Jan 6, 1970|
|Filing date||Jul 22, 1968|
|Priority date||Jul 22, 1968|
|Publication number||US 3488558 A, US 3488558A, US-A-3488558, US3488558 A, US3488558A|
|Inventors||Grafton Donald L|
|Original Assignee||United Aircraft Corp|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (2), Referenced by (37), Classifications (22)|
|External Links: USPTO, USPTO Assignment, Espacenet|
Jan.. 6, 1970 D. L. GRAFTQN 3,488,558
SEQUENCE FLASHING AIRPORT LIGHTING SYSTEM Filed July 22, 1908 2 Sheets-#Sheet 1 Jam 6, 1970 D. L. GRAFTON 3,488,558
SEQUENCE FLASHING AIRORT LIGHTING SYSTEM Filed July 22. 1912.Pv 2 sheetsneet a www T@ United States Patent O 3,488,558 SEQUENCE FLASHING AIRPORT LIGHTING SYSTEM Donald L. Grafton, Enfield, Conn., assignor to United Aircraft Corporation, East Hartford, Conn., a corporation of Delaware Filed July 22, 1968, Ser. No. 746,491 Int. Cl. Hb 37/00, 39/00, 4]/00 TTS. Cl. 315--312 4 Claims ABSTRACT OF THE DISCLOSURE A runway approach sequence ashing lighting system for an airport includes a master timer, that provides variable frequency trigger or timing signals and a clear or reset signal related thereto, and a plurality of lamp assemblies, each including its own power supply, strobe lamp and lamp igniter circuit as well as logic circuitry for recognizing that a lamp antecedent thereto in the sequence has red and indicating to the next lamp in seouence that it may re.
BACKGROUND OF THE INVENTION Field of art This invention relates to sequence dashing airport lighting systems, and more particularly to control apparatus therefore.
Description of the prior art It is known that the approach to an airport runway may be marked by transverse rows of steady burning lights, as well as by a long string of lights which are ashed in sequence over the approach to an airport runway. Thus, the sequence of flashing lights look like a single light rolling towards the runway, cyclically, at a predetermined rate. For instance, it is common to have a strong of 28 lights along the airport runway approach, the lights being flashed in sequence on a half second cycle basis so that the entire string of lights is completely ashed back a second. The interval between flashes of sequential lights in such a system is one-sixtieth of a second.
The most commonly used systems of this type utilize mechanical timers, each point of the timer being hardwired directly to a lamp which it controls. The problem with this system is that the lamps may be spaced over a distance as great as 3,000 feet, which requires an unduly large amount of wire to connect each of the lamps to the master timer. Of course, in such a system, little wire is required for the lamps closest to the master timer, but on the average, the amount of wire required is equal to the number of lamps used times half the distance between the outermost lamps and the master timer. Thus, it would not be uncommon to require the equivalent of 28 wires each 1,500 feet long, or roughly 8 miles of Wire for an average system. In addition, mechanical timers are subject to the usual maintenance problems associated with mechanisms.
Other systems are known, including systems utilizing various forms of electrical timing, but these systems do not provide a uniform timing interval between the vari- "ice ous flashes in the sequence. This results in an erratic appearance when an entire sequence of flashes is observed.
All of the systems known to the prior art are expensive and cumbersome in comparison with the quality of flashing sequence which is achieved thereby.
SUMMARY OF THE INVENTION An object of the present invention is to provide a precisely timed lighting sequence system which does not require individual wires between each of the lamp assemblies in the sequence and the master timer for control apparatus.
According to the present invention, a master timing circuit in combination with logic circuits physically l0- cated with each lamp in a lighting sequence accurately controls the flashing intervals, without hard wiring the master timer separately to each lamp. In accordance further with the present invention, the master timer supplies a trigger signal which is connected in common to all of the lamp assemblies in the sequence, and each lamp assembly in the sequence receives a set signal from a preceding lamp indicating that it may operate, and in turn sends a set signal to the lamp subsequent thereto in the sequence so that the subsequent lamp may tire; the combination of the accurately timed trigger signal and the sequentilly progressing set signal comprise the heart of the invention.
In further accordance With the present invention, the trigger signal which is supplied to all of the lamps simultaneously may be adjusted so as to adjust the sequence flashing rate of the system. f
In accordance still further With the present invention, the individual lamps may readily be adjusted to re simultaneously.
An airport runway approach sequential lighting system in accordance with the present invention can effectively reduce the amount of wire required for connecting the system by as much as 6 or 7 miles of wire. Adii'- tionally, it is very accurate and provides a uniformly progressing light image. In addition, it is inherently reliable, and utilizes no moving parts, thereby minimizing maintenance problems. Further, the circuitry utilized is relatively himple and can be implemented with standard components readily available in the open market.
The foregoing and other objects, features and advantages of the present invention will become more apparent in the light of the following detailed description of a preferred embodiment thereof, as illustrated in the accompanying drawing.
BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a simplified schematic `block diagram of a lamp system in accordance with the present invention;
FIG. 2 is a schematic block diagram of a master timer suitable for use in the embodiment of the invention shown in FIG. 1;
FIG. 3 is a timing diagram illustrating the generation of trigger circuits in the master timer of FIG. 2;
FIG. 4 is a schematic block diagram of a lamp assembly suitable for use in the embodiment illustrated in FIG. l; and
FIG. 5 is a timing diagram illustrating operation of the system of FIG. 1.
3 DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to FIG. 1, a sequentially iiashing lighting system in accordance with the present invention includes a master timer 10 which receives power from a power source 12 which may comprise commercially available 110 or 220 volt, 60 cycle power. In the embodiment shown herein, 60 cycle alternating current power is presumed. The power source is connected to the master timer 41t) by a bus of three lines 14. The master timer in turn is connected to a highest-ordered lamp assembly 16 by a trunk of 5 lines 18. The lamp assembly 16 is designated as N +1 in FIG. 1, to indicate the fact that any given number of lamp assemblies can be utilized in the system in accordance with the present invention, providing powering and timing are appropriately accounted for.
The lamp assembly 16 is connected to another lamp assembly 20 by a bus of 5 lines 22, each of which has the same electrical significance as the lines in the bus 1'8. In a similar fashion, each of the lamp assemblies in the sequence down to a rst lamp assembly 24 are connected by a similar bus of 5 lines, such as the buses 25 and 26. The lines (18, 22, 25, 26) which interconnect the master timer and the lamp assemblies each contain a pair of power lines, a ground line, a trigger line and a clear line as is described more fully hereinafter. The trigger and clear lines provide the timing control over the entire system, and it is the provision of the interconnection of these timing lines from one lamp assembly in the sequence to the next which give the system its inherent accuracy of flashing sequence timing.
Each lamp assembly in a sequence is also connected to the lamp assembly next lower thereto in the sequence by a related set line 27-29. The first lamp assembly is hard-wired to a suitable potential by a jumper 31 which causes it to be the rst assembly in the sequence to fire.
Referring now to FIG. 2, the master timer receives power over the trunk of three lines .14, one of which is the usual ground line which is attached to ground 32. The other two lines 18a supply power to the highestorder lamp assembly 16 (FIG. 1) which is the assembly wired most closely to the master timer. The power lines also supply power to a master timer power supply 34 and to a clock signal generating circuit 36. The clock signal generating circuit 36 triggers a binary counter 38 which has ve stages, each representing a power of two. In other words, the binary counter can count from zero to 31 (decimal) by combinations of its various stages.
As illustrated in FIG. 3, each pulse of the clock 36 may be utilized as a trigger signal for timing the lamp ashing sequence at 60 cycles per second by selection of the output of the clock 36 at a switch 40 for application to an amplier 42 which supplies the trigger signals to the lamp assembly over a line 18b. In addition, each output of the clock 36 causes the lowest order stage of the binary counter to reverse itself, so that the output thereof can be selected by the switch 40 to supply a 30 cycle trigger signal on the line 18b. Each time that the lowest order stage (0) goes positive (for instance), the next higher order stage (1) reverses itself, and therefore its output represents a cycle signal which may be selected by the switch 40 so as to supply the trigger signal on line 18b. Similarly, the third from lowest order stage is at half the frequency of the second to lowest order stage, and it may be selected as a 71A. cycle signal through the switch 40 for application over the trigger line 1812.
The three highest order stages of the binary counter (2, 3, 4) are applied to an AND circuit 44 so that when the binary counter reaches a decimal count of 28, the clock signal that appears at that time, which is also apfplied to the AND circuit 44, will cause the setting of a latch 46, the output of which is used as a reset or clear signal. The clear signal is applied by a line 48 to reset Cil or clear the binary counter 38, and is also applied to an amplier 50 for application as a clear signal to each of the lamp assemblies in the sequence over a line 18C. Once the latch 46 is set, its output is applied by a line 52 to another AND circuit 54, so that the next clock signal from the clock 36' will cause resetting of the latch 46. Thus, in the present embodiment, the binary counter will count from zero through 28, cause the appearance of a clear signal which lasts through one time period, and will then begin counting again. Each of the sequences of counts of the binary counter comprises a sequence of trigger signals on line 18h for causing the individual lam-ps to flash in a corresponding sequence.
Referring now to FIG. 4, the configuration for lamp assembly 20 is shown. Each of the lamp assemblies in the sequence (FIG. 1) has the same configuration, and therefore the description of lamp assembly N is generic as to each of the lamp assemblies 16, 20, 24 in the sequence of FIG. 1.
The lamp assembly 20 (FIG. 4) includes a strobe lamp 60 which may preferably comprise a well-known type of Xenon flash tube utilizing an ignition gate, an anode and a cathode and an appropriate reflector. In other words, with suitable high voltage DC power supplied to the strobe lamp, then a very sharp high voltage spike to the ignition gate electrode will cause the lamp to emit a single brilliant flash of light.
The strobe lamp .60 is ignited in response to an ignition signal supplied by an ignitor circuit 62. Strobe lamp 60 and ignitor 62 receive power from a lamp assembly N power supply 64, which also supplies various kinds of power to operate the circuitry of FIG. 4. This is one of the features of the present invention: each of the lamp assemblies herein has its own power supply so that there is virtually no variation between power available for circuit operation in each of the lamp assemblies, whereby reliable and uniform timing of operation are achieved. In addition, wiring is eliminated since two power wires and the ground wire 22a, 22d; 25a, 25d, supply the power needs for each of the lamp assemblies in the sequence, eliminating the need to carry the various power requirements individually to each of the lamps in the sequence.
In other words, if the master timer 10 had a master power supply for all of the lamps, at least one or two more wires would be required to travel throughout the sequence to the first lamp assembly, which could result in another mile of wire (or more) being required in an average system.
Each of the lamp assemblies 16, 20, 24 (FIG. 1) includes logic circuits for operating the corresponding ignitor circuit 62 (FIG. 4). Specifically, an AND circuit 66 is responsive to the common trigger signal on line 22b so as to set a latch 68, the output of which comprising a firing signal, is sent through a Shaper amplifier and a transformer 72 (used primarily for voltage adjusting and isolation) so as to cause the ignitor circuit 62 to operate the strobe lamp 60. The pulse Shaper is responsive only to the turn-on of the latch 68 and therefore supplies only one signal to the ignitor circuit 62 each time the latch is set. The AND circuit 66 will not operate, however, until a set N signal is received on the set line 28. This signal is supplied to stage N by stage N -1, indicating that the lamp neXt lower in sequence has fired and it is now time to iire the lamp at this stage in the sequence.
For stage 1, the AND circuit 66 is always enabled to be responsive to the common trigger signal by being wired to a suitable potential in the power supply of lamp assembly 1, such as by jumper 31 illustrated in FIG. 1 and shown to interconnect the power supply 64 in the AND circuit 66 in FIG. 4.
The latch 68 not only causes the lamp 60 to fire in the same stage, but also supplies the next highest order stage with a set signal, such as the set N+1 signal on line 29. Thus, when a set signal is received at one of the stages, it responds to the next trigger signal to operate its strobe lamp and send a set signal to the following stage; the following stage will then respond to the next following trigger signal to fire its lamp and send a set signal to the second following stage, and so forth.
The operation of the system is illustrated in the diagram of FIG. 5. Therein, the clock signals are plotted at the top of the illustration; these are represented in the present embodiment to be at 60 cycles per second. For purposes of illustration herein, it is assumed that the switch 40 is set to the low order stage of the binary counter, meaning that the trigger signals are at 30 cycles per second as shown in the second wave form of FIG. 5'. With a 30 cycle per second trigger, a sequence of 14 lamps will be completely tired once in each half second, there being two complete tiring sequences per second and an interval of one-thirtieth of a second between each flash. Each time that the binary counter 38 (FIG. 2) counts up to decimal 28, which occurs when the high order bits (4, 3, 2) are setto all ones, then the clear signal will be generated by the latch 46, as illustrated in the third wave form of FIG. 5. This causes resetting of all the latches 68 (FIG. 4) in each of the lamp assemblies 16, 20, 24 (FIG. 1) of the entire system, and also resets the binary counter 38 (FIG. 2). Thereafter, the next trigger signal which appears will cause the setting of the latch (Set 1, FIG. 5) in the rst lamp assembly 24 in the sequence (FIG. l). This is because the jumper 31 (FIG. l, FIG. 4) causes the related AND circuit 66 (FIG. 4) to always be able to respond to a trigger signal. As soon as the latch and the related assembly is set, the lamp associated therewith tires. This is illustrated in FIG. 5 by the illustration Lamp 1. Then the next trigger signal which appears will cause the latch in the second assembly in the sequence to be set, and its lamp will iire. This is because when the first lamp assembly in the sequence had its latch set, the output of that latch was fed to the next lamp assembly in the sequence to enable its AND circuit 66 so that the following trigger signal could set it.
And so the operation proceeds, each lamp assembly in the sequence enabling the next higher-ordered lamp assembly in the sequence to be responsive to a following trigger signal, and in turn firing its own lamp when its related latch is set.
Each of the latches 68, once set, remain set throughout the remainder of the sequence until the appearance of the clear signal. Each trigger signal attempts to again set all previous set latches; this has no eiect, and does no harm. Since the Shaper amplifier 70 only responds to the setting of the latch 68, the lamp will only lire once in each sequence.
In the present example, with 14 lamps in the series, when the 14th trigger signal is sent from the master timer, the latch in the 14th unit (such as unit N +1 in FIG. l) will have its latch set and its lamp will fire. This occurs in response to the 27th clock signal since a division by two is being utilized so as to operate at 30 cycle per seconds in the given example. Thus, the next clock signal is number 28, and causes a setting of the binary counter equivalent to decimal 28 which means that the three highest-ordered stages (4, 3, 2) are set to all ones, thus causing a setting of the latch 46 (FIG. 1) so as to generate the clear signal. The clear signal appears virtually simultaneously with the 28th clock-pulse, allowing only for operation time of the binary counter to establish a setting of decimal 28. This again causes a resettingof all the latches in all of the lamp assemblies in the system, so that an additional sequence can be commenced with the trigger signal 30 next following the clock signal 29 which resets the clear latch 46 in FIG. l. Thus, clock signal 30 will cause trigger signal number l to again appear, the clear signal having reset the binary counter, the 29th clock signal having reset the clear latch, and the 30th signal again establishing count in the binary counter 38. This again causes the rst lamp in the sequence to have its latch 68 set, and a sequence commences as described hereinbefore.
Another feature of the invention is that each of the assemblies 16, 20, 24 (FIG. l) may have a jumper 31 (FIG. 5) connecting an enabling potential, continuously, to the related AND circuit `66 (FIG. 5). When so connected, all lamps will tire simultaneously. The units could thus be usedY for various purposes, allowing standardization at the airport.
It should be noted that, although the first lamp to fire in the sequence is shown to be the most remote from the master timer in FIG. l, this is simply because the master timer is usually preferably located near the airport (so as to pick-up the power with the least amount of wire) but the tiring sequence of the lamps is from the point remote from the runway toward the end of the runway so as to, in a sense, roll a ball of light toward the runway. However, it should be understood that the physical location of the lamps may be so arranged so as to have the lamp assembly physically closest to the master timer be the first assembly in the sequence and the most remote last assembly be the last: in the tiring sequence, if desired to suit any given implementation of the present invention.
Although the invention has been shown and described with respect to a preferred embodiment thereof, it should be understood by those skilled in the art the foregoing and various other changes and omissions in the form and detail thereof may be made therein without departing from the spirit and the scope of the invention.
Having thus described a typical embodiment of my invention, that which I claim as new and desire to secure by Letters Patent of the United States is:
1. A lamp assembly adapted to be interconnected with at least one additional similar lamp assembly in a sequentially firing lamp system, comprising:
a timing signal bus adapted to be connected to a source of timing signals;
set means connected to said timing signal bus and having a set input, said set input adapted for connection to a lamp assembly antecedent thereto in a tiring sequence, for generating a lamp liring signal in response to a timing signal and a signal at said set input, said lamp firing signal being adapted for connection to a lamp assembly subsequent thereto in a sequence, to provide a set input thereto;
a source of potential;
and selectively connectable means for interconnecting said source of potential to said set input in place of a connection to an antecedent lamp assembly, thereby to provide a constant signal at said set input so that said set means generates a lamp firing signal in response solely to a timing signal;
and ignition means connected to said .set means and responsive to said lamp tiring signal for causing the illumination of said lamp.
2. A sequentially tiring lamp system having a sequence of lamp assemblies, each including a lamp, comprising:
timing means supplying a sequence of timing signals concurrently to all of the lamp assemblies in the sequence;
set means in each lamp assembly in the sequence each responsive to an input set signal from a Ilamp assembly antecedent thereto in the sequence for generating a lamp tiring signal in response to one of said timing signals;
means interconnecting said set means of adjacent lamp assemblies in the sequence so that the lamp tiring signal in one lamp assembly in the sequence comprises the input set signal to a lamp assembly subsequent thereto in said sequence;
and ignition means in each lamp assembly responsive 3,488,558 7 8 to the corresponding lamp firing signal for causing References Cited the illumination of the related lamp. UNITED STATES PATENTS 3. The sequentially firing lamp system accordmg to claim 2 wherein said timing means provides a predeter- 2,794,967 6/1957 Cojgms et al- 340"331 mined number of said timing signals, and further includes 31408537 10/1968 Wiley 315.*313 means for generating a clear signal for resetting said timing means following said predetermined number of timing JOHN W- HUCKERT, Primary EXamIlel Slgnals R. F. POLISSACK, Assistant Examiner 4. The sequent1a1ly rlng lamp system accordmg to claim 3 wherein the set means in each of said lamp assem- 10 U S C1 X R blies comprises a bistable device, each of which is responsive to said clear signal to be reset into an inopera- 315-209, 210, 313, 314, 317, 318, 319, 322, 323, 360; tive state. 3A0-25, 82, 83, 331, 332, 340, 341
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|U.S. Classification||315/312, 315/323, 315/313, 315/210, 340/953, 315/360, 315/209.00R, 315/322, 315/314, 340/332, 340/331, 315/317, 315/318, 315/319|
|International Classification||H05B41/44, B64F1/20, H05B41/36, B64F1/00|
|Cooperative Classification||H05B41/44, B64F1/20|
|European Classification||B64F1/20, H05B41/44|