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Publication numberUS3523197 A
Publication typeGrant
Publication dateAug 4, 1970
Filing dateApr 18, 1968
Priority dateApr 18, 1968
Publication numberUS 3523197 A, US 3523197A, US-A-3523197, US3523197 A, US3523197A
InventorsWilliam Ellsworth Salzer
Original AssigneeRca Corp
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Current pulse driver apparatus employing non-saturating transistor switching techniques and having low-power drain during non-pulse periods
US 3523197 A
Abstract  available in
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Claims  available in
Description  (OCR text may contain errors)

Aug. 4, 1970 w. E. SALZER 3,523,197

QURPENT PULSE DRIVER APPARATUS EMPLOYING NON'SATURATING TRANSISTOR SWITCHING TECHNIQUES AND HAVING LOW-POWER DRAIN DURING NON-PULSE PERIODS Filed April 18, 1968 arronur CURRENT PULSE DRIVER APPARATUS EMPLOY- ING NON-SATURATING TRANSISTOR SWITCH- ING TECHNIQUES AND HAVING LOW-POWER DRAIN DURING NON-PULSE PERIODS William Ellsworth Salzer, Lake Park, Fla., assignor to RCA Corporation, a corporation of Delaware Filed Apr. 18, 1968, Ser. No. 722,248 Int. Cl. H03k 3/26 US. Cl. 307270 4 Claims ABSTRACT OF THE DISCLOSURE Current pulse driver apparatus for a line linked by magnetic elements is described. The driver includes a substantially constant current source transistor and a pair of transformer-transistor switches located at different ends of the line and selectively operable to connect the line in the collector circuit of the current source transistor. Circuitry is provided to regulate the current amplitude as well as to effect a fast linear leading edge for the current pulse when the line is selected. When the line is nonselected, the circuitry maintains the current source transistor forward biased but dissipates only a small amount of power.

BACKGROUND OF THE INVENTION The present invention relates to apparatus for driving a current pulse through a line including inductance. While not limited thereon, the invention is particularly useful for driving a current pulse through a selection or word line of a memory including an array of magnetic memory elements, such as cores.

A magnetic memory generally consists of an array of magnetic memory elements each linked by a number of lines which are selectively driven by current pulse drivers to insert (write) information into or to sense (read) information from the elements. It is desirable for consistently accurate memory operation that the current drive pulses have a controlled waveform which has a standardized steep leading edge as well as a standardized amplitude. A number of current pulse drivers which have been devised for these purposes include a source of operating voltage in series with a current source or sink. A pair of transformer-transistor switches are separately located at either end of a selection line to selectively connect the line across the operating voltage and current source.

In order to provide accurate control of both the leading edge and the amplitude of the current pulse, such drivers generally employ a substantially constant current source, such as a transistor, a time constant circuit for effecting a controlled leading edge, and a feedback sensing circuit operative to provide or maintain a constant steady-state amplitude. Some of these current pulse drivers have employed a substantially constant and continuous current source with the result that a large amount of power is undesirably dissipated during the non-selected or quiescent condition of the line. Typically, the current source transistor has a collector current of 400 milliarnperes at 6 volts resulting in a power dissipation of 2.4 watts. Others of these current drivers have attempted to turn the current source transistor on and off for the selected and non-selected conditions of the line, respectively, with the result that an additional turn-on and an additional turn-off time constant must be included in the selection time of the line, thereby increasing the access and cycle time of the memory.

Accordingly, an object of the present invention is to provide a new and improved current pulse driver apparatus having relatively low power dissipation while retain- United States Patent ing the advantage of accurate control of a substantially constant current source transistor.

BRIEF SUMMARY In the illustrated preferred embodiment, current driver apparatus for driving a current pulse through a line includes first and second operating voltage terminal means, a transistor means and drive means selectively operable in a selected condition to couple the collector electrode of the transistor in series with the line and the first and second voltage terminals to provide current flow through the line and operable in a non-selected condition to provide substantially no current flow through the line. An emitter resistor couples the transistor emitter electrode to the first voltage terminal and a capacitor is coupled between the transistor base electrode and the first voltage terminal. A circuit means is connected between the second voltage terminal and the transistor base electrode and includes impedance means for forward biasing the baseto-emitter electrode means of the transistor during the non-selected condition. The impedance means further provides a charge path for charging the capacitor at a substantially linear rate when the drive means switches to the selected condition whereby the collector current of the transistor increases at a linear rate independently of the characteristics of the line. A comparator means is provided between the emitter and base electrodes of the transistor for comparing the voltage across the emitter resistor with a predetermined voltage. The comparator means is operated to further prevent the further charging of the capacitor when the voltage across the emitter resistor becomes equal to the predetermined voltage, the. predetermined voltage being of a value which is adequate to maintain the transistor operable in a relatively stable and non-saturated condition during the selected condition.

DESCRIPTION OF THE PREFERRED EMBODIMENT In the sole figure of the drawing, a current pulse driver apparatus 12 is connected to drive a line 10 which is linked to a plurality of magnetic cores 11. The line 10 may, for example, be a word line of a magnetic core array. The current driver apparatus includes a pair of selection switches 20a and 2012 each arranged at different ends of the line 10 and a substantially constant current source circuit 30.

Selection switches 20a and 20b are substantially identical and similar components in each switch are identified by the same reference numeral and distinguished from one switch to the other by the accompanying letter designations a and b. Consequently, only the selection switch 20a will be described in detail.

The selection switch 20a includes a transistor 21a and a transformer 26a. The transistor 21a has its emitter electrode 22a connected by way of a diode 15 to the upper end of the line 10, the diode 15 being poled to conduct current in the same direction as the base-emitter junction of transistor 21a. The collector electrode 23a is connected to a first terminal 61 of a voltage source 60.

A resistor 25a and the secondary winding 27a of transformer 26a are connected in parallel and across the base electrode 24a and emitter electrode 22a. A source 29A of selection or address signals is connected across the transformer primary winding 28a. The lower end of the line 10 is connected to the collector electrode 23b of transistor 21b in selection switch 20b.

The current source circuit 30 includes a transistor means 31 which is preferably a compound transistor configuration of transistors 32 and 36. The transistor collector electrodes 33 and 37 are connected together and' to the emitter electrode 22b in the selection switch 20b.

The emitter electrode 34 is connected to the base electrode 39 and is further connected by way of a resistor 40 to the emitter electrode 38. The emitter electrode 38 is further connected by way of a low valued emitter resistor 41 to a second terminal 62 of the voltage source 60. The emitter resistor 41 may typically have a value of ohms. The base electrode 35 is connected by way of a capacitor 42 to the voltage source terminal 62 and by way of a base bias resistor 43 to the other voltage source terminal 61.

A feedback comparator circuit 44 includes a pair of emitter-coupled transistors 45 and 49. The transistor 49 has its collector electrode 50- connected to the base electrode 35 of transistor 32 and its base electrode 52 connected to the emitter-electrode 38 of transistor 36. The emitter electrodes 47 and 51 are coupled in common and by way of a common emitter resistor 53 to the second voltage source terminal 62. The base electrode 48 is connected to a point of reference voltage V The V voltage is derived from a voltage divider circuit including resistors 54 and 55. Resistor 54 is connected between the base electrode 48 and the second voltage terminal 62 and resistor 55 is connected between the base electrode 48 and a point of reference potential, illustrated as circuit ground by the conventional symbol. The collector electrode 46 is also connected to circuit ground. A clamping diode 56 has its cathode connected to base electrodes 52 and its anode connected to base electrode 48.

The voltage source 60 also has a third terminal 63 illustrated as being connected to circuit ground. The voltage source 60 may be any suitable direct current (D.C.) voltage source capable of providing at its first and second terminals 61 and 62 voltages having values of plus and minus V volts, respectively, relative to the circuit ground reference. For example, the voltage source 60 could be a battery having a total value of 2V volts with its positive and negative terminals corresponding to terminals 61 and 62 and its midpoint corresponding to terminal 63.

It is evident at this point that the above-described current pulse driver apparatus is adapted to pass current through the line 10 in a direction from the upper to the lower end of line 10, assuming conventional current flow. In some applications, for example, the so-called 2 /zD memory array, it is necessary to also pass current through the line 10 in the opposite direction. For this purpose, the dashed connection 13 is shown connected to the lower end of line 10 and dashed connection 14 is connected to the upper end via diode 16 poled in opposition to diode 15. Another current pulse driver (not shown) substantially identical to driver 12 could be connected to dashed connections 13 and 14. However, it should be noted that this other current driver would have the collector of its transistor corresponding to transistor 21b connected to dashed lead 14 and the emitter of its transistor corresponding to transistor 21a connected to dashed lead 13.

In another technique for achieving bi-directional flow through line 10, a single current source circuit 30 could be shared by both ends of the line 10. For this technique a selection switch identical to switch b would have its collector connected to line 14 and its emitter connected in common with the emitter 22b in order to share the single current source. The dashed connection 13 would then be connected to the +V volts terminal 61 by way of the collector-emitter path of another selection switch identical to switch 20a. I

The current source circuit or circuits 30, as the case may be, as described above for the line 10 may be shared by a number of lines so long as only one line at a time is selected. Such a scheme could be implemented, for example, by providing a pair of selection switches similar to switch 20a and another pair of selection switches similar to switch 20b for connecting each of the additional lines to the current source circuit or circuits Cit in accordance with either of the above described techniques for bi-directional current flow.

The sources 29a and 29b of address or selection signals may include any suitable circuits capable of producing digital pulses having an amplitude of V volts as illustrated adjacent each of the pulse sources. The sources 29a and 2% are also arranged by means not shown to apply their respective selection pulses concurrently to the transformer primary 28a and 28b.

The selection switches 20a and 20b operate as follows: In the absence of the selection signals (0 volts level) there is substantially no current flow in the primary and secondary windings of transformers 26a and 26b and the transistors 21a and 21b are turned off. The line 10 is therefore non-selected. When the selection pulses are applied by the sources 29a and 29b, currents flow in the primary and secondary windings and drive the transistors 21a and 21b into saturated conditions such that the voltage drops across their collector-emitter paths are negligible. With this condition, line 10 is selected and is operatively connected in series with the current source circuit and the voltage source 60. For this type of operation, the V value may typically be one volt With the transformer turns ratio being unity.

Consider, now, the operation of this current source circuit 30. During the non-selected condition of the line 10, the collector circuit for the compound transistor 31 is an open circuit due to the high impedances of the collector-emitter paths of the transistors 21a and 21b. Current flows in the conventional sense from the +V volts terminal 61 through the base bias resistor 43, the baseemitter junctions of transistors 32 and 36, the emitter resistor 41 to the -V volts terminal 62. The base-emitter junctions of transistors 32 and 36 are therefore forwardbiased and act to clamp the upper plate of the capacitor 42 to a voltage slightly more positive than -V volts as determined by the voltage drops across the emitter-resistor 41 and the base-emitter junctions of transistors 32 and 36. Also, at this time current flows in the conventional sense from ground through resistor 55, diode 56 and resistor 41 to the V volt terminal 62. Due to the voltage drop V across the diode 56 the base 48 of transistor 45 is more positive than the voltage at the base 52 of transistor 49. Thus, transistor 45 is turned on and transistor 49 is turned off.

Transistors 32 and 36 are preferably core driver type transistors, such as 2N3015 types. Transistors 45 and 49 are preferably small signal type silicon transistors, preferably fabricated in the same chip silicon material. Diode 56 is preferably a stabistor type silicon diode. For a voltage value of iV=il2 volts and for the circuit values listed below, the power dissipation for the current pulse driver apparatus is approximately 0.67 watt. The power dissipation in each of transistors 32 and 36 is about .045 watt or about .09 watt for both transistors.

Resistors:

40100 ohms 4115 ohms 43-1620 ohms 53-3 00 ohms 54649 ohms -650 ohms Condenser 42-200 picofarads Thus, it is evident that during the non-selected condition, the entire current pulse driver apparatus according to the present invention dissipates relatively less power. about 0.67 watt for the assumed voltage value of 12 volts as compared to the previously mentioned 2.4 watts for a current source transistor which is continuously providing a substantially constant current during the non-select time of the line 10. When the power dissipation in the driving circuit for the continuously conducting current source transistor is also taken account of, the power saving of the driver apparatus of the present invention is approximately a factor of five during the non-select time.

When the selection switches 20a and 20b are addressed to select the line 10, transistors 21a and 21b rapidly turn on to a saturated condition to provide a closed circuit for the collectors of transistors 32 and 36. Current now begins to flow in a path including the +12 volts terminal 61, the collector-emitter path of transistor 21a, diode 15, line 10, the collector-emitter path of transistor 21b, the collector-emitter path of transistor 36, emitter resistor 41, and the 12 volts terminal 62. At the same time, the charge condition of capacitor 42 changes at a linear rate in accordance with the current flow through base bias resistor 43'. That is, only the linear portion of the RC time constant curve is utilized. Accordingly, the collector currents of transistors 32 and 36, and hence the line current, increase at a linear rate. This rate or rise time is dependent on the values of capacitor 42 and resistor 43, which values are preferably chosen to provide a fast rise time or steep leading edge for the collector current.

As the emitter current flowing through emitter resistor 41 increases, the voltage drop thereacross increases. As this voltage drop approaches the Vref value, diode '56- is no longer forward biased. The V value is chosen to provide the desired current amplitude for the line 10. For the purpose of example, resistors 54 and 55 are assumed to have equal values such that V has a value of 6 volts. Thus, as the voltage drop across emitter resistor 41 approaches 6 volts, diode 56 stops conducting current. Transistor 49 turns on and transistor 45 turns off. Resistor 43 and the collector-emitter path of transistor 49 and common emitter resistor 53 provide a voltage divider to maintain a relatively stable charge conduction for capacitor 42. This divider prevents the further charging of capacitor 42 and stabilizes or holds the compound transistor configuration 31 in a substantially stable non-saturated condition whereby the collector or line current is maintained at a substantially constant amplitude.

When the address or selection pulses terminate (return to the 0' volt level), the selection switches 20a and 20b turn off and the current flowing in line decreases at a rate determined by the recovery time of the switches 20a and 20b and the discharge of capacitor 42 via the base-emitter junctions of transistors 32 and 36. The recovery time of the switches 20a and 2012 includes, inter alia, the delays associated with carrier storage of transistors 21a and as well as magnetizing current decay for the transformers 26a and 2615. It is notable, however, that the recovery time need not be extended beyond the delays associated with the selection switches 20a. and 20b in order to adequately accommodate timing pulse delays as must be done in those prior art systems in which timing pulses are employed to turn the current source transistor on and 011.

It is to be noted that one of the functions of diode 56 is to avoid reverse voltage breakdown of the baseemitter junction of transistor 49 during the non-select condition. Without diode 56, the voltage at base 48 of transistor 45 would be the V value of 6 volts. The voltage at emitters 47 and 51 would be about 5.2 volts. The voltage drop across emitter resistor 41 is small such that the reverse voltage drop across the base-emitter junction of transistor 49 could be as much as 6 volts or more, which is enough to cause breakdown of a silicon type transistor.

Although the invention has been illustrated with NPN type transistors, it is apparent that PNP transistors can also be employed so long as appropriate changes are made in the polarities of the signal and voltage sources. It is further noted that base bias resistor 43 could be replaced by a transistor biased to provide the base current for transistor 32 as well as charging current for capacitor 42.

As previously described, the regulation of the amplitude of the output current is achieved by means of the emitter coupled transistors 45 and 49. These transistors are preferably fabricated in a single integrated circuit structure. When so fabricated, the V s of these two transistors are so nearly matched that there is no need for an amplitude setting potentiometer.

If desired an emergency disabling circuit could be provided for the current source circuit 30. The disabling circuit could, for example, be a transistor switch having its collector-emitter path connected between base 35 of transistor 3-2 and the 12 volts terminal 62. The disabling transistor would be normally maintained in a turned off condition. A disabling voltage level applied at its base would turn the transistor on and provide a substantial short circuit across the compound transistor configuration 31.

What is claimed is:

1. Apparatus for driving a current pulse through a line comprising:

first and second operating voltage terminal means,

transistor means having base, collector and emitter electrode means,

drive means including switch means selectively operable in a selected condition to couple said collector electrode means in series with said line and said terminal means to provide current flow through said line, and operable in a non-selected condition to provide substantially no current flow through said line,

an emitter resistor means for coupling said emitter electrode means to said first terminal means,

capacitor means coupled between said base electrode means and said first terminal means,

circuit means connected between said second terminal means and said base electrode means, said circuit means including impedance means for forward biasing the base-to-emitter junction of said transistor means during said non-selected condition, said impedance means further providing a charge path for charging said capacitor at a substantially linear rate when said switch means switches to said selected condition, whereby the collector current of the transistor means increases at a linear rate independently of the characteristics of said line, and

comparator means coupled between said emitter and base electrode means for comparing the voltage across said emitter resistor means with a predetermined voltage and operative to prevent the further charging of said capacitor means when the voltage across said emitter resistor means and said predetermined voltage become equal, said predetermined voltage being of a value which is adequate to maintain said transistor means operable in a relatively stable and non-saturated condition during said selected con dition.

2. The invention according to claim 1 wherein said transistor means is a compound transistor configuration including first and second transistors, each having base, emitter and collector electrodes, the collector electrodes of the first and second transistors being coupled together and corresponding to said collector electrode means, the first transistor base electrode corresponding to said base electrode means, the second transistor emitter electrode corresponding to said emitter electrode means, and the first transistor emitter electrode being coupled to the second transistor base electrode.

3. The invention according to claim 2 wherein said impedance means is a resistor;

wherein said comparator means includes a common emitter resistor and third and fourth transistors, each having base, emitter and collector electrodes, the emitter electrodes of the third and fourth transistors being coupled together and by way of said common emitter resistor to said first terminal means, the base and collector electrodes of said third transistor being References Cited coupled to the second transistor emitter and the first transistor base electrodes, respectively, the collector UNITED STATES PATENTS electrode of said fourth transistor being coupled to a 2,997,600 8/1961 Hilbefg et a1 X point of reference potential, and 6, 90 3/ 196 Stern 307-270 X wherein reference voltage providing means applies said 5 ,900 3/ 1967 Gaunt 307270 X predetermined voltage to the base electrode of said 3,470,391 9/ 1969 Granger 307280 X fourth transistor. 4. The invention of claim 3 wherein a source of op- JOHN HEYMAN Primary Examiner crating voltage is provided having separate connections to 10 CL said first and second terminal means. 307 280

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US2997600 *Feb 29, 1960Aug 22, 1961Telefunken GmbhPulse generator with means for producing pulses independent of load conditions
US3126490 *May 3, 1961Mar 24, 1964 High current pulse driver using darlington circuit
US3311900 *Jan 14, 1963Mar 28, 1967Bell Telephone Labor IncCurrent pulse driver with regulated rise time and amplitude
US3470391 *Jun 3, 1966Sep 30, 1969Rca CorpCurrent pulse driver with means to steepen and stabilize trailing edge
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3617775 *Jun 3, 1970Nov 2, 1971James D AllenCircuit for charging the distributed capacitance of a plated wire memory
US4011468 *Oct 1, 1975Mar 8, 1977Sperry Rand CorporationLow power clock driver
Classifications
U.S. Classification327/110, 327/188, 261/DIG.720
International ClassificationH03K5/01, G11C11/06, H03K17/0412
Cooperative ClassificationH03K5/01, H03K17/04126, G11C11/06007, Y10S261/72
European ClassificationH03K17/0412D, G11C11/06B, H03K5/01