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Publication numberUS3566152 A
Publication typeGrant
Publication dateFeb 23, 1971
Filing dateJul 23, 1969
Priority dateJul 23, 1969
Also published asDE2036060A1
Publication numberUS 3566152 A, US 3566152A, US-A-3566152, US3566152 A, US3566152A
InventorsCasey Edward J, Lauber Thornton S
Original AssigneeGen Electric
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
High voltage electric circuit breaker including a synchronously closed resistor switch
US 3566152 A
Abstract  available in
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Claims  available in
Description  (OCR text may contain errors)

United States Patent Inventors Edward J. Casey Thornton S. Lauber, Media, Pa. 844,056

July 23, 1969 Feb. 23, 1971 General Electric Company Appl. No. Filed Patented Assignee HIGH VOLTAGE ELECTRIC CIRCUIT BREAKER INCLUDING A SYNCHRONOUSLY CLOSED RESISTOR SWITCH 307/133, 134, 93, 87, 28; 219/215, (inquired), 317.9, (inquired), 321, 323

Priinary Examiner- Robert K Schaefer Assistant Examiner- William J. Smith Attameys-.l. Wesley Haubner and William Freedman ABSTRACT: Discloses a high voltage circuit breaker for a three-phase AC circuit in which the surge voltages produced by circuit breaker closing are held to a very low value by: (1) preinserting resistance across the main contacts of each phase in two steps prior to main contact closing, (2) staggering the initial resistor switch closings in the three phases by 30 to 120 electrical degrees, and (3) engaging the resistor switch con tacts in the first-to-close phase at approximately the instant that the bus-side phase-to-ground voltage on that particular phase reaches a crest of the same polarity as the trapped charge on the line side of the breaker in that particular phase.

' lflfl TRAPPED CHARGE 6.1 m0

acre-arm as I 60 cLasI/vs TIMER 406/0 A 0 5152% ozrccran 7 84 78 75 7mm I 1 ms m4 TIMER ince vorraos ntacrarccmcurr BREAKER rivctunruo A SYNCHRONOUSLY CLOSED assrsron swircu BACKGROUND OF THE INVENTION This invention relates to a high voltage electric circuit breaker of the type comprising preinserted closing resistors and, more particularly, relates to a circuit breaker of this type in which resistor preinsertion is synchronized with a particular portion of a voltage wave associated with the circuit breaker in order to reduce the surge voltages produced by circuit breaker closing.

For reducing relates surge voltages produced by circuit breaker closing, it has heretofore been proposed that a resistor be preinserted into the high voltage circuit in parallel with the main contacts of the synchronized before these contacts reach engagement during a closing operation. While such resistor preinsertion produces some reduction in the surge voltages produced by closing, we are concerned with producing still greater reductions in the surge voltages.

In C.I.G.R.E. Paper No. I43 by E. Maury published in 1966 by Conference International de Grands Reseaux Electriquies in Paris, France it is proposed that additional reductions be achieved by synchronizing closing 'of the main contacts of the breaker with voltage zero across the preinserted resistor. For a three-phase circuit breaker, Maury proposes that the main contacts of the circuit breaker assembly in each individual phase be closed approximately in synchronism with a voltage zero appearing across the resistor that is preinserted into that particular phase.

Synchronizing the contacts of the circuit breaker assembly in each phase with voltage zero in that phase involves considerable complexity and expense inasmuch as a separate control unit of considerable accuracy is needed for each phase.

osis'crs An object of our invention is to limit the surge voltages produced by closing a circuit breaker. of the resistor preinserting-type type to a very low level, e.g., about 1.7 times normal crest voltage, without the need for separately synchronizing each phase with respect to the voltage appearing across the preinserted resistor.

Another object is to limit the closing overvoltage as set forth in the immediately preceding paragraph even though closing on a line with a charge trapped thereon.

BRIEF DESCRIPTION OF DRAWINGS For a better understanding of the invention, reference may be had to the following description taken in connection with the accompanying drawing, wherein:

FIG. 1 is a schematic diagram of a three-phase circuit breaker and closing control embodying one form of our invention;

FIG. 2 is a graphical representation of certain voltage relationships governing the time when closing should occur;

PEG. 3 is a schematic, but more detailed, showing of the trapped charge detector forming a portion of FIG. 1;

FIG. 4 is a schematic, but more detailed, showing of the logic circuit forming a portion of FIG. I.

GENERAL DESCRIPTION OF CONTACTS, RESISTORS, AND OPERATING MECHANISMS OF CIRCUIT BREAKER Referring now to FIG. 1, there is shown a high voltage polyphase alternating current circuit comprising three spacedapart phase conductors l2, l4, and 16. The sequence of phase rotation is assumed to be 12, M, 16. In each phase of the high voltage circuit there is connected a high voltage circuit breaker assembly, schematically illustrated at 20. Each of these circuit breaker assemblies is of the general type shown and claimed in application Ser. No. 736,702-Phillips, filed June 13, 1968, issued as U.S. Pat. No. 3,538,277 and assigned to the assignee of the present invention. Each of the circuit breaker assemblies 20 comprises a set of main contacts 22 comprising a movable 'contact 24 and a stationary contact 25. Shunting each set of main contacts is the series combination of a main resistor 27 and a main resistor switch 28. Main resistor switch 28 comprises a stationary contact 29 and a movable contact 30. During a circuit breaker closing operation, resistor 27 is preinserted into the high voltage circuit in parallel with the main contacts prior to these contacts engaging in order to reduce the magnitude of the surge voltage developed when the circuit breaker assembly is operated to closed position.

Also connected across the main contacts 22 is the series combination of a second resistor 31 and an auxiliary resistor switch 32 having a movable contact 34 and a stationary contact 35. The second resistor 31 has a considerably lower value than the first resistor 27. Second resistor 31 is connected across main contacts 22 at an instant following connection of the first resistor thereacross but prior to the main contacts reaching engagement. When the auxiliary resistor switch 32 is closed, the value of resistance across the open main contacts 22 is the effective resistance of the parallel combination of resistors 27 and 31, which is, of course, less than the value of resistance initially preinserted. In effect, the circuit breaker preinserts across the main contacts two different values of resistance at different points during the closing operation prior to engagement of the main contacts, the second resistance being considerably lower than the first resistance. In one specific form of my invention constructed as shown in FIG. 4

of the aforesaid Phillips application, the effective value of the first resistance is 400 ohms, and the effective value of the second resistance is 200 ohms. These are the total, values of resistance for a multibreak circuit breaker having a plurality of resistors in series.

Although we show the effective resistance across the breakers main contacts being reduced by inserting additional resistance in parallel with the initially inserted resistance, it is to be understood that such a reduction can alternatively be accomplished in any of the ways shown in the aforesaid Phillips application, e.g., by shorting out some of the initially inserted resistance or by sequentially closing the main contacts of series-connected interrupting units.

The resistance 27 is the illustrated embodiment is used not only during circuit breaker closing but also during circuit breaker opening. During circuit breaker opening, it functions in the conventional manner described in the aforesaid Phillips application and in U.S. Pat. No. 3,390,239-Miller to reduce the rate of rise of the recovery voltage. In this respect, the resistance 27 parallels the main contacts during the early stages of a breaker-opening operation until interruption is completed at the main contacts, following which the resistor switch 28 is opened to interrupt current through the resistance. The value of our resistance 27 will be no higher than twice the surge impedance of the power circuit in which it is connected and ordinarily will be approximately equal to the surge impedance. A resistance of 1.2 or L3 times the surge impedance is considered to be comprehended by the term approximately equal to the surge impedance. During circuit breaker closing, the relatively low value of this resistance and, particularly, the low value of the resistance remaining after closing of auxiliary switch 32 are important determinants of how closing should be effected to reduce the closing surge voltages, as will soon be pointed out in more detail.

At the end of a closing operation, auxiliary switch 32 is opened so as to remove the auxiliary resistor 31 from the circuit, thus preventing resistor 31 from entering into a subsequent opening operation.

Since the details of the circuit breaker operating mechanism form no part of the present invention, we have not shown them in the drawing and have shown each circuit breaker assembly in schematic form only. In the schematic form illustrated, closing motive means in the form of a spring 40 biases the movable contact of the main resistor switch 28 toward closed position, but it is restrained from operating by a releasable hold-open latch 42. Latch 42 is controlled by a solenoid 43, which upon energization, releases the latch and allows spring to drive the movable resistor switch contact 30 into engagement with stationary resistor switch contact 29. The closing operation of the main resistor switch 28 triggers into operation a closing device for auxiliary resistor switch 32, which responds by closing the auxiliary resistor switch approximately l electrical degrees (on a 60 Hz. basis) after closing of the main resistor switch. The closing of the auxiliary resistor switch 32 triggers into operation a closing device 46 for the main contacts, which responds by closing the main contacts 22 approximately 150 electrical degrees after closing of the auxiliary resistor switch 32.

A suitable operating mechanism for the circuit breaker assembly in each phase of the circuit is that shown and claimed in Pat. No. 3,390,239-Miller, assigned to the assignee of the present invention. The closing time for a circuit breaker assembly of this type can be predetermined with a comparatively high degree of accuracy; and the circuit breaker assembly can be relied upon to consistently close its resistor switch contacts within 1-45 electrical degrees (on a 60 Hz. basis) of the predetermined closing time. A typical closing time for such a circuit breaker assembly is 37.5 milliseconds. This is the time elapsing between energiaation of the latch-releasing solenoid 43 and engagement of the resistor switch contacts 30, 29.

Since the circuit breaker assemblies in each of the three phases are substantially identical, the same reference numerals have been used to designate corresponding parts in each assembly. The portion of each phase conductor to the left of its circuit breaker assembly 20 may be thought of as a bus, and the portion to the right of the circuit breaker assembly may be thought of as the line.

CLOSING ON A LINE WITH A TRAPPED CHARGE A type of switching duty that can be particularly severe from'the standpoint of producing high surge voltages is closing on a line with a trapped charge thereon. This situation is most commonly encountered with automatically reclosing circuit breakers, which are typically reclosed within a short time after an opening operation, e.g., 40 electrical cycles or less. In dry weather, the trapped charge on an open line can remain within a few percent of its initial value at the end of even a second or more. Thus, substantially the full trapped charge may be present on an unfaulted line when the circuit breaker recloses. As is known, the presence of this charge can increase the magnitude of the surge voltages produced by closing.

For reducing the surge voltages produced by closing on a line with a trapped charge, we provide a control unit 60 which controls the closing of the main resistor switch 28 in one phase 12, which is the first phase to close, in such a manner that the resistor switch contacts 30, 29 engage at approximately the inslant that the phase-to-ground voltage in that particular phase,

as measured on the bus side of the breaker, reaches a crest value of the same polarity as the charge trapped on the line in that particular phase. For example, referring to FIG. 2, curve V represents the phase-to-ground voltage on phase 12 measured on the bus side of the breaker, and curve T represents the phase-to-ground voltage on phase 12 measured on the bus side of the breaker, and curve I represents the voltage of the charge trapped on the line side of the breaker, as measured from phase 12 to ground. Our control unit 60 attempts to cause the contacts of the main resistor switch 28 to engage at an instant X, which is an instant that the bus-side line-toground voltage V reaches a crest value of the same polarity as the trapped charge voltage T.

Referring to FIG. 2, studies have shown that the magnitude of the closing overvoltage is directly related to the difference between the bus-side voltage V and the line-side voltage T at the instant of resistor switch contact engagement and that ideally this voltage difference should be zero. But it is not feasible to control closing with sufficient accuracy to precisely synchronize contact engagement with the point of zero voltage difference. To minimize the difference voltage that will be present when closing within practical limits of accuracy, e.g., :45 electrical degrees, we aim for closing at the crest value of the bus-side, phase-to-ground voltage. Thus, we close the resistor switch contacts within :45 degrees of crest voltage of the same polarity as the trapped charge.

Closing within this range assures that the maximum voltage difference across the resistor switch contacts at the instant of closing will be equal to whichever is the greater of (l) the crest voltage minus the trapped charge voltage of (2) the trapped charge voltage minus 0.707 X the crest voltage. Although the above described timing range is a preferable one, our invention in its broader aspects comprehends closing the resistor switch at any time during a voltage loop of the same polarity as the trapped charge. This will result in a maximum voltage no higher than crest voltage being present across the resistor switch contacts at the instant of closing except in the very rare case when the trapped charge exceeds the crest voltage. For such a rate situation, the maximum voltage present at the instant of closing would be crest voltage plus the slight voltage by which the trapped charge exceeds crest voltage.

ZERO CROSSING DETECTION Our control unit 60 comprises means for sensing the phaseto-ground voltage on the bus side of the breaker and means for establishing the instant that this voltage crosses zero and its direction of change at this instant. The means for sensing the phase-to-ground voltage on the bus side of the breaker comprises a voltage divider constituted by a pair of capacitors 70 and 72 connected in series between the bus side of the breaker and ground. The lower capacitor 72 has a very high capacitance compared to that of the upper capacitor 70, and thus a relatively low voltage (indicated at 73) appears across the lower capacitor 72. This low voltage 73 is an accurate reproduction of the bus-side phase-to-ground voltage and bears a predetermined fixed phased relationship with respect to this phase-to-ground voltage. In one specific embodiment of my invention, there is a resistive circuit (not shown) con- ;nected across the lower capacitor 72, and this results in a phase lag of 23 in the low voltage 73 with respect to the high voltage between the bus and ground.

The low voltage signal 73 is supplied to a conventional pulse-forming circuit 75, designated a zero rossing detector. This pulse-forming circuit 75 develops a pulse each time voltage signal 73 passes through zero, the polarity of the pulse being dependent upon the direction that the voltage passes through zero. For example, a'positive-going passage through zero results in a positive pulse, and a negative-going passage through zero results in a negative pulse. These periodically occuring pulses, which are shownat 76 in FIG. 1, may be though of as constituting a signal bearing a fixed time relationship to the zero crossings of the bus-side phase-to-ground voltage.

TRAPPED CHARGE DETECTION Control unit 60 further comprises means for sensing the 1 magnitude and polarity of the voltage trapped on the line at the time the circuit breaker 20 was opened to interrupt alternating current therethrough.'This sensing means comprises a voltage divider constituted by a pair of capacitors 80 and 82 connected in series between the line side of the circuit breaker and ground. Lower capacitor 82 has a very high capacitance compared to that of upper capacitor 80, and thus a relatively low voltage appears across capacitor 82 on the circuit 81. This low voltage at 81 is proportional to and of the same polarity as the line-to-ground voltage at the instant of interruption of the AC current in the line. The voltage at 81 is applied to bistable flip-flop 83, which is designated a trapped charge detector. (A more detailed description of this trapped charge detector appears later in this specification.)

So long as the voltage at 81 is below a predetermined value, trapped charge detector 83 develops no output at 85. But when this voltage at 81 exceeds this predetermined value, the

trapped charge detector 03 will develop an output voltage on circuit 85 that is of the same polarity as the input voltage at 31. A negative polarity output voltage on circuit 85 is shown at $7 in P16. 1. This output voltage at 85 will be maintained until the input voltage at 81 reverses its polarity and exceeds a predetermined level of reverse polarity voltage. Such a reversal of the input voltage polarity will cause the trapped charge detector to develop an output voltage of a polarity reversed from that previously developed. Suitable filtering means in the trapped charge detector prevents such a reversal in the output voltage at 85 in response to a transient reversal of the voltage at 81. The output voltage at 85 is maintained despite a loss of the trapped charge on the power line.

The voltage at 81 required to cause trapped charge detector 83 to develop an output signal at 85 is a voltage high enough to indicate that a predetermined percentage, e.g., 10 percent, of the normal phase-to-ground voltage was trapped on the line immediately following interruption of the AC current through the line. The output from the trapped charge detector 83 is fed via output circuit 05 to a closing logic circuit 78.

CLOSING LOGIC The closing logic circuit 78 will first be described only in general terms, with a more specific description following later in this specification. The closing logic circuit 78 has two input circuits 04 and 85, an output circuit 88, and a disabling circuit 06 which prevents any output from being developed on output circuit 88 until a normally closed switch- 89 in the disabling circuit is opened. The normally closed switch 89 may be thought of as a closing-command switch. It can be operated either manually or by a suitable automatic reclosing relay (not shown).

Assuming that the closing-command switch 89 has been operated to open position, the closing logic 78 will develop an output at 88 only when: l there is an input on circuit 85 of a given polarity and (2) there is an input pulse on circuit 84 of the same polarity as the input circuit 85. This condition is present, for example, when a positive polarity pulse appears on circuit 84 while the signal on circuit 85 is positive. The appearance of such a positive polarity pulse at 84 will cause the logic circuit to develop an output on circuit 88 beginning at an instant bearing a predetermined fixed time relationship with respect to the passage of the bus-side phase-to-ground voltage through zero in a direction toward the polarity of the charge trapped on the line side of he breaker, thus establishing as a reference point such passage through zero of the bus-side phase-to-ground voltage.

With this zero voltage crossing instant for phase 12 established as a reference point and the closing time of the circuit breaker assembly in phase 12 known within a few milliseconds, one can readily establish the time delay which must precede initiation of circuit breaker closing motion in order to cause the resistor switch contacts of phase 12 to engage at a preselected point on the voltage wave, which in this particular case is the instant of peak voltage. For providing this time delay, a timer 100 is provided for phase 12 of the circuit breaker. Timers 101 and 102 are provided for the other phases 14 and 16, respectively. At the expiration of a predetermined period following receipt of the abovedescribed output signal from logic circuit 78, the timer 100 for phase 12 supplies a closing signal via a channel 104 to the solenoid 43 of the closure-initiating latch 42. This immediately releases latch 42 to initiate closing motion of circuit breaker assembly in phase 12.

STAGGERED CLOSING OF PHASES As will soon appear more clearly, it is desired to stagger, or delay, the closing of the resistor switch in phase 14 by about 60 electrical degrees from that occurring in phase 12 and to stagger resistor switch closing in phase 16 by about 60 electrical degrees from that occurring in phase 14. This sequence of phase closing corresponds to the sequence of phase rotation. Timers 101 and 102 are relied upon to produce this staggered closing. In this respect, assume that each of the circuit breaker assemblies has substantially the same closing time, the timing period of timer 101 is set so as to be electrical degrees longer than that of timer 100, and the timing period of timer 132 is set so as to be 120 electrical degrees longer than that of timer 100. Since all the timers simultaneously receive their starting signal, timer 101 supplies a closure-initiating signal to its output channel 105, 60 electrical degrees after the first timer 100 supplies its closure-initiating signal, and the remaining timer 102 supplies a closure-initiating signal to its output channel 107 an additional 60 electrical degrees later. If one of the circuit breaker assemblies happens to have a closing time differing appreciably from the others, its timer can be adjusted so as to provide a-shorter or a longer timing period, as the case may be, which compensates for the longer or shorter circuit breaker closing time.

Although we show a channel for directly connecting the output of each timer to its latch 42, it is to be understood that there will typically be a suitable amplifier (not shown) in each channel for supplying the necessary tripping power in response to the development of an output signal by the timer.

Suitable blocking diodes such as 108 isolate the output channels 104, 105 and 107 from each other and assure that each of the timers 100, 101 and 102 will energize only its own individual channels and neither of the other two channels.

BACKUP TIMER in the event that the charge trapped on the line is less than 10 percent of normal phase-to-ground crest voltage, then there is no need to synchronize circuit breaker closing with the voltage wave inasmuch as no objectionable overvoltages are likely to be developed by closing under this condition. For effecting circuit breaker closing without voltage synchronization under this condition, we provide a backup timer 110 which has a turn-on circuit 112. Tum-on circuit 112 contains a normally open switch 114 which, upon closure, completes the turn-on circuit 112 to start a timing operation for backup timer 110. Upon completion of a predetermined timing period, the backup timer 110 develops an output which is supplied to tripping solenoids 43 of all three circuit breaker assemblies via channels 104, 105 and 107. The timing period for the backup timer 110 is made slightly longer than the timing period of the last-to-operate synchronous timer 102 plus the delay time of zerocrossing detector 75. The turn-on switch 114 for the backup timer is coupled to the closing-command switch 89 and closes at the same time as the closing-command switch opens. Thus, the backup timer is turned on at the same time as switch 89 commands a synchronous closing operation. If the input to the closing logic is of such a nature as to indicate that synchronous closing is appropriate, the closing logic will immediately turn on the synchronous timers 100, 101 and 102 and initiate a voltage-synchronized closing operation before the backup timer 110 has an opportunity to initiate circuit breaker closing. But if the input to the closing logic 78 indicates that synchronous closing is inappropriate, then no output will be forthcoming from the closing logic, and the backup timer will, at the end of its timing period, supply a closing signal to the three output channels 104, 105 and 107 to initiate closing of the three circuit breaker assemblies substantially simultaneously and without regard to any particular point on the voltage wave. In this particular situation, since the trapped charge is less than l0 percent of normal line-to-ground crest voltage, the trapped charge detector 83 will be developing no output voltage at 85. Hence, the closing logic 78 will remain inactive and circuit breaker closing will be controlled by the backup timer 110.

Should no bus voltage be present when the control switches 89 and 114 are operated, the backup timer will act in substantially the same manner as described in the immediately preceding paragraph. In this case, the closing logic will be receiving no input signal via input channel 84 and therefore will not respond to closing of the closing-command switch 89. Accordingly, the synchronous timers 100, 101 and 102 will remain inactive, and closing will be initiated by the backup timer 110.

GENERAL DISCUSSION OF OPERATING FEATURES THAT REDUCE SURGE VOLTAGES ON CLOSING There are three main features of our above-described circuit breaker which cooperate to limit the surge voltages produced by closing to an extremely low level, e.g., about 1.7 times normal crest voltage, even when closing on a line with a trapped charge. These three features are: (1) engaging the first-to-close resistor switch contacts at approximately the instant that the bus-side phase-to-ground voltage in the first-toclose phase reaches a crest of the same polarity as the trapped charge on the line-side of the breaker in that particular phase; (2) preinserting resistance across the main contacts of each phase in two steps prior to main contact closing; and (3) staggering the main resistor switch closings in the three phases by 30 to 120 electrical degrees, especially the resistor switch closing in the second phase with respect to that in the first phase.

We are aware that Maury in his aforementioned C.I.G.R.E. paper states that the initial instant when the resistor is preinserted is of no importance, but this is most emphatically not the case in our circuit breaker where the resistance across the main contacts in each phase is inserted in two steps and the resistance remaining just prior to main contact engagement is very low, and where there is no synchronizing of the closing of each phase with zero voltage across the breaker terminals. By inserting the resistance in two steps in such a manner that the final resistance is of a very low value and by staggering closing of the second phase with respect to the first phase by 30 to 120, we can eliminate the need for synchronizing the resistor switch of each pulse with voltage zero across the contacts and can also eliminate the need, referred to by Maury, for synchronizing the closing of the main contactswith respect to the voltage wave. We find that in our circuit breaker, with its relatively low value of final closing resistance, the instant that the main contacts close relative to the voltage wave is of relatively little importance, assuming the resistor switch contacts of the first-to-close resistor switch have closed at approximately the ideal time described hereinabove.

Staggering the closings of the resistor switches in the individual phases contributes to reduced surge voltages since, with such staggering, there is a reduced probability of simultaneous surges being developed on the different phases. These surges can interact to increase the total voltages developed. Substantial staggering allows time for damping out of some of the surges, thus reducing the effect of any such interaction. We find that at least 30 electrical degrees should be allowed between closing of the resistor switch in the first phase and closing of the resistor switch in the second phase. Staggering between the third phase and the second phase appears to have less of an effect in reducing surge voltages than staggering between the second and first phases. In a preferred form of our invention, we stagger closing of the resistor switch in the second phase by 60 with respect to the first phase and stagger the third phase resistor switch closing by 60 with respect to the second-phase resistor switch closing.

In each individual phase, the time elapsing between the successive steps of inserting and removing the initial resistance from shunting relationship with the main contacts should also be sufficiently long to prevent objectionable interaction between the surges produced by these steps. At least 120 electrical degrees should be allowed to elapse between each of these steps. In a preferred form of the invention, we allow 150 electrical degrees between each step.

TRAPPED CHARGE mcioa 83 AS DEPICTED IN FIG. 3

A more detailed showing of the trapped charge detector 83 appears in FIG. 3, where the voltage divider 80, 82 is shown connected between line and ground, and connected across lower capacitor 82 is the series combination of a resistor and two diodes 152 and 153 connected in inverse parallel relationship. The voltage across the diodes is proportional to the line-side phase-to-ground voltage until a predetermined value (greater than 10 percent of crest value) is reached, after which the voltage across the diodes remains substantially constant so long as the phase-to-ground voltage remains above this level. The polarity of this voltage across the diodes corresponds to the polarity of the line-to-ground voltage. This voltage across the diodes is supplied as an input signal to a first operational amplifier 156, the output from which is supplied to a second operational amplifier 157, which produces an output at circuit 85. Both these amplifiers are inverting amplifiers as indicated by the polarity marks applied to their inputs and outputs. A feedback signal dependent on the output at 85 of the second amplifier 157 is fed back to the input of the first amplifier through a feedback circuit 158 containing a resistor 159.

Once the input voltage across diodes 152, 153 exceeds a predetermined value (indicative of the phase-to-ground voltage reaching 10 percent of crest value), an output signal of the same polarity as the input voltage is produced by the second amplifier 157, and the feedback signal derived therefrom maintains the two amplifiers in a turned-on condition that enables them to continue developing the same output despite a complete loss of voltage on the line 12. If the input voltage reverses its polarity and exceeds a predetermined value of reverse polarity voltage, the polarity of the output signals from the two amplifiers is reversed, and'the amplifiers are again locked in to produce an output at 85 of a polarity corresponding to the reverse polarity input signal.

The two amplifiers 156 and 157 are coupled together through an R-C circuit 160, 161 which serves as part of a filtering network that prevents high frequency signals from being effectively transmitted through the amplifiers and ap pearing an output circuit 85.

LOGIC CIRCUIT 78 AS DEPICTED IN FIG. 4

The logic circuit 78 referred to hereinabove is shown in more detail in FIG. 4. This circuit comprises a pair of flip-flops and 181, which in one practical embodiment of the invention are integrated circuits obtainable from Motorola, Inc. as type MDTL MC930/830 series. In the schematic showing of FIG. 4, each flip-flop has two control terminals designated A and B, an input circuit 84, and an output circuit 88. Flip-flop 180 can be turned on only by a negative pulse at 84 when its terminal A is plus and its terminal B is minus. When a negative polarity signal is present on control circuit 85, the terminals A and B of the two flip-flop are of the polarity'indicated in FIG. 4. Component 184 is an inverting amplifier that causes the correspondingly designated terminals of the two flip-flops 180 and 181 to be of opposite polarities when a given signal is present on circuit 85.

When the terminals A and B of the two flip-flops are energized as shown, a positive pulse on input circuit 84 will activate neither flip-flop but a negative pulse on the input circuit 84 will activate flip-flop 180. Thus, when terminals A and B are energized as shown, no output appears on circuit 88 in response to a positive input pulse at 84, but an output is developed in response to a negative pulse at 84.

If a positive polarity signal is present on circuit 85, each of the terminals A and B of the two flip-flops has a polarity opposite to that illustrated. This would means that flip-flop 181, but not flip-flop 180, can be turned on by a positive pulse at 84. Accordingly, when a positive pulse appears at 84, flip-flop 181 immediately turns on to produce an output on circuit 88.

A negative pulse on circuit 84 under these conditions would activate neither of the flip-flops.

Thus, it will be seen that the logic circuit 78 develops an output at 88 only when a pulse appears on input circuit 84 of the same polarity as the signal on control circuit 85. Disabling circuit 86 prevents this pulse from being transmitted to the timers Mill-162 so long as the command-to-close switch 89 is closed. But when switch $9 is opened, the disabling effect of circuit as is removed and the timers are permitted to receive the output signal developed by the logic circuit 78.

While we have shown and described a particular embodiment of our invention, it will be obvious to those skilled in the art that various changes and modifications may be made without departing from the invention in its broader aspects; and we, therefore, intend herein to cover all such changes and modifications as fall within the true spirit and scope of out invention.

We claim:

l. in a high voltage circuit breaker for connection between bus and line portions of a polyphase AC circuit; a circuit breaker assembly for each phase comprising: means including resistor switch contacts engageable to preinsert a resistance in series with the associated phase during circuit breaker closing, means comprising main contacts of said assembly for completing a shorting circuit that shorts out said preinserted resistance during a later stage of circuit breaker closing, and means for reducing the effective value of said preinserted resistance prior to completion of said shorting circuit, said means for preinserting said resistance comprising: closing motive means for driving said resistor switch contacts into engagement and for thereafier causing said shorting circuit to be completed through said main contacts, restraining means for blocking operation of said closing motive means until released, said closing motive means requiring a predetermined circuit breaker closing time following release of said restraining means to produce engagement of said resistor switch contacts; a closing control for the restraining means of all of said circuit breaker assemblies comprising:

a. closing command means operable to provide a signal for initiating a circuit breaker closing operation;

b. means permitted to operate by said signal and operable when a charge exceeding a predetermined percentage of crest voltage is trapped on the line portion of a predetermined one of said phase for releasing the restraining means of the assembly in said one phase at such an instant that the resistor switch contacts of said assembly consistently reach engagement during a voltage loop of the same polarity as the charge trapped on said line portion; and

c. means for releasing the restraining means of each of said other phases in such time-staggered relationship with respect to release of the restraining means of said one phase that engagement of the resistor switch contacts in the second-to-close phase occurs 30 to I electrical degrees after engagement of the resistor switch contacts in said one phase.

2. in a high voltage circuit breaker for connection between bus and line portions of polyphase AC circuit; a circuit breaker assembly for each phase comprising: means including resistor switch contacts engageable to preinsert a resistance in series with the associated phase during circuit breaker closing, means comprising main contacts of said assembly for completing a shorting circuit that shorts out said preinserted resistance during a later stage of circuit breaker closing, and means for reducing the effective value of said preinserted resistance prior to completion of said shorting circuit, said means for preinserting said resistance comprising: closing motive means for driving said resistor switch contacts into engagement and for thereafter causing said shorting circuit to be completed through said main contacts, restraining means for blocking operation of said closing motive means until released, said closing motive means requiring a predetermined circuit breaker closing time following release of said restraining ill means to produce engagement of said resistor switch contacts; a closing control for the restraining means of all of said circuit breaker assemblies comprising:

a. zero-crossing detection means operable when said circuit breaker is open for developing a first signal having a predetermined fixed time relationship with respect to passage through zero of the phase-to-ground voltage on one of said phases, measured on the bus side of said circuit breaker, said first signal having a character indicative of the direction of change of said bus-side voltage;

b. trapped-charge detection means operable when said circuit breaker is open for developing a second signal in response to the phase-to-ground voltage trapped on said one phase, measured on the line side of said breaker, exceeding a predetermined value, said second signal having a character indicative of the polarity of said trapped charge;

0. logic means receiving said first and second" signals and operable to develop an output signal that establishes the instant that said'bus-side phase-to-ground voltage crosses zero toward the polarity of said line-side trapped charge;

d. timing means started by said output signal and producing a motion-initiating signal at the end of a timing period that is of such a duration that the sum of said timing period plus said predetermined circuit breaker closing,

time for the assembly in said one phase equals the time elapsing between development of said output signal and the occurrence of a voltage loop in said bus-side, phaseto-ground voltage of the same polarity as said trapped charge;

e. means for releasing the restraining means of said one phase upon production of said motion-initiating signal;

. disabling means for preventing said timing means from producing an efiective motion-initiating signal until a closing command signal is received by said disabling means; and

g. means for releasing the restraining means of each of said other phases in such time-staggered relationship with respect to release of the restraining means of said one phase that engagement of the resistor switch contacts in the second-to-close phase occurs 30 to electrical degrees after engagement of the resistor switch contacts in said one phase,

3. The circuit breaker of claim 1 in which said timing period has a duration such that the sum of said timing period plus said predetermined circuit breaker closing time for the assembly in said one phase approximately equals the time elapsing between development of said output signal and the occurrenceof a voltage crest in said bus-side, phase-to-ground voltage of the same polarity as said trapped charge.

4. The circuit breaker of claim 1 in which the preinserted resistance is also used for controlling the rate of rise of the recovery voltage during circuit breaker opening and is'of a value less than twice the surge impedance of the energized AC circuit.

5. In a high voltage circuit breaker for connection between bus and line portions of a polyphase AC circuit; a circuit breaker assembly for each phase comprising: means including resistor switch contacts engageable to preinsert a resistance in series with the associated phase during circuit breaker closing, means comprising main contacts of said assembly for completing a shorting circuit that shorts out said preinserted resistance during a later stage of circuit breaker closing, and means for reducing the effective value of said preinserted resistance prior to completion of said shorting circuit, said means for preinserting said resistance comprising: closing motive means for driving said resistor switch contacts into engagement and for thereafter causing said shorting circuit to be completed through said main contacts, restraining means for blocking operation of said closing motive means until released, said closing motive means requiring a predetermined circuit breaker closing time following release of said restraining means to produce engagement of said resistor switch contacts;

a closing control for the restraining means of all of said circuit breaker assemblies comprising:

a. first sensing means responsive to the bus-side phase-toground voltage on one of said phases for sensing when said bus side voltage is crossing zero and the direction of change during said zero crossing;

b. second sensing means responsive to the line-side phaseto-ground voltage on said one phase for sensing the polarity and magnitude of the phase-to-ground voltage trapped on said one phase on the line side of said circuit breaker;

c. means controlled by said first and second sensing means and operable when said line-side trapped charge exceeds a predetermined value .for developing an output signal at I a fixed time relative to said bus-side voltages crossing zero in a predetermined direction with respect to the polarity of said line-side trapped charge;

d. timing means started by said output signal and producing a motion-initiating signal at the end of a timing period that is of such a duration that the sum of said timing period plus said predetermined circuit breaker closing time for the assembly in said one phase equals the time elapsing between development of said output signal and the occurrence of a voltage loop in said bus-side, phaseto-ground voltage of the same polarity as said trapped charge;

e. means for releasing the restraining means of said one phase upon production of said motion-initiating signal;

f. disabling means for preventing said timing means from producing an effective notion-initiating signal until a closirig-command signal is received by said disabling means; and

g. means for releasing the restraining means of each of said other phases in such time-staggered relationship with respect to release of the restraining means of said one phase that engagement of the resistor switch contacts in the second-to-close phase occurs 30 to 120 electrical degrees after engagement of the resistor switch contacts in said one phase. p

6. The circuit breaker of claim in combination with:

a. backup timing means started by said output signal and producing a second motion-initiating signal at the end of a second timing period that is slightly longer than that used for closing of the circuit breaker assembly in the last-to-close phase during voltage-synchronized closing; and

b. means responsive to said second motion initiating signal for releasing all of said restraining means without regard to the voltage conditions sensed by the sensing means of (a) and (b) ofclaim 4.

7. The circuit breaker of claim 6. in which release of all of said restraining means in response to said second motion-initiating signal occurs substantially simultaneously.

8. The circuit breaker of claim 5 in which the means of (g) comprises: releasing means for the restraining means the second-to-close phase, separate timing means for the releasing means of said second-to-close phase which is started by said output signal from said logic. means, said separate timing means producing a motion-initiating signal for the releasing means of said second-to-close phase at the end of a timing period longer than the timing period of the timing means of (d) by a sufficient amount to consistently produce said 30 to delay in closing said second-to-close phase whenever closing is controlled by said logic means.

9. The circuit breaker of claim 5 in which said releasing means of (g) releases the third-to-close phase in such timestaggered relationship to release of the restraining means of said one phase that engagement of the resistor switch contacts in the third-to-close phase consistently occurs 30 to 120 after engagement of the resistor switch contacts in the second-toclose phase whenever closing is controlled by said logic means. a

10. The circuit breaker of claim 5 in which the means of (g) comprises releasing means for the restraining means of each timing means being started by said output signal from said logic means, each of said separate timing means producing a motion-initiating signal for the releasing means of its associated phase at the end of a timing period sufficiently long that the second-to-close phase is consistently closed 30 to 120 after said one phase is closed and the third-to-close phase is consistently closed 30 to 120 after the second-to-close phase is closed whenever closing is controlled by said logic means.

11. The circuit breaker of claim 5 in which said timing period has a duration such that the sum of said timing period plus said predetermined circuit breaker closing time for the assembly in said one phase approximately equals the time elapsing between development of said output signal and the occurrence of a voltage crest in said bus-side, phase-to-ground voltage of the same polarity as said trapped charge.

12. The circuit breaker of claim 5 in which the preinserted resistance is also used for controlling the rate of rise of the recovery voltage during circuit breaker opening and is of a value less than twice the surge impedance of the energized AC circuit.

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Classifications
U.S. Classification361/6, 307/327, 361/10, 307/28, 307/87
International ClassificationH01H9/54, H01H9/56, H01H33/16, H01H33/04
Cooperative ClassificationH01H33/16, H01H9/563
European ClassificationH01H9/56B, H01H33/16