US 3566388 A
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Feb. 23, 1971 R. w. ANDREWS ETAL 3,566,388
TRAVELING MESSAGE DISPLAY.
Filed Nov. 20, 1968 By TTORN# United States Patent ice 3,566,388 Patented Feb. 23, 1971 3,566,388 TRAVELING MESSAGE DISPLAY Russell W. Andrews, Worth, and Robert A. Payne, Des Plaines, Ill., assignors to Stewart-Warner Corporation, Chicago, Ill., a corporation of Virginia Filed Nov. 20, 1968, Ser. No. 777,229 Int. 'Cl. HOSb 41/44, 39/09 U.S. Cl. 340--334 7 Claims ABSTRACT F THE DISCLOSURE BACKGROUND OF THE INVENTION This invention relates to display systems. More particularly, this invention relates to systems of the type in which display messages are caused to travel across a fixed matrix of display elements and is an improvement to the system shown in the copending United States patent application Ser. No. 703,057, filed Feb. 5, 1968 by R. W. Andrews, P. M. Kolesar, R. A. Payne and H. G. Posner.
The traveling message display system of the referenced application is capable of receiving input data from a source at abruptly varying rates and displaying the mes sage in accordance with the rate of data input but not synchronized therewith so as to provide an easily readable display. It does so by loading the data into a 'buffer at the rate of receipt and unloading the data therefrom and onto the display board at a rate dependent on the amount of data loaded into the buffer. However, in some applications of the system, such as for displaying quotations received from the stock exchange ticker wire services, the data is received in blocks with short intervals in between which permit the buffer to unload and cause the display to stop and start. When the stops and starts occur fairly frequently, as `with the lesser volume stock exchange services such as the. American Stock Exchange service, the effect on the display board can be quite disturbing to the viewer. A system embodying this invention comprises a fixed matrix display board, means for receiving the input data, means for forming display characters on the display board in accordance with the received data, means for causing the formed characters to travel across the board at a speed determined by the rate of receipt of the input data, and means for disabling the character travel causing means a predetermined period after the ceasing of receipt of the input data. Thus, the system has a sort of flywheel effect to cause the message to continue traveling across the board during short interruptions in the receipt of input data.
This invention Will be better understood by a further reading of the specification, especially when taken in view of the accompanying drawing which is a system diagram with the circuits essential to the provision of the flywheel effect shown in detail.
The system 100 receives data from an information source through line 102 such as a stock exchange quotation ticker service and displays characters on the display board 104. The display board 104 comprises a matrix of display elements 106 such as low transient neon bulbs and the character data developed by the circuits in the system is fed into the board 104 so as to form the character at the righthand side 108 which is caused to travel thereacross in the direction of arrow 110. The data comes in to a data receiver 204 in a series of electric pulses which represent bits of a binary code for the display characters. The data receiver includes a parallel-to-series converter so that all of the binary code bits for the character can be read in to a buffer storage unit 114 at the same time. The read in of the data into the buffer and the flow of data therethrough is governed by a buffer control circuit 116 such as the one shown in the aforementioned application. When the input data has been received and converted to parallel form, a code received signal is sent to the buffer control to indicate that the data is ready to be stored in the buffer. The buffer 114 is made up of sequential stages and stores the code bits for each display character in parallel fashion in the sequence and at the rate the display character data is received. After the data has been entered into the buffer, the buffer control 116 returns a code stored signal to reset the data receiver and series-to-parallel converter 112 for receipt of the next character data.
The buffer control 116 along with a variable frequency clock 118 which serves as the timing control of the system controls the rate of flow of the data bits through the buffer 206 and the readout therefrom to the following circuits. The number of characters stored in the buffer 114 (which is an indication of the rate of receipt of incoming information from the data source) is determined by the variable frequency clock ll18 and it operates at a rate commensurate therewith to shift the data through the lbuffer to its final stage, as in the manner of the aforementioned application. The circuit for varying the frequency of the clock 118 preferably has a long and substantially linear transient response so that rapid changes in the rate of data input are smoothed out to a more slowly changing rate of readout from the buffer.
The data for each character as. it resides in the last stage of the buffer is decoded by a character data decoder 120 which provides a signal over an appropriate one of a number of conductors to a lamp encoder circuit 122. The number of conductors in the line to the lamp encoders is determined by the number of different characters required to be displayed and the number of special functions to be performed.
The lamp encoder 122 develops encoding signals on conductors LR1 through LR-n, one corresponding to each row of lamps. The conductors -LR-l-LR-n lead to lamp operating circuits (not shown) each of which controls one of the rows of lamps. on the display board 104. As may be seen in the aforementioned application, each of the lamp operating circuits may comprise a shift register having one stage for each column of lamps on the board. The state of each of the shift register stages determines the state of the associated lamp and prepares a drive circuit for that lamp. The encoding signals for each row are read out simultaneously one column at a time to the lamp operating circuit for each ro'w of lamps so as to actuate each lamp in the column required to form that part of the display character. For example, to form the letter C the lamps in rows 2 through 6 of the righthand-most column of lamps 1124 are energized during the first shift time. The second shift time causes the lamps in rows 2 through 6 in the second column 126- to energize along with the lamp of row 1 and row 7 in the first column 124. The third shift actuates the lamps in rows 2 through 6 in the third column 128 along with the lamps of rows 1 and 7 in column 126 and 124. The process continues until the full letter C is formed, which is then caused to move across the board in the direction of the arrow one column at a time.
The column-by-column readout of the encoding signals from the lamp encoder 122 is controlled by encoder column strobe signals from a column shift and lamp strobe control circuit 226 which is also controlled by the variable frequency clock 118 in the manner described in the aforementioned application. Thus, the encoding signals are read out to the display board at a rate determined by the rate of receipt of the input data.
The column shift and lamp strobe control also provides lamp shift pulses to the lamp operating circuits in the display board 104 which are synchronized -with the column-by-column readout of the display character data from the lamp encoder 122. The lamp shift pulses trigger the shift registers for preparing the lamp to shift the encoding signals from stage to stage in synchronism with the read in of the encoding signals from the lamp encoder to the shift registers.
In addition, the column shift and lamp strobe control circuit 130 provides lamp strobe pulses to the lamp operating circuits in the board in order to control the flash duration of the lamps for each column shift of the data of the lamps shift registers. The lamp strobe pulses which are synchronized with the shift pulses actuate the prepared drive circuits for the lamps so that the lamps are lit only for the duration of the strobe pulses. As in the aforementioned application, the lamps are normally lit only once per shift and only for a short period of time Iwith respect to the period of the frequency at which the characters are shifted column by column across the board 110, so as to eliminate the multiple or widened images described in said application. After the encoding signals for each character have been read to the board and the character formed at the right side of the board, the column shift and lamp strobe control 130 provides an end of strobe signal to the buffer control 116 and the buffer 114 which serves to prepare the last stage of the buffer for the advance of the data for the next character thereto for read out to the display board.
The column shift and lamp strobe control includes the logic for synchronizing the readout of the encoding signals to the board, the shifting of the signal through the shift registers at the board, and the strobing of the lamp circuit to actuate the lamps. When the data for a character has been entered into the last stage of the buffer 114, the character data decoder 120 is caused to operate by the appearance of data in the last stage of the buffer 114 and provides a legit signal to the column shift and lamp strobe control 130 indicating that a character is to be entered on to the board 104. The legit signal, which for the purpose of conformity with the aforementioned application may be considered a positive going pulse, is inverted by a negator 132 and fed to a Nand gate 134 to prepare same for the passage of clock pulses derived from the variable frequency clock 118. The variable frequency clock signal is divided by l2 by means of a divide-by-four circuit 136 and the divide-by-three circuit 138. The clock/12 pulses are fed through gate 134 and negator 140 to an encoder column shift counter 142 which provides the encoder column shift pulses to the lamp encoder 122 in a sequential manner as explained in detail in the aforementioned application. The legit signal indicating the presence of data in the last stage of the buffer 114 prepares the column shift and strobe control for transmitting lamp shift pulses to the display boards for shifting the date in the shift registers. The legit signal sets a Nor gate flip-flop 144 which by means of conductor 146 prepares a Nand gate 148 for the passage of clock/12 pulses from the counter 138 to a one-shot multivibrator 150. The flip-flop 144 plays a part in providing the flywheel effect as will be described in detail hereinafter. The one-shot multivibrator 150 provides a lamp shift pulse for each clock/12 pulse received to shift the data in the display board lamp shift registers.
The lamp strobe pulses are also derived from the output of the divide-bythree counter 138 as in the aformentioned application. They are nanded with the output of the divide-by-four counter 136 to guarantee one pulse per column shift by means of gate 152. The pulses therefrom are slightly delayed by delay circuit 154 and caused to trigger a lamp strobe control circuit 156 which governs the width of the pulses in accordance with an analogue signal from the variable frequency clock so as to maintain the proper intensity of the visual bulbs image of the display in the manner discussed in the aforementioned application.
As previously mentioned, the flip-flop 144 which controls the passage of lamp shift pulses to the board, has a role in providing the flywheel effect during the interim between periods of data receipt from the source. The flip-flop is set by a legit signal when character data first enters the last stage of the buffer 114. After the character has been read out to the board, the encoder column shift counter sends the end of strobe signal to the buffer and the buffer control, thus causing the data therein to be cleared. If the data for another character is immediately present for shifting into the last stage of the buffer 114, another legit signal appears to the column shift and lamp strobe control causing it to read the data out to the board to form the new character thereon. If, however, the data for a new character does not appear irnmediately at the last stage of the buffer, the legit signal is lost and a low signal appears at the input of transistor 164 by means of diode 162 and resistor 165 connected to the base electrode thereof. Thus, the transistor 164 (which is normally conducting with the presence of the positive legit signal) cuts off with the loss of the legit signal and permits capacitor 156 to charge through resistor 168 and potentiometer 170. Capacitor 166, resistor 168 and potentiometer 170 along with unijunction 172 form a timing circuit 171 for providing a pulse across resistor 175 a predetermined time interval after the loss of the legit signal at the base of transistor 164. The time constant of the capacitor 166 and resistances 168 and 170 establishes the predetermined time interval before the unijunction 172 fires to provide a high pulse via inverter 174 and Nand gate 176 to the reset terminal of the Nor gate flip-flop 144. The reset of flip-flop 144 places a high on conductor 146 which cl-oses the gate 148. The clock/12 pulses no longer pass to the multivibrator and the shift pulses for moving the characters across the board 10-4 are stopped. The Nand gate 176 which has its other input connected through inverter 178 to the count 2 output of the counter 138 prevents the flip-flop i144 from resetting during a lamp shift pulse. The gate 148 remains closed until the data for another character enters the last stage of the buffer for decoding by character data decoder 120y and the establishment of the positive going legit signal. The iiip-fiop is again set and transistor 164 is turned on to essentially short the timing capacitor 166 through diode 180, transistor 164 and low value resistor 182.
The RC time constant of the components in the unijunction timer 171 may be readily selected by means of the potentiometer so that the time interval before the stoppage of the shifting is somewhat longer than the average breaks in receipt of data from the source. Thus, if a new character is received and advanced to the last stage of the buffer 114 before the timing circuit 17.1 has a chance to reset the flip-flop 144, the message travel will not stop and the only effect will be an extended number of unlit columns between the last character and the next received character.
While there has been described a preferred embodiment of the present invention, it is to be understood that moditications or additions may be made thereto without deviating from the teachings of the invention. It is, therefore, intended to be limited only by the scope of the appended claims.
What is claimed is:
1. A traveling message display system for displaying characters responsive to input data comprising a Xed matrix display board; means for receiving said input data; means for temporarily storing said input data in the order received; means including a master clock for forming a display character on said display board; means including said master clock for causing the display character to travel across said display board; means for causing said clock to operate at a predetermined rate when no data is present in said storage means and :at increasing rates dependent on the amount of data therein; and means for enabling said character travel causing means responsive to the presence of input data in said storage means and for disabling said character travel causing means a predetermined period after the formation of the character for the last input data stored in said storage means.
2. rIn the system of claim 1 wherein said storage means comprises a shift register storage device having a plurality of stages including an output stage and wherein said enabling and disabling means functions in response to the presence and the subsequent absence of input data in said output stage.
3. In the system of claim 2 wherein said character travel causing means comprises a shift pulse producing means, and wherein said enabling and disabling means comprises a gate for said shift pulses, a switching device operable to assume one condition when input data enters said output stage to open said gate and a timer device operable responsive to the subsequent absence of input data in said output stage for causing said switching device to assume a second condition to close said gate.
4. A message display system for displaying characters responsive to input data comprising a display board, means for receiving said input data, means for temporarily storing said input data in the order received, means for forming a display character on said display board in accordance `with the earliest received data in said storage means, means for causing the display character to travel across said display board, and means for enabling said character travel causing means responsive to the presence of input data in said storage means and for disabling said character travel causing means a predetermined period after the formation of the character for the last input data stored in said storage means.
5. In the system of claim 4 wherein said storage means comprises a shift register storage device having a plurality of stages including an output stage and wherein said enabling and disabling means functions in response to the presence and the subsequent absence of input data in said output stage.
6. In the system of claim 5 wherein said enabling and disabling means comprises a switching device operable to assume one condition for enabling said character travel enabling means when input data enters said output stage and a timer operable responsive to the subsequent absence of input for causing said switching device to assume its opposite condition to disable said character travel causing means a predetermined time thereafter.
7. A message display system for displaying characters responsive to input data comprising a fixed matrix display board, means for receiving said input data, means for forming display characters on said display board in accordance with said received data, means for causing the formed characters to travel across said board at a speed determined by the rate of receipt of said input data, and means for disabling said character travel causing means a predetermined period after the ceasing of receipt of input data.
References Cited UNITED STATES PATENTS 3,056,112 9/1962 Lecher, Jr. 3,493,956 3/197() Andrews et al. 3,493,957 3/197() Brooks.
DONALD I. YUSKO, Primary Examiner M. M. CURTIS, Assistant Examiner