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Publication numberUS3587051 A
Publication typeGrant
Publication dateJun 22, 1971
Filing dateDec 11, 1969
Priority dateDec 11, 1969
Publication numberUS 3587051 A, US 3587051A, US-A-3587051, US3587051 A, US3587051A
InventorsHovey John Morris
Original AssigneeNorth American Res Corp
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Electronic combination switching device
US 3587051 A
Abstract  available in
Images(4)
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Claims  available in
Description  (OCR text may contain errors)

United States Patent [72} inventor John Morris Howey Oxon Hill, Md.

[21] Appl. No. 884,440

[22] Filed Dec. 11, I969 [45] Patented June 22, I971 [73] Assignee North American Research Corporation Oxon Hill, Md.

Continuation-impart of applimtion Ser. No. 791,439, Jan. 15, 1969, now abandoned.

[$4] ELECTRONIC COMBINATION SWITCHING DEVICE I 1 Claims, 6 Drawing Figs.

[52] US. Cl. 340/164'R,

317/134R,340/l47MD,340/149A [51] Int.Cl H04q3/02 340/ 147,

50 Field of Search .1111.

Primary Examiner-Donald J. Yusko AztorneySughrue, Rothwell, Mion, Zinn and Macpeak ABSTRACT: An electronic combination switching device for storage safes, credit card verification, etc. having a randomly varying operational sequence such that unauthorized persons cannot determine how to operate the device by observing an authorized person operate it. A random bit word is loaded into a storage register having preselected stages connected to a manually operable decoder. The authorized user observes the condition of the various register stages by indicator lights, and, having knowledge of the preselected stages, or combination, actuates the decoder to produce a raised output. Each proper actuation is accumulated in a counter and a new random word is loaded-into the register after each actuation. The counter yields an output after a predetermined number of proper actuations. Improper actuations reset the counter and operate analarm.

SHIFT REGISTER PMF Tgnm22 ISTT,

GATE 26,

MATRIX INTERCONNECTION FROM AND GATE 72 no.2 I

INVENTOR M. HOVEY AJKWJZ MW,

REGISTER NETWORK SHlF-T DECODING JOHN ZTLW VIM/-16 ATTORNEYS PATENTED JUNZ 2 I97! sum 3 [1F 4 5:58 zogudm ZMWEOQ Kim a Q Q NM m m. 8 55E 2 E 1 22 ELECTRONIC COMBINATION SWITCHING DEVICE This application is acontinuation-in-part of application Ser. No. 791,439, filed Jan. 15, 1969 now abandoned.

BACKGROUND OF TH E INVENTION by U.S. Pat. Nos. 3,024,452 Leonard, 3,093,994 Richard,-

and 3,234,516 '-Miller, are generally operated by the selection or closure of a'predetermined sequence of switches, which sequence constitutes the combination. In all cases, however, the sequence, once set, is fixed and invariant, and thus anyone can operate the device by merely observing an authorized person operate it and then repeating the latters procedure. This lack of variance in operational sequence has long constituted a serious drawback in the prior art devices, and has become more a cut in recent years in view of the development of very sensitive and sophisticated electronic surveillance equipment which enables undetected observations of, for example, a band vault lock during operation.

Combination switching devices have been embodied in ID. or credit card verifiers, as exemplified by U.S. Pat. No. 3,317,799 I(ellen, in which the bearer inserts the card, carrying coded electronic indicia of the combination, into a sensing station in the verifier. He thereafter depresses the correct combination of switch buttons corresponding to the combination on the card to establish his identity. These systems can all be defeated, due to their invariant operational sequences, by an unauthorized person who observes a true card bearer the verifier and who subsequently comes into possession of the card.

SUMMARY OF THE INVENTION This invention overcomes the problems discussed above by introducing a randomly varying operational sequence feature into combination switching devices. Briefly, according to the invention, a random word is loaded into a plural stage shift register provided with indicator lights or the like to show thecondition of each stage. In one embodiment, preselected stages of the register are connected to a plurality of AND gates constituting a decoding network such that for any given condition of the preselected stages, only one AND gate will have a raised output. The authorized operator, having knowledge of the preselected stages, or combination, observes their conditions or states and then selects the proper AND gate by closing a corresponding switch. This supplies a pulse to a correct selection counter and also loads a new random word into the shift register. The AND gate selection operation is then continuously repeated in this manner, each time with a different random word in the register, until the counter reaches a predetermined value, at which time an output signal is issued which actuates the lock mechanism, verification light, etc. Incorrect AND gate selections reset the counter and actuate an alarm device.

Since a bare observer does not know which register stages are involved in the combination, he has no way of knowing which indicator lights the operator is looking at in making the proper AND gate selection, and since the selected gate varies in a completely random manner according to the random words in the register, he is unable to break the combination even after observing the operation of the device.

In an alternate embodiment of the basic device, the preselected stages are individually coupled to a single AND gate by single pole-double throw switches to implement the decoding function. This achieves the same overall result at a considerable savings in circuitry, as will be developed below. A modified form of this embodiment includes means responsive to the reverse or improper selection of all of the switches for opening the lock and at the same time actuating a remote alarm. This is an antiambush feature whereby an operator, under the threat of physical violence, may comply by opening the lock while simultaneously, but in an undetected manner, generating an alarm signal.

In the card verification embodiment, circuit means carried on the card effect the electrical connections between the preselected register stages and the decoding network. Thus, only the authorized card bearer, having knowledge of the stages selected by the card circuitry, is able to successfully operate the device.

In a further embodiment adapted for operation by two different persons, each possessing only half of the overall combination, the register, decoding network and counter are duplicated, withdifferent preselected stages in the second register being connected to the corresponding decoding network. The first person then operates half of the device until the first counter registers an output signal, after which the second person operatesthe other half of the device, using a different combination known only to him, until the second counter produces an output. When the outputs from both counters are raised, a final output signal is produced to actuate the utilization device.

It would also be feasible to have data from one half of the device telemetered to a remote location over a telephone line or by other suitable means of communication for the purpose bank office could control the vaults in all of its branch offices.

BRIEF DESCRIPTION OF THE DRAWINGS The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompanying drawings in which:

FIG. 1 shows a block diagram of an electronic combination switching device constructed .in accordance with the teachings of this invention,

FIG. 2 shows a typical control panel for operating the circuit of FIG. 1,

FIG. 3 shows a block diagram of a portion of an alternate embodiment adapted for operation by two different persons,

FIG. 4 shows a portion of an alternate embodiment adapted for ID. or credit card verification,

FIG. 5 shows an alternate embodiment of the invention shown in FIG. 1 employing simplified circuitry, and

FIG. 6 shows a portion of an alternate embodiment of the invention shown in FIG. 5 incorporating an antiambush feature.

DESCRIPTION of THE PREFERRED EMBODIMENT Referring now to FIG. I, the operation of the device is initiated by momentarily closing start switch 20, which triggers the monostable multivibrator of Single Shot 22 from the filtered power supply 24. Diode 25 isolates the remaining portions of the circuitry from the initial start signal. The raised output from the Single Shot conditions AND gate 26 and simultaneously actuates a random bit generator 28. Such generators are well known in the art and will not be described herein in detail. The random pulse train output from the generator passes through AND gate 26 into an eight stage shift register 30 where it is stepped along to the right in FIG. 1 by a clock source, not shown, synchronized with the generator bit rate. After a predetermined time delay sufficient to permit the complete loading of the register, the output from Single Shot 22 drops to deenergize the generator 28 and disable AND gate.

26. At this point, the shift register 30 is fully loaded with a random 8 -bit word,.and the condition of each stage, either on or off, is shown by its corresponding indicator light 3.2. In the example shown, stages I, 2, 4 and 7 are on while stages 3, 5, 6 and 8 are off.

' Each register stage is provided with both on and off sense lines 34, as shown, which have raised signal levels depending upon whether their corresponding register stages are on or off. If stages 3 is ofi, for example. the 3 sense line will have a lowered signal level while the 3'? line will have a raised signal level.

In FIG. 1, the sense lines 34 of register stages I, and 7 are shown, by way of example, as being coupled to AND gate decoding network 36 by an interconnection matrix 38. The decoding network comprises eight AND gates 40, 42, 44, 46, 48, 50, 52 and 54 each having three inputs. The number of register stages is completely arbitrary, 8 being shown in FIG. 1 by way of example only. The number of AND gates in the decoding network is determined by the number of register stages selected for the combination, and is a power of two functions. Thus, if four stages had been selected, sixteen AND gates would be required.

It will be noted that the sense lines for register stage 5 are connected to the first inputs of each AND gate, or the inputs furthest to the left in FIG. I. The sense lines for register stage 1 are connected to'the second or middle inputs of each AND gate, and the sense lines for register stage 7 are connected to the third inputs, or those furthest to the right, of each gate. This yields a combination of 517. It will be further noted that the numbers in the combination may be in an ascending, descending, or mixed order. With an eight stage register, for example, there are 8 X7 X6 or 336 possible three-number combinations involving no repeating numbers.

The authorized operator, knowing the combination to be 517, observes the indicator lights of these three stages and notes that stage 5 if off, stage I is on and stage 7 is on. This tells him that only AND gate 52, which decodes the off, on, on or -H-sequence, has a raised output, and he therefore closes switch S52 associated with AND gate 52.

The operator would not be required to memorize the decoding function associated with each AND gate or corresponding switch since same could be shown on a control panel, as illustrated in fig. 2, above each switch toggle in a plus, minus manner.

The closure of switch S52 produces a raised signal on line 56 which is applied to the toggle of count input of a threestage, binary, correct selection counter 58 and to the reset input of a two-stage, binary, alarm counter 60. The signal applied to counter 58 registers a count of one.

Each of switches S40 S54 is individually ganged to switch 68, as indicated by the broken line 70, but switches S40 S54 are not ganged or connected to each other in any way. The closure of switch S52 thus closes switch 68 which again triggers Single Shot 22 to energize generator 28, enable AND gate 26 and load a new random work into the shift register 30. AND gate 62 lowers the output of Inverter 64.

The operator now repeats the procedure outlined above by observing the indicator lights of register stages 5, 1 and 7 and closing the switch corresponding to the AND gate in decoder network 36 having a raised output. Each correct selection and switch closure increments counter 58 by one and loads a new random word into the register. This procedure is repeated until counter 58 reaches a predetermined count which produces a final output signal from AND gate 72. Output terminal 74 may be coupled to any suitable utilization device, such as an operation relay or a lock mechanism. Counter 58 may, of course, be decoded by AND gate 72 for any desired value. With the connections shown in FIG. I, for example, a final output signal is produced when the counter reaches a value of five, corresponding to five successive correct selections.

If an improper selection is made, the output from Inverter 64 remains raised, and, since the closure of switch 68 couples the power supply 24 to AND gate 62, the latter raises its output to reset selection counter 58 and toggle alarm counter 60. If three successive improper selections are made, AND gate 76 produces an output at terminal 78, which may be coupled to an alarm device. Counter 60 may be decoded by AND gate 76 at any desired value, three having been chosen in FIG. 1 by way of example only.

Counters 58 and 60 may be initially reset by separate circuitry, not shown, coupled to start switch 20.

The embodiment shown in FIG. 3 is adapted for operation by two different persons, each possessing only half of the overall combination. The circuitry of FIG. 3 essentially duplicates much of that shown in FIG. I and operates in the same manner. Shift register 30' is loaded from random bit generator 28 through AND gate 26, and the closure of any one of switches S'S54' also closes switch 68 in FIG. I to I generate a new random word. In operation, the completion of the procedure described above with respect to FIG. I by the first person conditions AND gate 80 in FIG. 3 rather than directly opening the lock. The second person then operates the FIG. 3 circuitry, using a different combination provided by interconnection matrix 38', until the counter 58 reaches a count of five. AND gate 72 then raises its output, which actuates AND gate 80 and produces a final output signal at terminal 82. Both sections or halves of the device may, of course, be operated simultaneously by the two persons involved, since each half is wired for a different combination, and neither person is able to determine the other's combination by mere observation.

A further consideration in the operation of this device is the ease with which it can be adapted to the function of a secure remote control device.

It would be feasible, for example, to have all of the device installed at one location with the exception of the display which could be located remotely. The person who wanted to operate the lock would then have to contact the person who has custody of the display. This contact could be established through the authenticating-device embodiment of this invention. The person at the lock would initiate the random word loading and the contents of the shift register would be telemetered to the display. The person at the display would relay the display information back to the person at the lock.

It would also be feasible to have the entire operation performed by remote stations. This type of operation, for example, would permit full control of all the vaults in branch banks by the main office. It could also be used to allow access to certain areas only through a main office.

Another variation of the device could be the location of the display in one remote place and the location of the switches in a different remote place. The operator at the display would inform the operator at the switches by a suitable means of communication what the display reading is for each cycle of operation. I

In the FIG. 4 embodiment, adapted for ID. or credit card verification, the interconnection matrix 38 is replaced by a card insert station 84 having a card accommodating slot 86 provided with upper and lower electrical contact brushes 88. When a card 90, carrying electrical circuitry for effecting the necessary connections between the preselected register stages and the decoding network, is inserted in slot 86, only the authorized bearer, having knowledge of the combination provided by the card, can successfully operate the device to establish his identity.

The decoder shown in FIG. 1 consists of 8 AND gates. Each AND gate is connected to the three selected stages of the shift register in a unique manner. The AND gates therefore provide a binary-to-octal converter. One of the AND gates will be in a conducting state for each possible combination of bits in the selected stages. The operator must determine which gate is conducting through his prior knowledge of the lock. It is necessary for the operator to mentally decode the pattern and make a selection by choosing the appropriate switch at the decoder output.

In an alternate embodiment of the invention, shown in FIG. 5, the decoder and the operation of the device can be simplified in the following manner. Referring to FIG. 5, the

preselected stages of the shift register 30 are coupled to singlepole double-throw switches 94, 96 and 98. The center taps of each switch are coupled to the inputs of an AND gate l00. If the operator now turns those switches associated with the register stages in the ONE state to on and those switches as sociated with the register stages in the ZERO state to off, and AND gate will be energized. The operator may then press switch 102 thereby entering a count in the correct selection counter 58 and initiating a new cycle of operation. An incorrect selection will'toggle the alarm counter 60 as described above in connection with FIG. 1.

This embodiment has the following advantages over that described in FIG. 1. Only one AND gate is needed; the number of switches required is reduced; and the operation .is simplified. An operator is only required to know which lights in the light display field are used in the combination, and which switch is associated with each of those lights. He then presses the switch on or off depending upon the state of the associated lights. in so doing he connects the appropriate inputs to the AND gate 100 and the decoding function is automatically perfonned. 1

ln the antiambush modification shown in FIG. 6, the outputs from switches 94, 96 and 98 are coupled to AND gate 100, as in FIG. 5, and in addition, they are fed through Inverters 104 to AND gate 106. The output from the latter is fed to OR gate 108 along with the output from AND gate 100, and the OR gate output is supplied to the upper terminal of switch 102. The output from AND gate 106 is also fed to the alarm terminal 78 through OR gate 110. The alarm terminal may lead to either a local or a remote alarm device. If improper or reverse selections are made on all three switches, such as by turning switches 94 and 98 off and switch 96 on, negative or lowered signal levers with appear on all of the switch outputs, thus blocking AND gate 100. The Inverters 104 raise the three switch signals, however, which in turn raises the output of AND gate 106, OR gate 108 and OR gate 110. The raised signal from OR gate 108 permits the correct selection counter to be toggled in the usual manner upon the closure of switch 102, thus enabling the lock to be operated in a seemingly normal manner. The output from OR gate 110, appearing at the alarm terminal 78, may actuated a remote alarm, however, to alert the proper authorities that someone is being forced to open the lock.

An alternate to the use of the random bit generator is to employ the shift register as part of a pseudo random sequence generator. Thisis accomplished by the addition of a multiinput modulo -2 adder. The inputs to the adder are taken from selected stages of the shift register. The adder output is returned to the shift register input. This configuration is known in the art as a sequence generator and depending upon the configuration of taps used will generate sequences exhibiting random properties.

While the invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.

What I claim is: g

1. An electronic combination switching device comprising:

a. a plural stage register,

b. means for loading a random bit word into the register,

c. selective switching means coupled to preselected stages of the register for producing an output upon proper manual actuation dependent upon the condition of the register stages and knowledge of the preselected stages, and

d. means responsive to the output from the selective switching means for actuating the switching device.

2. An electronic combination switching device as defined in claim 1 wherein the means recited in subparagraph (d) comprises a counter and decoding means therefor for yielding an output after a predetermined number of successive counts.

3. An electronic combination switching device as defined in claim 1 further comprising means responsive to .the actuation of the selective switching means for loading a new random bit work into the register.

4. An electronic combination switching device as defined in claim 2 further comprising means responsive to the actuation of the selective switching means for loading a new random bit word into the register.

5. An electronic combination switching device as defined in claim 2 further comprising means response to the improper actuation of the selective switching means for resetting the counter and actuating an alarm device.

6. An electronic combination switching device as defined in claim 1 further including means for indicating the condition of each register stage.

7. An electronic combination switching device as defined in claim 1 further comprising:

a. a second plural stage register for loading with a random bit word by the means recited in subparagraph (b) of claim 1,

b. second selective switching means coupled to preselected stages of the second register,

c. means responsive to the proper actuation of the second selective switching means for producing an output signal, and

(1. means responsive to the means recited in subparagraph (d) of claim 1 and subparagraph (c) above for producing a final output signal.

8. An electronic combination switching device as defined in claim 1 wherein the selective switching means is individually coupled to the preselected register stages by means comprismg:

a. a card insert station having a card receiving slot and sensing means disposed adjacent the slot, and

b. a card insertable in the slot and having electrical circuit defining means thereon cooperable with the sensing means to effect the desired circuit coupling.

9. An electronic combination switching device as defined in claim 1 wherein the selective switching means comprises:

a. a plurality of decoding means individually coupled to preselected stages of the register, and

b. a plurality of switches individually coupled to the outputs of the decoding means, whereby a particular decoding means may be manually actuated by the closure of its associated switch 10. An electronic combination switching device as defined in claim 1 wherein the selective switching means comprises:

a. an AND gate, and

b. a plurality of single-pole double-throw switches individually coupled between preselected stages of the register and the AND gate.

11. An electronic combination switching device as defined in claim 10 further comprising means responsive to the improper actuation of all of the switches for enabling the actuation of the switching device and simultaneously actuating an alarm device.

Referenced by
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Classifications
U.S. Classification340/5.27, 340/5.3, 340/543, 361/172, 340/5.54
International ClassificationG07C9/00
Cooperative ClassificationG07C9/00698
European ClassificationG07C9/00E12C6