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Publication numberUS3587061 A
Publication typeGrant
Publication dateJun 22, 1971
Filing dateSep 24, 1968
Priority dateSep 24, 1968
Publication numberUS 3587061 A, US 3587061A, US-A-3587061, US3587061 A, US3587061A
InventorsBieszczad Edward S, Young John S
Original AssigneeAutomatic Elect Lab
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Time-shaped lamp control apparatus employing lamp filament resistance as an integral status memory
US 3587061 A
Abstract  available in
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Claims  available in
Description  (OCR text may contain errors)

United States Patent TIME-SHARED LAMP COSTROL APPARATUS EMPLOYING LAMP FILAMENT RESISTANCE AS AN INTEGRAL STATUS MEMORY 2 Claims, 5 Drawing Figs.

US. Cl ..3-10/173 LT.

Int. Cl G1 1c 5/02, G1 10 11/42 340/173,

FieldoiSearch v 166 FUNCTION *1 Primary Examiner-Terrell W. Fears Assistant Examiner-Stuart Hecker AttorneysSpencer E. Olson, K. Mullerheim and B. E. Franz ABSTRACT: Time sharing techniques are applied to control the operation of a plurality of lamps which report operational conditions of the system in which they are employed. The lamps, which may be physically located in separate groups, are electrically connected in a matrix along coordinates of lamp location and system operational condition (function reported) The hot or cold filament resistance of each lamp, which serves as an integral status memory, is sampled by timesharing circuits which determine and maintain the sampled status of a lamp. Circuits are also provided for altering the ON-OFF condition of any lamp in response to a corresponding change in system operational condition.

FUNCTION 12 FUNCTION n DATA CHANNEL 80 FROM DATA SYSTEM- -V lNTERROGATlO-v CIRCUIT LATCH ClRCUlT DATA iNPUT CIRCUIT LATCH (RESET) CONTROL CCT.

LATCH ClRCUIT DATA CHANNEL SHEET 1 UF 3 DATA SYSTEM CONTROL CHANNEL CONTROL 3 IN mozo-uwm -Ico:0o

LOCATION 1 LOOATION**2 8| k. TIMING CIRCUITS Q LAMP STATUS SAMPLER 5} DRIVERS 2. DATA k, W SUBCHANNEL INTERROGATION e3 OIROUITQQ LATCH CONTROL CIRCUIT i1 REGISTER ii. DECODER LOcATION**3 LAMP MATRIX IO LOOATION**k-2 I OcATION**k OATA INPUT CIRCUIT FIG.

LAMP CONNECTION CONTROL CIRCUITS TTY.

PATENTED JUN22 |s7| SHEET 2 OF 3 PATENTEUJUNZZISYI 3v, M1061 sum 3 or 3 HORIZONTAL CONDUCTOR I31 n 14 2 I-gfiZ HORIZONTAL CONDUCTOR I32 m k HORIZONTAL CONDUCTOR I3k I I2 I3 I I1 I2 M JIL UL CONDUCTOR 35 (SAMPLING CONTROL) W-----W CONDUCTOR 53 (RESET CONTROLI k 1 '2 rIk-l) r r r I I WRITE 1' (ON) INPUT FROM I l DECODER 62 TO LATCH CCT. 40

' F" Fn I mfinflw WRITE0 (OFF) INPUT FROM DECODER 62 TO LATCH CCT. 40n

FIG. 3

LAMP CURRENT TIME 7 FIG 4 LAMP I RESISTANCE (OHMS) TYPE. 32a

I I l I 7 1 2 3 4 5 6 TIME (SEC) 5 TIME-SHARED LAMP CONTROL APPARATUS V EMlPLOYllNG LAMP FILAMENT RESISTANCE AS AN INTEGRAL STATUS MEMORY BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to apparatus for controlling the operation of a plurality of indicating lamps, and particularly to apparatus for controlling the operation of such lamps on a time-sharing basis in response to the thermal condition of the lamp filaments or in response to an external data input.

2. Prior Art Indicating lamps have long been used to report the operational conditions of various types of systems including telephone, computer and supervisory control systems. Such applications have usually been operated on a digital control basis wherein a lamp is conditioned either ON or OFF as the result of a lamp driving circuit being correspondingly operated and maintained in its state of operation in response to a combination or controlling conditions. As systems grew and began requiring increasing numbers of function indicating lamps, the cost of the attendant logic and driving apparatus began to increase with respect to overall system cost. The application of time-sharing techniques on a more or less limited scale has tended to improve the above cost factor; however, the requirement for a lamp status memory and its associated accessing circuits is disadvantageous from the standpoints of cost, additional hardware and software provisions and maintenance programs and techniques.

SUMMARY OF THE INVENTION Briefly, and in contrast to the above-described time-sharing approach, the present invention employs a minimum of the additional equipment and techniques set forth above, holds cost to a minimum and simplifies maintenance. Inasmuch as an incandescent lamp may exhibit a marked degree of dif ference between its hot and cold filament resistance, this thermoelectric property is advantageously utilized for determining lamp status and for maintaining that status. For reporting the conditions of a system wherein function lamps at one location correspond to function lamps at another location which report similar system conditions, all such lamps are advantageously connected in a matrix and time sharing is employed for sampling and driving all lamps of the matrix. The time-sharing circuits are also employed to selectively alter lamp status in response to input signals which indicate changes in system operational conditions. A plurality of operator's consoles, for example, which are all constructed the same and which report the same type of information for different circuits, may advantageously employ the time-shared circuits of this inventron.

From the above, it is evident that the primary purpose of this invention is to provide improved operational control of large numbers of lamps (although the invention is equally applicable to small numbers of lamps) by providing a new lamp control subsystem for reporting the operational conditions of a system. Such a subsystem will find application in any type of system which requires condition reporting, and is particularly applicable to systems which have a plurality of operator consoles, such as computer and telephone systems.

BRIEF DESCRIPTION OF THE DRAWINGS The invention, its organization, construction and operation, will be best understood from a reading of the description below in conjunction with reference to the accompanying drawings, in which:

FIG. l is a block diagram of a system which incorporates the present invention;

FIG. 2 is a partial schematic, partial block diagram showing the embodiment of FIG. 1 in greater detail;

FIG. 3 illustrates the relationships between the time division driving, sampling, resetting and writing pulses as applied to the embodiment shown in FIG. 2;

FIG. 4 illustrates the current of a lamp tested for utilization in the present invention; and

FIG. 5 shows the cooling characteristic of a similar lamp tested for utilization in the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. I illustrates an embodiment of the invention incorporated in a data or switching system having a plurality of GO/NO-GO (ON-OFF, true-false) operational circuits ll,l, which are assigned to report their operational status to lamps at LOCATIONS Ill-0k of lamp matrix by assignor 2 under the control of the data system control 3 via control channel 4. The condition of the operational circuits (symbolized by switches) may be controlled many of several well known ways (e.g. data conditions of system control 3, operator-controlled switches, etc.) and is only generally discussed herein in terms of result, in that the operational circuits report their change of condition to the system control 3. The remainder of FIG. I illustrates the time-sharing circuits comprising: lamp status sampling circuit 5, lamp connection control circuits 40, latch and reset control circuit 50, data input circuit 60 including register 61 and decoder 62, and timing circuits 70 which control the sequence of operation of the time-shared circuits. The timing circuits may be self-regulated, or they may be synchronized to total system timing, as indicated by connection 81 of the data channel 80.

FIG. 2 illustrates the above embodiment of the present invention in more detail as comprising a lamp matrix 10 having connected to one side thereof a distributor 25 and to another side thereof an interrogation circuit, elements 30-35, and latch circuits 40. The interrogation circuit is connected to the subsystem timing circuits 70; the latch circuits also being connected to the timing circuits via a latch (or reset) control circuit 50 and to the data input circuits 60.

More specifically, the lamp matrix 10 comprises indicating lamps II 1ll,, connected between location conductors i13,13,, and function conductors l4,l4,, via sneak path preventing diodes l2 -12,, The broken lines about the lamps symbolize that although each horizontal row of lamps (LOCATION (Ill-LOCATION 0k) may be remotely located from the other horizontal row of lamps, each lamp of a vertical row (FUNCTION (II-FUNCTION 0n) reports (for a separate circuit) the same type of system function as the other lamps in that row report to their respective physical location, which locations may be operator consoles. Of course, if condition reports are not necessary for all functions at all consoles, the corresponding function lamp may be omitted, as illustrated at matrix coordinates LOCATION 0k, FUNCTION 02. Any desired operational circuit-lamp-location association may be employed in practicing the present invention. For example, it is not necessary for each lamp of a vertical row to report the same type of function. This flexible arrangement is affected by the present embodiment wherein the invention is shown as applied to the control the lamps at a plurality of generally similar operators consoles. Also, it is not necessary that the lamps be placed in a matrix. It will be apparent from the description below that a single column of lamps, such as any function column illustrated in FIG. 2, could employ the teachings of the present invention. A

The time-sharing drivers are connected between the distributor 25 and corresponding location conductors 13 -13,, of the matrix. These drivers include transistors 20 -20, having their collectors connected to source potential V via resistors ZI -21 and their emitters connected to ground potential.

The interrogation circuit which forms one portion of the time-sharing equipment comprises a transistor 30 having its emitter connected to source potential V and its collector connected to each of the function conductors 14,--14,, by

way of conductor 33, diodes 32,32,, and resistors 31,-31, and to ground potential via resistor 34.

Another portion of the time-sharing equipment, the latch and reset circuits, comprises a normally conductive transistor 50 having a grounded emitter electrode and having its collector connected to V via resistor 52 and to each of the n latch circuits 40,-40,,. Referring to latch circuit 40,, transistors 41 and 42 are normally biased nonconductive via resistors 43 and 44, ground potential at the emitter of transistors 41 (via diode 46) and 42, by the condition of the decoder 62. Each of the latch circuits is connected to a corresponding function bus of the matrix for sensing lamp status and for maintaining lamp status.

The matrix is controlled by a distributor 25 and timing circuits 70 which may be similar to the time division power supply disclosed by R. M. Schildgen and John S. Young in their US. Pat. No. 3,328,530 entitled "Director System with Time Division Access of a Common Translator." The matrix is further controlled by register and decoder circuits 61-62. These control circuits may take the form of circuits which are well known in the art, and as they form a part of the present invention only as employed with a lamp matrix, they will not be discussed in circuit detail, but only by circuit function.

FIG. 3 is fairly self-explanatory showing the pulses of the subsystem of FIG. 2. Pulses 0,0,, are repetitively applied to conductors 13,13 respectively, upon the sequential operation of transistors 20,20,, by the distributor 25. Pulses i,--i,, are the control pulses for operating the interrogation transistors 30 for sampling lamp conditions and pulses r, r,, are the reset control pulses applied to the latch circuits from transistor 50. The small marks preceding an interrogation control pulse indicate the beginning of the time positions. Pulses 0,F2, and 0,Fn are writing pulses which are applied to the latch circuits by the decoder 62 in order to alter the status of lamps in the specific example given in the operational description below.

FIG. 4 shows the results of test driving a Type 47, 6 volt incandescent lamp with 44 volts for a time position (1,) of 200 microseconds and an OFF time (1,) of 10 milliseconds, although a frame of 6.4 milliseconds with 100 microsecond time positions is expected to be used for a 64 location system using Type 328 lamps at 48 volts. It can be seen that the current decreases rapidly as the lamp heats for illumination. Typically, the resistance of the lamps tested changes approximately eight to ten times over a temperature range between their dark and fully lighted states. FIG. shows the cooling characteristics of a Type 328 lamp as compared to the plot of a 350 millisecond time constant (smooth broken line). From tests such as the above, and from visual tests, it has been determined that in the resistance (temperature) range from dark to lighted conditions, a threshold for operating the latch circuits, should be set for detecting a Type 328 lamp filament resistance (temperature) of 20 ohms or more for the lamp to be considered as being hot (lighted). This is, of course, a nominal figure and will vary with the type of lamp employed.

DESCRIPTION OF OPERATION Initial conditions chosen for the following description of operation are: lamp 11,, ON, filament resistance hot (400); lamp ll, OFF, filament resistance cold (50); and lamp 11,,, ON, filament resistance also hot. These conditions result from the arbitrary assumption that the assignor 2 has designated: that lamp 1],, report a G0 condition for operational circuit 1,; that lamp 11,,, report a NOCO condition for circuit 1 and lamp 1],, report a G0 condition for circuit 1,. These conditions have been transmitted to the lamp matrix by way of data channel 80 and the time-shared writing circuits which will be discussed in greater detail below.

Interrogation and Lamp Status Maintenance Normally all the diodes 12 and 32 are reverse biased by V applied to location conductors l3,-13,, through the associated resistor 21,21,,, and by ground applied to the function conductor 14,-13 through resistor 34 and the series combinations 31,, 32,-31,,, 32,,. In operation, the distributor 25 applies a negative pulse to the base of transistor 20, which conducts and causes a ground potential, pulse 0, FIG. 2, to be applied to conductor 13,. At this time, ground potential exists across each of the lamps of LOCATION 01. Immediately after the application of pulse 0,, the timing circuits 70 apply pulse 1, to transistor 30 which, in turn, momentarily conducts to apply a similar, but negative pulse to conductor 33. The voltage dividers established along each function conductor (elements 30, 32, 31, 14, 12, 11 and 20,) between potentials V and ground cause a negative excursion at the junctions between diodes 12 and resistors 31. These negative excursions are applied to the respective latch circuits 40 for detection.

Attention is invited to latch circuit 40,, which receives a negative excursion from function conductor 14 In the absence of any writing signals (discussed below), this negative potential change is coupled to the base of transistor 41 which conducts (transistor 50 is normally conducting) and, in turn, causes transistor 42 to conduct and feed back a negative potential from source V through resistor 43 to the base of transistor 41 latching these transistors. At this time substantially V volts are applied across lamp 1],, and diode 12,,, ground from pulse 0, being applied to conductor 13, and V volts being applied to conductor 14,, through transistor 42. This same action takes place for hot lamp 11,, and latch circuit 40,; however, lamp 11, and latch circuit 40, operate differently from that just described. The negative excursion due to the cold (low resistance) filament of lamp 11,, is slight compared to that of a hot lamp, and therefore the slight negative excursion during pulse 1', is ignored due to the dimensioning of the components of the latch circuits, that is, the 50 pulse is below the operating threshold of latch circuit 40,. Since latch circuit 40 is incapable of operating upon such slight excursions, no sustaining circuit to the time sharing driver 20, is completed through the latching transistor of circuit 40,; lamp 11, stays off.

Just prior to the end of the first time position, the timing circuits momentarily condition transistor 50 nonconductive to place a resetting potential (FIG. 3, pulse r,) to diodes 46 of latch circuits 40, and 40,, to reset these circuits and condition the matrix for the application of the next pulse, pulse 0,, to conductor 13 (not shown) during the second time position.

Lamp Status Alteration (Writing) To alter the status of a lamp, the data channel loads register 61 with the matrix location of the lamp in question and the decoder provides writing pulses to control operation of the appropriate latch circuits. For example, if operational circuit 1 (assumed for the purposes of the present example to be associated with LOCATION 01) has its switch closed (GO) and the operational circuit 1 (also assumed to be associated with LOCATION 01) has its switch opened (NO-GO), dark lamp 11,, is to be lighted and lighted lamp 11,,, is to be darkened. Information for such action is loaded into the data input circuit 60 over the data channel 80 and subchannel 82. Under the control of timing circuits 70, and at the beginning of the first time position (pulse 6,) the decoder applies pulse 6,F2, and 9,Fn,, to latch circuits 40 and 40, respectively, to write a binary 1" (ON condition) into LOCATION 01, FUNCTION 02 and a binary 0" (OFF condition) into LOCATION 01, FUNCTION 0n. Such pulses override any control provided by the sampling pulses and operate, or inhibit operation of, their respective latch circuits. Therefore, in the present example lamp 11,, receives full drive power over the aforementioned type of powering circuit through latch circuit 40 and the possibility of such a circuit being maintained for lamp 11,,, is removed.

It is evident from FIG. 4 and the above description that the thermal inertia of an OFF lamp is easily overcome and the lamp lighted by overdriving the lamp in its low resistance state with an initially high current. Also, the thermal inertia permits the sustaining of a light condition for driving only during a portion of the time position after interrogation. By the same token, a lighted lamp may be extinguished and conditioned to a filament resistance value that is easily detectable as a cold lamp (below the detection threshold of the latch circuit) during one or a few time positions. From the cooling characteristics of typical lamps it can be shown that for a large number of time positions per frame only one or two control pulses are required to write a 0", while for a small number of time positions per frame require a larger number of control pulses to insure that a lamp is turned off. Therefore, either each lamp of a particular system should be quickly cooled with respect to time position recurrence or the decoder and time circuits must be constructed to supply sufficient number of write 0" pulses (e.g. 0,Fn to insure lamp turn off.

What is claimed is:

1. In a system having a plurality of operational circuits which have GO/NO-GO operational conditions and which provide information signals indicative of changes in said operational conditions, apparatus for reporting operational conditions to a plurality of locations on a time-sharing basis, said apparatus comprising:

a matrix including firsbcoordinate conductors corresponding to separate ones of said plurality of lamps divided into separately located lamp groups, each of said lamps corresponding to a separate operational circuit and having a filament resistance of at least a predetermined value when lighted, and each said group of lamps being separately connected to the first coordinate conductor which is individual to said group and being connected to a plurality of said second coordinate conductors in common with the lamps from other lamp groups;

means connected to said first coordinate conductors of said matrix for scanning the last-mentioned conductors to partially establish circuits for the lamps of each said group during unique recurring time positions assigned to said groups;

interrogation means connected in common to said second coordinate conductors;

a plurality of interrogation circuits extending separately over said second coordinate conductors and completed by said interrogation means during each of said time positions, for developing separately on each said second coordinate conductor, a test signal which is indicative of the resistance value of the lamp being interrogated;

a plurality of bistable latching circuits each individually connected to a corresponding second coordinate conductor for detecting the test signal thereon, said bistable circuits being operated during said time positions to complete, under the control of said separate test signals, powering circuits for those lamps connected to said corresponding second coordinate conductor which exhibit a filament resistance of at least said predetermined value;

and data input means connected to said plurality of bistable circuits for operating, or inhibiting the operation of, selected ones of said bistable circuits during said time positions in response to said information signals, thereby to alter the status of said matrix at will irrespective of said test signals.

2. In a system having a plurality of operational circuits which have GO/NO-GO operational conditions and which provide information signals indicative of changes in said operational conditions, apparatus for reporting operational conditions to a plurality of locations on a time-sharing basis, said apparatus comprising:

a matrix including first coordinate conductors corresponding to separate ones of said plurality of locations, second coordinate conductors, and a plurality of lamps divided into separately located lamp groups, each of said lamps corresponding to a separate operational circuit and having a filament resistance of at least a predetermined value when li hted, and each said group of lamps being separate y connected to the firs coordinate conductor which is individual to said group and being connected to a plurality of said second coordinate conductors in common with the lamps from other lamp groups;

means connected to said first coordinate conductors of said matrix for scanning the last-mentioned conductors to partially establish circuits for the lamps of each said group during unique recurring time positions assigned to said groups;

interrogation means connected in common to said second coordinate conductors;

a plurality of interrogation circuits extending separately over said second coordinate conductors and completed by said interrogation means during each of said time positions for developing separately on each said second coordinate conductor, a test signal which is indicative of the resistance value of the lamp being interrogated;

a plurality of bistable self-latching circuits each individually connected to a corresponding second coordinate conductor for detecting the test signal thereon, said bistable circuits being operated during said time positions to complete, under the control of said separate test signals, powering circuits for those lamps connected to said corresponding second coordinate conductor which exhibit a filament resistance of at least said predetermined value;

timing means synchronized with said scanning means and connected to said interrogation means and to said bistable circuits, said timing means activating said interrogation means shortly after the beginning of each said time position and resetting said bistable circuits shortly before the end of each said time position;

and data input means connected to said plurality of bistable circuits for operating, or inhibiting the operation of, selected ones of said bistable circuits during said time positions in response to said information signals, thereby to alter the status of said matrix at will irrespective of said test signals.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US6081077 *Jul 2, 1998Jun 27, 2000MagnetekUniversal power supply for discharge lamps
US7414369 *Jul 26, 2005Aug 19, 2008Marvell World Trade Ltd.Control system for fluorescent light fixture
US7560866Apr 22, 2005Jul 14, 2009Marvell World Trade Ltd.Control system for fluorescent light fixture
US8120286Jul 14, 2009Feb 21, 2012Marvell World Trade Ltd.Control system for fluorescent light fixture
US8531107Feb 20, 2012Sep 10, 2013Marvell World Trade LtdControl system for fluorescent light fixture
US20060232213 *Jul 26, 2005Oct 19, 2006Sehat SutardjaControl system for fluorescent light fixture
US20060238145 *Apr 22, 2005Oct 26, 2006Marvell World Trade Ltd.Control system for fluorescent light fixture
US20090273305 *Nov 5, 2009Sehat SutardjaControl system for fluorescent light fixture
US20100121465 *Apr 2, 2008May 13, 2010Daikin Industries, Ltd.Group management apparatus and group management program
Classifications
U.S. Classification365/106, 714/E11.185
International ClassificationG06F11/32, H03K17/18, G09G3/22, G09G3/24
Cooperative ClassificationG09G3/24, H03K17/18, G06F11/325
European ClassificationH03K17/18, G09G3/24, G06F11/32S2