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Publication numberUS3597737 A
Publication typeGrant
Publication dateAug 3, 1971
Filing dateJun 21, 1968
Priority dateJun 21, 1968
Publication numberUS 3597737 A, US 3597737A, US-A-3597737, US3597737 A, US3597737A
InventorsBrown Robert M, Wallace Jacob L Jr
Original AssigneeSusquehanna Corp
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Interlocking switch arrangement
US 3597737 A
Abstract  available in
Images(1)
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Claims  available in
Description  (OCR text may contain errors)

United States Patent INTERLOCKING SWITCH ARRANGEMENT 6 Claims, 2 Drawing Figs.

US. 340/166 R, 317/137, 340/147 LP Int. Cl H04q 1/00, l-l04m 3/00 Field of Search 340/166, 147 LP; 317/137 [56] Relerenca Cited UNITED STA S PATENTS 3,048,821 8/1962 Burstow 6! a1 340/166 3,366,849 1/1968 Raedt 61 a1 340/166 x Primary Examiner-Donald J. Yusko Attorney-Martha L. Ross ABSTRACT: An example of an interlocking switch arrangement is a matrix design having an interlocking circuit connected at each matrix cross point. Each interlocking circuit has a relay which when actuated closes the matrix at its associated cross point. Prior to actuation of its relay, this circuit grounds the matrix column and row buses at its cross point. This serves to open the matrix at any other cross point in the same row and column thereby preventing the matrix from being connected at more than one cross point in any column or row at the same time. The matrix design affords versatility in that it permits interlocking circuits to be easily added to or removed from the matrix without affecting or requiring any altering of the other interlocking circuits.

The present invention relatesto an electrical interlocking arrangement for switches.

There are presently available many arrangements wherein a plurality of devices are interrelated so that but a single one of the devices can be maintained in an actuated condition at any given moment. These arrangements take both electrical and mechanical form and generally utilize some type of interlock to maintain a given one of the devices in an actuated condition until a second device is actuated. Thereupon, the first device is released and returned to normal, and the second device is maintained actuated.

With reference to electrical arrangements, the devices are generally arranged so that the switch means are physically interconnected with each other. By this is meant'that circuit paths run from each device into all of the other devices, or the holding circuits are arranged in a series circuit path so that this path is broken and an actuated switch released when a second switch is subsequently closed.-While these arrangements may have proven satisfactory in solving a particular design problem, they lack versatility and therefore are quite limited in their application. 7

For example, if it were desired to remove one of a plurality of switches or devices from such an arrangement, it would require the severing and remaking of the interlocking circuitry, and possibly the complete disassembly of thearrangement. Along the same line, if it were necessary to add an'additional switch into the arrangement, essentially the same effort would be required. In either event, the procedure is extremely burdensome, resulting in an attitude that efforts to alter the arrangement, once it has been assembled, should be discouraged and other solutions found. a

SUMMARY rangement utilizes individual circuits which are commonlyv coupled to one or more electrical lines without the necessity for physically interconnecting such circuitsJCircuits so coupled can be readily removed from the arrangement or new cirin an interlocking circuit. When any such relay is actuated, the

cuits added without the need for disturbing or altering the other circuits in the arrangement.

Briefly, this invention includes a common line, a plurality of interlocking circuits coupled to this line, each of the interlocking circuits including a first means for actuating a switch, a second means responsive to a signal on the common line for holding this switch in an actuated state, and third means for releasing any actuated switches in the other interlocking circuits through the agency of said common line.

It is an object of the present invention to provide an improved interlocking switch arrangement in which individual interlocking circuits in the arrangement can be added or removed without altering the other interlocking circuits in the arrangement.

Another object of the present invention is to provide such an arrangement in which the interlocking circuits are not physically interconnected.

Still another object of the present invention is to provide such an arrangement which is extremely versatile permitting modification to be readily accommodated without the need to disassemble the arrangement or to remake or alter the existing interlocking circuits.

A further object of the present invention is to provide an improved interlocking switch arrangement in matrix form in which the interlocking circuits are individually connected at each cross point without any necessity for interconnecting such circuits.

A still further object of the present invention is to provide such an arrangement in which no more than one cross point of the matrix in the same column or row can be connected at any one time.

A still further object of the present invention is to provide such an arrangement in which the matrix can readily be expanded or'contracted without the need to alter or remake any of the interlocking circuits which remain in the matrix.

Other objects and advantages will become apparent from a reading of the following description in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a preferred embodiment of the invention with the interlocking circuits shown connected in block diagram form in a matrix arrangement; and

FIG. 2 is a schematic diagram of a typical interlocking circuit.

DESCRIPTION OF THE PREFERRED EMBODIMENT To understand the full scope of this invention there is shown in FIG. 1 a preferred embodiment of an interlocking switch arrangement in which a plurality of bus bars are arranged in point will be referenced hereafter by one of these line numbers. Also connected to the column and row at each cross point is an'interlocking circuit 16, 18 or 20, which is here shown in block form; Each of the connecting lines 10, 12, and 14 contains an open switch contact 22, 24, and 26. Each of these contactsis controlled by a relay (hereinafter described) contact which it controls closes and the matrix is connected at that cross point.

The interlocking arrangement is designed so that the matrix cannot be connected at more than one cross point in any column or any row at the same time. For example, assume that the relays associated with blocks 16b and 18a have been actuated, thereby closing the contacts 22b and 24a, respectively. Now assume that it is necessary to connect the matrix at cross point 10a. This can be accomplished by actuation of interlocking circuit 16:: and its associated relay which will close contact 220.

The operation of the interlocking circuit 16a will also cause the release of the relays in interlocking circuits 16b and 18a and the opening of the matrix at cross points 10b and 12a. This is because the cross point of line 12a is in ROW A, the same as the cross point of line 10a, and because the cross point of line 10b is in COL. 1, the same as'the cross point of line 10a. How this is accomplished is described later. Note that if cross point 14c hadalso been connected, the connection of the matrix at cross point 10a would have had no effect because cross point 14cis not in either the same column or the same row as cross point 10a. i

The closing and release of the various relays and contacts, as discussed above, can be better understood by referring to FIG. 2 which shows a typical construction of an interlocking circuit l6, 18, or 20. A normally open pushbutton 30 is arranged to divert bias voltage, when depressed, from the base of a normally conducting transistor 32. The collector output of transistor 32 is connected to point A. Also connected at point A is a time-delay circuit, including capacitor 34, and two normally nonconducting transistors 36 and 38. At the collector of transistor 36 is line 40 which connects the interlocking circuit to a row bus of the matrix shown in FIG. 1. The collector of transistor 38 is connected to line 42 which connects this interlocking circuit to a column bus of the matrix at the same cross point as that connected by line 40.

At the output of the delay circuit formed by capacitor 34 and its associated resistors, there is connected a relay actuating and holding circuit formed by the transistors 44 and 48. The collector of transistor 44 and the base of transistor 48 are both connected to the winding 46 of a relay. The emitter of transistor 48 is connected to line 40. Relay 46 is shown inductively coupled to a cross point contact such as contact 22, as described in FIG. 1. Relay 46 can also be coupled, of course, to actuate another contact, such as contact 50, which would complete a circuit in the message or signal portion of the circuit, as distinguished from the interlocking circuit of FIG. 1.

In operation, assume again that the matrix of FIG. 1 is connected at cross points b and 12a, and that it is now necessary to actuate the relay 46 in interlocking circuit 16a to connect the matrix at cross point 10a. With reference now to FIG. 2, pushbutton 30 in interlocking circuit 16a is depressed. Base current is diverted from transistor 32, and it turns off. The positive potential now present at point A is not immediately applied to transistor 44 because of the action of the delay circuit. However, capacitor 34 in this delay circuit begins to charge.

The positive potential at point A causes transistors 36 and 38 to conduct, grounding lines 40 and 42, respectively. As shown by FIG. 1, line 40 is connected to ROW A of the matrix, and line 42 is connected to COL. 1 of the matrix. Thus, both ROW A and COL. 1 go to ground. With ROW A at ground potential, holdingcurrent is removed from the relay holding circuit in interlocking circuit 18a. For an explanation of how this is accomplished consider that FIG. 2 now represents the interlocking circuit 18a. The holding current on ROW A is applied by line 40 through the emitter-collector circuit of transistor 48 and to the base of transistor 44. Transistor 44 conducts heavily and provides a current path through its collector-emitter circuit for relay winding 46. When ROW A is placed at ground by interlocking circuit 160, current is removed from line 40 in circuit 180 and, therefore, from the base of transistor 44. As shown, transistor 44 and 48 are regeneratively coupled, therefore, transistor 44 and 48 both turn off immediately, terminating current flow through relay 46. This relay releases and its associated contacts open. Therefore, in FIG. 1, contact 24a at cross point 12a opens and the matrix is disconnected at this cross point.

In FIG. 2, when line 42, and thereby COL. l, was placed at ground potential by transistor 38 in interlocking circuit 16a, ROW B also went to ground by virtue of it being connected to COL. 1 through closed contact 22bin cross point line 10 b. Accordingly, holding current is now also removed from the relay holding circuit in interlocking circuit 16b which functions in the same manner as just described for circuit 18a. The relay 46 in circuit 16b releases, contact 22b opens, and the matrix is disconnected at the cross point 1012. Thus, all energized relays in ROW A and COL. l of the matrix have been released.

In FIG. 2, the time delay of capacitor 34 is selected to be greater than the dropout time of relay 46. Therefore, once these relays have been released in interlocking circuits 16b and 18a, capacitor 34 in interlocking circuit 16a attains a level of charge sufficient to cause transistor 44 to begin to conduct. The regenerative connection of transistors 44 and 48 cause this transistor pair to immediately switch to a saturated conducting state. Relay 46 is actuated and contact 22a in line 10a of the matrix of FIG. 1 is closed and the matrix is connected at that cross point.

When pushbutton 30 is released, transistor 32 again conducts and transistors 36 and 38 go nonconducting removing the ground potential from ROW A and COL. 1. Capacitor 34 is designed to discharge slowly so that sustaining base current is available to transistor 44 to hold the transistor pair 44, 48 in a saturated state until sufficient holding current is available from ROW A. Thus, transistors 44 and 48 remain saturated and relay winding 46 stays in its actuated state.

It should be noted that the interlocking arrangement shown which would be switched by the relays 46, although a message or signal arrangement could obviously take the form of a rectangular matrix of the same type shown in FIG. 1.

As described, the interlocking arrangement readily permits the addition or removal of interlocking circuits. For example, if it were desired 'to remove interlocking circuit 180, it would be a simple matter to disconnect its lines 40 and 42 from ROW C and COL. 2, respectively, together with line 12c. This would in no way alter or otherwise affect or require any adjustment of any of the other interlocking circuits in the matrix. Likewise, if interlocking circuit 180 was not connected in the matrix it could be readily added by connecting lines 40 and 42 to ROW C and COL. 2, respectively, together with line and its associated contact 24c.

It should also be recognized that the matrix can easily be expanded or contracted by merely adding or removing additional rows or columns, and this is readily accomplished without affecting any of the interlocking circuits in the other rows or columns. For example, ROW B or ROW C could be removed from the matrix and their associated interlocking circuits disconnected from the. bus bars. If both ROW B and ROW C were removed, only ROW A would remain and with the interlocking circuits connected only to ROW A, a cross point switch contact would not be necessary. Alternatively, additional rows could be added and interlocking circuits connected between these new rows and the column lines. Furthermore, the matrix can be made three dimensional by expansion along the Z axis. In such case, a slight modification of each interlocking circuit would be necessary. A third transistor identical to transistor 36 or 38 would beconnected between point A and the Z-axis bus bar.

While specific embodiments of the invention have been shown and described, it will be apparent that various modifications may be made therein within the spirit and scope of the invention, and it is desired, therefore, that only such limitations be placed on the invention as are imposed by the prior art and set forth in the appended claims.

What we claim is:

1. An interlocking arrangement for switches comprising:

a. a common line,

b. a plurality of interlocking circuits connected in parallel to said common line,

c. a source of potential for said common line, said source of potential being applied to each interlocking circuit,

d. each. of said interlocking circuits including:

l. meansfor actuating one of said switches,

2. means responsive to the potential applied to said common line for holding said one switch in an actuated state,

3. means responsive to the operation of said actuating means for removing said potential level from the other interlocking circuits thereby to release any actuated switches in the other interlocking circuits, and

4. means responsive to said actuating means for delaying actuation of said one switch until all other actuated switches have been released.

2. An interlocking arrangement for switches comprising:

a. a matrix, having l. a plurality of row buses,

2. a plurality of column buses, said row and column buses defining cross points b. a switch for connecting a row bus to a column bus at each of a plurality of said cross points,

0. an interlocking circuit associated with each switch and connected to a row bus and to a column bus,

cl. each interlocking circuit comprising:

1. means for actuating its associated switch and thereby connecting a row bus to a column bus at the cross point, and

2. means responsive to said actuating means for releasing any other actuated switches which are connected to the same row bus or column bus.

3. An interlocking arrangement for switches as claimed in claim 2 further comprising:

a. means in each interlocking circuit for holding its associated switch in an actuated state once said switch has been actuated by said actuating means.

4. An interlocking arrangement for switches as claimed in claim 3 further comprising:

a. a source of voltage for each of said plurality of row buses,

. said holding means in each interlocking circuit being connected to receive voltage from said source for holding its associated switch in an actuated state once said switch has been actuated by said actuating means, and

c. said releasing means in each interlocking circuit acting in response to the operation of said actuating means to remove said potential level from the other actuated interlocking circuits connected to the same row bus or column connect a row bus to a column bus upon actuation of its associated relay.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US3048821 *Mar 21, 1958Aug 7, 1962Cie Ind Des TelephonesElectronically locking selection device
US3366849 *Mar 24, 1965Jan 30, 1968Int Standard Electric CorpTwo-coordinate lock-out circuit
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3772651 *Jun 21, 1972Nov 13, 1973Int Standard Electric CorpLock-out circuit
US3831147 *Jan 26, 1972Aug 20, 1974H KafafianCommunication system for the handicapped
US3845363 *May 7, 1973Oct 29, 1974Billion LMonitor circuit
US3931481 *Sep 20, 1974Jan 6, 1976Litton Business Telephone Systems, Inc.Plural line selector apparatus for enabling selection of one of a plurality of telephone lines
US3936705 *Aug 20, 1974Feb 3, 1976Leo Jozef Maria BillionMonitor circuit
US5821641 *Jul 30, 1996Oct 13, 1998Compaq Computer Corp.Secondary supply power referenced interlock circuit
Classifications
U.S. Classification340/14.65, 361/193
International ClassificationH04Q3/00
Cooperative ClassificationH04Q3/0012
European ClassificationH04Q3/00C4