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Publication numberUS3601745 A
Publication typeGrant
Publication dateAug 24, 1971
Filing dateDec 24, 1969
Priority dateDec 24, 1969
Publication numberUS 3601745 A, US 3601745A, US-A-3601745, US3601745 A, US3601745A
InventorsHelgeland Walter
Original AssigneeSprague Electric Co
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Standardized resistor blank
US 3601745 A
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Description  (OCR text may contain errors)

United States A Patent Inventor Appl. No.

Filed Patented Assignee Walter Helgeland Nashua, NH.

Dec. 24, 1969 Aug. 24, 197 l Sprague Electric Company North Adams, Mass.

STANDARDIZED RESISTOR BLANK 4 Claims, 3 Drawing Figs.

US. Cl 338/203, 338/309, 338/308 Int. Cl

.............. H0lc7/00 [50] Field of Search 338/308, 309, 203; 117/217 [56] References Cited 7 UNITED STATES PATENTS 3,258,898 7/1966 Garibotti 117/217 X Primary ExaminerE. A. Goldberg Attorneys-Connolly and Hutz, Vincent H. Sweeney, James Paul OSullivan and David R. Thornton 7 ABSTRACT: Standardized resistor blanks are machined by an electron beam which can be program controlled to form a variety of different resistor networks from the same standardized resistor blank.

PATENTED AUB24 IBYI sum 1 BF 2 STANDARDIZED RESISTOR BLANK BACKGROUND OF THE INVENTION This invention relates to standardized resistor blanks and more particularly to resistor networks having a generalized interconnection pattern which can be machined under program control to form a large-variety of specific complex products out of a relatively simple, standardized starting blank.

The use of standardized starting blanks facilitates the production of different resistor networks by reducing the number of process steps previously required to produce these resistor networks.

In order to produce a series of individually different complex resistor networks by prior art methods, it was necessary to design and form a photolithographic mask for each network to be produced. This involved the expense of preparing separate engineering drawings for each circuit to be manufactured along with the cost of photoreducing each engineering drawing in order to form the mask. Therefore because of the infinite variety of end products that may be required by customers, it is economically desirable to be able to produce a variety ofdifferent complex resistor networks without resorting to the production of a different photolithographic mask for each circuit.

Therefore it is an object of this invention to simplify the number of process steps required to produce a variety of different resistor networks.

- It is a further object of this invention to provide standardized starting blanks which may be machine etched into a wide variety of different resistor networks thereby eliminating the necessity of forming a different photolithographic mask for each resistor network.

SUMMARY OF THE INVENTION In accordance with this invention a standardized resistor blank is provided which is suitable for electron beam machining into a variety of resistor networks. The standardized resistor blank comprises a flat insulative substrate upon which is overlaid a smaller resistive film, centrally located so as to have a uniform margin of substrate surface surrounding its edge. A conducting terminal pattern overlays the resistive film and substrate. This pattern consists of a central grid overlaying the resistive film, together with pads radiating outward to the edge of the substrate. These pads overlay the substrate margin which surrounds the resistive film. The individual resistive elements of the standardized resistor blank are outlined by the openings in the grid structure.

This standardized resistor blank can be formed into a variety of. resistor networks. The first step in machining the resistor blank into a particular resistor network is to form a sequential cutting pattern which defines the interconnections between the individual resistive elements. The cutting sequence of the electron beam must alternate between cutting a group of isolation lines and then machining a resistive element to the desired value. The cutting pattern programs and controls the direction of the electron beam during the machining of a particular network. Therefore a variety of resistor networks can be formed by using different cutting patterns.

BRIEF DESCRIPTION OF THE DRAWINGS DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 1 shows a top view of ceramic substrate 20 having the approximate dimensions 0.500 inches 1.000 inches. The

substrate may be composed of a suitable ceramic material such as alumina. The substrate is first metallized with a suitable thin film-resistance material such as nickel-chromium or tantalum in the central rectangle 22 whose outline is indicated by black dashed lines. The conducting terminal pattern 24 is overlaid on this resistor film. It consists of avcentral grid with pads radiating outward to the edge of the ceramic plate 20. Those areas of the ceramic not coated are shown between the terminal pads. This general purpose resistor network blank can be used for a wide variety of networks, subject to the conditions that there are not more than 32 resistors required, and that the number of terminals on the edges of the ceramic is sufficient for connecting to the resistor network.

An infinite variety of end products may be formed by machining through the terminals in selected locations on this general purpose resistor network blank. The terminals" are machined by a standard electron beam machining device wherein the beam cutting and the resistance measuring are done under computer control. The pattern to be cut is determined by the computer based on relatively little input data. By programming the beam deflection by means well known in the art, this process quickly and accurately forms discrete conductive paths separated by areas in which the conductive material has been selectively removed. The pattern can be changed by simply reading in a small additional amount of new input data. This serves as a basis for a system of cutting different patterns, wherein the setup time is minimal, as far as generating the cutting pattern is concerned.

In the preferred embodiment of the general resistor, blank thin film terminals are utilized. The thin film terminals would comprise a graded layer having a nickel-chromium resistive film on the bottom and a conductive copper film on the top, with gradually varying mixtures of copper and nickel-chromium between them. The graded layer may be applied by a combination of sputtering and vacuum deposition as disclosed in copending application Ser. No. 684,034 filed Nov. 17, 1967 and issued Feb. 17, 1970 as US. Pat. No. 3,496,513. The aforementioned thin film terminals would be preferred over screened and fired terminals which also could be cut with an electron beam.

While screened terminals, which are generally in the range of l-mil thick, can be cut with electron beams, less power input is required to cut thin film terminals, thereby resulting in less heating of the substrate. Higher substrate temperatures can adversely affect the accuracy of final machining of the resistor films, due to the temperature coefficient of resistance. Also the electron beam machining of thin film terminals evaporates less material out of the lines cut than the evaporation of the thicker screened terminals. This evaporated materialaccumulates rapidly on the probes and other fixtures in the machining chamber necessitating more frequent cleanings during the machining of the thicker screened terminals.

FIG. 2 illustrates a particular complex network which uses this general purpose blank. The schematic of the network is indicated in FIG. 3. In a typical application, terminal 0 would be connected to the common line, terminal 14 to the inverting input of an operational amplifier, and terminal 15 to the output of the amplifier. Terminals 1 through 12 would each be connected to a single-pole, double-throw switch, which would connect these terminals either to a reference voltage or to a common ground. By switching these digital inputs, it is possible to generate at terminal 15 an analog output voltage proportional to the weighted sum of the positions of switches 1 through 12. Thus, switching of terminal 12 from common ground to the reference voltage produces a relatively large output at terminal 15. Switching terminal I] would produce only half as large a change in output voltage, and so on down the string to switch 1. This whole device constitutes a digitalto-analog converter, and is widely used. It is convenient to mount such resistor networks by means of a standard Dual In- Line Package, which requires terminals to be spaced as shown in FIG. 2 using two parallel edges of the ceramic.

The various machined lines that define the interconnect Y pattern are all shown on FIG. 2. The machining of this network alternates between cutting a certain group of isolation lines and then machining a resistor. The machined patterns on all the resistors have not been shown and FIG. 2 shows only a typical pattern on the square of resistor material which constitutes R strate plates, in' terms of number of terminals and sheet re-.

7 sistivityof resistor film material, the necessary computer input The machined lines are all.numbered sequentially in the sure between terminals and 1); (3) cut lines 9-11; (4)

machine R (measure between terminals 1 and 2); (5) cut lines 12-14; (6) machine R (measure between terminals 1 and 2, with R in series); (7) cut lines 15-17; (8) machine R (measure between terminals 2 and 3); (9) cut lines 18-20; (10) machine R (measure between terminals 2 and 3, with R in series); (1 l cut lines 77-79; (12) machine R (measure between terminals 12 and l3); (13) cut lines 80-89; (14) machine R (measure between terminals 13 and 14); and (15) machine Rfeedback (measure between terminals 14 and 15).

[t can be seen from the order of cutting and machining that all the primed resistors beginning with R 40 must be measured in series with the preceding nonprimed resistor. This requires setting the resistance bridge to a value which is properly compensated for the resistance of the nonprimed resistor. Since the cutting machine and measuring bridge operate under computer control, and since the nonprimed resistor can be accurately measured for its actual value before beginning to cut the next primed resistor, very accurate compensation is possible.

The determination of the machining pattern in this particular case required less than one days work, using a blank layout data 7 to turn one of these general purpose blanks into a required network could be generated in one day. Also the. cutting speed is sufficiently high, about 40 inches per second, that this does not become a significant factor in short runs. The total time required to machine all the isolation lines shown in FIG. 2 would be about milliseconds, since the total length of isolation lines is about 7 inches. This would be a relatively minor part of the total processing time in the cutting machine for this piece.

What I claim is;

l. A standardized resistor blank suitable for electron beam machining into a variety of complex resistor networks comprising a substantially flat insulative substrate, a resistive film overlaying the central surface area of said substrate and positioned so as to have a substantially uniform margin of substrate surface surrounding the edge of said resistive film, and a conducting terminal pattern consisting of a central grid overlaying said resistive film together with pads radiating outward to the edge of said substrate and overlaying said substrate margm.

2. The resistor blank of claim 1 wherein said substrate is ceramic.

3. The resistor blank of claim 2 wherein said ceramic substrate is alumina.

4. The resistor blank of claim 1 wherein said resistive film is nickel-chromium and said terminal pattern is copper with gradually varying mixtures of copper and nickel-chromium between them.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US3258898 *May 20, 1963Jul 5, 1966United Aircraft CorpElectronic subassembly
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3939381 *Mar 22, 1974Feb 17, 1976Mcm Industries, Inc.Universal burn-in fixture
US5850171 *Aug 5, 1996Dec 15, 1998Cyntec CompanyProcess for manufacturing resistor-networks with higher circuit density, smaller input/output pitches, and lower precision tolerance
US6008719 *Oct 3, 1997Dec 28, 1999Thomson-CsfElectrical control device with crosstalk correction, and application thereof to magnetic write/read heads
US6111494 *Apr 29, 1997Aug 29, 2000Robert Bosch GmbhAdjustable voltage divider produced by hybrid technology
US6821821Dec 8, 2000Nov 23, 2004Tessera, Inc.Methods for manufacturing resistors using a sacrificial layer
US6856235 *Sep 12, 2001Feb 15, 2005Tessera, Inc.Methods for manufacturing resistors using a sacrificial layer
US7025893Aug 12, 2003Apr 11, 2006Thermo Stone Usa, LlcApertures to exposure undercaotings; uniformity of heat generated across thin film; tin oxide heater
US7091820Jun 30, 2004Aug 15, 2006Tessera, Inc.Methods for manufacturing resistors using a sacrificial layer
US7165316Apr 20, 2004Jan 23, 2007Tessera, Inc.Methods for manufacturing resistors using a sacrificial layer
EP0136869A2 *Sep 19, 1984Apr 10, 1985Fujitsu LimitedA resistance ladder network
Classifications
U.S. Classification338/203, 338/308, 338/309
International ClassificationH01C13/00, H01C1/16, H03M1/00, H01C13/02, H01C1/00
Cooperative ClassificationH01C13/02, H01C1/16, H03M2201/3115, H03M2201/3136, H03M2201/3168, H03M2201/02, H03M2201/93, H03M1/00, H03M2201/4233, H03M2201/4135, H03M2201/4262, H03M2201/4225, H03M2201/3131
European ClassificationH01C1/16, H03M1/00, H01C13/02