US 3609579 A
Description (OCR text may contain errors)
United States Patent  Inventors Appl. No. Filed Patented Assignee Priority Terence R. Chappell Brockworth;
Thomas R. Heeks, Woodmancote, Cheltenham; Michael J. Rogers, Cheltenham; John H. Shelley, Eastcombe, near Stroud, all of England 827,662
May 26, 1969 Sept. 28, 1971 Smiths Industries Limited London, England May 31, 1968 Great Britain METHOD AND APPARATUS FOR CONTROLLING ONE OSCILLATOR BY ANOTHER 12 Claims, 2 Drawing Figs.
US. Cl 331/46, 331/2, 331/47, 331/48, 331/52, 331/55 Int. Cl 1103b 3/04 Field of Search 331/46, 47, 48, 55,173, 2,52
 References Cited UNITED STATES PATENTS 2,476,997 7/1949 Noyes 331/173 2,546,981 4/1951 Craft 331/48 X 3,215,947 11/1965 Loughlin et al 331/55 X 3,217,258 ll/l965 Arlin etal; 33l/55X 3,239,767 3/1966 Milenkovic et al. 331/55 X Primary Examiner-Alfred L. Brody AttorneysWilliam D. Hall, Elliott i. Pollock, Fred C. Philpitt, George Vande Sande, Charles F. Steininger and Robert R. Priddy ABSTRACT: A first high frequency stable oscillator is used to control a second lower frequency oscillator by the method of sensing the attainment ofa peak value of one of the oscillating parameters of the second oscillator, applying a constraint to that parameter to inhibit temporarily the oscillation of the second oscillator, and releasing the constraint when the first oscillator next reaches a datum position in its cycle of oscillatron.
METHOD AND APPARATUS FOR CONTROLLING ONE OSCILLATOR BY ANOTHER The present invention relates to systems in which first oscillations generated by a first oscillator at a first, higher, frequency are utilized to control the generation of second oscillations by a second oscillator at a second, lower frequency, the second oscillator being so controlled that the second frequency is a fixed integral submultiple of the first frequency.
It is known that, in an ideal oscillator having a single, constant amplitude sinusoidal mode of oscillation, there can always be found two parameters, each varying sinusoidally with time, such that the variations of the two parameters are in phase quadrature, and the values of which fix completely the state of the oscillation. Such a pair of parameters will be referred to hereafter as a pair of conjugate parameters.
To take a mechanical example, if we consider a mass oscillating linearly under a simple spring restraint, one parameter can be taken as the displacement of the mass from its equilibrium position, whereupon the velocity of the mass (or its momentum) can be used as the conjugate parameter.
As an electrical example, an oscillatory circuit consisting of a loss-free inductor connected in parallel with a loss-free capacitor can be considered, and the voltage across the capacitor can be taken as one parameter while the magnetic flux linking the winding of the inductor can be taken as its conjugate.
It will be seen that if, in such an oscillator, when one of the parameters reaches its peak value it is constrained to remain at that value for a period of time and the constraint is then released, the period of time will effectively be added to the normal period of oscillation of the system. When the first parameter is at its peak value, the conjugate parameter will be zero, or its mean value, and it will retain that value as long as the first parameter is constrained to remain at its peak value.
In a practical oscillator having a substantially sinusoidal mode of oscillation maintained at substantially constant amplitude, e.g. by suitable mechanical or electrical means, there will still be parameters which, to a sufficiently high degree of approximation, can be regarded as conjugate in the sense discussed above and hereafter such pairs of parameters will be so referred to.
According to one aspect of the present invention a method of using one oscillator to control the frequency of oscillation of a second lower frequency oscillator having a substantially sinusoidal mode of oscillation at constant amplitude, comprises sensing the attainment of a peak value of an oscillating parameter of the second oscillator, applying a constraint to said parameter to maintain it at its peak value to inhibit temporarily the oscillation of the second oscillator, and releasing the constraint as soon as the said one oscillator next reaches a datum position in its cycle of oscillation.
The method may include applying an output signal of the first oscillator to prevent the application of the constraint whenever the first oscillator is at said datum position.
According to another aspect of the present invention an electrical circuit arrangement includes an oscillator for controlling the frequency of oscillation of a second lower frequency oscillator having a substantially sinusoidal mode of oscillation at constant amplitude, comprising first sensing means for sensing the attainment of a peak value of an oscillating parameter of the second oscillator, operative means controlled by said first sensing means arranged to apply a constraint to said parameter to inhibit temporarily oscillation of said second oscillator, and second sensing means controlled by said first oscillator arranged to remove said constraint whenever the first oscillator reaches a datum point in its cycle of oscillation.
The operative means may be arranged to be inhibited by said second sensing means to prevent the application of said constraint whenever the first oscillator is at its datum point.
Preferably the first sensing means are responsive to the second conjugate parameter, operating when the value thereof passes through its mean value which is often zero. It
will be appreciated that it is, generally speaking, easier to sense accurately the passage of a parameter through zero than it is to sense the attainment of a peak value.
It will be seen that the period of the second oscillation, when controlled as set forth above, will be an integral multiple of the period of the first oscillation, the integer giving the multiple in question being the integral part of the quantity:
(period of uncontrolled second oscillator) divided by (period of first oscillator), plus 1.
Thus, if this quantity is initially nq. where q is a positive proper fraction (i.e. q is less than unity) and n is an integer, the ratio of the period of the second oscillator to that of the first will be n, no matter what the value of q may be, and even if the uncontrolled period of the second oscillator drifts, the ratio of the controlled second oscillator to that of the first oscillator will be unchanged, so long as n remains unchanged. In practical terms, the second oscillator could be set up initially so that 9 was equal to /2. Then, so long as the uncontrolled period of the second oscillator did not drift by more than half the period of the first oscillator, its controlled period would be unchanged. It is found in practice that this condition can be satisfied without undue difficulty for quite large values of n, e.g. n=400, so that, by means of the present invention, a large frequency division ratio can be achieved in a single operation.
If the second oscillator comprises a single resonant circuit having a capacitor and inductor in parallel as the primary element determining the uncontrolled frequency, the magnetic flux linking the inductor may be taken as the first parameter of the conjugate pair, and the voltage across the capacitor as the second; or vice versa. If the second oscillator comprises a balance wheel and hairspring, as in a watch or clock, the first parameter can be taken as the angular displacement of the balance wheel from its mid position (with the spring unstressed) and the second parameter as the angular velocity of the balance wheel. The wheel would then be clamped at one extreme of its oscillation, and then released when the first oscillation reaches a datum point in its cycle. Alternatively the wheel could be disconnected from the hairspring at the midposition, and reconnected when the second oscillation reached the datum point.
An electrical embodiment of the invention will now be described with respect to the accompanying drawings of which:
FIG. 1 is a circuit diagram.
FIG. 2 shows waveforms at various points in the circuit.
Certain of the components shown in FIG. 1 perform functions which will be clear to those skilled in the art merely by inspection of that figure. Many of these components are not explicitly referred to in what follows. For illustrative purposes, the values of all the components are indicated on the figure.
Referring to FIG. 1, the circuit receives its power supply from a source (not shown) connected between line 1 (positive) and line 2 (ground). An NPN transistor 3 and piezoelectrical crystal 4 are connected in the circuit of a conventional oscillator, which constitutes the first oscillator, which produces an output in the form of positive going pulses at a frequency of 1 MHz across resistor 5, the first terminal of which is connected to the positive line 1.
A second, PNP transistor 6, a capacitor 7 and a centertapped inductor 8 are connected in the circuit of a conventional Hartley oscillator, constituting the second oscillator. The center tap of inductor 8 is grounded. The uncontrolled frequency of the second oscillator is thus predominantly determined by the values of capacitor 7 and inductor 8. One terminal of the capacitor 7 and the inductor 8 are joined and connected to the collector of transistor 6. This junction is connected to the emitter of an NPN transistor 9, the base and collector of transistor 9 being directly interconnected, so that it acts as a diode. The interconnected base and collector of transistor 9 are connected to the base of an NPN transistor 10 which is associated with a PNP transistor 11, in a conventional trigger circuit. The output of the trigger circuit is applied to a differentiating circuit, consisting of capacitor 12 and resistor 13 in series, to produce positive-going pulses, between the junction of capacitor 12 and resistor 13, which are applied to the base of NPN transistor 14. Corresponding negative-going pulses (of about lus width) are produced at the collector of transistor 14 which, besides providing the output from the circuit at terminal 15, are applied through a capacitor 16 and resistor 17 to the base of PNP transistor 18. An NPN transistor 19 has its emitter-collector circuit connected across resistor 17, and its base is connected to the second terminal of resistor 5, so that the positive-going pulse output of the first oscillator is applied to the base of transistor 19. The collector of transistor 18 is connected through a resistor 20 to the terminal of inductor 8 which is remote from the collector of transistor 6; and the resistor 20 and transistor 18 are such that when transistor 18 is fully conducting, under the influence of the negative-going pulses applied to its base, the current through them, and through inductor 8, is such as to produce a magnetic flux linking the winding of inductor 8 equal to the peak value of that flux when the second oscillator is oscillating under controlled conditions.
The manner of operation of the system will now be described, with particular reference to the wave forms shown in FIG. 2.
The positive-going pulses with a frequency of 1 MHz produced by the first oscillator at the base of transistor 19 are indicated at 2a. There is indicated at 2b the magnetic flux linked with the winding of inductor 8; and this waveform can also be taken as indicating to a suitable scale the current in the inductor. There is shown at 20 the voltage between the emitter of transistor 6 and ground, and this figure can be taken as also showing the voltage across capacitor 7, to a suitable scale. Waveform 2b achieves its peak as waveform 20 passes through zero. The continuously curved parts of these two waveforms show a single complete cycle of oscillation of the uncontrolled second oscillator, of period rather less than 400p secs. (but greater than 399p. secs.). So long as the voltage at the collector of transistor 6 is negative, diode-connected transistor 9 will conduct, and transistor 10, and also transistor 11, will be cut off. As this voltage passes through zero, the transistor 10 will commence to conduct, as will transistor 11. In usual fashion, a positive-going pulse will be produced at the collector of transistor 11, as shown in FIG. 2 at 2d. (The time-scale for all the waveforms of FIG. 2 is greatly exaggerated between the attainment of the peak of waveform 2b indicated by line 21, and a time about 3[LS8CS. later, indicated by line 22).
This pulse is differentiated by capacitor 12 and resistor 13 to provide a pulse of approximately 1,u.sec. which is applied to the base of transistor 14. Transistor 14 is caused to conduct by the positive-going pulse produced by the leading edge of waveform 2d, so that a negative-going voltage pulse, of duration approximately 1/LS6C., is produced at its collector, waveform 2e, which constitutes the output from the system. This pulse is also applied to the base of transistor 18, by means of capacitor 16 and resistor 17, resistor 17 being returned to the positive line.
So long as transistor 19 is cut off, ie during the positivegoing portion of the waveform at its base, that shown at 2a, transistor 18 will conduct; but as soon as this waveform goes positive, and transistor 19 conducts transistor 18 will be cut off it will be appreciated that as the pulse of waveform 22 is lusec. wide, and the frequency of waveform 2a is 1 MHz, waveform 2a must necessarily go positive at some point in the pulse of waveform 22. Thus, transistor 18 passes a pulse of current, as shown in waveform 2f, commencing as waveform 2e attains its negative peak, and ceasing when waveform 2a next goes positive. The magnitude of this current is determined predominantly by resistor 20, and the value of this resistor is as indicated above, or chosen that the magnitude of this current is such as to maintain the magnetic flux linking inductor 8 at its peak value; and this implies that the voltage across capacitor 7 remains at zero. Thus, at the termination of the pulse of waveform 2f, the oscillation of the second oscillator is resumed, and the sequence of operation described above recommences when waveform 2b next achieves its positive peak; and it will be seen that the time interval between the successive negative-going pulses of waveform 2e will be an integral multiple of the time interval between the successive pulses of waveform 2a which is (a) greater than 399 and,
(b) exceeds 399 by a proper fraction, i.e. the time interval between the pulses of waveform 2e must be exactly 400 times the time interval between the pulses of waveform 2a; and the recurrence frequency of the output of the system, at terminal 15, will be exactly 2,500 Hz. even though the uncontrolled frequency of the second oscillator may drift, provided that the period does not drift either below 399 secs. or above 400;;- secs.
The input impedance of the described circuit is very high except for those periods when the transistor 18 is conducting. The transistor 18 is switched on for only a small fraction of a psec. at a time, if at all, and the interval between the switching of the transistor 18 is approximately 400psecs. Thus, the circuit is extremely economical in current consumption so that the present invention is particularly applicable to horology where, in a portable timepiece for example, extreme economy in current is required to avoid overfrequent battery changes.
1. A method of using a first oscillator to control the frequency of oscillation of a second lower frequency oscillator having a substantially sinusoidal mode of oscillation to provide an oscillation at a predetermined frequency integrally related to the frequency of oscillation of the first oscillator, comprising sensing the attainment of a peak value of an oscillating parameter of the second oscillator, constraining said parameter at said value to inhibit temporarily oscillation of the second oscillator, sensing the condition of the said first oscillator when it next reaches a datum position in its cycle of oscillation, and releasing the constraint on said parameter when said condition is sensed.
2. A method according to claim 1, in which the attainment of the peak value of said parameter is achieved by sensing the attainment of the mean value of a conjugate parameter of the said parameter.
3. A method according to claim 1 including applying an output signal of the first oscillator to prevent constraint of said parameter whenever the first oscillator is at said datum position.
4. A method according to claim 2 including applying an output signal of the first oscillator to prevent constraint of said parameter whenever the first oscillator is at said datum position.
5. A method according to claim 3, comprising applying said output signal to prevent said constraint of said parameter for approximately half a cycle of oscillation of the first oscillator.
6. A method according to claim 4, comprising applying said output signal to prevent said constraint of said parameter for approximately half a cycle of oscillation of the first oscillator.
7. An electrical circuit arrangement according to claim 12, in which said controllable means is arranged to be maintained in said second state by said second sensing means to prevent the application of said constraint whenever the first oscillator is at its datum point.
8. An electrical circuit arrangement according to claim 7, in which the second sensing means is arranged to maintain the controllable means in said second state for approximately half a cycle of oscillation of the first oscillator.
9. An electrical circuit arrangement according to claim 12 in which the first sensing means is arranged to sense the attainment of the peak value of said parameter by sensing the mean value of a conjugate parameter of the said parameter.
10. An electrical circuit arrangement according to claim 12, in which said first sensing means comprises an electrical trigger circuit for producing an electrical pulse whenever said parameter attains its peak value, said controllable means comprises a transistor which responds to said pulse to supply an electrical current to maintain said parameter at its peak value,
and said second sensing means is arranged to apply a signal to said transistor to cause said electrical current to cease.
11. An electrical circuit arrangement according to claim 12, in which said first oscillator is a crystal-controlled oscillator and said second oscillator is an oscillator with a natural frequency of less than 2500 cycles per second.
12. An electrical circuit arrangement for providing oscillation at a frequency integrally related to a higher frequency; comprising a first oscillator for providing oscillation at said higher frequency; a second oscillator having a substantially sinusoidal mode of oscillation at a frequency lower than that of the first oscillator; controllable means coupled to said second oscillator and controllable to operate in either of two states selectively, said controllable means when in a first of said two states applying a constraint to an oscillating parameter of the second oscillator to retard the phase of the oscillation of the second oscillator; first sensing means coupled to said second oscillator to sense the attainment of a peak value of said parameter, said first sensing means including means for controlling said controllable means to operate in said first state when attainment of said value is sensed; and second sensing means coupled to said first oscillator to sense the condition in which the first oscillator reaches a datum position in its cycle of operation, said second sensing means including means for controlling said controllable means to change its operation from said first state to said second state in response to the sensing of said condition.