|Publication number||US3611401 A|
|Publication date||Oct 5, 1971|
|Filing date||Sep 24, 1968|
|Priority date||Sep 24, 1968|
|Publication number||US 3611401 A, US 3611401A, US-A-3611401, US3611401 A, US3611401A|
|Inventors||Connolly Terrence E|
|Original Assignee||Gen Electric|
|Export Citation||BiBTeX, EndNote, RefMan|
|Referenced by (27), Classifications (7)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent Terrence E. Connolly  Inventor Baldwinsville, N.Y.
 Appl. No. 762,030 I  Filed Sept. 24, 1968  Patented Oct. 5, 1971  Assignee General Electric Company  BEAM STEERING SYSTEM FOR PHASED ARRAY ANTENNA 7 Claims, 2 Drawing Figs.
 [1.8. CI 343/854, 343/ 100 SA  Int. Cl HOlq 3/26  Field of Search 343/778, 853, 854, 100 SA  References Cited UNITED STATES PATENTS 3,380,053 4/1968 Connolly 343/854 Primary Examiner-Eli Lieberman Attorneys-Norman C. Fulmer, Carl W. Baker, Frank L.
Neuhauser, Oscar B. Waddell and Melvin M. Goldenberg ABSTRACT: A beam-steering system for phased array antennas is disclosed, wherein the phases of the signals fed to the individual elements of the array are varied by phase shifters in selectable discrete steps to obtain directivity or steering of the array for transmitting and/or receiving. Special circuitry monitors the roundoff phasing errors of the phase shifters, and alters the settings of certain of the phase shifters at certain times in order to compensate for and eliminate the effects of the accumulated roundoff phasing errors. Thus, improvements in beam-steering accuracy and other characteristics are obtained, and/or the system is simplified and reduced in cost because fewer (and coarser) steps of selectable phase shifts can be employed.
PAIENIEIIIIm 51m 3.611.401
SHEET 1 [IF 2 II I K- 1 PN 9 24% I/ I -Tl I J 27- HYBRID TO M 1-1 JUNCTION l 36 a "I I I 1 as 29 l 3l l 1 STEER'NG ERRoR TIMER TRANSMITTER REcEIvER g'gmf COMPENSATION SOURCE cIRcuIT l I 1 INVENTORI TERRENCE E. CONNOLLY,
BY W IMW HIS ATTORNEY.
PATENTED 0m 5197! SHEET 2 OF 2 To To 0 To MRI-M T PM L f\ L GA E ERLVER S I G PHASE SHIFTER LOADING TRIGGER ATED DRIVERS T RIGHT SUB-ARRAY SHIFT REGISTER LEFT SUB-ARRAY SHIFT REGIsTER (84 BITS) (e4 BITS) 4; 52 49 [INVERTER 67 DELAY 7 '1 r47 '1 66 TIMER O REcIRcuLATING SHIFT REGISTER r (AMPLITUDE vDIsTRIeuTIoNI G2\ DELAY 8 NETWORK 63 6| 69 W MULTIPLIER 4 BIT a BIT PI-IAsE ROUND-OFF sIGNAL ERRDR -64 IF) ADDER r42 I2-BIT STEERING ,-I5 coNINIAND sIGNAL SOURCE INVENTOR'. TERRENCE E. CONNOLLY,
BY W (5 m HIS ATTORNEY.
BEAM STEERING SYSTEM FOR PHASED ARRAY ANTENNA The invention herein described was made in the course of or under a contract or subcontract thereunder, with the United States Army.
BACKGROUND OF THE INVENTION The invention is in the field of phased array antennas, for transmitting and/or receiving radiation, which employ a plurality of signal radiation elements in relatively fixed positions. As used herein, radiation elements" means array elements for transmitting and/or receiving radiation of desired frequencies such as are used for radar, sonar, and other applications.
Phase shifters associated with the various radiation elements permit the beam shape and directivity of the array to be varied. A linear (straight line) array varies the directivity in a single plane, and a planar array can vary the directivity in two planes. The elements of the array may comprise dipoles, microwave horns, or other suitable radiators for high frequencies such as are used for radar, or piezoelectric transducers such as are used for sonar. The directivity and other desirable characteristics of the array such as low side lobe energy can be further improved by properly controlling the properly amplitude response of the various elements, in addition to the phase control.
One type of array provides a fixed tapered amplitude response along each row of radiation elements, the amplitude being greatest at the center and tapering to lesser amplitudes toward the end elements. Phase control means vary the phase shifts of the phase shifters associated with the elements, so as to aim or steer the array beam pattern in a desired direction or to cause the beam to scan over an angle of space. Various mechanical and electrical types of phase shifters have been employed, and have been controlled by electrical or mechanical means for varying the phase shift. The amounts of phase shift required at the different phase shifters for causing the array to form a desired beam shape and aim it in a given direction can be detennined mathematically. When in operation, the desired beam shape and direction or scanning pattern is determined by a human operator or by electrical circuitry, and logic circuits then set the phases of the elements so that the array provides the desired beam direction or scanning.
Continuous control of each phase shifter over its phaseshifting range can provide the most precise control of the beam shape and directivity, but is complicated and costly. Therefore. it is advantageous to control the phase shifters in discrete steps of phase shift. For example, a prior system employs 48 radiation elements per row, and each of the phase shifters is controllable in six phase-shift steps of 180, 90, 45, 22%", l 1%, and 555. The desired phase shift is determined for each element for every desired beam shape and position, and an adjacent step value of phase shift is then assigned. That is, the desired value of each phase shift is rounded off to an available value. This arrangement of discrete phase shifting, though simpler and less expensive than continuously variable phase control, results in less-than-perfect beam shape and control over its directivity, because of the roundoff tlflors of phase shifts. The use of a greater number of smaller steps of phase shifts improves the performance, whereas the use of a smaller number of larger steps of phase shifts reduces the cost and complexity. Therefore, a compromise is made between performance on the one hand and cost and complexity on the other hand. Thus, a need has existed for eliminating or reducing this compromise.
SUMMARY OF THE INVENTION Objects of the invention are to provide an improved phased array antenna system; to provide such a system with improved beam directivity and/or simplified phase-shift devices and control circuitry; and to substantially reduce or eliminate the need for compromise between performance and complexity.
The invention comprises, briefly and in a preferred embodiment, an improvement in a phased-array system having a plurality of radiation elements each having a phase shifter associated therewith and adapted to shift phase in a limited number of discrete steps, and means for controlling the phase shifters to cause the beam or radiation pattern of the array to have a desired shape and to aim, steer, or scan in a desired manner. In accordance with an important feature of the invention, circuitry is provided for altering the phase shifts of certain of the phase shifters, at certain times, to compensate for the roundoff errors of the other phase shifters.
In a preferred embodiment of the invention the phase shifter settings are repetitively determined in rapid sequence by logic circuits, and the circuitry of the invention functions to continuously determine (monitor) the accumulated total roundoff error of the phase shifter settings which have been determined. Whenever the accumulated error exceeds a certain value as compared with an adjacent step-range of the next successive phase shifter to be set, the circuitry causes this phase shifter to be set at a stepvalue adjacent to that which it normally would be given, thus tending to compensate for and eliminate the effects of the accumulated errors. This procedure of monitoring, comparing, and compensating occurs repetitively during operation of the system.
In a further and more sophisticated preferred embodiment of the invention, for use with systems in which signal gain or amplitude is tailored or weighted across the array, circuitry is provided to alter the roundoff errors in the monitor circuit by a weighting factor based on the ratio of amplitude of the preceding array element to that of the element for which the phase shifter is currently being set.
The invention permits the use of simplified phase shifters, in some cases having only half of the number of phase-shift steps as in prior art arrangements (three instead of six steps of phase shift, for example), with no degradation of beam pointing accuracy. This not only reduces the cost and complexity of the phase shifters, but also lowers the cost and complexity of the digital logic circuitry which drives the phase shifters. The reduced complexity improves the reliability of the system. The importance of these improvements will be more fully appreciated if it is realized that a typical array antenna employs thousands of phase shifters and associated digital drive circuits.
BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is an electrical diagram of a preferred embodiment of the invention, and
FIG. 2 is an electrical diagram of specific phase-shift control circuitry employed in a preferred embodiment of the invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the invention embodied in a radar system of the type comprising a linear array antenna utilizing discretestep phase shifters to achieve beam forming and steering for transmitting and receiving. The antenna, designated generally by reference numeral 11, comprises a plurality of radiation elements 12 (also individually designated R1, R2...RN) arranged in linear array and grouped into two subarray units symmetrically disposed with respect to the center of the array. A plurality of branch feed lines 13 are respectively connected to feed signals to and from the radiating elements 12 via discrete-step phase shifters 14 (also individually designated Pl, P2...PN) the phases of which are controlled by signals applied thereto from a steering command signal source 15 over connections 17 for one subarray and 19 for the other subarray.
Each of the branch feed lines 13 of the left-hand subarray connects via a cross guide coupler 21 to a common series feed line 23, and the branch feed lines 13 of the righthand subarray similarly connect to a common series feed line 25 via cross guide couplers 21. The cross guide couplers 21 are individually designated Cl, C2...CN. Terminations TI and T2 are provided at ends of the series feed lines and of the branch lines, respectively, for impedance matching purposes.
Further details of the series feed configuration are disclosed in Kinsey U.S. Pat. No. 3,258,774; further details of a preferred embodiment of the phase shifters 14 are disclosed in Hair U.S. Pat. No. 3,290,622; and further details of a preferred embodiment of the cross guide couplers 21 are disclosed in Kinsey U.S. Pat. No. 3,230,483; these patents being assigned to the same assignee as the present invention. The two subarray units connect through a hybrid junction 27 to a transmitter 29 and to a receiver 30, both of which may be of conventional construction and operation. The hybrid junction 27, which may be of conventional construction, is shown as the four port type providing two 3-db. terminals 28 respectively connected to ends of the series feed lines 23 and 25 and also providing sum and difference terminals 31 for connection to the transmitter 29 and receiver 30. The arrangement may be commutated so as to electrically reverse the sum and difference outputs at terminals 31 in synchronism with the alternate transmit and receive functions of the system. A timer 33 synchronizes the functioning of the transmitter 29, receiver 30, and steering command signal source 15.
The arrangement thus far described with reference to FIG. 1 may comprise the arrangement described in more detail in Connolly U.S. Pat. No. 3,380,053, assigned to the same assignee as the present invention.
In accordance with a preferred embodiment of the present invention, an error compensation circuit 36 is interconnected with the steering command signal source and functions to reduce or eliminate the effects of the accumulated roundoff errors of the settings of the incremental phase shifters 14.
The functioning of the invention will now be described generally with respect to FIG. 1, and then will be described in greater detail with respect to the specific embodiment shown in FIG. 2.
The antenna 11 is capable of providing various desired radiation beam widths and directions in a horizontal plane (assuming linear array 1 1 is positioned in a horizontal plane), and a stacked array of these linear arrays provides a planar array which can control the beam shape and direction both horizontally and vertically. This beam pattern is controlled by setting the phase shifters 14 to various values of phase shift, in wellknown manner. The phase distribution needed across the array to achieve a desired beam pattern may be determined in various known ways, such as from Fourier-transform theory. Also, it is known practice to provide a tapered amplitude distribution across the array to reduce undesired side lobes.
The phase shifters could be properly set by means of a memory device which stores all desired phase-shifter settings for all desired beam shapes and directions. For a planar array having thousands of phase shifters, and even for a linear array having 40 or more phase shifters, this would require a very large memory and has the further disadvantage of being inflex ible as to any desired beam shapes or directions other than stored in the memory. Therefore, numerous prior systems have employed an arrangement of logic circuitry which repetitively computes the required phase shifts, for the phase shifters 14, in synchronism with the radar or sonar transmitted pulse repetition frequency. The required phase shifts are computed by the circuitry from a suitable formula stored in memory and the phase shifters 14 are set accordingly, in a short time a few microseconds, for example) immediately before or after the transmission of each radar or sonar pulse, or at both times if different phase settings are desired for receiving than for transmitting. This rapid repetitive setting of phase shifters need not cause any loss in system operational time, because the same short time periods are required for other functions such as operation of the transmit-receive switch. As will be apparent subsequently from the description of FIG. 2, the logic circuitry computation of the required phase shifts need not be limited to the short time intervals of setting the phase shifters.
It is desirable for each of the phase shifters 14 to be adjustable in discrete step-values of phase shift, for example as disclosed in the aforesaid U.S. Pat. No. 3,290,622 (Hair) and 3,380,053 (Connolly), so that they can be set to their various phase-shift values by means of digital or binary-type pulses provided by the steering command signal source 15. Examples of phase shifters that have been employed, are four-step phase shifters having selectable phase-shift values of 180, 45 and 22%", and six-step phase shifters having selectable phaseshift values of 90, 45, 229?, I l'/4 and 595. Since the phase-shift values computed by the logic circuits in the steering command signal source 15 must be rounded off to an adjacent value available at the respective phase shifters 14, it is evident that in order to increase the accuracy of beam shaping, pointing, and scanning, it is necessary to increase the number of step-values of phase shift in the phase shifters 14. This not only increases the complexity of the phase shifters l4 and the circuitry of the steering command signal source 15, but also considerably increases the wiring complexity as will be evident when it is realized that, for six-step phase shifters 14, each of the wires shown (in connections 17 and 19) connected to individual phase shifters 14 must consist of a group of six wires, in addition to the common or ground" connections to the phase shifters.
The error compensation circuit 36, in accordance with the invention, improves the accuracy of the antenna array without the necessity of increasing the number of step-values of the phase shifters. Alternatively, for a given required accuracy, the invention permits a reduction in the number of step-values required of the phase shifters. The error compensation circuit 36 comprises, in a preferred embodiment which will be described with respect to FIG. 2, a monitor circuit for accumulating the roundoff errors of the phase shifters as their settings are determined by the steering command signal source 15. The value of the accumulated errors is temporarily stored, and whenever this accumulated error exceeds a certain value as compared with an adjacent step range of the next phase shifter to be set, correction circuitry causes this phase shifter to be set to its adjacent step value so as to partly or completely compensate for and eliminate the effects of the accumulated roundoff error. This procedure occurs repetitively, whereby each time the phase shifters have all been set the effect of accumulated roundoff error is minimal or nonexistent.
Now referring to Fig. 2, the timer 33 and the Steering Command Signal Source 15 are the same as shown in FIG. I. The Steering Command Signal Source 15 is of conventional design, and is shown as providing a 12-bit output 41 of which each sequential group of 12 bits represents a phase shifter setting desired for one of the phase shifters 14. The l2-bit command signal 41 is fed into an adder 42, which adds thereto an eight-bit recirculating roundoff error signal as will be described. The l2-bit output of the adder 42 becomes split, the four most significant bits thereof being fed into a four-bit phase signal channel 44, and the eight least significant bits. which constitute the roundofi error, being fed into a roundoff error channel 45. The output of the four-bit phase signal channel 44 is connected via line 46 (which actually consists of four conductors although a single line is shown for convenience) to the input of a commutating switch 47 which functions to alternately commutate the phase signals to a left subarray shift register 48 and a right subarray shift register 49. The commutating switch 47 is electronic, and its commutating rate is controlled from the timer 33 via a time divider 51 so that it will commutate the phase control signals properly to the left and right subarray shift registers 48 and 49. An inverter 52 is provided in the connection to one of the subarray shift registers. to provide proper phase distribution across the array.
In the example shown in FIG. 2, each subarray may consist of 21 radiation elements and associated four-step phase shifters and therefore each of the subarray shift registers 48 and 49 has a capacity of 84 bits, i.e. four bits for each of the 2i phase shifters. The subarray shift registers 48 and 49 are sequentially loaded, in series, with the phase shift control bits, and at appropriate times such as just prior to or following the main pulse of radar or sonar radiation, a phase shifter loading trigger circuit 53 (which may be under control of the timer 33) gates on a plurality of gated drivers 56 and 57, respectively connected in the left and right subarrays which set the phase shifters 14 in accordance with a particular distribution pattern as has been determined by the steering command signal source 15.
As thus far described with respect to FIG. 2, the settings of some of the phase shifters will be erroneous, due to roundoff error, since the phase shifters are set by only the four most significant bits of the l2-bit steering command signal. In accordance with the invention, the eight roundoff error bits are fed to the roundoff error channel 45, from which the output signals 61 thereof are fed through a delay network 62, having a delay time equal to one word of the steering command signal, to a multiplier 63 in which the roundoff error signal is multiplied by a weighting factor that is derived from the amplitude distribution across the array elements, as will be described. The output signals 64 from the multiplier 63 are applied to an input of the adder 42, where they are added to the 12-bit steering command input signals 41. Thus, the eight-bit roundoff error signal is repetitively added to the incoming 12- bit steering command signal in the adder 42, and whenever the accumulated roundoff error becomes sufi'lciently great, it will affect the four-bit most significant part of the signal that is applied through channel 44 to the phase shifter control circuits thus altering the phase setting of various phase shifters in a manner to correct for accumulated roundoff error.
The multiplier 63 is not necessary to the operation of the invention if the amplitude distribution is uniform across the array, or if compensation for a weighted amplitude distribution is not required.
In order to factor in the effects of a weighted amplitude distribution across the array when correcting for roundoff phaseshift error, in accordance with the invention, a shift register 66 is provided for storing the amplitude distribution pattern of the array. A signal delay network 67 is provided in a feedback loop around the shift register 66, and has a delay period equal to one word of phase shifter information. The shift register 66 is actuated, and the amplitude distribution therein is circulated therethrough via the delay device 67, at a rate deter mined by the timer 33. The input and output of the shift register 66 are applied to a divider circuit 68, which divides the output of the shift register 66 by the delayed input thereto, thus generating at the output 69 thereof a signal based on the ratio of the amplitude of the preceding array element to that of the array element for which the phase shift is currently being determined. In a preferred type of weighted amplitude distribution, the amplitude characteristic will be relatively greatest at the center of array, and will taper toward lesser values at the ends of the array.
The amplitude weighting signals are applied via connection 69 to the multiplier 63, where they are multiplied by the successive roundoff error signals, so that the phase control improvement achieved by the invention will be all the more accurate due to the phase correction being thus based on the relative amplitudes of the preceding elements in which the roundofl' errors have occurred.
As has been pointed out above, the invention repetitively monitors, and corrects for, the accumulated roundoff errors and thus permits considerable simplification of the system by permitting the use of phase shifters having relatively fewer steps of phase shift, or. alternatively, improves the accuracy of beam shaping and steering without the necessity of employing more complicated and more costly phase shifters and associated circuitry for providing a greater number of finer steps of phase shift as has been necessary in accordance with the prior art.
ALthough the preferred embodiment, as shown, uses parallel format, sequential word arithmetic binary logic circuitry, the same function can be performed with serial format, sequential word logic or completely parallel arithmetic circuitry, as well as analog or hybrid analog and digital computational circuitry. Also, while the invention has been described as applied to a series-feed array system, the invention can also be advantageously used in arrays employing other feed arrangements such as corporate feed, space feed, etc.
While preferred embodiments of the invention have been shown and described, various other embodiments and modifications thereof will become apparent to persons skilled in the art, and will fall within the scope of invention as defined in the following claims.
l. A phased array antenna system having a plurality of radiation elements, a plurality of phase shifters respectively associated with said radiation element, antenna-steering means including a source of successive steering command signals each indicative of phase shift values providing a desired antenna radiation characteristic and further including phase shifter control means connected to said phase shifters and to said command signal source to receive therefrom said steering command signals, said phase shifter control means being responsive to said steering command signals to set said phase shifters at phase shift values approximating said desired values of phase shifts whereby roundoff errors occur for the settings of at least some of said phase shifters, monitoring means connected to said antenna steering means for deriving therefrom a roundoff error signal indicative of the value of phase shifter setting error, and compensating means connected with said monitoring means to receive said roundoff error signal therefrom and to recirculate the error signal to said antenna steering means for addition thereby to the next successive steering command signal thus accumulating roundoff errors for providing an adjusted phase setting of at least one of said phase shifters to at least partially compensate for said accumulated roundoff errors.
2. A system as claimed in claim 1, in which the amplitude characteristics of said radiation elements are given a nonuniform distribution, and including storage means for storing the amplitude distribution of said radiation elements, and weighting means connected with said storage means and with said monitoring means, said weighting means being adapted to apply to said accumulated roundoff errors a weighting factor based on the relative amplitude characteristics of adjacent radiation elements.
3. A phased array antenna system having a plurality of radiation elements, a plurality of phase shifters respectively associated with said radiation elements, each of said phase shifters being adapted to shift phase in a limited number of discrete step-values, antenna-steering means including a source of digital steering command signals for providing successive sets of multibit digital signals each comprising a number of bits greater than said number of phase shifter step-values and being indicative of desired step-values for said phase shifters to obtain desired radiation characteristics of said array of radiation elements, said antenna-steering means further including control means responsive to a number of the more significant bits of each set of multibit digital signals of respectively setting said phase shifters to discrete phase-shift settings adjacent to said desired phase-shift values whereby roundoff errors occur in the settings of the phase shifters, monitoring means responsive to a number of the less significant bits of each set of multibit digital signals thereby to obtain a measure of the value of said roundoff errors and to output a roundoff error signal, and compensating means connected to receive said roundoff error signal from said monitoring means and to recirculate the error signal to said antenna-steering means for addition thereby to the next successive steering command signal for providing an adjusted phase setting of at least on e said phase shifters to at least partially compensate for said roundofi errors.
4. A system as claimed in claim 3, in which the amplitude characteristics of said radiation elements are given a nonuniform distribution, and including storage means for storing the amplitude distribution of said radiation elements, and weighting means connected with said storage means and with said monitoring means, said weighting means being adapted to apply to said accumulated roundoff errors a weighting factor based on the relative amplitude characteristic of adjacent radiation elements.
5. A system as claimed in claim 4, in which said amplitude distribution is characterized by the greatest amplitude being at the center of said array of radiation elements and tapering to minimum amplitudes at the outer edges of said array, said source of digital-steering command signals being adapted to provide said successive sets of digital signals first for the center elements of the array and thence for elements successively outwardly from the center, whereby said weighting factor is successively based on ratios of lesser amplitude characteristics.
6. A system as claimed in claim 3, in which said control means, said monitoring means and said compensating means comprise, in combination, an adder having first and second inputs with said first input connected to receive said multibit digital signals from said source of digital steering command signals, a phase signal channel connected to the output of said adder and adapted to receive only the relatively more significant bits of said digital signals outputted thereby and further adapted to control said phase shifter step values in accordance with these relatively more significant bits, a roundoff error channel connected to the output of said adder to receive therefrom only the relatively less significant bits of said digital signals and connected to output a roundofl error signal to said second input of said adder thereby to temporarily circulate and accumulate said roundoff errors until the value thereof is sufficiently great to affect the value of said relatively more significant bits of the digital signals outputted by the adder to thus provide said adjusted phase setting.
7. A system as claimed in claim 6, in which the amplitude characteristics of said radiation elements are given a nonuniform distribution, and including a recirculating shift register loaded with the amplitude characteristics of successive radiation elements, delay means interposed in the recirculating path between the input and output of said recirculating shift register, a divider having inputs respectively connected to the input and output of said recirculating shift register so as to provide a weighting factor based on relative amplitudes of said radiation elements, a multiplier interposed in the roundoff error recirculating path between said roundoff error channel and said second input of the adder, and means connecting said weighting factor output of the divider to an input of said multiplier, whereby said roundofi' errors are altered by said weighting factor.
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|U.S. Classification||342/377, 367/138, 342/372|
|International Classification||H01Q3/30, H01Q3/34|