US 3613574 A
Abstract available in
Claims available in
Description (OCR text may contain errors)
United States Patent 1 1 3,613,574
[ Inventor -W 3,220,343 11/1965 Wasserman 101/93 RC 1 3,331,3l6 7/1967 Bretti l0l/93 RC 1 pp 797,979 3,364,852 1/1968 Ragen 101/93 RC [221 Filed F I0, 1969 3,420,166 l/l969 51115 et al. 101/93 RC Pitemfid 19, 1971 3,465,866 9/l969 Gehring et al.. l0l/93 RCX 1 Auisnee p y m 3,420,164 1 1969 Lee 101/93 RC New York, N Y
Pnmary Exammer-Wflham B. Penn Assistant Examiner-E. M. Coven 5 SELECTIVE PRINTING MEANS INCLUDING A Attorneys-Charles C. English, Rene A. Kuypers and William ROTATAILE DRUM HAVING INTERSPERSED Cicav" COMPLEMENTARY CHARACTER SE'IS THEREON "Cm won't-m AI lSTRACT: 'l h1s invention relzrtes to a printer device that I prints on a medium whlch moves 1ncrementally 1n a honzontal U.S. CL....................................................... position The print drum arranged into "B of print whgclg lol/ l wherein a first set comprises print wheels which carry one-half 1 ll. cl of the characters and a second a comp ics print 1  M olSeu-eh 101/93 RC, wheel that gary the remaining cha agtg g The print wheel; I 197/133 of a set carry identical characters and therefore are the duplicate of one another. To insure being able to print the required information at a particular position, the medium is  Cm incremented horizontally in steps so that the print position is UNITED STATES PATENTS opposite a wheel of one set during the first push and then is 2,773,444 l2/ I956 Whitney l0l/93 RC moved so that the same column position is opposite a 3,1 14,491 l2/ [963 Wright l97/ l 33 X character wheel of the second set afier the second push. if the 3,128,693 4/1964 Thiemann 101/93 RC character is not printed by a print wheel of the first set it is au- 3,l57,l 15 11/1964 West at al. 101/93 RC tomatically printed by a print wheel of the second set.
TO SPROCKET AMPLIFIER mix; 46 (44 CONTROL PATENTEDUBT 19 I97! 13b 4 sum 20F 4 TO SPROCKET AMPLIFIER 70 72 74 76 COIL goon. om a o. 4 2 3 s2 s4 ee 68 PRINT PRINT PRINT PRINT Fig. 5 4 2 3 COMP COMP COMP COMP HF IF 1 1 I 1 49 mv 1 I2 60 58 56 54 52 50 48 COUNTER WHEEL R50 R56 age m zc WHfEL la] 30 T TT l2 LINES "III I Masns rncwomc A I IIOTATAILE DRUM-IIAVING COMPLEMENTARY CHARACTER SETS THEREON This invention relates in general to a printer mechanism. In particular, the invention relates to the printing of data on a document that is incremented horizontally through the printer.
A recognized of known prior art printer devices of this type has been their relatively slow speed. In the case of a document that moves in a horizontal while being printed, the above-mentioned lhortcominghas resulted in a relatively slow document through-put. The relatively slow speedofknown priorartdevicesresultsfromthefactthata the wheel. Consequently. to insure that each print or column positional the document sees all of the charactersa complete revolution of the print wheel must be generated. This is time consuminganditistheprimaryr'ea'sonwhythereissucha slow through-put of documents through the machine.
In summary, the present invention provides increased throughput of a document by splitting the characters over two print wheels. Each group of characters as split is duplicated on another wheel. The two duplicate wheels form a set and any one has approximately one-half of the total characters. By splitting up the total characters over two print wheels, it'is necemary that any c'olurnn position bemade to pass bothprint wheels inorder to insure being able to print information at that column. To accomplish the above, the character groups are arranged so that on onehorizontal push the card column sees one group of characters andon the following push the remaining group of characters is'seen. By splitting the total'characters over several wheels, the diameter of the print wheel can be reduced accordingly and for the same peripheral displacement as the prior art, the shaftrpm. can be doubled. Thk accounts for the high print speed and the high through-put speed'of the document.
Referring to the'drawings,
FIG. I depicts a general arrangement of the printed mechanism;
\ FIG. 2 depicts the arrangement or the print wheel and FIG. u shows the character positioned thereon;
FIG. 3 depicts a portion of the print wheel in conjunction with the tabulating card which is shown at various incremental stages of its horizontalm'ovement;
FIG. 4 shows the print mechanism;
FIG. 5 shows the logic utilized in conjunction with the present invention;
FIG. 6 showsthe logic of FIG. 5 in greater detail;
FIG. 7depicts the logic control circuit in greater detail;
FIG. 8 shows a variation oithe spacing on the print wheel to obtain improved print quality;
FIG. 9 shows FIG. 8 ins greater detail wherein is obtained by offsetting the characters.
Referring now to FIG. 1, there is depicted the arrangement of the print drum I8, punch 20 and guide raill4 with respect to the tabulating card I: which is moved in a horizontal direction during the print operation. In the present embodiment, the tsbulating card 12 is moved from right to left by means of the pusher blade platform Ill. The card 12 is guided in its movement by the upper guide rail l4. The pusher blade platform 10 causes the tabjulating card I2, which by way ofexampk is an 80-column l-lollerith card, to increment two columns at a time. The card I2 is moved in a leftward direction until the various columns thereof are positioned underneath the print drum I8. The print drum I8 is rotated by the print drum drive motoi 16. While the card 12 is moving in a leftward direction and various indicia are being printed along the uppermost row thereof it will also become positioned under the punch die 20. Therefore, the code corresponding to the printed indicia on the upper portion of the card I2 is punched in the l2 rows comprising the 80column Hollerith card.
print quality around the periphery of FIG. 2 shows the print wheel I. utilised In the instant invention. The print wheel 18 is depicted as if the etch'mglla is peeled oil the drum and laid out. The laid-out portion isshown in greater detail in FIG. 2a. The etching Ida is comprised of four print bands I, 2,3and 4. Print band I iscomprised of3l characters and print band Zis comprbd of 32 characters to make up a total of 63 characters and blank. Print band 4 is identical to printband I and print band 3 is identical to print band2. Printbands I and4compriseaflrstset24andprint bandsiIandJconrpriseasecond set 23. 7
By referring now to FIG. 3, it will be shown how the print drum 18 including the print bands I-'4 operates in conjunction with the card 12 which horizontally in Increments in the print mechanism 10(see FIG. I). Let us assume that it is required to print the characters "8 9 P R 6 P" along the topmost row of the tabulating card 12. lnforrnation to be printed is coded in no. a by enclosing the symbolin brackets. These six characters are to be printed 10! the first six column positions of an 80-column Hollerith card. The card I2 is brought to the start position by the pusher blade platform 10 (see FIGS. I and 3a). The pusher blade platformis energhed by means not shown. The card 12 lathe incrementally pushed in a lefiward direction two column positions so that column one of the card 12 is under print wheel 2 whereas column 2 is positioned under print wheel I. By referring to FIG. In it can be seen that print band 2 does not contain the numeric, "8.
However the numeric, 9," can be printed in column 2 since band I of the print wheel 18 is positioned directly under that particular column. Accordingly, during the first push down in FIG. 3b only the character 9" can be This is inthe character 9" dicated in code form in FIG. 3b by removing the brackets.
In the Instant invention, a card cycle comprises 25 milliseconds. This 25 milliseconds is broken down into approximately l5 milliseconds wherein the card I2 is stationary and in column 2, for example, is being printed. The ten remaining milliseconds comprise the period wherein card I2 ismoving from the position shown in FIG. 3b to that shown in FIG. 3c. Since there are only half the characters on the two wheels of a set the print drum 18 can make a complete revolution in the approximately I5 milliseconds that the card 12 is stationary.
In the card cycle, the card 12 is pushed incrementally in a leftward direction two column widths as shown in FIG. 3c. As can be readily seen, column I is now under print band 4 whereas column 3 is under print band 2. For ease of understanding, an X is placed through the character on the drawing to indicate that the latter was printed on a prior push. Therefore, an X is placed through the 9" to indicate that it was printed in its previous position shown in FIG. 3b.
Since columns I and 3 are now respectively positioned under print band 4 and band 2, the card I2 is in a condition whereby information can be printed thereat. Accordingly. the indicia 8" and I are printed in a manner which will be explained in greater detail hereinafter.
After the printing of characters in card column 1 and card column 3 on the print card 12 asshown in FIG. 30 (indicated by a removal of the brackets), the card is again pushed in a leftward direction to the column positions as shown in FIG. 34. Thus, column 4 which was under print band I now becomes positioned under print band 3; similarly, column 5 is positioned underneath print band 2 and column 6 is positioned under print band 1. Viewing columns 4, 5 and 6 of the 'column card 12 it becomes apparent that only column 4 which is under print band 3 is under the proper print band (see FIG. In) so that the R" can be printed.
Alter the "R" has been printed in column 4 the card 12 is again pushed in a leftward direction a distance of two column widths (see FIG. 3:). Hence, column 5 is positioned under the print band 4 and the column 6 is positioned beneath the print band 3. Accordingly, since the print bands 3 4 contain the required characters the indicia 6" and "P" are printed during the period that the card is in the rest position. No information is to be printed in the column 7 in the example shown.
The fast throughput of the cards in the printing arrangement of the instant invention can be shown in an approximate manner by the following example. For an 80-column card it would require 41 horizontal incremental pushes wherein milliseconds are required for printing purposes and 10 milliseconds are consumed during which the card is in transit. The time required would be approximately 1,000 milliseconds to print information along 80-column positions. Contrasting this with a printing device that would use a wheel but of twice the diameter of the instant invention but containing all the 63 characters and blank, the time consumed would be approximately 1,600 milliseconds. This results from the fact that the time required for the card to be stationary would be twice the time required for the instant invention since the wheel diameter is twice as large and all the characters are on one wheel. The time that the card would be moving from position to position would be the same as in the previous example. This would account for approximately 1,600 milliseconds for the one wheel arrangement or nearly twice as long as it would take for the arrangement of the instant invention. As a practical example, the instant invention has a through-put of approximately 40 cards per minute whereas the prior art would have a through-put of approximately cards per minute.
Referring now to FIG. 4, there is shown the basic print mechanism as utilized in this invention. Asprocket wheel 28 having 33 spaced teeth 30 is positioned on the shaft 27. The print drum l8 incorporating the two sets of identical characters in the manner previously described and shown in FIG. 2a is also positioning on shaft 27. The 33 teeth 30 on the sprocket wheel 28 are composed of 32 teeth which correspond to the 32 rows of characters shown in FIG. 2a and one tooth for synchronizing purposes.
The variable reluctance pickup 80 is positioned near the periphery of the drum I8 and the teeth 30. As is well known in the art, as the teeth 30 pass underneath the pickup 80, the reluctance (i.e., the magnetic resistance) of the pickup is changed thereby producing a pulse output for every tooth position. By use of pulse counting circuitry every tooth position that moves past the inductance pickup 80 causes a counter to advance one count. Each of the 63 characters and blank shown in FIG. 2a is represented by a certain binary count. Therefore, 31 of the 33 teeth arranged along the periphery of the sprocket disc 28 is opposite two of the 63 characters (see FIG. 4) and one tooth is opposite just one character. In other words, each character is represented by a binary number between 0 and 32. By way of example, the sprocket tooth 29 is opposite the two characters .A" and I." It is noted that sprocket tooth 22 is also opposite two sets of characters. This can be clearly seen in FIG. 2a wherein print bands I and 4 comprise the first set 24 and print bands 2 and 3 comprise the second set 23. The significance of the two sets of characters opposite each sprocket tooth 22 will be explained in greater detail in a later section of the specification.
Referring again to FIG. 4, the embossed indicia or the characters etched on the print wheel 18 are made to roll against the ink roll 25. Consequently, the characters are always inked preparatory to a printing operation. Positioned opposite the characters on the print wheel 18 is the hammer mount 32. The hammer mount contains the hammer 34 which is adapted to be engaged by the linkage 33. The linkage 33 is caused to revolve around the pivot 38. The linkage 33 is caused to move in the clockwise direction shown by the arrow by energizing of coil mechanism 40.
In operation, when the coil 40 is energized by appropriate circuit means hereinafter described, the linkage 33 revolves about the pivot 38 and causes it to strike the hammer 34. This occurs by magnetizing the extension which thereby causes linkage 33 to be attracted and the latter pivots. The card 12 which is not shown is interposed between the hammer mount 32 and the print drum is. At the appropriate period of time which is determined by synchronization means, the hammer causes the required letter or number to be printed at the proper column position. Consequently, the ink on the print drum 18 is transferred to the card 12.
In actuality, there are four print actuators all of which are similar in operation and construction to that above-described. Two of the four actuators are oriented in the manner shown in FIG. 4. The remaining two actuators are inverted to that shown. This arrangement is required for maximum space utilization.
FIG. 5 shows the logic arrangement required to perform the printing operation of the instant invention. The information to be printed on the card 12 is stored in the memory 42. The memory 42 stores data that utilizes a l2-bit code. Since data which is stored in a 12-bit code is an inconvenient one to work with, the l2-bit code is converted into a simpler six-bit code. This is accomplished by means of the decoder 44. A decoder is a well-known device which will not be discussed in any great detail. In general, however, the decoder 44 comprises a plurality of six circuits which have certain combinations of signals from the memory in a 12-bit code jammed into their input terminals. The output signals of the circuits will result in a new six-bit code.
The decoder 44 converts the l2-bit information into a sixbit code which comprises five data bits and a sixth bit which is called a wheel bit. The five bits are utilized to give a decimal count of 32 which corresponds to the 32 rows of double characters on the print wheel (see FIG. 2a). The sixth bit determines which character set (viz, the first set 24 or the second set 23) is to be utilized in printing.
It will be recalled in the discussion of FIG. 2a that the first set 24 comprises the print bands 1 and 4 and the second set 23 comprises the print bands 2 and 3. The various indicia on the print bands can now be related to a certain binary count as well as to a character set which is determined by the sixth bit. An understanding of this relationship is aided by the binary table below. Thus, the middle column having a 0" sixth bit comprises the symbols of the second character set 23 and the right column having a l sixth bit comprises the first character set 24 (see FIG. 20).
(character let I) 6 (character set 2) lllll The above table indicates along the lefimost column the first five binary bits are required to select any two characters. For example, the binary bits 0011] select either a 7" or a P. Therefore, to select either of the above mentioned characters an additional piece of information is required. This additional selection is provided by the sixth bit position. Thus, to select a "7," there is no sixth bit required as shown by 5. In
other words, the sixth bit for a "7 is zero and its entire digital representation is 000] l 1. On the other hand, the "P" is shown as being placed in a column having a sixth bit or a one. Hence, P is represented by 1001 l l. The sixth bit for a 7" therefore determines that the character will be printed by the first character set 24, whereas the sixth l bit for a "P" determines that the character will be printed under the second character set 23.
Referring again to FIG. 5, let us assume that it is required to print the number 9 in the second column of the record member 12 as shown in FIG. 3b. The letter 9" is first stored in the memory data register 42. Since the information in the memory data register 42 is stored in a 12-bit code it isdecoded by means of the decoder 44 into a six-bit code. By referring to the binary table it can be readily seen that the first five bits of the numeric 9" are represented by the combination 0l00l. It
should also be noted that there is no sixth bit for a 9" so that the six-bit binar'y combination is 00l00l.
The first five bits Ol00l from the decoder 44 for the even column character are fed into register 50. In like manner, the wheel or sixth bit which is a 0" is applied to the input terminal of the wheel register 48. The first five bits and the wheel or sixth bit for the odd column character from the decoder are also fed into register54 and input to wheel register 58 as controlled by the control logic circuit 46. After loading of the odd column register 54 the memory address is incremented by one for addreming ofthe next column as indicated by the litre 111. TheregistersSlland$4sswellasregisters52 and66arefivestage registers which will be explained in greater detail hereinafter. On the other hand, the wheelregisters 48 and 58 are one-stage registers. The second input to the five-stage registers 50 and 54 and the wheel registers 41 and 58 emanates from the output of the control logic circuit 46. The control logic circuit 46 produces a signal which indicates whether the record member 12 (FIG. I) is in motion or is stopped as will be discussed in greater detail in FIG. 7. In other words, the control logic circuit 46 will only enable the print coils 70, 72,
- 74 and 76 to become enerp'zed when the record member 12 is not in motion. A photocell and moving duc mechanism which is mechanically synchronized with the pusher blade mechanism to provide the signal 112 indicating that the card 12 is in motion or is stopped.
When the registers 50 and 54 are filled and a signal indicating that the card 12 is not in motion from the control logic 46 is present, output signals are produced which are directed into the print comparators 64 and 68. It should be noted here that the logical blocks shown in FIG. 5 have a plurality of inputs and outputs, but for ease of understanding only a few such inputs and outputs are shown. Since there is no wheel bit present at the input of the register 48 (i.e., the sixth bit is a 0") and there is a "no motion signal from the control circuit 46, the register 48 will remain not set. However, the LOW output of the cleared register 48 is directed into inverter 49 whereby the output of the latter becomes HIGH. Therefore, the print comparator 68 will have two permissive signals present at its input terminals. The remaining input to the print comparator 68 emanates from the printer counter 60. Thh signal is produced by counting the sprocket teeth 30 by means of the read head 80 as is more clearly shown in FIG. 4. These sprocket pulses are counted by the counter 60 in a conventional binary fashion. As the counter 60 counts from zero to 32, the binary number in the counter will cause the corresponding characters shown in the above binary table to be opposite the read head 80. For example, when the tooth 29 (FIG. 4) is opposite the read head 80, the two identical sets of characters Al [A will be ready for printing and the number in the print counter will be l000l. Thus, a binary number from zero to 32 is always present at the output of the print counter 60 and is applied simultaneously to the comparators 64 and 68.
When the print counter 60 has a binary count of 0l00l the number 9" will be opposite to the read head 80. This binary countwill be present at the input of the print comparators 64 and 68. Since there is an identity of binary numbers at the two inputs ofthe printcomparatorflandthethirdinputfromthe controllogic46isperrnissive,snoutputiaproducedbythe print comparator. The output energbes the coil 76 and causes the numeric, 9, to be printed on the card 12.
Itshouldbenotedthattwooftheinputstotheprintcomparator64 are the same as that to the print comparator. The third input to the comparator64 results from the output of the wheel register 58. However, when all of the inputs into the register 58 are pennissive the latter will be set. The nonperrniaaive output signal of the register 58 will be applied to the input of the print comparator 64. Therefore, the information at the input terminals will not be gated by the comparator 64 and thecoil 72 will not be energmd. As can be sppreciswd from the above description, the wheel bits 48 and 58 always produce opposite outputs for the same input signal; It can also be appreciated that the 0" sixth bit for printing'a"9" will causethesecond characteraetutobeutilized.
The operation ofthe logic in FIG. 8 will now be functionally described to set forth the printing of the first two columns on the card 12. As seen in FIG. 3 an 8" is to be printed in column I and a 9" is to be printed in column 2. The 8" and the "9" bit information which is to be printed is storedinthe memory 42. This information is recorded in the memory in a l2-bit code. A 12-bit codeis well known in the art and is the code associated with the Hollerith card. However, since a 12- bit code is cumbersome to work with the information from the memory 42 is decoded into the simpler six-bit code by the decoder44.'l'heregisters50and54hsveacapscityoffive bits and are respectively loaded in two memory cycles. Thus, the8"whichistobe recordedin thefirst bitposition istrans' ferrcd to register 54 under the control circuit 46 during the first memory cycle. The information to be recorded in the second bit position or the 9" n transferred to register 50 also under the control of the logic circuit 46 during a second memory cycle. Summarizing the above loading procedure, information to be recorded in the ODD columns is stored in register 2 whereas information to be recorded in EVEN columns is stored in register 1. Therefore, register 54 is loaded with the binary information 01000 and register 50 is loaded with the bi nary 01001 as shown in the above binary table.
It is noted in FIG. 3b that during the first horizontal incremental push the second column is positioned under print wheel I which contains a 9" whereas the first column is positioned under print wheel 2 which does not contain an "8." The printing of the 9" and not the 8" during the first push occurs by the logic scheme in FIG. 5 in the following manner. The 9" is stored in the register 50 whereas the wheel bit is a 0" and is stored in register 48. Since there is a 0" wheel bit applied to the input of the wheel register 48 and control logic produces a gating signal when the record member I2 is stopped, the wheel register 48 is not set. The nonpermissive output tenninal of the flip-flop register 48 produces a permissive output signal at the output of inverter 49 which is applied as one of the input signals to the print comparator 68. When there is coincidence between the output of the print counter 60 and the output from the register'SO, the output from the comparator 68 is pennissive and the coil 76 is energized causing a 9" to be printed in the second column. After the 9" has been printed in the second column position the register 50 is cleared by means of a clear pulse (not shown). However, in the case of nonenergization of the coil the register 50 is not cleared until after the information in the register is transferred to register 52 as controlled by control logic 46. In the instant case, there is no information to transfer since it was cleared as the 9" was printed as noted above.
It can be seen from the above discunion that the 0" sixth bit for a 9" causes the latter to be printed under print wheel I of the second character set 23.
It will be recalled that the "8 was transferred to the register 50. The output of the register 54 was applied to the input of the comparator 64 along the output of the counter 60. The wheel register 58 has no wheel bit (i.e., a 0" bit) applied to its input in the same manner as it was not applied to the wheel register 48. However, the output of the wheel register 58 remains nonpermissive when it is not set since there is no inverter connected to its output and therefore the inputs to the comparator 64 are not properly conditioned and therefore coil 72 is not energized. It is clear that the wheel register 58 controls the coil energizstion so that there is no printing in the first column of the record member 12 as shown in FIG. 3b. In other words, the logic arrangement in FIG. 5 provides that no printing takes place when the first column is under print band 2 (character set 23).
After printing the "9" in the second bit position the card 12 is moved two column positions as shown in FIG. 30 so that the one column position is now under print wheel 4.' Therefore when the coil 72 (see FIG. 5) had not been energized the infonnation stored in the register 54 is transferred to the register 56 by meam of control logic 46. The outputs of the register 56 are applied to the inputs of the comparator 62 along with the outputs of counter 60. When there is coincidence between the signals the comparator 62 will produce a permissive output signal which will energize coil 70. Hence the 8" will be printed in the first column position. It can be seen again that the sixth bit for an "8 will cause the latter to be printed by the fourth print wheel which is part of the second character set 23.
Referring now to FIG. 6 there is disclosed a more detailed showing of certain stages of the logic shown in FIG. 5. 0n the right-hand side of the drawing there is depicted the 12 input lines from the memory 42 (see FIG. indicating the 12-bit code. The decoder 44 changes the 12-bit code into a six-bit code comprising five data bits and a wheel bit.
When the card 12 is in a nonmoving position as shown in FIGS. 3, 3a, 3b, 3c or 3d a signal is generated by the control logic 46 (see FIG. 5) which allows the register 50 to be filled with information. The signal from the control logic 46 is called a load register signal. This load register signal is applied as one of the two input signals to respective AND-gates 31, 33, 35, 37, 39 and 41. The second input to the respective AND gates is applied from the output terminals of the decoder 44. Let us assume that an A" is to be printed at a certain column position on the record member 12. Therefore the decoder will then change the infonnation which is in a 12-bit code to the six-bit code 01000] as can be seen from the abovebinary table. In other words, the wheelbit (the leftmost bit) will be applied to the AND-gate 3] and will be a "0, the fifth bit applied to the AND-gate 33 will be a l the fourth bit applied to the AND-gate 35 will be a 0," the third bit applied to the AND-gate 37 will be a 0," the second bit applied to the AND-gate 39 will be a "0," the first bit applied to the AND- gate 41 will be a I. The binary representation of an A" is shown opposite respective ones of the input terminals for ease of understanding.
Since the inputs to the AND-gates 33 and 41 are both permissive since they have "1's" applied thereto and the load register signal is permissive only these two gates will be enabled and a permissive output results. The permissive output from gates 33 and 41 are applied to the respective first and fifth stages of the resistor 50. The first and fitth states are thereby set. The second, third and fourth stages of the register 50 remain in the unset condition since the outputs of the AND- gates 35, 37 and 39 are all nonpermissive. The AND gate outputs 35, 37 and 39 are nonpermissive in view of the 0" data inputs. In like manner, the wheel bit 48 has a nonperrnissive input applied thereto since the AND-gate 31 is not enabled.
The comparator 68 in the instant invention is composed of IO AND-gates 43, 45, 47, 49, 51, 53, 55, 57, 59 and 61. The inputs to the AND gates are arranged in such a manner that they are connected to the output terminals of the corresponding numbered stages of the registers 50 and 60. Furthermore, the inputs to the AND gates are such that from each corresponding stage of registers 50 and 60, one input is HIGH or permisive and one is LOW or nonpermissive. This is signified in FIG. 6 by the fact that the inputs to the AND gates include an H" to signify a HIGH signal and an "I." to signify a LOW signal. These output; above result from the output terminals of the registers 50 and 60 when the stages are in the set condition or are storing a "1." For example, looking at the fiflh stages of reg'sters 50 and 60 it is apparent that the LOW output from register 50 and the HIGH output from register 60 are applied to the same AND gate when both register stages are storing ls." In like manner, since in the example stated the fourth stages of both registers 50 and 60 have a 0" stored therein, the HIGH side of stage 60 will actually be LOW and the LOW side of register 50 will be HIGH. In other words, the inputs to the AND gates of the comparator 68 will have the same HIGH and LOW amplitudes irrespective of whether the individual stages are set or unset (i.e., the stage scores a 1" or a "0). Therefore, it can be seen that when there is correspondence (i.e., the same infonnation is present in the counter 60 as is present in the register 50) all of the l0 AND gates of the print comparator 68 will have HIGH-LOW inputs and therefore the AND gates will not be permissed.
The LOW outputs of the 10 AND gates of the comparators 68 are respectively applied to the inverters 65, 67, 69, 71, 73, 75, 77, 79, 81 and 83. Therefore, the LOW inputs to the 10inverters 68 will produce HIGH signals at their output terminals which are applied to the AND-gate 53.
The eleventh input to the AND-gate 53 is applied from the inverter 63 output. The output of the inverter is HIGH since the wheel register 48 is not set. The register 48 is not set since the AND-gate 3] is not permissive since one of its inputs is a 0." Therefore, when there is coincidence between the out ut of the wheel register 50, the counter 60 and the LIGH'P' signal is present (i.e., card motion stopped as explained in FIG. 7), the AND-gate 53 will be permissed, since all I2 inputs are in a HIGH state. Therefore, the permissive output of the AND-gate 53 is applied to the coil I (coil 76 in FIG. 5) and causes the coil to fire and the letter A" to be printed. After the coil 1 has been energized the same signal is applied through delay line 55 and is directed back to registers 48 and 50. This signal causes the registers 48 and 50 to become reset.
Let us assume that letter 0" is to be printed in the second column of the record member 12 (see FIG. 3b). As can be readily seen, a 0" is not present on the first print wheel of drum 18 when it is opposite the second column. However, the 0" is present on the third print wheel and the second column is positioned thereunder when the card 12 is incrementally pushed two column positions as shown in FIG. 3c.
The binary representation of the 0" is 101000 as can be readily seen from the above binary table. The first five bits of "Q" are 0l000 and the sixth bit is a l." The binary representation of the letter 0" is therefore loaded into the register 50 (see FIG. 6). However, since the sixth bit for a 0" is a l the wheel bit 48 will be set. Hence, the output of the wheel bit 48 will have a permissive output which will be fed into the input of the inverter 63. However, since the inverter 63 causes the permissive input to become a nonpermissive signal the AN D-gate 53 could not in any way be enabled since all the inputs cannot be permissive as is required. In other words, even though there is coincidence between the output of the counter and that of the register 50, the AND-gate 53 cannot be enabled. Hence, coil 1 will not be energized.
While the record member 12 is incrementally pushed in a horizontal position to the new position shown in FIG. 3c, the information stored in the register 50 is transferred to the register 52. This is accomplished by connecting all the HIGH leads from the register 50 (not shown) to the AND gates shown in symbolic form as being a portion of the register 52. The AND gates shown in triangular form are precisely the same as those shown as receiving the output from the decoder 44. However, it is to be noted that there is no wheel bit register for reasons that will be explained hereinafter.
Thus, while the card 12 is in motion from the station shown in FIG. 3b to the station shown in FIG. 3c, the binary representation of the 0" (i.e., 0l000) will be transferred from register 50. The binary representation of a "Q" is shown beneath the brackets associated with the register 52. Since there is no wheel bit associated with the register 52 that information is not transferred from register 48 and instead register 48 is cleared.
Accordingly, when the control logic 46 (see FIG. 7) in dicates that the card is in motion, it will apply a transfer signal to the respective AND gates associated with register 52. The AND gate associated with the fourth stage will be permimed since it has a"l" applied theretoand hence the'fourith stage of theregiterSZwillbesetThefirsnsecondJhird'andfifth stagesoftheregisterSZwillnotbesetsincetheANDgatesassociatedtherewithwillnotbeperlnimedinviewofthefact that 's" are as one'of their inputs.
The respective outputs oftheregister 52 are directed into the comparator 66 which is identical in operation tothe cornparator 68. Comparator 66 receives the output from the register 52 and in addition receives the outputs from the counter 60. When there is a coincidence between the output from the register52andthecounter60thecoil3isflredandtheQ"is printed in the second column of the record member'l2. After the coil 3 has been fired its output is fed through the delay line 59 which is directed into the register 52. This resets the reglster 52 so that all states return to the unset condition.
As was mentioned above, there is no wheel bitlassociated with the register 52. The reason for thh is that if information is not printed .on coil lit will automatically be printed on coil 3.
Hence, no wheel bit a! required for the operation of register 52.Thesameholdstruewithrespecttoregisters2and4. Thus, ifinformation is not recorded by means ofthe-second coil (see FIG. 5) it will automatically be printed under the fourth coil 70. Therefore, a wheel bit will be associated with therep'ster54butwillnotbeassociatedwithregister56.
Referring now to FIG. 7, there is depicted a moredetailed showing of the logical control circuit 46 whose operation was described with respect to FIGS. 5 and 6. The photocell 85 and the moving disc 86 which is mechanicallysynchronised with the pusher blade mechanism. (see FIG. 1) provides a signal indicating that the card 12 is in motion or is stopped. Itshould be recalled thatprintingtakesplace whenthecard'ustopped. When the card is in motion. information is transferred from registers 50 to $2 and registers 54 to 56, and new information isloaded intotheregisters50and54,andthemernoryaddress is updated. The crescent-shaped disc 86 is interposed between the light source" and the photocell 85. When the crescent shaped member 86 is interposed between the light 87 and the photocell 85, it is apparent that no light rays impinge upon'the photocell and printing is allowed as detennined by the characters in the registers 50, 52, 54 and 56. On the other hand, when the crescent-shaped member 86 is not interposed between the light source 87 and the photocell 85, light rays impinge upon the latter which cause a high level signal to be fed into the input terminal of the amplifier 88. During this time no printing takes place. The signal generated by the photocell is amplified by the amplifier 88 and is simultaneously fed to the inverter 89 and to the stan-clock generator 90. The HIGH Light" signal applied to the input terminal of the inverter 89 produces a LOW "Light" signal at its output terminal. 'I1lis signifies that a HIGH leve Light" signal is converted to a LOW level signal. This signal is applied as one of the two inputs of the AND-gate 96. The LOW Llght" signal applied to the input of the AND-gate 96 will not enable the latter so that a clear signal for resetting the binary counter I10 to the state 0--00 will not be produced at this time.
It should be noted that the counter 1 I0 'I a conventional binary counter which is composed of the flip-flops 92, 93 and 94. In operation. the flip-flop 92 is set and reset with every input pulse from gate 91. In operation, the flip-flop 92 is set or reset with every input pulse, whereas the flip-flop 93 is set or reset after every two input pulses and flip-flop 94 is set or reset after every fourth pulse. The counter 110 is reset to the 0- 0-0 condition when operation is first begun by generating a start-clear signal which the OR-gate 95. The HIGH output signal from the Olt-gate 95 is applied to all of the reset terminals (R) of the flip-flops 9!. 93 and 94. When these counters are in a set condition the outputs lCI, 2CTand 3CT will be HIGH. It is apparent that when the counters 92, 93 and 94 are in a set condition, the outputs ICT and 2C! andJCT will be HIGH. It is apparent that when a counters 92, 93 and 94 are in a set condition, the'outputs ICTand 2? andfi will all be in a LOW state.
As long as a "Light" signal is applied to the start-clock generator 90 (i.e., the card 12 is in motion) the latter will produce a clock pulse every 40 microseconds. This clock pulse or stepping pulse will be applied as one of the two inputs to the AND-gate 91. The second input to the AND-gate 9| is derived from the output of the inverter 102. Thus, since the binary counter 110 which is composed of the counters 92, 93 and94isresetandisin theO-O-OstateJhethree inputsto the AND-gatel03, namely, 1C1, ICT and 3CT are all LOW.
Referring to the AND-gate 103, since the counters 92," 93 and 94 are not set, the three inputs lCT, JCT and 3C1 are LOW, the gate will not be permissed. Therefore, the output of thegate l03will beLOWsothataLOW7CTlisdeveloped. This signal is applied to the invertor 102 which causes the 'CT to become HIGH. The 7?? signal is applied to the AND-gate 91. Accordinglywith both inputs to the AND-gate 91 HIGH, thelatter will be enabled and a HIGH output signal will bespplied to the input toggle terminal (T) of the flip-flop 92.
Accordingly, the flip-flop 92 will be set and cause terminal ICT to be HIGH and the terminal in to be LOW. The output of the tenninal ICI is applied to the input the flip-flop 93. However, this high output signal applied to the input of the counter 93 will not cause the latter to be set. Hence, at this stage of the operation the binary counter is in the state 0-0- I When the binary counter is in state 00l (i.e., counter 92 is in a 1 state counter, 93 is in a 0 state, and counter 94 isO state the AND-gate 100 is permissed. Accordingly, a HIGH output signal is produced by the AND-gate 100. This signal enables the information stored in register 50 to transfer to register 52 and the information stored in register 54 to transfer toregister$6 (see FIGS. 5 and 6).
On the next pulse generated by the start-clock generator an d the AND-gate 91 will again be penniased since the HIGH 7C1 signal is still present. The HIGH output signal produced by the AND-gate 91 causes the counter 92 to toggle which resets the latter. Accordin y, the terminal ICT becomes LOW and the terminal I becomes HIGH. The terminal ICT is applied to the counter 93. This signal causes the latter to toggle so that the latter becomes s t Therefore, the terminal 2C1 is HIGH and the terminal 2C! is LOW. The HIGH signal from the terminal 2CT is applied to the input of the counter flip-flop 94 but will not cause the latter to become set. Accordingly, at this moment in time, the binary counter will have stored therein the number 0-1-0.
When the binary counter is in the state 0- l-O, the AN D- gate 99 is conditioned. This results from the fact that the terminal ZCI is HIGH because of the setting of the counter 93, and the terminals fi andifi are also HIGH since the counters 92 and 94 are not set. Accordingly. the AND gate 99 generates a clear signal for registers 50 and 54. Thus, the registers $0 and 54 will be cleared. However, if the character that had been stored in register 50 or 54 had been printed during the past print cycle the register would already be in a clear state and the cleared contents would be transferred at the 0- 0-1 count as previously discussed.
After 40 microseconds, another pulse is generated by the E-cloclt generator 90. This signal, in combination with the "ICT signal which is still HIGH causes the AND-gate 91 to be conditioned. Therefore, a HIGH input signal is applied to the counter 92 which causes the latter to become set. Therefore a HIGH signal results at the terflal 1C! and a LOW output signal results at the terminal ICI'. The HIGH tenninal ICT output is applied to the input of the counter 93. However, this signal will not cause the counter 93 to toggle. Therefore, the counter 93 will remain set and the counter 94 remains unset.
it Therefore at tlnis point in time the binary counter 110 starting at the leftmost counter 94 is at the count l- I.
Then the counter is in the state 0ll and the AND-gate 98 is conditioned. This results from the fact tlnat the terminals lCTand2C'IareHIGH,sincethecournters92and93are both set and the tenninalfi is also HIGH since the counter 94 is not set. The output produced by the AND gate 98 is applied to the memory 42 (FIG. This signal causes the information stored in a memory address to be read out of the memory 42 and to fill the register 50. It will be recalled that the information stored in register 50 will be printed in an ODD column number of the card 12. g
The next pulse from the start-clock generator 90 again causes the AND-gate 9! to be permised since thefisignal is still high. This signal will again cause the counter 92 to toggle so that the latteris reset. This causes the terminal ICT to go LOW and the terminal R? to o HIGH. This signal is applied to the input of the counter 93 which toggles of the IM- so that the terminal 2CT goes LOW and the terminal 2C'I goes HIGH. When the terminal 2C1" goes LOW it causes the counter 94 to toggle so that the output terminal 3CI is now HIGH and the output terminal E is LOW. Therefore the information stored in the binary counter at this point irn time is l-O0.
When the binary counter is in the state 1-0-0, the AND- gate I04 a conditioned. This results from the fact that the acrti nalianilonlaineetheeountetstiatetnieai nanfi and ET are also HIGH since the flip-flops 92 and 93 are in a nonset condition. The permissing of the AND-gate I04 applies a HIGH output signal to the OR gate This HIGH output signal causes the address of the memory (FIG. 5) to be advanced by one. The memory address is advanced by one so that the memory 42 will provide the next information for printing on the card 12.
The next pulse from the start-clock generator 90 together with the HIGH fi signal again causes the ANDgate 91 to be conditioned. The output of the AND-gate 91 causes the flipflop 92 to be toggled so that the terminal lCT becomes HIGH and the terminal rfi goes LOW. The HIGH output signal from the terminal ICT is applied to the input of the counter 93. However, this does not cause the latter to be toggled so that the terminal 20'! remains LOW and the terminal Fl remains HIGH. Also, the counter 94 also remains in the same state and therefore at this point in time the binary counter is in the state I-O- I.
When the binary counter is in the state l0l, the AND gate 97 is conditioned since the ICT, the set and the W signals are all HIGH. The 2'c r is HIGH since the counter 93 had not been toggled. The HIGH output signal of the AND- gate 97 is applied to register 54 (see FIGS. 5 and 6). Therefore, the readout information from the memory 42 is applied to the decoder 44 which fills the register 54. Thus, the information for the EVEN column location is made to fill the register 54 by the logic control logic 46.
On the next pulse from the start clock generator 90 the AND-gate9l is permissed since the W sigrnal is also HIGH. This HIGH signal causes the counter 92 to toggle. Therefore, counter 92 is reset so that the tenninal ICT becomes LOW and the terminal ICI' becomes HIGH. The LOW output signal of the terminal ICT is applied to the input of the flip-flop 93. The LOW input applied to the counter 93 causes the latter to toggle so that the terminal 2C1 becomes HIGH and the terminal 56 becomes LOW. The HIGH output of the terminal 2C1 is applied to the input of the counter flip-flop 94. However the condition of flip-flop 94 remains the same and there; fore the tenninal 3CI' remains HIGH the terminal 3C1 remains LOW. Therefore the binary counter has stored therein at this moment in time the binary number 1- l-O.
When the binary counter is in the state l-dithe AND- gate I05 is permissed in view of the state of the ICI, 2CI and 3C1 signal above described. When the output of the AND- gate I05 is permissed the OR-gate 101 is also permissed so that a HIGH output signal is produced thereat. This signal causes the memory address ofthe memory 42 (FIG. 5) to advance by one.
The next stepping pulse produced by the start-clock generator again conditions the AND-gate 91. The output pulse produced by the AND-gate 9Itoggles the flip-flop 92. The toggling of the flip-flop 92 causes the terminal ICI to go HIGH and the terminal E to go LOW. When the terminal ICI' goes HIGH it does not cause any change in the counters 93 and 94. Therefore the binary counter at this time stores the information l-l-l. When the binary counter stores the information l-l-l, the inputs ICI', 2CI' and 3C1 are all HIGH thereby causing the AND-gate 103 to be perlnissed. Therefore the output 7C1 of the AND-gate 103 is HIGH.
The output 7CI' which is HIGH is applied to inverter 102 which generates a LOW W signal which is applied as an input to gate 91. The signal acts as an inhibit for the gate 91 output pulses. The counter 110 will therefore remain at a lll count until the crescent-shaped member 86 has rotated so that it blocks the light rays from the light source 87 from impinging on the photocell 85. The input signal applied to the amplifier 88 is in a LOW state and the amplifier 88 goes LOW at its output terminal. The LOW output state of the amplifier 88 prevents the start-clock generator 90 from generating any more pulses but on the other hand the inverter 89 causes the LOW input applied thereto to become a HIGH output signal at its output terminal.
Therefore the "Eight" signal applied to the AND-gate 96 becomes Light"HIGH signal and the output 7C'l' which is HIGH is also supplied as an input of the AND-gate 96 and therefore the gate 96 is permissed. The output signal produced by the AND-gate 96 conditions the OR-gate and applies this output signal to the reset terminals of the flipflops 92 and 93 and 94. Therefore, the binary counter is reset to the 00 0 condition. When the crescent-shaped member 86 again allows the rays of light to impinge, upon photocell 85, the cycle repeats itself by having the counter I [0 start counting to transfer information from one register to another. for loading the registers and for updating the memory.
The period of time that the crescent-shaped member is dark is the period of time that printing is allowed.
Certain variations to the subject invention have been provided in order to obtain improved perfomlance. For example, in order to obtain improved print quality, spacing is provided between the print bands as shown in FIG. 8. In this manner, the print wheel 18 would be arranged horizontally from left to right in the following manner: character set one space character set two space space character set one space character set two. In this arrangement of the print wheel, there would actually be eight columns including the four spaces. Instead of two horizontal pushes for a pair of adjacent columns to be under the required print bands as discussed in FIG. 3, four would be required. In the arrangement above described. a particular column will always be under a "space location or under a print band having character set one or a print band having character set two. In other words, even when a column of a record member is under the character set one or two, there will be a space" location juxtaposed to that column. The above results in an improved print quality since when a stiff document is interposed between the print hammer and the drum 82 (see FIG. 4) a ghost is not formed in an adjacent position when the print hammer strikes the document. Offsetting of the character sets are additionally provided in a vertical direction such that there is a half-character shift between character sets as shown in FIG. 7.
What is claimed is:
l. The combination for printing information comprising:
a. a rotating drum means having an axis of rotation;
b. at least four print bands located on said drum means;
c. each one of a first pair of said print bands having the same character set positioned along its periphery,
each one of a second pair of said printed bands having the same character set, which is different from and complementary to said first character set, positioned along its periphery;
d. a print hammer means opposite each print band;
e. a record means having a plurality of column positions including a first and last column position interposed between said bands and said print hammer means;
f. means for transporting in incremental steps the first to the last columns of said record means in a direction parallel to said axis of rotation past all said four print bands;
a respective column being positioned respectively opposite the print band having said one character set and thereafter opposite said band having said complemeny g. means for actuating said print hammer means as said respective column positions are opposite the print band carrying the character to be printed for recording informationinahorimntallineacroasaaidrecordmeans.
2.1'hecombinationinaccordancewithclaim l whereinsaid transport means includes means for incrementally and horizontally moving said record means two column positions at a time.
3. The combination in accordance with claim 1 wherein said transport means includes means to position a second unique column location juxtaposed to said first unique location for data recording to be momentarily located opposite a print band having said complementary character set, and thereafter to be momentarily located opposite a print band having said first character set.
4. The combination in accordance with claim 3 wherein said record medium comprises an ail-column l-lollerith card.
5. The combination in accordance with claim 4 wherein the characters comprising said first and second sets are 63 in number.
6. The combination comprising:
a. a rotating drum means having an axis of rotation;
b. at least four print bands located on said drum means;
c. each one of a first pair of said print bands having a first character set positioned thereon, each one of a remaining second pair of said print bands having a complementary character set which is difierent from said first character set located thereon;
d. a print hammer opposite each print band;
e. first and second coil means for actuating said respective pairs of said print hammers; a record member having a plurality of column positions interposed between said drum and said print hammers;
g. means for incrementally moving in a direction substantially parallel to said rotational axis unique locations on said record member opposite a print band having said first character set and afterwards opposite a print band carrying said complementary character set, the first to the last columns being incrementally moved past all of said print bands;
h. first means coupled to said drum and to said first coil means for printing character infonnation on said record member by energizing said first coil means when there is correspondence between said character information and the identical character contained on said first character set;
i. second means coupled to said drum and to said second coil means for printing character information on said record member by energizing said second coil means when there is correspondence between said character information and the identical character contained on said complementary character set, said second means being energized only when there is lack of correspondence with the information contained on said first character set.
7. The combination in accordance with claim 6 wherein said means coupled to said drum comprises a variable reluctance read head juxtaposed to teeth positioned peripherally around said drum, said read head developing a change of reluctance upon passing a respective tooth, an output pulse being developed by said read head detecting a change of reluctance which is fed into a counter means having an output producing means.
8. The combination in accordance with claim 7 wherein each said coil means is connected to the output of a comparator means having means to receive input signals.
9. The combination in accordance with claim 8 wherein the input signals to said respective comparator means comprise the output of said counter means and the output of a respective multistage register for storing binary data in each respective stage.
10. The combination in accordance with claim 9 wherein one of said respective multistage storage registers stores information which is to be recorded at a first unique location and a second multistage storage register stores information which is to be recorded at a second unique location, said second location being contiguous to said first location.
11. The combination in accordance with claim I0 including two single-stage storage registers wherein the output of one said one-stage register is applied to the input of said comparator which also receives the output of the multistage register which stores information for the first unique location, the output of the second said one-stage register being applied to the input of said comparator which also receives the output of the multistage register storing information for printing at the second unique location.
12. The combination in accordance with claim I 1 wherein a control signal, which emanates from a record member motion detector, is applied to said two single stage storage registers as well as to said two multistage registers storing information for said first and second unique locations,
said control signal causing the transfer of information from said multistage register storing information for said first unique location to a third multistage register when the print band associated with said multistage register does not carry the desired character, and alternately,
said control signal causing the transfer of information from said multistage register storing information for said second unique location to a fourth multistage register when the print band associated with said multistage register does not carry the desired character.
13. The combination in accordance with claim I wherein said four contiguous print bands are arranged such that the inner two bands comprise said first character set and the outer two bands comprise said second character set.
14. The combination in accordance with claim I wherein four space bands without print indicia are interspersed with said four print bands upon said rotating drum means, said eight bands being oriented contiguous to one another.
15. The combination in accordance with claim I wherein said eight bands are arranged such that said second character set is oriented as the first and sixth band position and said first character set is oriented as the third and eighth band positions, space bands being located at the second, fourth, fifih and seventh band positions.
16. The combination in accordance with claim 15 wherein said transporting means initially positions the first column of said record means to said seventh band position and the second column of said record to said eighth band position.
17. The combination in accordance with claim 16 wherein said transporting means continually re-positions said record two band positions starting from said initial position after data has been recorded at certain columns.