Search Images Maps Play YouTube News Gmail Drive More »
Sign in
Screen reader users: click this link for accessible mode. Accessible mode has the same essential features but works better with your reader.

Patents

  1. Advanced Patent Search
Publication numberUS3621371 A
Publication typeGrant
Publication dateNov 16, 1971
Filing dateApr 2, 1970
Priority dateApr 2, 1970
Also published asCA939061A1, DE2116255A1, DE2116255B2, DE2166079A1
Publication numberUS 3621371 A, US 3621371A, US-A-3621371, US3621371 A, US3621371A
InventorsBrumm Wayne R
Original AssigneeElectronic Memories & Magnetic
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Current pulse stabilizer for variable loads
US 3621371 A
Abstract  available in
Images(2)
Previous page
Next page
Claims  available in
Description  (OCR text may contain errors)

United States Patent [72] Inventor Wayne R. Brumm 3,233,114 2/1966 Eldridge et al 340/174 TB Palos Verdes Peninsula, Calif. 3,263,125 7/1966 Genuit 323/9 X [2]] p 25007 Primary Examiner-Gerald Goldberg [22] 1970 Attorney-Lindenberg Freidlich & Waserman [45] Patented Nov. 16, 1971 [73] Assignee Electronic Memories and Magnetics gig T ABSTRACT: Amplitude of a fast-rise pulse current is stabilngeles,Calil.

lzed under varying load conditions by a. transformer having a m first winding connected in series between a pulse voltage [54] CURRENT PULSE STABILIZER FOR VARIABLE source and a variable load. A square loop hysteresis core of LOADS the transformer is biased with regulated DC current in a 12 Chhns3Dnwing m second winding through a choke coil which stores energy while the bias field is being overcome by a voltage pulse, and [52] US. Cl 323/17, restores energy to a power Supply for the current pulse source 323/56 323/66 323/89 340/174 TB at the end of the current pulse. In a core memory plane, the [51] IIILCI G05t3/08 bias current Source Services Curran pulse Sources of both [50] Fifild of Search 323/6,9, polarities for a drive lines and adjacent bit lines are i d 57,61: 25;:540/17418 with current sources of opposite polarities during read and [56] Reerenccs Cited write cycles to provide tight controlled current loops. Positive and negative energy IS returned to the power supply from the UNITED STATES PATENTS choke coil in a substantially balanced manner for both bit (y) 2,882,482 4/1959 Simkins 340/174 TB and word (I) drive lines.

l4 NEGATIVE POSITIVE V pow: :2 P0 WE R V s u P P L Y s u P P L V l0; I I I l l l l l2 (1 '1 LL C0 Lb 5 m PATENTEDauv 1s 19H 3 621 3 71 SHEET 1 or 2 NEGATIVE POSITIVE V W R POWER +V SUPPLY SUPPLY lo, 1 I l j I I V I2 t l hill 4 L L Hams 5 I CL 9 H I c; I j f Q 1; 2* 2 WA /AIE R 3211mm QTToQA/EVS CURRENT PULSE STABILIZER FOR VARIABLE LOADS BACKGROUND OF THE INVENTION This invention relates to pulsed current sources for variable loads, and more particularly to pulsed current sources for variable loads that require a substantially constant amplitude for each current pulse.

In many applications, and particularly in ferrite core memory systems, it is desirable to apply a fast-rise current pulse to a load with a substantially constant amplitude under varying load conditions. For example, in a three wire, 2 iD core memory system, a given N-bit word is read from a group of N cores by selectively applying coincident current pulses to drive lines which pass through all cores of the group. The word is read out in parallel by sensing voltage pulses produced on N separate sense lines when cores of the group are switched from a binary-l state to a binary-O) state. Since the number of cores in a binary-l state at any one time may vary from to N, the load on the drive current pulse source may vary. Consequently, accurate control of current amplitude is difiicult to achieve. A substantially constant rise time of drive current is also difficult to achieve.

OBJECTS AND SUMMARY OF THE INVENTION An object of this invention is to provide an improved pulsed current source for use with a variable load.

Another object is to provide an improved control of amplitude for pulsed currents applied to core memory systems.

Another object is to provide a common amplitude control system for a plurality of independent pulsed current sources, each source connected to a different load.

Another object is to provide an amplitude control system for a plurality of independent pulsed current sources, which system allows setting the control for all pulsed current sources from a single point.

Still another object is to provide an amplitude control system for pulsed current sources in tight controlled current loops to avoid oscillations and minimize noise.

And yet another object is to provide a pulsed current source for variable loads with fast and substantially constant rise times.

And yet another object is to provide a pulsed current source with an amplitude regulation system for core memory systems with reduced power requirements for the total system and reduced power dissipation in the regulation system by restoring both positive and negative energy to the power supply in a substantially balanced manner.

These and other objects of the invention are achieved by connecting a first winding of a transformer having a hysteresis loop core and a first winding in series with a variable load and a voltage source of a given polarity at one end, and a switch for initiating a current pulse through the load connected to a voltage source of opposite polarity at the other end. A second winding of the hysteresis loop transformer is connected in series with high inductance and a source of regulated DC cur rent to bias the hysteresis loop transformer with a magnetic field of a given polarity. The core of the transformer is selected to have a long switching period in relation to the current pulse period. When the switch is closed, a current pulse through the first winding produces a magnetic field of opposite polarity to overcome the DC bias field and increase the applied magnetic field to an upper coercivity level of the hysteresis loop core. Once the core is thus driven to its upper coercivity level, the hysteresis loop transformer is quickly transformed from a low to a high impedance element to limit the amplitude of the current pulse to the load. The inductance in series with the second winding stores energy while the core is thus being driven and returns a substantial part of that energy through a switching diode at the load end of the transfonner to the system power supply once the current pulse is terminated on the first winding. While energy is thus being returned by current through the second winding, the core is driven back below its lower coercivity level in order that the hysteresis loop transformer may once again function as a stabilizer for a subsequent current pulse: to be delivered to the load.

In a magnetic core memory, a plurality of hysteresis loop transformers may be provided, such as one for each bit drive line to selectively read out a word of N bits. The second winding of each hysteresis loop transformer is connected in series with the second winding of all other hysteresis loop transformers and a source of regulated DC current. The bias for all hysteresis loop transformersmay then be adjusted from a single point by adjusting the bias current from the regulated DC current source. A second switch is connected in series between the stabilizing transfonner and the load (core drive line of the magnetic memory). Both switches are initially turned on to provide a drive voltage of'2 v. during the current rise time. Then the first switch is turned off during the flat top of the current pulse. Once the first switch is turned off, a switching diode connected between circuit ground and a junction between the first switch and the transformer provides a current path to return energy to the power supply. By pairing adjacent bit drive lines such that positive read current is driven in one line in one direction and in the other line in the opposite direction, but from the same end of the array, positive and negative pulse stabilizers may be disposed very close to each other such that once a switch between the power supply and the hysteresis loop transformer in each one is opened while a switch at the other end of each transformer remains closed, a switching diode connected to circuit ground is forward biased. That provides a direct current path for return of current from the positive power supply at the end of one bit line to the negative power supply at the end of the other paired bit line, thereby allowing current to be sustained in the paired bit lines at the maximum level in a tight-controlled loop.

The novel features of the invention, as well as the invention itself, both as to its organization and method of operation, will best be understood from the following description in connection with the accompanying drawings in which like reference characters refer to like parts.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a schematic diagram of the present invention for applying controlled current pulses to a variable load.

FIG. 2 is a graph of applied magnetic field versus flux density in the core of a hysteresis loop transformer biased for operation in accordance with the present invention.

FIG. 3 illustrates a plurality of hysteresis loop transformers employed to stabilize current pulses selectively applied to bit drive lines of a magnetic core memory.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to FIG. 1, a circuit is shown for obtaining a stabilized amplitude for fast-rise current pulses to a variable load It), such as drive line of a magnetic core memory, through a first winding W, of a transformer T having a core with a hysteresis loop which is substantially square as shown by the curve in the graph of FIG. 2. That curve passes through points a, b, c and e upon being switched from one saturation state (point a) to a second saturation state (point e). If the applied magnetic field H is then decreased, the curve will follow the upper line passing through points 1, g and h back to the point a. The core of the transformer can thus have two remnant states.

In practice, the core of the transformer T, is made of steel in the form of a toroid with a switch time in the order of l microsecond for current pulses of periods substantially less than 1 microsecond, such as /4 of a microsecond. That will assure that the core will not be driven from the one saturation state at point a to the second saturation state at point e during a current pulse period. Instead, the core is driven through only points a, b, c and d. Between points a and b, the impedance of the transformer winding W, is low to allow a rapid rise of the current pulse through the load to a predetermined maximum amplitude determined by the bias which separates points a and 12. Once the applied magnetic field reaches the coercivity of the core represented by the line between points b and c, the transformer winding W, presents a high impedance to limit the current thereby producing a current pulse with a fast rise time and a flat top. Before the core reaches point e, and preferably while it is being driven through a linear portion near the point 0, transistors Q, and Q, are turned off to remove current drive through the load. The result is a current pulse with a fast fall time from the flat top as the core is returned to point a along the dotted line from point d to g.

When the load 10 is a magnetic core drive line, turning off the transistor Q, may produce resonance in the line. Accordingly, although not shown, it is understood that proper measures are taken to.achieve necessary damping and termination of the drive line. Standard techniques have been developed for damping and tennination of magnetic core drive lines which, for a first approximation, may be thought of as N parallel transmission lines.

A source 1 l of regulated DC current is applied to a second winding of the transformer T, through a choke coil 12 which presents sufficiently high inductance to stabilize bias current to the second winding W, of the transformer.

The regulated DC current from the source 1] establishes a DC bias field represented in FIG. 2 by a dotted line H This DC bias field is stable under static conditions due to the regulation of current from the source 11, and under dynamic conditions due to the inductance of the choke coil 12.

The transistor 0, is connected as a series switch in a form conventional in a core memory system, namely a floating transformer coupled transistor switch employed as a voltage switch by having its emitter connected to a negative terminal (-V) of a DC power supply and a transformer T, having its secondary winding connected across the base-emitter junction of the transistor 0,. The transistor Q, is similarly connected as a series switch with its collector connected to the positive terminal of aDC power supply 14 and a transformer across its base-emitter junction. When timing pulses are applied across the primary windings of the transfonners T and T the baseemitter junctions of the transistors Q, and Q, are forward biased, thereby causing current to flow from a positive terminal (-l-V) of the power supply 14 through the load 10 and the first winding W, of the transformer T, to the negative terminal of the (-V) of the power supply 13.

Turning on both transistors Q, and Q, simultaneously will establish a drive voltage of 2 v. during the rise time of the current pulse through the load 10 for a more rapid rise of the current pulse. Once sufl'lcient time has been allowed for the core to be driven to the linear portion of its hysteresis loop between points b and c, the transistor Q, is turned off. A switching diode D, then becomes forward biased to provide a return path for sustaining current through the load during the flat top period of the current pulse. In that manner, current quickly rises to a maximum level in response to a drive voltage of 2 v. and is then sustained with a drive voltage of only lv. When the transistor 0, is later turned off, at a time before the core of the transformer T, is switched to the second saturation point e, a switching diode D will also become forward biased to return negative energy to the power supply 13, as will be presently described more fully. In that manner, the hysteresis loop of the core in the transformer T, stabilizes the amplitude of the resulting current pulse to a predetermined level under various load conditions of the load 10.

As noted hereinbefore, FIG. 2 indicates the effect of the square loop characteristics of the transfonner 12 in stabilizing the current pulse. Once the transistor 0, is turned on, current will increase very quickly until the bias field is overcome and further increase in current increases the magnetic field beyond the point 11. In that manner, the impedance of the transformer winding W, changes from a low to a high value, and the current through the load is efiectively stabilized while the magnetic field drives the core from point b toward point d to provide a precise, fast-rise current pulse which is independent of the condition of the load 10. This independence is due to the high impedance of the transformer T, once its core has been driven past point b, and the stabilizing effect of the transformer T, on the current while its core is being driven toward point d. If a sufficiently slow core is used, point d may be before point 0, but the cost of such cores is significantly greater.

While the core of the transformer T, is being driven from point a toward point d and then back to point a, some energy is dissipated in the core, and some stored in the magnetic field of the choke coil 12 is returned to the power supply 13. Thus, when the transistor Q, is turned off, the polarity and density of the core flux will then change over the path d-g-h-a. As is well known, the energy within the hysteresis loop represents energy dissipated as heat in the transfonner T,. Therefore, the material for the core should ideally be selected to have as thin a loop as possible, and yet be sufiiciently slow to avoid driving it to its second saturation point before the current pulse is terminated.

The energy stored in the inductor 12, not dissipated in the core, is returned to the negative power supply 13 through a path which includes diodes D, and D Thus, as the collapsing field of the choke coil 12 drives the core of the transfonner T, back to point a, the voltage pulse induced in the first winding W, forward biases the diodes D, and D, to return energy to the power supply 13.

The second winding W of the transformer T, may be connected in series with the corresponding second winding of other hysteresis loop transformers employed to stabilize current pulses from independent sources through separate loads. Such an arrangement is illustrated in FIG. 3 which shows (by way of example, and not by way of limitation) a portion of a three wire, 2 %D coincident current core memory having a plurality N of bit lines for a matrix of MN cores arranged in M groups of N cores such that the bit cores of any one group may be switched to the zero state to read out a given N-bit word in response to a current pulse in a given orthogonal word line (not shown) and a positive current is driven through the bit line L, in a direction indicated by an arrow +I when transistors are actuated in the manner described with reference to FIG. 1. When the word line through the core is driven with current in the same direction, the core is switched. The word line pulse is delayed until the bit line pulse has reached its flat top in order that the binary digit read may be sensed on the bit line L (by means not shown) as a pulse if the digit is a binary-1.

A second bit line L, of the matrix is shown to better illustrate how the present invention may be used to restorenegative and positive energy to the power supplies l3 and 14 (FIG. 1) in a balanced manner during a memory cycle. Transistors Q and Q, are connected as floating transformer switches to selection diodes D, and D, through the line L, for read and write memory cycles. Thus, to read line L,, the transistor 0;, is turned on while transistors Q, and Q, are on. This provides an initial drive voltage of 2 v. through the diode D Then the transistor Q, is turned 011' to provide a pulse sustaining voltage of l v. the transistor Q, is turned off with the transistor Q, to complete a read cycle. Negative energy stored by the inductor l2, and other inductance associated with the bias circuit, is then returned to the power supply 13 via the diode D,.

A read cycle is usually followed immediately by a write cycle in a memory access cycle. To drive negative current through the line L,, transistors Q, to Q, are actuated in the same manner as transistors Q, to 0 using a separate transformer T, to stabilize the resulting negative current pulse. After all transistors Q, to Q have been turned off to terminate the negative current pulse, the winding of the transformer T, in series with the bias stabilizing inductor 12 will induce a voltage across the winding connected to switching diodes D and D, to forward bias the diode D,,. In that manner, positive energy is restored through the diode D to the power supply 14 (FIG. I).

Transistors O and Q are similarly actuated with transistor Q,, for a selective positive read current pulse through a trans former T and the line L Transistors Q,,, to 0,, are actuated like transistors Q, to for a selective negative write current pulse through a transformer T, and a line L Other lines are selectively driven using cycle control transistors like transistors 0 and Q, and separate positive and negative current pulse stabilizing arrangement for each line.

As a result of driving adjacent bit lines in opposite directions for a read or a write cycle, and juxtaposing the pulse stabilizing transformers of conjugate lines for read and write cycles as shown, tight controlled loops are provided for read and write pulse currents in conjugate lines through switching diodes connected to circuit ground. For example, transistors Q, and connect transformers T, and T to negative and positive power supplies for a read cycle to drive positive currents through the drive lines L, and L When those transistors are turned off after the initial pulse rise time, diodes D, and D become forward biased to provide return current paths to circuit ground formerly provided by the transistors through power supplies of opposite polarities. Since the impedances of the forward biased diodes D, and D to AC signals are very low, as compared to impedances of current paths through the circuit ground from the diodes D, and D to the power supplies, AC or pulse current from the positive power supply is driven through the line L, and returned to the negative power supply through the line L via diodes D, and D, rather than though circuit ground.

All of the bias windings of the stabilizing transformers are connected in series with the inductor l2 and the constant current source 11. However, in practice not more than approximately six transformers should be so connected in a group without some series inductance between groups to store energy. in other words, the storage inductance for the series connected transformers should be distributed between groups of not more than about six.

The arrangement of FIG. 3 may be used for word drive lines in a similar manner. However, since only one line is driven at any given time, the return path for the current pulse is through circuit ground, and not through another line as in the case of conjugate bit drive lines. However, other advantages, including the balanced return of energy to the power supplies, are retained.

In the cores of bit drive lines, the balanced return results from the operation of oppositely poled read pulse stabilizers associated with conjugate lines for all lines during a read cycle. During a write cycle, current will be driven through only those lines storing a bit 1. Therefore, the balance is not complete during any given write cycle, but is complete over a large number of cycles. For instance, if a bit 0 is to be stored in line L, while a bit 1 is stored in line L only the transistor 0, is turned, and not the transistor 0,. The return path for negative current through the line L is through a diode D, and circuit ground once the transistor 010 is turned off. When the transistor 0,, is turned off, energy is restored in the positive power supply through diode D Energy is not simultaneously restored in the negative power supply. However, during another write cycle a bit 1 may be stored in the line L, and not in the line L, so that energy is then restored only in the negative power supply. Thus, over a large number of write cycles, the balance will be substantially complete.

in the case of word drive lines, each read cycle is normally followed by a write cycle. When oppositely poled pulse stabilizers are thus used for read and write cycles, the positive ener gy restored in one cycle balances the negative energy restored in the other cycle.

Since the present invention does not employ feedback for stabilization, there is no possibility of oscillation. Another advantage is that since a common regulated DC current source 11 is employed for all current pulse stabilizing transformers,

control of all current pulse sources is achieved from a single point. That allows variation of the amplitude of all current pulse sources with a common control on the regulated DC source 11, i.e., with a common control of the bias field for all hysteresis loop transformers.

Although a particular embodiment of the invention has been described and illustrated herein, it is recognized that modifications and variations will be obvious to those skilled in the art. For example, by using independent pulse stabilizers substantially as shown in FIG. 1 for bit drive lines as well as word drive lines, the present invention may be employed in a two wire, 2%D memory system. Other modifications may include additional levels of selection switches, and other switching arrangements including the arrangement for the switching diodes. For example, for the read drive current through the line L,, energy can be returned to the positive power supply by connecting the diode D to circuit ground and the diode D, to the positive power supply. If that is done, the switch 0-, could be omitted if a drive voltage of 2 v. is to be retained throughout the entire pulse period. However, the embodiment illustrated is preferred even though two switches are required because that allows the initial drive voltage of 2 v. to be larger for a faster rise of the pulse without overstressing switching components since the drive voltage is then quickly cut back to l v. Accordingly, since so many modifications and variations are possible, it is intended that the claims be interpreted to cover all modifications and variations that will be obvious to those skilled in the art and equivalents thereof.

What is claimed is:

1. Apparatus for stabilizing a pulse of current fonn a source of DC power through a variable load comprising:

a transformer with a square-loop hysteresis core having a predetermined coercivity level of current required for switching it from saturation at a given polarity, said transformer having first and second windings;

means including inductance in series with said second winding for driving regulated DC bias current through said second winding to saturate said core at said given polariy;

switching means for coupling said source of DC power in a series circuit with said load and said first winding to drive current through said load in a given direction, the polarity of said first winding relative to said second winding being such that current through said first winding will drive said core from saturation at said given polarity toward saturation at said opposite polarity, said switching means being active to drive said current through said load for a period of time sufficient to reach said coercivity level of current and less than necessary to drive said core to saturation at said opposite polarity; and

a pair of diodes connected to opposite ends of said first winding, one of said diodes being connected to said power supply and poled for forward conduction in,

response to induced current in said first winding when current through said load is terminated by said switching means, and the other of said diode being connected and poled to provide a return circuit for induced current in said first winding, whereby energy stored in said bias means is returned to said source of power.

2. Apparatus as defined in claim 1 wherein one end of said load remote from said first winding; is coupled to circuit ground, said switching means comprises a series switch coupling said source of power to said first winding at an end thereof remote from said load said source of power is connected between said series switch and circuit ground, said one of said diodes is connected between circuit ground and said first winding at an end thereof remote from said load, and the other of said diodes is connected between said power source and said first winding at an end thereof remote from said power source.

3. A current pulse stabilizer for a variable load comprising:

means DC coupling one end of said load to circuit ground;

a first transformer with a squareloop hysteresis core having first and second windings;

a choke coil connected in series with said second winding;

a source of regulated DC bias current connected in series with said choke coil and said second winding for driving current through said second winding in a direction for biasing said core beyond a saturation point of a given polarity;

a source of DC power having one terminal at a given polarity and another terminal connected to circuit ground;

switching means for DC coupling said one terminal of said power supply to said load through said first winding to drive current in a given direction through said load to circuit ground, the polarity of said first winding relative to said second winding being such that current through said first winding will cancel fiux in said core produced by bias current in said second winding, said switching means being active to produce said current pulse for a period of time less than necessary to drive said core through said saturation point of said given polarity to a saturation point of opposite polarity; and

a pair of diodes connected to opposite ends of said first winding, one of said diodes being connected between circuit ground and one terminal of said first winding adjacent said source of power, and the other of said diodes being connected between said one terminal of said source of power and the other terminal of said first winding adjacent said load, said pair of diodes being poled for forward conduction in response to induced current from said second winding when current through said load is terminated by said switching means, whereby energy stored in said coil while current is driven through said load is returned to said source of power.

4. A current pulse stabilizer as defined in claim 3 wherein said means DC coupling one end of said load to circuit ground includes a source of power having one terminal connected to circuit ground and a second tenninal at a polarity opposite said given polarity, and said switching means comprises two series switches, one at each end of said first winding, whereby one switch remote from said load may be activated with the other switch during the current pulse rise time to provide a drive voltage equal to the sum of potentials of said sources of power at opposite ends of said load, and then deactivated to provide a drive voltage for sustaining current through said load equal to the potential of said source of power at said one end of said load.

5. A current pulse stabilizer as defined in claim 4 wherein said load is a core drive line of a magnetic core through which current must be driven in either direction, further including:

a second transformer with a square-loop hysteresis core having first and second windings, said second winding being connected in series with said choke coil to receive said bias current;

a separately controlled switch at each end of said first winding of said second transfonner coupling said first winding in series with said load at the end thereof opposite said one end, and in series with said source of powerof opposite polarity for operation in substantially the same manner as corresponding switches connected to said first winding of said first transformer, the polarity of said first winding of said second transformer being such that current therethrough will cancel flux in said core of said second transformer produced by bias current in said second winding of said second transformer for current through said load in a direction opposite said given direction;

a second pair of diodes, one of said second pair of diodes connected between circuit ground and said first winding of said second transformer at the end thereof remote from said load, and the other of said second pair of diodes connected between said source of power of opposite polarity and said first winding of said second transformer at the end thereof next to said load, said second pair of diodes being poled for forward conduction in response to induced current from said second winding of said second transformer when current through said load and said first winding of said second transformer is terminated, whereby energy stored in said coil, while current is driven through said load in a direction opposite said given direction, is returned to said power supply of opposite polarity;

a second source of power having one tenninal of a polarity opposite said given polarity and another tenninal connected to circuit ground; and

means for selectively coupling said load at the end thereof remote from said first and second transformers to one power source terminal of said given polarity when said switches connected to said first transformer are activated and, to said one power source terminal of opposite polarity when said switches connected to said second transformer are activated.

6. In combination: 1

a load through which a fast-rise current pulse is to be driven with a stable amplitude for different values of load impedance, said load being DC coupled at one end to circuit ground;

means DC coupling one end of said load to circuit ground;

a first transformer with a square-loop hysteresis core having first and second windings;

means including a choke coil for driving regulated DC bias current through said second winding in a direction for biasing said core beyond a saturation point of a given polarity;

a source of DC power having one terminal at a given polarity and another terminal connected to circuit ground;

first switching means at one end of said first winding for DC coupling said first winding in series with said load;

second switching means connected to said one terminal of said source of power for DC coupling said source of power to said first winding to drive current in a given direction through said load to circuit ground, the polarity of said first winding relative to said second winding being such that current through said first winding will cancel flux in said core produced by bias current in said second winding, said first and second switching means being active for a period of time less than necessary to drive said core through said saturation point of said given polarity to a saturation point of opposite polarity; and

a first diode connected between circuit ground and said one end of said first winding, and a second diode connected between said one terminal of said source of power and said first winding at an end thereof opposite said one end, said first and second diodes being poled for forward conduction in response to induced current from said second winding when current through said load is terminated by said first and second switching means, whereby energy stored in said coil while current is driven through said load is returned to said source of power.

7. A combination as defined in claim 6 wherein said means coupling said one end of said load to said circuit ground includes a second source of power having one terminal of polarity opposite said given polarity DC coupled to said load and another terminal connected to circuit ground, and wherein said first and second switching means are separately controlled, whereby both switching means may be activated initially to provide a drive voltage for current through said load equal to the sum of output voltages from said sources of power coupled to opposite ends of said load, and said first switching means at said one end of said first transformer winding may be deactivated at the end of the rise time of current through said load to reduce the drive voltage to that coupled to the end of said first transformer winding through said load until the end of the current pulse, at which time said second switching means may be deactivated.

8. A combination as defined in claim 7 wherein said load is a core drive line of a magnetic core through which current must be driven in either direction, further including:

a second transformer with a square-loop hysteresis core having a first winding and a second winding, said second winding being connected in series with said choke coil and said second winding of said first transformer to receive bias current;

separately controlled switching means at each end of said first winding of said second transformer coupling said first winding in series with said load at the end thereof opposite said one end, and in series with said source of power of opposite polarity for operation in substantially the same manner as corresponding switching means connected to said first winding of said first transformer, the polarity of said first winding of said first transformer being such that current therethrough will cancel flux in said core of said second transformer produced by bias current in said second winding of said second transformer for current through said load in a direction opposite said given direction;

a third diode connected between circuit ground and said first winding of said second transformer at the end thereof remote from said load, and a fourth diode connected between said source of power of opposite polarity and said first winding of said second transformer at the end thereof next to said load, said third and fourth diodes being poled for forward conduction in response to induced current from said second winding of said second transformer when current through said load and said first winding of said second transformer is terminated, whereby energy stored in said coil, while current is driven through said load in a direction opposite said given direction, is returned to said power supply of opposite polarity; and

a means for coupling said load at the end thereof remote from said first and second transformers to said one terminal of said source of power of said given polarity when said separately controlled switching means connected to said second transformer are activated, and to said one terminal of said second source of power when said first and second switching means connected to said first transformer are actuated.

9. ln a bipolar current drive system for bit drive lines of a magnetic core memory wherein said drive lines are divided into two groups with current in lines are divided into two groups with current in lines of one group opposite current in lines of the other group, and wherein a given line in one group is paired with a given line in the other, a pair of current pulse stabilizers comprising:

first and second transformers, each with a square-loop hysteresis core having a predetermined coercivity level of current required for switching it from saturation at a given polarity to saturation at an opposite polarity;

bias means including inductance in series with said second winding for driving regulated DC bias current through the second winding of each transformer in series to saturate each transformer at said given polarity;

negative and positive sources of DC power, said negative source having one terminal connected to circuit ground said positive source having one terminal connected to circuit ground, whereby negative and positive current drive potentials are provided with respect to circuit ground;

first and second switching means for coupling said first and second sources of power in series circuits with respective ones of said paired lines and said first winding of said first and second transformers, respectively, to drive current through said paired lines in opposite directions, the polarity of said first winding relative to said second winding in each of said first and second transformers being such that current through said first winding will drive said core from saturation at said given polarity toward saturation at said opposite polarity, said first and second switching means being active to drive said currents through said given lines for a period of time sufficient to reach said coercivity level of current and less than necessary to drive said core to saturation at said opposite polarity; and

two pairs of diodes, one pair for each transformer, one

diode of a given pair being connected between said first winding of a given transformer at the end remote from the source of power to which said first winding is connected, and the other diode of said given pair being connected between said first winding of said given transformer at the end adjacent to said source of power to which said first winding is connected and circuit ground, each pair of diodes being poled for forward conduction in response to induced current in said first winding to which connected when said first and second switching means terminate currents through said lines, whereby energy stored in said bias means is returned to said sources of power in a substantially balanced manner from said inductance in said bias means.

10. The combination as defined in claim 9 wherein one end of each line of said pair remote from said transformers is coupled to circuit ground by respective first and second switching means and said positive and negative sources of power, and a given one of said first and second switching means comprises a first series switch at one end of said first winding of a transformer coupled to a source of power and a second series switch at the other end of said first winding of a transformer coupled to a line, whereby said first and second switches of a given switching means may be activated simultaneously to initiate current with a drive voltage equal to twice the potential of a given power source, and said first switch may be deactivated before said second switch to maintain drive current with a drive voltage equal to the potential of a given power source, said drive current being maintained through one of said paired diodes connected to circuit ground, whereby a tight-controlled pulsed current loop is maintained from one to the other of said paired lines through said diodes connected to circuit ground.

11. The combination as defined in claim 10 further comprising a second pair of current pulse stabilizers for said paired lines identical to said first pair but oppositely connected to said paired lines such that simultaneous currents in opposite directions are reversed from directions of currents produced by said first pair of current stabilizers when said second pair of current stabilizers are activated by first and second switching means of said second pair.

12. The combination as defined in claim 11 wherein all second windings of all transformers are connected in a singleseries circuit of said bias means.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US2882482 *May 28, 1956Apr 14, 1959Bell Telephone Labor IncMagnetic core current regulating circuit
US3233114 *Mar 21, 1961Feb 1, 1966IbmMagnetic core transistor logic circuit
US3263125 *May 1, 1963Jul 26, 1966Gen ElectricCurrent limiting circuits and apparatus for operating electric discharge devices and other loads
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3975672 *Oct 18, 1974Aug 17, 1976Rca CorporationPower supply with means to reduce on and off switching times of series regulated device
US3984799 *Dec 17, 1974Oct 5, 1976NasaDC-to-DC converters employing staggered-phase power switches with two-loop control
Classifications
U.S. Classification365/230.7
International ClassificationH03K3/45, H03K5/08, G11C11/06, H03K3/00, G11C11/02
Cooperative ClassificationG11C11/06007, H03K5/08, H03K3/45
European ClassificationH03K5/08, H03K3/45, G11C11/06B