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Publication numberUS3621480 A
Publication typeGrant
Publication dateNov 16, 1971
Filing dateFeb 11, 1970
Priority dateFeb 14, 1969
Publication numberUS 3621480 A, US 3621480A, US-A-3621480, US3621480 A, US3621480A
InventorsBrownlie John David
Original AssigneePost Office
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Electrical networks
US 3621480 A
Abstract  available in
Images(5)
Previous page
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Claims  available in
Description  (OCR text may contain errors)

United States Patent [72] Inventor John David Brownlie Chesham, England [2]] Appl. No. 10,417

[22] Filed Feb. 11, 1970 [45] Patented Nov. 16, 1971 [73] Assignee The Post Office London, England [32] Priority Feb. 14, 1969 [33] Great Britain [54] ELECTRICAL NETWORKS l0 Claims, 14 Drawing Figs.

[52] U.S. Cl 333/28, 333/1 1.333/28 B [51 Int. Cl l-l03h 5/00 [50] Field of Search 333/28. 28 A, 28 B,28T,6, ll

[56] References Cited UNITED STATES PATENTS 1,920,041 7/1933 Vos et al 333/28 3,273,079 9/1966 Curtis FOREIGN PATENTS 746,236 3/l956 GreatBritain 823,608 ll/l959 GreatBritain Primary E.ran1iner-Herman Karl Saal'bach Assistant Examiner-Saxfield Chatmon, Jr. Attorney-Hall & Houghton ABSTRACT: Passive electrical networks for the generation of evenand odd-echo-pairs suitable for use in annulling gain and phase inequalities in color television signals are described. The networks are of the bridged-T-type. A center-tapped inductor forms the horizontal bar of the T and an echo generating circuit forms the vertical bar. The bridging network contains components which with the shunt inductance and self-capacitance of the inductor form a fourth order approximation to a delay line Values are chosen so that the inductor has a hybrid coupling action. Compensation for leakage inductance of the inductor consists of introducing delays into the echo'generating circuit and delay circuitv Adjustment of the networks and modifications to the echogenerating circuit are described.

PATENTEDNUV 1619?! (3,621,480

SHEET 1 [IF 5 SIGNAL PLUS RELATIVE GAIN EVEN -EC/-D FAIR ENVELOPE DELAY HG. lc.

SIGNAL PLUS 00D -5 p RELATIVE GAIN k FIG. 2a.

INVENTOR ATTORNEY PATENTEDNUV 1s 19?: 3,621,480

SHEET 2 0r 5 ILO r I ECHO I GENERATOR F1613. PRIOR ART m 5 Y2 V 8 T L 1 3 7 3 R L 5 R C44 Pl, 2/ [R] F F164. FIGS. PR/0R ART RR/oR ART T 6 1 1 [RJ R FIG. 6. 77; [j] 72 VV\r-0-'\NV- r2 (1?: r [g] Q 1 Joy y D B/F'aW YL/E INVizNTOR ATTORNEY INVUN IOH AI IORNLY ELECTRICAL NETWORKS This invention relates to electrical circuits for the generation of echo-pattems, and has particular but not exclusive reference, to circuits suitable for annulling gain and delay inequalities between different parts of a color television signal arising in a link or other network.

One method of correcting chrominance/luminance gain and delay inequalities arising in links and equipment is to use evenecho-pairs and odd-echo-pairs of adjustable amplitude to anmil these two inequalities independently. Since chrominance signals modulate a color subcarrier of frequency fl=4.43 mHz. the gain and delay inequalities to be annulled are those between two bands centered respectively around f,- (4.43 mI-Iz. for the chrominance signal and zero frequency (for the luminance signal). FIGS. 1 and 2 show respectively the gain and delay characteristics produced by adding even and odd-echo-pairs pairs respectively to a main signal. For an even pair of echoes of relative amplitude k not to affect the DC transmission, they must be accompanied by an echo of relative amplitude 2k coincident with the main signal. The addition of an even-echo-pair causes no delay inequality and the addition of an odd-echo-pair causes no gain inequality betweenf (=l/2T) and zero frequency.

Several realizations of echo-pattem networks have been described, for example, J.M. Linke, "Passive networks for an nulling gain and delay inequalities," International Broadcasting Convention, 1968; I.E.E. Conference publication No. 46, Part 1. These networks are constructed from reactances approximating open or short-circuited delaylines, transformers and resistors.

FIG. 3 shows a known circuit used for the generation of echo-patterns. A hybrid splits the incoming signal into two parts, one of which is considered as the main signal, while the other is fed to the echo-generating equipment. The two parts of the signal are then recombined in a second hybrid. A disadvantage of such a circuit is that it contains transformers and many other components.

It is an object of the invention ro provide improved passive electrical circuitry for the generation of echo-pattem signals.

The present invention provides an electrical network having:

a pair ofinput terminals,

21 pair of output terminals,

a center-tapped inductor connected from one input terminal to one output terminal, the other input terminal and the other output terminal being common,

means connected across the inductor so as to provide therewith a delay circuit connected from the one input terminal to the one output terminal, and

An echo-generating circuit connected from the center tap of the inductor to the common terminals,

the arrangement being such that when used with a matched input circuit and a matched output circuit a hybrid coupling exists between the input terminals, the output terminals, the delay circuit, and the echo-generating circuit whereby an output signal consisting of a main signal accompanied by an echopattern appears at the output terminals when a signal is applied at the input terminals.

The term hybrid coupling" is used herein to mean that in relation to a four terminal-pair network electrical energy introduced at any one terminal-pair divides between two of the other terminal-pairs with substantially no transfer of energy to the remaining terminal pair. In a network of the invention the input terminals, the output terminals, the connections to the delay circuit, and the connections to the echo-generating circuit represent the four terminal-pairs. when the impedances of the delay circuit and the echo-generating circuit are correctly chosen and the network is used between a matched source and load a hybrid coupling exists such that:

i. the input terminals are coupled to the echo-generating circuit and the delay circuit but not the output terminals;

ii. the echo-generating circuit is coupled to the input terminals and the output terminals but not the delay circuit;

iii. the delay circuit is coupled to the input terminals and the output terminals but not the echo-generating circuit;

iv. the output terminals are coupled to the echo-generating circuit and the delay circuit but not the input terminals.

Preferred embodiments of the invention consist of echopattern networks which employ fewer components than previously proposed circuits, contain no transformers other than center-tapped inductors, and which may be adjusted to give a required performance without undue difficulty.

In order that the invention may be fully understood and readily carried into effect certain embodiments will now be described with reference to the accompanying drawings of which:

FIGS. 1, 2 and 3 are described above;

FIGS. 4 and 5 show alternative realizations of a constantimpedance delay section;

FIG. 6 shows an ideal even-echo-pair network embodying the invention;

FIG. 7 shows an even-echo-pair network with lumped reactances embodying the invention;

FIG. 8 shows a one-port network which provides two additive noninteracting reflections;

FIG. 9 shows an ideal odd-echo-pair network embodying the invention; and

FIG. 10 shows an odd-echo-pair network with lumped reactances embodying the invention.

Referring firstly to FIG. 6, there is shown an ideal evenecho-pair network embodying the invention which has a transfer function F,,(s) (where s is complex frequency) given by the equation:

where k is a constant and k, is the adjustable relative echo amplitude. The network has input terminals 1 and 4 and output tenninals 3 and 4, terminals 4 and 4' being common. A center-tapped inductor 6 is connected from terminal 1 to terminal 3 and has a center-tap 2. The inductor 6 is an ideal component of infinite shunt inductance but cannot be produced in practice. A short-circuit terminated delay-line 8 of characteristic impedance 2R ohms and one-way delay time T/2 are connected across the inductor 6. An echo-generating circuit comprising a constant impedance bridged-T section terminated by a variable resistance 10 of value r ohms. The bridged-T section comprises two resistors 11 and 12 (both equal to R/2 ohms), an open-circuit terminated delay line 9 of characteristic impedance R/2 ohms and one-way delay time T/Z, and a short-circuit terminated delay line 13 of characteristic impedance R/2 ohms and one-way delay time T/2. The center-tap 2 is connected to one end of the resistor 11 whose other end is connected to one end of the resistor 12. The other end of the resistor 12 is connected through the resistor 10 to the common terminals 4 and 4. The input end of the delay line 9 is connected across the resistors 1.1 and 12 and the input end of delay line 13 is connected from the junction of the resistors l1 and 12 to the common terminals 4 and 4'.

FIG. 7 shows acircuit electrically equivalent to that of FIG. 6 but in a practical form. The delay lines 8, 9 and 13 are constructed according to a fourth-order equiripple lumped reactance delay approximant (vide E. lUlbrich and H. Piloty, Archiv der Elektrischen Ubertragung, (Oct. 1960, l4, 10, pp. 451 to 467). The ideal center-tapped inductor 6 of FIG. 6 is replaced by a practical component 14. Thus the line 8 is realized by the center-tapped inductor 14, an inductor l5 and two capacitors l6 and 17; the delay line 9 by inductors l8, l9 and capacitors 20, 21; and delay line 13 by inductors 22, 23 and capacitors 24, 25. The resistor 10 is replaced in FIG. 7 by a network of five resistors, 26, 27, 28, 29, 30, shown separately in FIG. 8. Precautions are taken to ensure that practical imperfections in the inductor 14 do not disturb the operation of the circuit. Thus, the two halves of the inductor 14 are wound very closely together in a bifilar manner to ensure very close coupling. The shunt inductance of the inductor 14 is used as a component in the realization of the delay line 8 and its selfcapacitance is allowed for in choosing the value of capacitor 17. That is to say, the departure of inductor 14 from the ideal of pure infinite shunt inductance is overcome by absorbing its imperfections in the realization of the delay line 8.

In spite of the above precautions the inductor 14 may still have a very small, but significant, leakage inductance which is effectively in series with the center-tap 2. This leakage inductance can slightly impair the accuracy of the network as a measuring device but it may be absorbed into a T-section approximation to a very short delay-line (of the order of 3 ns. for 0.03;. h. leakage inductance in a 9p. h. coil). Such a T-section consists of two inductors forming the horizontal bar of the "T" and a capacitor connected to the junction of the inductors forming the vertical bar of the T." Thus to absorb the leakage inductance of the inductor 14 an extra inductance (not shown) is added in series with the center-tap 2 and a capacitor (not shown) connected from the center-tap 2 to the common tenninals 4 and 4'. The horizontal bar of the T referred to above consists of the leakage inductance in series with the added inductor. It will be appreciated that as this modification adds effectively a time delay (having an overall effect of 2X3 ns.=6 ns. in the example quoted) in series with the echo-generating circuit a corresponding extra time delay (here 6 ns.) must be added in series with the delay circuit to preserve correct operation of the network.

The operation of the network will now be explained in terms of FIG. 6, the operation of the practical circuit being equivalent electrically. The network is intended for operation between matched input and output circuits of impedance R ohms. A signal introduced at the input terminals 1, 4 divides between the delay line 8 and the echo-generating circuit (9, 10, ll, l2, 13) but is not transmitted directly to theoutput terminals 3, 4 because of the hybrid action of the coil 6. A signal appears at the output due to transmission through the delay line 8 after a time T, The echo-generating circuit provides components at time zero, time T and time 2T. Thus the overall output corresponds to the echo-pattern shown in FIG. I. The resistor enables the echo amplitude and sign to be adjusted. The network is able to act as an echo-pattern generator by virtue of the hybrid action of the ideal inductor 6. The same hybrid action results in the practical circuit (FIG. 7) because the finite shunt-inductance of the practical center-tapped inductor and its shunt capacitance are made part of the delay circuit effectively providing a delay circuit bridging an ideal component.

As a further aid to understanding the operation of the invention the known circuits of FIGS. 4 and 5 will be compared with the novel circuits of FIGS. 6 and 7. For the purpose of comparison corresponding components in the different figures have the same references.

A lumped delay-line section is shown in FIG. 4, and can be represented by scattering parameters. The delay-line section comprises two ports respectively provided by terminals 1, 4 and 3, 4 a two-terminal network 5 of admittance Y connected from terminal 1 to terminal 3, a center-tapped inductor 6 of inductance L connected in parallel with the network 5, and a two-terminal network 7 of impedance 2 connected from the center-tap 2 of the inductor 6' to common terminals 4, 4 connected to earth.

The shunt inductance (L) of the inductor 6 may be included with the admittance to form an effective admittance Y for the purpose of defining the scattering parameters of the circuit. That is to say, the two-terminal network 5 may be considered to have an admittance Y and the centertapped inductor may be considered to be ideal (that is, having an infinite shunt inductance) and the overall circuit will be effectively electrically unchanged. If F 0) and I.,(s) (where s is complex frequency) are reflection coefiicients corresponding respectively to Z (s) with reference to R/2 and Z (s) with reference to 2R (where Z =l Y then the circuit may be represented by the equation:

where W and W are output variables at ports (I, 4) and (3,4) respectively and U, and U are input variables at these ports respectively. Each of the quantities on the principal diagonal is a reflection coefficient at one port when the other port is terminated by a reference resistance R; each of the offdiagonal quantities is equal to the insertion transfer function between equal source and load resistances of R.

In the ideal case (or approximately so in practical cases) the reactances in delay sections may be regarded as being the reactances of open-circuited and short-circuited delay lines. In the unbalanced form of delay section shown in FIG. 4, the characteristic impedances for the shunt and series anns are R/2 and 2R respectively and both reactances give reflection delays equal to T. Thus the network of FIG. 4 may be represented by a network containing delay lines as shown in FIG. 5. The impedance 5 is represented by a short circuit terminated delay line 8 of one-way delay time T/2 and the impedance 7 by an open-circuit terminated delay line 9 also of one-way delay time T/2. The remainder of the circuit is unchanged.

The reflection coefficients corresponding to characteristic impedances R/2 and 2R respectively are simply 2' and e"". Substitution of F =e' and I.,=e""' in equation 1 yields the scattering representation of an ideal delay section in the following equation;

The scattering (or insertion) transfer function of the network is It may be shown that the transfer functions of an even-echopair network is It will be appreciated that if F (s) satisfies the equation The required function EU) to satisfy equation is provided by the echo-generating circuit in FIGS. 6 and 7. The bridged-T section of the echo-generating circuit has a transfer function I(s) where:

Comparison with equation 6 shows that the complete network adds an even pair of echoes with a relative amplitude k,.= 'y/4 which is adjustable over the range '0.25 to +0.25. This is satisfactory for the intended application since the maximum gain inequality to be annulled is :40 percent which requires a relative even-echo amplitude of only 10. 1.

Referring now to Fig. 8, the resistors 26, 27, 28 29 and 30 have values lqR (variable), R/k,,, R, k,,R and k R (variable) respectively. If y, and 7 are the reflection coefficients corresponding to k R and k R respectively 10 1 k 1 W. Jai 7 m. and is the reflection coefficient of the network, then (that is +50 percent with a second, switched, exactly similar set of resistors (for which case k =1/T6).

In theory the network of FIG. 7 gives an envelope delay of ll2.9- '-0.2 ns. over the frequency range of O to 7 MHz.; in practice, finite Q values and stray reactances permit the envelope delay of the main signal to be held within l l2.9l .0 ns. from to 7 MHZ. In order to achieve these figures, the following procedure is adopted for setting up the main signal transmission. lnitially the components are set to within ione-half percent of their nominal values. The inductance in the seriestuned circuit is then trimmed to give this tuned circuit together with its leads an impedance zero at 8.89 MHz. The shunt capacitance is trimmed to give the whole fourth-order reactance an impedance pole at 4.43 MHz. With a nonreactive (or reactance-compensated) resistance of R/2 connected from the center-tap of the inductor 14 to the common ter minals 4,4, the swept loss and envelope delay of the section are then fairly flat in the range 0 to 7 MHz. However, a worthwhile improvement can be obtained from a very slight adjustment of the center-tapped coil 14 followed by a readjustment of the shunt capacitance. The envelope delay and insertion loss of this main-signal section can be confined to l 12.9:1 .0 ns. and 6.05:0.05 db. respectively over the range 0 to 7 MHz.

The resistances 26, 27, 28, 29 and 30 arranged in the echogenerating circuit (shown separately in FIG. 8) provide two additive, noninteracting reflections. In the settingup of the echo-generating circuit, the capacitance of the parallel'tuned circuit in the series (or bridging) arm is trimmed to give this tuned circuit an impedance pole at 8.89 MHz. The series inductance is then trimmed to give the whole series arm an impedance zero at 8.89 MHz., and the shunt capacitor is trimmed to give the whole shunt arm an impedance pole at 4.43 MHz. The adjustable and fixed resistors (R/2=37.5 ohms for the customary line impedance of 75flmust be nonreactive (or reactance compensated) in the range 0 to 7 MHz.

Within the range 0 to 7 MHz. the complete circuit has a total delay spread of 4 ns. in the zero-echo setting, and a worst-case total spread of 0.1 db. in the zero-echo setting and the errors in the gain inequality settings are less than 1 percent.

A modification of FIG. 7 will now be described which is useful where echoes of only one sign are required. If the resistors 26, 27, 28, 29 and 30 are replaced by a short circuit the overall network will generate echoes of negative sign of amplitude which may be adjusted by changing the value of resistor 11. For very large values of resistor 11 the overall net work is of approximately constant impedance. A further advantage of this modification is that the network does not have the transmission loss of the unmodified network.

An alternative modification consists of making resistor 11 infinity (that is, open circuit) and connecting a variable resistor in place of resistors 26, 27, 28, 29 and 30. The network will then generate positive echoes of adjustable amplitude. If the variable resistor is very low in value the network is of approximately constant impedance. The further advantage of the previous modification is also obtained in this modification.

The invention may be used to generate other echo patterns by the choice of a suitable echo-generating circuit. For example, the realization of an odd-echo-pair network will now be described using similar reference numerals to those already used. The transfer function of such a network is F,,(sFK[e '-+-k,,( le"" 1 9 where k, is the adjustable relative echo amplitude. Comparison with equation 3 shows that a realization with a modified delay section requires that This reflection coefficient can, for example, be realized with the one-port network shown connected to the center-tap 2 of the center-tapped inductor 6 in FIG. 9. This network contains a constant impedance delay section 31 preceded by a resistive pi-section 32 and terminated with a resistance 33. A resistance value of less than R/2 for resistor 33 produces negative trailing echoes, and a value greater than R/2 positive trailing echoes. The two-part resistive section 32 has three functions: to produce a given reflection back to the center-tap of the inductor 6, to present a constant impedance of R/2 at its second port, and finally to scale the amplitude of the trailing echo to equal that of the leading echo. A switched attenuator 34 is also incorporated as a means for sealing the combined oddecho-pair. The network is designed to produce extreme relative-echo-amplitudes of 10.2215 corresponding to delay inequalities of ns.

The constant impedance delay section 31 comprises a shortcircuit terminated delay line 35 of total delay T and characteristic impedance R, a center-tapped inductor 36 and an open-circuit terminated delay line 37 of total delay T and characteristic impedance R/4. Fig. 10 shows a practical form of the idealized circuit shown in FIG. 9..

The delay lines of FIG. 9 are realized with fourth order reactances in a similar manner to that of the even-echo-pair circuit (FIG. 8). Thus delay line 8 is realized by an inductor l5, center-tapped inductor 14, and capacitors l6, l7; delay line 35 by center-tapped inductor 39, and capacitors 40, 41; and delay line 37 by inductors 42, 43 and capacitors 44, 45. The network performance in the zero-echo setting is similar to that of the even-echo-pair network. In the echo-generating circuit, a single resistance 47 less than R/Z is used to terminate the delay line for all negative trailing echoes. The two-port resistive network 32 consists of a pi-section of three resistors 46 switched in for each echo setting. The setting up of the delay section in the echo-generating circuit follows firstly the procedure already described for the main-signal transmission, i.e., with the shunt arm replaced by a reactance-compensated resistor. The shunt arm is then set up separately by a procedure which is the dual of that used for the series arm.

Theoretically, the odd-echo-pair should introduce no gain inequality between zero frequency DC and 4.43 MHz.; in practice the most extreme gain inequality introduced by the network is 0.l db. The error in the delay inequality settings can be restricted in practice to be of the order of l to 2 ns.

It will be appreciated that other embodiments and modifications are possible within the scope of the invention. For example, the delay lines may be realized by networks of order greater than four. An echo-pattern other than an evenor an odd-echo-pair may be generated by using selected one-port networks to form the desired echo signal components which are then added to the delayed main signal as described.

Iclaim:

ll. An electrical network having:

a pair of input terminals, a pair of output terminals, a

center-tapped inductor connected from one input terminal to one output terminal, the other input terminal and the other output terminal being; common, means connected across the inductor so as to provide therewith a delay circuit connected from the one input terminal to the one output terminal, and an echo-generating circuit connected from the center-tap of the inductor to the common terminals, the arrangement being such that when used with a matched input circuit and a matched output circuit a hybrid coupling exists between the input terminals, the output terminals, the delay circuit, and the echo-generating circuit whereby an output signal consisting of a main signal accompanied by an echo-pattern appears at the output terminals when a signal is applied at the input terminals.

2. An electrical network as claimed in claim I, wherein the shunt-inductance of the center-tapped inductor, its selfcapacitance and the network connected across the inductor form a lumped reactance approximation. to a short circuit terminated delay line.

3. An electrical network as claimed in claim 2, wherein the echo-generating circuit is such that an even-echo-pair appears at the output terminals when a signal is applied at the input terminals.

4. An electrical network as claimed in claim 2, wherein the echo-generating circuit is such that an odd-echo-pair appears at the output terminals when a signal is applied at the input terminals.

and the other output terminal being common, means connected across the inductor so as to provide therewith a delay circuit connected from the one input terminal to the one output terminal wherein the shunt-inductance of 5. An electrical network having: 5

a pair of input terminals, a pair of output terminals, a

center-tapped inductor connected front one input terminal to one output terminal, the other input terminal and the other output terminal being common, means conthe center-tapped inductor, its selfcapacitance and the network connected across the inductor form a fourthorder lumped reactance approximation to a short circuit terminated delay line, and an echo-generating circuit comprising first and second resistors and variable renected across the inductor so as to provide therewith a sistance means. The first resistor having one end condelay circuit connected from the one input terminal to nected to the center tap of the inductor and its other end the one output terminal wherein the shunt-inductance of connected to one end of the second resistor, the other the center-tapped inductor, its selfcapacitance and the end of the second resistor being connected to one end of network connected across the inductor form a lumped the variable resistance means whose other end is conreactance approximation to a shirt circuit terminated l nected to the common terminals, a fourth-order lumped delay line, and an echo-generating circuit comprising first reactance approximation to an open-circuit-terminated and second resistors and variable resistance means, the delay line connected across the first and second resistors, first resistor having one end connected to the center-tap and a fourth-order lumped reactance approximation to a of the inductor and its other end connected to one end of short-circuit-terminated delay line connected from the the second resistor, the other end of the second resistor junction of the first and second resistors to the common being connected to one end of the variable resistance terminals, the arrangement being such that when used means whose other end is connected to the common terwith a matched input circuit and a matched output circuit minals, a lumped reactance approximation to an opena hybrid coupling exists between the input terminals, the circuit terminated delay line connected across the first output terminals, the delay circuit, and the echo-generatand second resistors, and a lumped reactance approximaing circuit whereby an output signal consisting of a main tion to a short-circuit-terminated delay line connected signal accompanied by an echo-pattern appears at the from the junction of the first and second resistors to the output terminals when a signal is applied at the input tercommon terminals, the arrangement being such that minals. when used with a matched input circuit and a matched 8. An electrical network having: output circuit a hybrid coupling exists between the input a pair of input terminals, a pair of output terminals, a terminals, the output terminals, the delay circuit, and the center-tapped inductor connected from one input terecho-generating circuit whereby an output signal consistminal to one output terminal, the other input terminal ing of a main signal accompanied by an echo-pattern apand the other output terminal being common, means conpears at the output terminals when a signal is applied at nected across the inductor so as to provide therewith a the input terminals. delay circuit connected from the one input terminal to 6. An electrical network having: the one output terminal wherein the shunt-inductance of a pair of input terminals, a pair of output terminals, a the center-tapped inductor, its self -capacitance and the center-tapped inductor connected from one input ternetwork connected across the inductor form a lumped minal to one output terminal, the other input terminal reactance approximation to a short circuit terminated and the other output terminal being common, means condelay line, and an echo-generating circuit comprising a nected across the inductor so as to provide therewith a three terminal resistive pi-network having one terminal delay circuit connected from the one input terminal to connected to the center-tap of the inductor, another terthe one output terminal wherein the shunt-inductance of minal connected to the common terminals, and a conthe center-tapped inductor, its selfcapacitance and the stant impedance delay section connected from the network connected across the inductor form a lumped remaining terminal to one end of variable resistance reactance approximation to a short circuit terminated means, the other end of which is connected to the comdelay line, and an echo-generating circuit comprising first mon terminals, the arrangement being such that when and second resistors and variable resistance means comused with a matched input circuit and a matched output prising third, fourth and fifth resistors in series, a sixth circuit a hybrid coupling exists between the input tervariablc resistor connected across the third and fourth reminals, the output terminals, the delay circuit, and the sistors, and a seventh variable resistor connected across echo-generating circuit whereby an output signal consistthe fourth and fifth resistors, the first resistor having one ing of a main signal accompanied by an echo-pattern apend connected to the center tap of the inductor and its pears at the output terminals when a signal is applied at other end connected to one end of the second resistor, the input terminals. the other end of the second resistor being connected to 9. An electrical network having: one end of the variable resistance means whose other end a pair of input terminals, a pair of output terminals, a is connected to the common tenninals, a lumped center-tapped inductor connected from one input terreactance approximation to an open-circuit terminated minal to one output terminal, the other input terminal delay line connected across the first and second resistors, and the other output terminal being common, means conand a lumped reactance approximation to a short-circuitnected across the inductor so as to provide therewith a terminated delay line connected from the junction of the delay circuit connected from the one input terminal to first and second resistors to the common terminals, the the one output terminal wherein the shunt-inductance of arrangement being such that when used with a matched the center-tapped inductor, its selfcapacitance and the input circuit and a matched output circuit a hybrid network connected across the inductor form a lumped coupling exists between the input terminals, the output reactance approximation to a short circuit terminated terminals, the delay circuit, and the echo-generating cirdelay line, and an echo-generating circuit comprising a cuit whereby an output signal consisting of a main signal three terminal resistive pi-network having one terminal accompanied by an echo-pattern appears at the output connected to the center-tap of the inductor, another terterminals when a signal is applied at the input terminals. 7. An electrical network having: a pair of input terminals, a pair of output terminals, a

center-tapped inductor connected from one input terminal to one output terminal, the other input terminal minal connected to the common terminals, and a constant impedance delay section connected from the remaining terminal to one end of variable resistance means, the other end of which is connected to the common terminals, the constant impedance delay section consisting of a lumped reactance approximation to a shortcircuitsterminated delay line including a further center-tapped inductor connected from the resistive pisection to the variable resistive means, and a lumped reactance approximation to an open-circuit-terminated line connected from the center-tap of the further centertapped inductor to the common terminals, the arrangement being such that when used with a matched input circuit and a matched output circuit a hybrid coupling exists between the input terminals, the output terminals, the delay circuit, and the echo-generating circuit whereby an output signal consisting of a main signal accompanied by an echo-pattern appears at the output terminals when a signal is applied at the input terminals.

10. An electrical network having:

a pair of input terminals, a pair of output terminals, a

center-tapped inductor connected from one input terminal to one output terminal, the other input terminal and the other output terminal being common, means con nected across the inductor so as to provide therewith a delay circuit connected from the one input terminal to the one output terminal wherein the shunt-inductance of the center-tapped inductor, its selfcapacitance and the network connected across the inductor form a fourthorder lumped reactance approximation to a short circuit terminated delay line, and an echo-generating circuit comprising a three terminal resistive pi-network having one terminal connected to the center-tap of the inductor, another terminal connected to the common tenninals, and a constant impedance delay section connected from the remaining terminal to one end of variable resistance means, the other end of which is connected to the common terminals, the constant impedance delay section consisting of a fourth-order lumped reactance approximation to a short-circuit-terminated delay line including a further center-tapped inductor connected from the resistive pi-section to the variable resistive means, and a fourth-order lumped reactance approximation to an open-circuit-terminated delay line connected from the center-tap of the further center-tapped inductor to the common terminals, the arrangement being such that when used with a matched input circuit and a matched output circuit a hybrid coupling exists between the input terminals, the output terminals, the delay circuit, and the echo-generating circuit whereby an output signal consisting of a main signal accompanied by an echo-pattern appears at the output terminals when a signal is applied at the input terminals.

# l l 9 i

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US1920041 *Nov 14, 1930Jul 25, 1933Ericsson Telefon Ab L MElectrical network
US3273079 *Mar 5, 1964Sep 13, 1966Adams Russel Co IncHybrid circuit having separate coupling transformers at the sum port and difference port and having tuning means to improve operation
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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3854659 *Jul 30, 1973Dec 17, 1974Siemens AgFrequency selective circuit arrangements
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Classifications
U.S. Classification333/28.00R, 348/E07.52, 333/118
International ClassificationH04B3/04, H04B3/14, H04N7/10, H03H7/48, H03H7/00
Cooperative ClassificationH04B3/142, H03H7/48, H04N7/102
European ClassificationH03H7/48, H04N7/10C, H04B3/14B