US 3623016 A
Description (OCR text may contain errors)
United States Patent PROCESSING UNIT  inventor Vaughn D. Winkler  References Cited Poughkeepsle, N.Y. UNITED STATES PATENTS [2i] P 3.493.928 2/1970 Juliusburger H 340/l46.l d f? 3,500,327 3/1970 Belcher et al. 340/154 3 c 3,487,369 l2/l969 Kin elal 340/1726  Assignee International Business Machines g corponuon Primary Examiner- Raulfe B. Zache Armonk Assistant Examiner-R. F. Chapuran Attorney-Hanifin and Jancin  ELECTRONIC KEYBOARD I 0 Chin's, 12 Dnwing rm ABSTRACT: Keyboard providlngcharacler coded information wlth each key depression IS described. Information  US. Cl 340/1715, storage apparatus is includsd within he keyboard for storing 340/146" one or more discrete character codes By suitably controlling  ll. the access to the stored infomation' a p lhY f ticharacter messages may be obtained with each key depres-  Field ol Search i. IMO/[72.5, Sign The memory may be or the realm/rite type pcmming security control of the data transmitted between the keyboard of a terminal and the central processing unit of a computerv Provision is included in each key for providing an electronic interlock to permit operation in a burst mode.
PillOli Alli 2 CHANNELS 7C Ill" F smms 110 DEVICES N N mentor ACCESS CNT Ulll S STOMGE) 0 TERI 10 F a KEY I l I I i l DISPLAY SELECTOR v J .1 L -J L h 6 CENTRAL r o i i SHEET 2 OF 4 FIG. 4
PROXIMITY PROXIMITY PROXIMITY PROXIMITY KEY KEY KEY KEY MODULE MODULE MODULE MODULE PROXIMITY KEY MODULE PROXIMITY KEY MODULE PROXIMITY KEY MODULE PROX YMITY KEY MODULE A? B7 C7 A8 B8 C8 F Y FO CONTROLS CHARACTER BUSS FIG. 5 o +v FULL PROXIMITY KEY DEVYCE I ENERGY & TRIGGER $5 R LATCH V ENCODER 5 SOURCE DETECTOR L 40 44 l 42 43 44 l 46 PATENTEDunv 23 Ian SHEET l 0F 4 FIG. 9
PROXI H HY KEY PRO! IHITY CONTROLS FIG.
f'L" LATCH TGR LATCH ELECTRONIC KEYBOARD BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to manually accessed keyboards and, more particularly, to keyboards of the electronically responsive type providing character coded information with each key depression.
2. Description of the Prior Art With the growth in the use of high speed computers, data processors have achieved greatly improved efficiency in the handling of data. This improved efficiency has also occurred in shared processor systems. Such systems operate with many input-output devices located wither on site or at remote locations with respect to the central processing unit (CPU) of the computer. Usually they operate under different machine or operator control.
Significant problems have arisen in accessing a computer through an input-output device to permit the entry or withdrawal of data. The focus of these problems is the excessive amount of time required for performing input/output operations as compared to CPU operations. Other problems have occurred in the security of data either entered or withdrawn from a computer by different operators or one user as compared to all other users.
To facilitate the entry and withdrawal of data from such systems, key accessing systems have been proposed which allow for temporary buffer storage of the entered raw data while operation is off-line with the computer. Systems of this type have speeded overall system operation. Operating speed has been enhanced as the use of mechanical elements has been avoided by having the key accessing systems operate with electronic controls. However, keyboard systems of this type have not solved the needs for providing more functional information with each depression of a key of a keyboard. Moreover, they have not accommodated burst mode operation so that data is not lost in the input/output operation. Additionally, they have failed to provide the security of data necessary for multiple user type systems.
SUMMARY OF THE INVENTION As contrasted with the prior art types of keyboards, the keyboard of the invention utilizes medium and large scale integration in an all electronic keyboard to generate unique character codes of variable length in table look-up manner. In this keyboard mechanical contacts are eliminated for all keystroke initiations and generation of character codes.
According to one aspect of the invention, information storage means are included in the keyboard containing one or more stored character codes. Each of the keys uniquely electronically accesses the storage means through a plural line buss. Switching means operable under operator and/or machine control determine the code generated by the keyboard. The character codes may be stored in a read only or read-write memory by personalizing each key module with a particular character code through the particular etching pattern connecting the module to the plural line buss.
Another feature of the invention provides for the addition of extra lines to the buss. By utilizing suitable switching devices responsive to predetermined operators using the machine, security of the type of access permitted by a particular operator or the function to be performed is obtained.
A further feature of the invention provides for the use of a read-write buffer memory in the keyboard which is accessed through the individual keys connected into a plural line buss. The buffer memory provides an output to the keyboard I/O connection and also an indication as to the next address of data contained in the buffer. In this way multicharacter messages may be generated in response to a single key access. These messages may be of variable length.
Security of the data that is transmitted over the I/O connection may also be achieved by altering the codes stored in the memory from the computer CPU so that they are changed periodically according to a predetermined schedule. Thus, the keyboard operator cannot alter the code of the information as it is transmitted across the I/O connection.
A further feature of the invention provides for roll over control of the keys of the keyboard so that an electronic interlock is provided among the keys. A circuit in integrated form is provided on a module located in each key. When the key is depressed, the module is connected into an etched wiring pattern to provide personality. The arrangement is such that the circuit responds much faster than the operator of the keyboard. An interlock is provided for any four keys depressed at the same time. When the keyboard is operating into a fast output device, such as a display, it may be connected directly to the output device. However, if operation is to a slow output device, such as a printer, a buffer register may be included in the keyboard to provide temporary storage.
BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a block diagram of a conventional computer system from the central processing unit (CPU) and main storage to input/output devices;
FIG. 2 is a perspective view of a typical terminal having alphanumeric and function keys;
FIG. 3 is a schematic diagram showing one embodiment of the invention;
FIG. 4 is a schematic diagram showing a second embodiment of the invention;
FIG. 5 is a schematic circuit diagram of the circuit contained in each key module;
FIG. 6 is an etching pattern for the connection of the key modules to the plural line buss;
FIG. 7 is a schematic circuit diagram for illustrating the operation of the circuit of FIG. 5 in each key module;
FIG. 8 is a timing chan for use with the circuit diagram of FIG. 7-,
FIG. 9 is a modified form of the keyboard of the invention utilizing a read-write memory;
FIG. 10 is a table illustrating the operation of the apparatus of FIG. 9; and
FIG. I1 is a sectional view ofa particular key structure that may be employed in the keyboard.
FIG. 12 is a schematic diagram of circuitry that may be utilized to control the operation of the embodiment of FIG. 3.
DESCRIPTION OF THE PREFERRED EMBODIMENT The main elements of a data processing system are illustrated in FIG. 1. These include a central processing unit (CPU) I and main storage 2 which may be a core storage accessible to the central processing unit at the highest speed of the data processing operation. Connected to both the CPU and main storage are a plurality of selector channels CI, C2, C3. Although these channels are illustrated as being of the selector type, they may also be of the multiplexor type.
Channel Cl is connected through a plurality of control units CUO-CU7 to various direct access input-output (1/0) devices. The I/O devices FO-F9 are connected by control unit CU! to the selector channel Cl. These devices may be disc files of the IBM 1302 type.
Channels C2 and C3 provide communication between the CUPI and main storage 2 through control units CUlO-CUI'I and CU20-CU27 to 1/0 devices pertaining to various separate stations or terminals represented by dashed rectangles, Term 10-17 and Term 10-27. The I/O devices at the different terminals are suited to the type of data processing required by the individual station and include a means for transmitting programs and data to the CPU I and may be a display 3 and a printer 4. Also included within Term 17 or 27 is a keyboard indicated at 5 and 6.
The U0 devices, as is well known in the data processing art, may be located on site with the central processing unit and main storage or they may be at remote locations and accessible only through transmission lines. The operation of such a system is well known in the art. However, reference may be made to US. Pat. No. 3,400,37l, which issued Sept. 3, 1968 in the names of G. M. Amdahl et al. and which is assigned to the assignee of this invention, for details of the structure and operation of the system of FIG. I insofar as it is necessary for an understanding of the present invention.
As already stated, the invention of this application is an electronic keyboard. Such a keyboard is shown in FIG. 2. Alphanumeric and function keys are provided in the keyboard. Each of the keys as will be described more fully hereinafter is of the electronic type. As will be apparent to those skilled in the art, the keyboard may include many more keys which may be tailored to meet the particular field of use. Such fields include personnel, production control, stock brokerage, etc.
Referring now to FIG. 3, each of the keys I is connected through a proximity key module I5 to a plural line buss II. The bus in turn accesses information storage apparatus such as memory I2. Memory 12 stores one or more individual character codes. Thus, when a particular key is actuated, connection is made to bus II in a unique manner so that a particular character code is provided on the lines of output bus 16 for connection to a suitable I/O register I7. Register I7 need not be located in the keyboard. Connection is made from the register I7 directly to a control unit such as CU I7 of FIG. I or through a communications terminal to the control unit. Connection may also be made to another input/output device associated with the control unit such as a connection from keyboard 5 to display 3 of FIG. I.
The operation of the memory which provides the character code to the I/O register is performed under suitable control, timing and interlock circuits I4. Using these circuits the character code provided through buss I6 is transferred to register 17 for temporary storage or connection to H0 buss I8.
FIG. 12 is illustrative of circuitry that may be utilized to transfer the character code from memory I2 to I/O buss I8. The circuitry comprises single shot circuit 8I which is activated through 0R circuit 80 connected to buss 11. During the period when latch 44 of FIG. 5 is in an activated condition, single shot 81 provides a pulse to control the data flow. The pulse is provided as a data select pulse to memory I2 and as a set signal for register I7. It also activates single shot 82 which controls a data ready trigger 83. Through connection 84 it resets the latch 44 of FIG. 5. Control trigger l3 depends for its operation on the system to which the keyboard is connected. It remains in the data ready condition until a request is made by the user for the data, at which time the data is transferred from register I7 to [/0 bus 1!. When this occurs a reset is provided from register I7 to control trigger 83.
Typically, bus 11 may be an eight line buss which provides an eight bit address to memory I2. With such an arrangement the memory provides one out of 256 possible messages on buss 16. The length of these messages may be the same or they may be of differing lengths, that is, each message may be formed of many words of differing length.
Memory I2 is preferably formed in monolithic manner on a suitable semiconductor substrate or plurality of such substrates in accordance with well known integrated circuit techniques. It may be a read only or read-write type of information storage apparatus. The memory may store a single code or several codes in the same storage apparatus. When several such codes are stored, a particular one is selected by adding additional lines to buss lI. Decoders are connected in the path of buss 11 before memory 12 for code selection. This would enable different operators to access for different codes. Thus, the binary code decimal (BCD) code, the ASCII code or EBCDIC code could each be stored in a separate portion of the storage apparatus.
Additional lines may also be included in buss II for operator or function control. For example, by adding two additional lines to the eight line buss, access is provided through the keyboard for independent operation by four different operatots. Similarly, the additional lines permit four separate types of instructions or messages to be selected from memory 12. The use of the additional lines with the decoding would also permit different operations or variations on the same operation to be performed. Thus, if the keyboard was connected to a printing device the types of instructions could be for printing in bold type or with particular mathematical signs or in small case letters. The use of the additional lines also enables security to be maintained over the data stored in memory I2. Thus, if four different operators are each capable of accessing the memory through the key devices, access would be provided to a particular part of the memory to select the information stored in it only when a particular entry sign or identifying code is presented.
Referring now to FIG. 4, a simplified version of the memory apparatus is depicted. Each of the key modules I5 is uniquely connected to a plural line bus I IA, 115. This is accomplished through the etching pattern of each key module to the buss. Such an etching pattern is shown in FIG. 6. A module is connected into connections 19 of one of the pin arrangements 20. 2I. By suitably etching the pattern of conductors 27 of this buss a unique character code is formed for each of the key modules. Thus, the character code information storage function is performed as an integral part of the etched wiring pattern. This arrangement is capable of encoding each key in an eight bit character code.
As shown in FIG. 4, each buss IIA, IIB is connected into a character bus 23 which performs a dot OR" logical function providing the character codes for the selected keys in sequential manner over the intermediate bus 24 to an [/0 buffer stacking register 25. The purpose of register 25 is to load and transmit the character codes in sequence on a first-in/first-out basis to [/0 bus 22. This is accomplished under suitable firstin/first-out controls 26.
The first-in/first-out controls operate with four position register 25 which receives an eight bit character over bus 24. Controls 26 alert the user of the availability of these characters and transmit them at the user's synchronous rate. Register 25 accommodates overrun of up to three characters at the in put. Control is exercised using an input binary counter on data received on buss 24 by controls 26. A write condition is created for all register positions. However, only one register is conditioned to receive data by the input binary counter. As soon as the write condition is created, the A position register 25 is loaded. After a delay, determined by the counter. the characters are advanced preparatory to receiving the next input character. In the circuitry shown in FIG. 4 up to four consecutive characters can be stored. If none of this information is provided on the output buss 22 overload control circuitry prevents further loading of the registers. As each rcgister is loaded an extra character is provided and through this arrangement the user is alerted that one or more of the registers is loaded. An output binary counter is utilized to establish a read instruction. When the read instruction is received at the register, the character is immediately gated out from the register position and after a delay the accessed register is cleared and the output counter is advanced preparatory to the next read. Register 25 loads and unloads the characters in sequential order. During this loading and unloading process, a write operation can take place simultaneously with a read operation at two different positions of the register.
As has already been emphasized, when the keyboard arrangement is directly connected to an input/output device that operates at high speeds, such as a display, it is not necessary to employ the buffer register 25. The bus 24 can be directly connected through the [/0 connection to the display unit. On the other hand, when the keyboard is connected for operation to a relatively slow responsive device, such as a printer, the I/O buffer stack register is utilized to accomplish temporary storage of the character codes provided over buss 24.
Referring now to FIG. 7, the keys I0 associated with the proximity key modules 30-33 spell the word I-IELP when reading from right to left. When an operator isaccessing keys 30-33 in right to left order, it is necessary to assure that the characters appear in the same order in the l/O buffer stack register 34 over the buss 35 to the data or character buss 36 and through buss 37 to register 34. This is accomplished through a roll-over control of keys 10. A circuit which responds considerably faster than the response of the keyboard operator is included in each key module to perform this roll-over control function.
In the particular arrangement of FIG. 7 each of the key modules 30-33 is connected into bus 35 according to an etching arrangement which attaches personality to that connection. It is readily apparent that connection could also be made to a storage apparatus such as shown in FIG. 3.
Located within each key module 30-33 of FIG. 7 is the circuit of FIG. 5. The circuit is formed in integrated manner on the module associated with each key. Depression of key energy source 40 activates the circuit. Response occurs in the proximity device and detector 41. Such a switching device may act according to many well-known principles. Such devices are capacitive bridges, inductive coil, Hall effect or light-emitting circuit arrangements. However, the preferred form of such device is a proximity device that responds according to a magnetoresistive effect to detect the activation of the key energy source 40 to activate a trigger circuit 42. Cir cuit 42 is any conventional bistable trigger which activates a single shot circuit 43. Trigger 42 remains in its set state so long as proximity device 41 detects the depression of the key energy source 40. When the key energy source is deactivated, the trigger circuit is reset.
Single shot circuit 43 which is a monostable multivibrator sets a latch circuit 44 for a momentary period oftime to assure that a one-time pulse generator-type input is provided to the latch. To prevent a repeat of a character and to prevent the loss of a character, latch 44 provides an input to encoder 45 which may take the form of the etched personalized wiring pattern of the particular key on the buss 46. The reset R for latch 44 is provided from the first-in/first-out controls 38 of the I/O buffer stack register 34 of FIG. 7. Latch 44 responds in the period when trigger 42 is in a set condition in response to the energization of key energy source 40.
The circuit arrangement of FIG. 5 in each key module prevents any overrun condition on the input/output device connected to the keyboard. It enables multiple key depressions to be made without the loss of any character. It is readily apparent that the circuit arrangement included in FIG. 5 may be utilized in the keyboard apparatus that includes a memory apparatus such as that shown in FIG. 3 or it may be included in the keyboard apparatus of FIG. 4 when the character code generation is performed through a simple etched wiring pattern for each key. In the instance where a storage apparatus is included it would be provided after the buffer stack register 34 of FIG. 7. The particular circuit arrangement of FIG. 5 permits up to four characters or keys to be accessed substantially concurrently without the loss of any character and with the assurance that the characters are provided along the buss in the proper sequence.
A timing diagram illustrating this aspect of operation is shown in FIG. 8. The response of the trigger circuits (TGR) associated with each of the keys for the characters H E L P is shown on lines a,c,e and g, respectively. It is observed that all of these lines are in an up" or activated state at the same time. Without the use of the additional pulse generating single shot circuit and latch in each proximity key module, some of these characters would be lost and would not be provided along the output buss. With the inclusion of the latch circuits whose timing is indicated on the lines b,d,f and h, respectively, assurance occurs that the character code for that key is encoded on the buss 35 of FIG. 7. The latch responds in each instance al'ter the associated trigger circuit is activated and remains on for a momentary period of time which is sufi'icient to assure that a character is not lost.
Referring now to FIG. I l, a particular form of key module is shown. The phenomenon of magnetoresistivity is utilized to eliminate contacts to switches in the electronic keyboard. In
this switch, a magnetic field is formed within the vicinity of a current carrying semiconductor. A longitudinal electromotive force is established which is related to the mobility of the semiconductor. the strength of the magnetic field and the magnitude of the current. As the velocity of the current through the semiconductor is a distribution of velocities, the presence of a magnetic field and the associated Lorenz force affects the components of the velocity in direct relationship to their magnitude, causing the magnetoresistive phenomenon to occur. A net ohmic drop takes place in the direction of current flow which is reflected in the circuit formed on the semiconductor.
A plastic housing carries a force displacement transducer 5], having a key top 52 mounted on top of it. A semiconductor module 53 is seated within housing 50 and through pin connections 54 makes appropriate contact with the wiring pattern on an etched board 55 which may take the form shown in FIG. 6. Also contained within the housing is a plunger 56 positioned to ride within the grooves 57. Plunger 56 has a permanent magnet 58 affixed to it. When key top 52 is depressed, permanent magnet 58 is brought into proximity with the semiconductor device 59 mounted on module 53. The longitudinal electromotive force is then produced. Indium antimonide has a mobility of 80,000 cm.v""'"sec." and is suitable for use as the semiconductor material. A change in resistivity takes place in the presence of the magnetic field. This resistance is converted to the voltage by passing a suitable current through semiconductor device 59.
A further embodiment employing a read-write memory is shown in FIG. 9. In this embodiment the proximity key modules 60 are connected as described above in connection with the descriptions of FIGS. 3 and 7 to a plural line buss 6I. Read-write buffer memory 62 is formed in monolithic manner on one or more semiconductor memory chips in the keyboard. Associated with the memory is a storage address register 63 which accepts the eight bit byte of character generation information for each key. Also connected to register 63 is a second buss 64 which is coupled to the output registers 65 of buffer memory 62. These registers include a data register 66, an end operation circuit 67 and a next address circuit 68. The entire arrangement operates under suitable control, timing and interlock circuits 69.
Control circuits 69 comprise a keyboard read-write control trigger that is set and reset from the central processing unit to enable the character codes to be written into the memory. These controls for writing into the memory are similar to those employed in any conventional read-write memory. The controls necessary for transferring the next address to storage register 63 and detecting the end of the operation at 67 are similar to those utilized with any conventional control memory. For detecting a key depression and storing a proper charactercode in the register the circuitry of FIG. 12 may be utilized. It is readily apparent that all of these circuits are well known in the art and it is considered that no further description of them is necessary.
The arrangement of FIG. 9 is particularly applicable to operation in a telecommunication type of system. Thus, control can be exercised through the bidirectional input/output bussing arrangement 71 for the data register 70. The control is exercised from the CPU through the selector channel and control unit across a telecommunications link. It is recognized that absolute security of data cannot be achieved and that the coding of data may be broken using computer systems during extended periods of time. However, by utilizing the arrangement of FIG. 9, the code of the information transmitted through the telecommunications link may be changed according to any predetermined frequency or according to predetermined circumstances and therefore, the security of the transmitted data is considerably increased. Thus, the code may be changed for each message that is transmitted or after a fixed period of time, or at prearranged times. The change in the code is accomplished from the CPU and the code can be a prefix or suffix to the data or interspersed with the data.
In the particular arrangement of FIG. 9, storage address register 63 may be formed of eight latches, thus providing 256 possible outputs. Memory 62 which may be a core memory but which is preferably a memory in monolithic form, may have stored N times 256 words each of l6 bits length. Eight bits of each word are provided as the data to the CPU over the bus 70. The other eight bits are provided as the next address from the circuit 68 over buss 64. This multiple cycling of the memory for each accessing of a key is performed for the function keys only.
A table is presented in FIG. 10 showing the use of a 66 key keyboard. The first 26 keys of which are allocated to the alphabetic characters, the next l to numeric characters and the remainder of such keys to functional operations. In each instance, for the alphabetic and numeric characters, the next address is not provided and the output data is the particular data requested when accessing the key. When any one of these keys is accessed, the operation performed is a transfer data over the buss 70 and end operation indication from the circuit 67. For the function keys, indicated in the table as 64-66, the next address for an accessing of key 64 will be key 65. This may be the identifying information number for a particular individual. The operation that is performed is the transfer of this number over buss 70 and the provision of the next address 68. Similarly, this address may provide the department number and the address for the next operation which is the location number of that department number. After a number ofcycling operations for the accessing of a single function key, an end operation indication is provided at 72. This indication may take the form of an all zeros indication. However, other manifestations of this indication may also be utilized.
It is readily apparent that the apparatus of the invention which includes character generating means within an electronic keyboard provides for table look-up, character code generation that may be augmented to include multiple memory chips for multiple character codes, selectable under operator and/or machine control. It also provides for simplification of the character code generation and the securing of data across an input/output telecommunication line. Each of the keys utilized in the keyboard is provided with an electronic interlock to protect against multiple key burst role operations without requiring the use of a plurality of mechanical parts. It is further accomplished without losing the key force displace ment tactile field necessary for such keys.
What is claimed is:
l. in a keyboard,
a plurality of accessing keys, each ofsaid keys comprising key entry and detecting means,
means for generating a controlled duration signal preventing an overrun of said key when accessed in substantially the same time period of any other of said keys, and
means responsive to said controlled duration signal for providing a unique encoded manifestation for said lteyv 2. In the keyboard of claim I, and further comprising a plural line buss coupled to the encoding means of each of said keys, and an output buss, and
buffer register means between said busses for accepting the unique manifestations from a predetermined number of a plurality of said keys accessed sequentially within substantially the same time period and for providing said manifestations to said output buss.
3. In the keyboard of claim 2, and further comprising character code memory means connected in said output buss for storing plural bit messages and responsive to the respective unique manifestations in sequence to provide a plural bit message to said output buss for each manifestation.
4. In the keyboard of claim 3, wherein the memory means comprises next address means coupling the output of said memory means to its input, so that a portion of said message for each manifestation is provided to said output buss as data and the remaining portion of said message is provided to said memory means as the next address of data in the memory means.
5. A key for an electronic keyboard, comprising entry and detecting means,
means for generating a controlled duration signal in response to the depression of said key, and
means responsive to said signal for providing a unique encoded manifestation for said key in said keyboard.
6. An electronic keyboard for accessing utilization apparatus through input-output means, comprising information storage apparatus for storing data in at least one character code,
a first plural line buss for accessing said apparatus,
a plurality of accessing keys, each key being uniquely connected to said first buss, and
a second plural line bus for bidirectionally coupling said apparatus to said input-output means,
said apparatus comprising a read-write memory accessible through said first buss for reading of a message to said second bus and writable through said second buss, so that the character code of the messages read from said apparatus are changeable from said utilization apparatus through said input-output means.
7. A keyboard for accessing a utilization apparatus through input/output means, comprising:
a plurality of accessing keys;
a signal bit-pulse source for each of said keys;
a plural line bus coupled to said input/output means;
encoding means coupling said signal-pulse source for each of said keys, to predetermined lines of said bus;
said encoding means comprising a coded circuit connection pattern in said bus for connection of said signal-pulse source for each of said keys, to said bus, said signal-pulse source generating and transmitting along said first bus, to said input/output means, predetermined messages, each having a bit content equivalent to the number of lines in said bus.
8. A keyboard for accessing a utilization apparatus through input/output means comprising:
a plurality of accessing keys;
at signal-pulse source for each of said keys;
a first plural line bus;
encoding means coupling said signal-pulse source for each of said keys, to predetermined lines of said first bus;
said encoding means comprising a coded circuit connection pattern in said first bus for connection of said signal-pulse source for each of said keys, to said first bus, said signalpulse source generating and transmitting along said first bus, predetermined, plural bit addresses, each of said addresses having a bit content equivalent to the number of lines in said first bus;
a read only storage means located in said keyboard and coupled to said first bus after its coupling to said encoding means, for storing a plurality of coded words, each corresponding to a plural bit character;
a second plural line bus coupling said storage means, after its coupling to said first bus, to said input/output means; said signal-pulse source generating a pulse when said corresponding key is accessed, said pulse being encoded by said encoding means into an address to a storage location in said read only storage means, said plural bit, address signal causing said storage means to generate a coded, plural bit, character and to transmit same in a single step, parallel-by-bit mode on said second bus to said input/our put means, said character having a bit content equal to the number oflines of said second bus.
9. In the keyboard ofclaim 8, wherein said storage means further comprises addressing means coupled to said first buss, memory means coupled to said addressing means for storing a plurality of words of data. each of said words being comprised of coded character and next address information, and means for coupling the next address portion of the message from said memory means to the addressing means as the next address for said memory means, said coupling generating a multiple cycling of the read operation of said memory upon accessing a predetermined one of said keys, whereby a predetermined ones of said keys and said keyboard comprises means connected to said additional lines for selectin the code of the message provided from said storage means to said input-output means.
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