|Publication number||US3623066 A|
|Publication date||Nov 23, 1971|
|Filing date||Dec 16, 1968|
|Priority date||Dec 16, 1968|
|Publication number||US 3623066 A, US 3623066A, US-A-3623066, US3623066 A, US3623066A|
|Inventors||Norris William F|
|Original Assignee||Seismograph Service Corp|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (4), Referenced by (27), Classifications (8)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent  Inventor William F. Norris 3,492,650 1/1970 Hesselgren 340/l76 X Tulsa, Okla. 3,258,743 6/1966 Schuster 340/324 X 1968 Primary [Stamina-John W. Caldwell Assistant bxammerM1chael Slobasky  Patented 1971 Attorney-Mason Kolehmainen Rathburn and W ss  Assignee Seismograph Service Corporation y Tulsa, Okla.
ABSTRACT: A programmable computer for controlling the sequential illumination of a plurality of light sources or lam s.  g e i LAMP ILLUMINATION Properly programmed, this unit can produce up to 400 d if- 11 Claims 7 Drawing g ferent lighting patterns in a plurality of light sources. Provision is made for illuminating different lamps sequentially and also  US. Cl 340/324 R, for including a single lamp in more than one illumination pat- 340/332, 29/203 MW tern. The computer and the light sources are intended for use [5 l] Int. Cl G08b 5/36 as a guide to assemblers of wiring harnesses in the electronics  Field of Search 340/332, industry. In addition to the above-mentioned illumination con- 176, 324, 334; 29/203 MW trol facilities, the computer includes circuitry to aid in tracing out and separating the various wires contained in a multicon- References Cited ductor cable. A set of 40 leads are used to connect the light UNITED STATES PATENTS sources to the computer. Programming is achieved by inter- 2,s44,s11 -7/l958 Burkhart 340/176X Posing logic elements between these 40 leads and the light 3,407,480 10/1968 Hill et a1, 29/203 x Sources- N 0 Ni N 2 M J J llO PATENTEUHuv 23 |97l SHEET 1 BF 5 AT T YS PATENTEUuuv 23 Ian SHEET 2 BF 5 CIRCUIT BREAKER 532FORMER EXTERNAL ADVANC E SWITCH PATENTEUHUY 23 |97l 3, 623.066
SHEET 3 [IF 5 PATENTEUuuv 23 1911 saw u [1F CIRCUIT BREAKER iiiiizziiiiiiiiiiii A iiiiiiiiiiiiiiiiiiiiQ PATENTEUHUY 23 van 3, 623 066 SHEET 5 [1F 5 1 PROGRAMMABLE LAMP ILLUMINATION DEVICE The present invention relates to lamp illumination controllers, and more particularly to controllers suitable for guiding an assembler of wire harnesses in the layout of wires comprising the harness.
In the past, it has been customary to construct the complicated wiring harnesses needed in the electronics industry by first placing a blueprint of the harness on a table, and then assembling the wire harness directly over the blueprint. Each time the assembler places another wire into the harness, he has to consult the wiring list or the blueprint to determine what length of wire is required, obtain a wire, and then place it into the harness. The procedure is slow, since the assembler must refer to a diagram or a print before placing each wire. It is easy for the assembler to miss a wire, or misplace a wire, so errors in wiring occur frequently.
A device for guiding an assembler of harnesses in placing his wires is disclosed in an application for letters patent filed by Gerald D. Holmburg, Ser. No. 769,900 filed Oct. 23, 1968 and assigned to the same assignee as the present application. The Holmburg application discloses an arrangement whereby sets of three lamps are sequentially illuminated to guide the harness assembler. One lamp within each set is placed next to the container where the proper length wire is stored, and the remaining lamps in the set are placed at the locations where the wire is to begin and where it is to end in the harness assembly. A lamp illumination control then sequentially illuminates the sets of three lamps, one set at a time. The lamp illumination control is caused to advance from one set to the next by a footswitch which the assembler depresses after each wire is placed into the harness assembly. The assembler removes a wire from the illuminated container, places it in the harness so that it extends between the illuminated lights on the harness wiring board, and then depresses the footswitch to illuminate the next set of lights. In this manner, an entire wiring harness can be assembled rapidly and with little chance for error.
The Holmburg apparatus utilizes a lamp illumination device which is essentially a 50-position stepping switch that can sequentially illuminate up to 50 sets of lamps. The Holmburg lamp illumination device is unable to illuminate a single lamp more than once during a given SO-step sequence, and cannot provide more than 50 different patterns of illumination. More combinations can be added to the Holmburg device only by adding additional stepping relays to the programmer or by increasing the number of positions on each stepping relay. An additional drawback of the Holmburg apparatus is that it requires a separate output terminal for each set of lamps. Thus, if the Holmburg device were redesigned to give several hundred combinations, it would have to be provided with several hundred separate output terminals. Such a large array of output terminals would make it difficult to reprogram the device for a different harness layout, and also would add significantly to the expense of the apparatus.
It is an object, therefore, of the present invention to provide a programmable device for controlling lamp illumination that can provide several hundred different illumination patterns, but that never requires more than 2 N output terminals to produce N different illumination patterns. Thus, 40-output terminals suffice to provide 400 different illumination patterns.
A further object of the present invention is to provide a programmable lamp illumination device that can illuminate any individual lamp during any of a number of lighting sequences, and that does not have to have an entirely separate set of lamps for each possible lighting sequence.
Another object of the present invention is to provide a device which can determine the placement of the individual conductors within a multiwire cable without requiring an assembler to refer to-the color coding of the wires within the cable.
In accordance with these and many other objects, the present invention comprises a programmable computer for sequential illumination of a plurality of light sources or lamps. The device includes basically two stepping relays, one associated with a plurality of positive output leads, and another associated with a plurality of negative output leads. One of the output stepping relays advances either when a footswitch is depressed, or else sequentially after a fixed length of time. The second stepping relay advances one position each time the first stepping relay advances through its entire complement of output leads. At any given time, only one positive and only one negative output lead is energized, and only lamps interconnecting the energized leads are illuminated.
Programming comprises connecting lamps to the various positive and negative output leads with logic gates and elements. As a simple example, a lamp in series with a diode can be connected between a given positive and a given negative lead. This lamp is illuminated only when both of the chosen leads are energized. A lamp connected in this manner is illuminated only once during an entire sequence of illumination patterns. Much more complicated arrangements of lamp illumination can be provided. For example, one end of a lamp can be connected to a positive lead, and the other end of the same lamp can be connected by diodes to two, three or more negative leads. Such a lamp is illuminated when the positive lead and any one of the negative leads are supplied with power by the stepping switches. ln this manner, a single lamp can be included in two, three, and four or more different illumination patterns. Much more complicated arrangements using logic elements such as transistor NOR gates and NAND gates will be discussed in detail in the specification to follow.
In addition to the above facilities, the present invention also provides means whereby complicated multiconductor cables can be laid into a wiring harness. The cables are plugged into a plug that is wired together with lamps placed in the locations to which the cable wires are to be run. A probe from the computer is then sequentially touched against each of the leads coming from the multiconductor cable. As each lead is touched by the probe, one or more lamps on the assembly table are illuminated, thus indicating where that particular wire is to be placed. In this manner, a multiconductor cable can be quickly placed into a wiring harness.
The present invention is equipped with switches pennitting the number of available positive and negative leads to be reduced from a maximum number in the case of harnesses not requiring 400 lighting combinations. This reduction in number of available leads is accomplished by two switches, one associated with positive leads, and one associated with the negative leads. Each of these switches can be set to cause the associated stepping relay to slew past any desired number of leads. In this way, the number of available output leads can be varied over a wide range to suit difi'ering applications.
Additional objects and advantages will become apparent in considering the following detailed description in conjunction with the drawings in which:
FIG. I is a perspective view of a wiring harness assembly table of a type suitable for use with the present invention;
FIG. 2 is an elevational view of a sequential lamp illumination computer switching unit 500 designed in accordance with the present invention;
FIG. 3 is a block diagram of the switching unit 500;
FIGS. 4A and 48, when placed side by side, form a detailed schematic diagram of the sequential lamp illumination switching unit 500;
FIG. 5 shows one possible way in which a lamp illumination computer designed in accordance with the present invention can be programmed to illuminate a plurality of lamps;
FIG. 6 shows how a lamp illumination computer designed in accordance with the present invention can be programmed to guide the placement of leads in a multiconductor cable.
Referring now to the drawings, FIG. 1 shows a typical wiring harness assembly area of the type disclosed in the Holmburg application. Difiering lengths and types of wires are stored in a plurality of tubular wire storage compartments 10. Each compartment is equipped with a source of illumination or lamp l2.
The sources of illumination 12 are sequentially illuminated and serve as an indication of which compartment wire is to be withdrawn from at any given time. A table 14 is provided upon which a wiring harness can be assembled. Individual lamps are mounted upon the table 14 and are oriented to serve as guides to the assembler of the harness. Pins, springs, and other devices useful for holding the elements of a wiring harness in place are also positioned upon the table 14. The details of the lamp positioning and harness wire location equipment are disclosed in the Holmburg application, and will not be repeated here. For the purposes of the present invention, any suitable arrangement for positioning a plurality of lights and for holding the elements of a wiring harness in place can be used. There is one important difierence between the present apparatus and the apparatus described in the concurrently filed Holmburg application. In the present apparatus, the lamps must be insulatively mounted, and two individual power leads usually must be provided for each lamp. In the Holmburg device a metallic chassis is used as a common ground for one terminal of each lamp and also serves as a lamp-mounting board. If the Holmburg device is to be used in conjunction with the present invention, it must be modified to insulate the lamps from one another. For example, the metallic chassis can be replaced by a nonmetallic insulative chassis, and an additional lead can be added to each lamp.
The computer switching unit that sequentially energizes the lamps is indicated by 500 inFlG. l, and the front panel of this unit is shown in FIG. 2. The controls shown in FIG. 2 will be explained below.
Referring now to FIGS. 3 and 5, there is shown a programmable lamp illumination computer designed in accordance with the present invention. FIG. 3 is a block diagram of the computer switching unit 500. The output of the unit 500 (FIG. 3) comprises 40 output leads M 1 through M 20 and N ll through N 19. The switching circuitry of FIG. 3 first energizes the lead N and sequentially energizes each of the leads M 1 through M 20. The lead N I is then energized and the leads M 1 through M 20 are again sequentially energized. This process continues until all of the leads have been sequentially energized.
FIG. shows the programming logic used to interconnect the 40-output leads from the computer switching unit 500 (FIG. 3) and the lamps or sources of illumination. In FIG. 5, the M-output leads are represented by horizontal lines, and the N-output leads are represented by vertical lines. At each location where an M-line crosses an N-line, one or more lamps wired in series with diodes are connected between the N-line and the M-line. These lamps or groupings of lamps have been given numbers 101 through 124 in FIG. 5. The lamp 101 is energized when the lines M 1 and N 0 are energized. The lamp 102 is energized when the lines M 2 and N 0 are energized. In a similar manner, all of the other lamps are also energized when their corresponding pairs of lines are energized. Since the entire sequence of M-lines is energized each'time a single N is energized, the lamps are illuminated in the same order as they are numbered, that is, lamp 101 is illuminated first, then lamp 102, then lamp 103, and so forth to lamp 124. These lamps can be thought of as connected to their corresponding two lines by a form of AND circuit which requires both of the corresponding lines to be energized before a lamp is energized. This is not precisely true, since the M-lines are energized by a positive potential whereas the N-lines are energized by a negative potential. The lamp diode circuits thus comprise a very simple form of logic circuit for indicating when a particular pair of lines are both energized.
More complicated logic circuits can also be used to illuminate a particular lamp at more than one time. For example, the lamp I52 is illuminated whenever the lamps 106, 107, 108, or 112 are illuminated. A transistor 150 illuminates the lamp 152 whenever one of the lamps 106 to 108 is illuminated. The transistor 150 conducts whenever its emitter, which connects to the line N I, is negative, and simultaneously its base is positive. The base of the transistor 150 is connected through a resistor 163 and diodes to 162 to the three lines M 2 to M t. Thus, whenever the line N 1 is negative and one of the three lines M 2 to M 4 are positive, the transistor I50 conducts and illuminates the lamp 152. The elements 150, 160, 161, I62, and 163 comprise a diode-transistor NOR gate that is activated when the line N I is negative. The lamp 152 is also illuminated when the transistor I51 conducts. The transistor 151 conducts whenever both the line N 2 and the line M 4 are energized, and thus illuminates the lamp 152 whenever the lamp 1 I2 is illuminated. The transistor 151 and the associated circuitry comprise an inverting or NOT gate, and the connection between the collectors of the transistors 151 and 152 is equivalent to an OR logic gate.
Another lamp 154 is illuminated in a manner similar to the way in which the lamp 152 is illuminated. A transistor 156 illuminates the lamp 154 whenever the line M 3 supplies a positive potential to the emitter of the transistor 156, and one of the lines N 3 through N 5 supplies a negative potential through one of the diodes through 172 and a resistor 173 to the base of the transistor 156. A second transistor 15S illuminates the lamp 154 whenever the line M 4 is positive and the line N 5 is negative. The elements 156 and 170-173 comprise a NAND gate activated by the line M 3. The transistor 155 and the associated circuitry comprises an inverting or NOT gate enabled by the line M 4. The interconnection between the collectors of the transistors 155 and 156 is equivalent to an OR logic gate, so either transistor can illuminate the lamp 154.
A lamp 153 is arranged to be illuminated whenever the line M 1 is positive and one of the four lines N 2 through N 5 are negative. The diodes connecting the lamp 153 to the four lines N 2-N 5 comprise an AND gate or inverted signal OR gate that passes a negative signal to the lamp 153 whenever any of the lines are negative. Another lamp is energized whenever the line N 0 is negative and one of the four lines M 1 to M 4 is positive. This lamp is connected in a manner similar to the way the lamp 153 is connected, except that the diodes are reversed to compensate for the change in the polarity of the energized lines. The set of diodes associated with the lamp 180 comprise an OR logic gate.
The lamps shown in FIG. 5 are arranged so that when any one M-line receives a positive potential and any one N-line receives a negative potential, two and only two lamps are energized. For example, when the lines M I and N 0 are energized, lamps Ii and 180 are illuminated. When the lines N l and M 1 are energized, the two lamps 105 are illuminated. One of these lamps in assumed to be located adjacent the wire storage receptacle 10 (H6. 1) where a wire of the proper length is stored. The other lamp is located in the wiring harness assembly area and serves as a guide to the assembler as to the placement of the wire. It is understood that more than one lamp may be required to indicate where a wire is to be placed, and that extra lamps may be connected in parallel or in series with the lamps shown in FIG. 5 as may be convenient.
Referring now to FIG. 3, the computer switching unit 500 for sequentially energizing the M- and N-lines in FIG. 5 is shown in block diagram form. This circuit includes two stepping relay switches, SM and SN. The switches themselves are not shown in FIG. 3, but all of the wiper arms and contacts associated with the switches are shown in FIG. 3. The two stepping relay switches SM and SN each include four wiper arms labeled respectively A, B, C, and D. The A- and Bwiper arms each have 26 sequential contacts-a home (H) contact, and contacts labeled 1 25. The A-wiper arms (SMA, SNA) are used to control the slewing of the two stepping relay switches, as will be explained. The B-wiper arms (SMB, SNB) are respectively used to energize the M- and N-series of output leads. The M-series of output leads are successively connected to a positive potential by the wiper arm SMB of the stepping relay switch SM, and the N-series of output leads are successively grounded by the wiper arm SNB of the stepping relay switch SN. The C-wiper arms, (SMC, SNC) of each stepping relay switch are in the position shown in FIG. 3 only when the associated stepping relay switches are in the home position. At
all other times, the C-wiper arm is in the opposite state from that shown in FIG. 3. The D-wiper arms (SMD, SND) are in the position shown whenever the associated stepping relay switch is at rest. When a stepping relay switch is energized, the D-wiper arm shifts momentarily into the other position. A relay coil is associated with each of the stepping relay switches. A coil KM is associated with the switch SM, and a coil KN is associated with the switch SN.
When the switch 502 is closed, a power supply 504 is energized to maintain a potential between a ground node 506 and a 8+ node 508. When a start pushbutton 510 is depressed by the cable assembler, the positive potential from the 8+ node 508 is applied to the wiper arm SNA. Positive current flows through this wiper arm, the contact H, the wiper arm SND, and energizes the relay coil KN and causes the stepping switch relay SN to advance 1 position. The wiper arm SNA is now touching its associated first contact, and the wiper arm SNB is now grounding its associated first contact. Since the first contact associated with the wiper arm SNB connects to the N output line, that line is now energized with a ground level negative potential. The switch SNC now shifts to the opposite position from its position as shown in FIG. 3 and connects the B+ node 508 to a node 512. Positive current now flows from the node 512 to the wiper arm SMA, and through a diode 514 to the wiper arm SNA. The two wiper arms SMA and SNA remain connected to the B+ node 508 until the computer switching unit 500 has operated through an entire illumination cycle. The node 512 is also connected to the wiper arm SMB by a circuit breaker 516. The wiper arm SMB remains continuously supplied with a positive potential until the computer switching unit 500 has operated through an entire illumination cycle, and the wiper arm SNB remains continuously grounded. The wiper arm SMB now sequentially energizes the leads M l to M 20, and the wiper arm SNB sequentially energizes the leads N 0 through N 19 as explained above.
The positive potential on the wiper arm SMA causes a current to flow through the contact H, a diode 520, an AND-gate 522, the wiper arm SMD, and into the relay coil KM. This current energizes the stepping switch relay SM and causes it to advance the wiper arms SMA and SMB to their respective first contact positions, thus energizing the line M 1. Simultaneously, the wiper arm SMC changes its state and supplies a positive potential to a pacer 524. The pacer 524 is a pulse generator that generates a pulse every to 90 seconds, depending upon how it is set up. Connected to the pacer 524 is an external advance switch 526, usually a foot switch that can be depressed by the cable assembler whenever it is desired to have the pacer generate a pulse prematurely. Periodically the pacer 524 generates a pulse which passes through a wiper arm 528B of a slew switch 528 and activates a one-shot 530. The one-shot 530 applies a surge of current through the wiper arm SMD to the stepping switch relay coil KM. This surge of stepping switch relay SM to advance one position. Thus, the wiper arm SMB is periodically advanced so as to energize each of the lines M 1 through M 20. In this manner, all of the lines M 1 through M 20 are sequentially energized.
When the wiper anns SMA and SMB reach their respective contacts 21, a current path is established from the positive potential node 512 through the wiper arm SMA, the contacts 21-24, the diode 520, the AND-gate 522, and the wiper arm SMD to the relay coil KM. This current causes the relay SM to slew until the wiper arms SMA and SMB reach their respective contacts 25. A current path is now established from the positive potential node 512, through the wiper arm SMA and the contact 25 to a pulse former 532. This pulse former supplies a single pulse to a one-shot 534 and causes the one-shot 534 to supply a current pulse through the wiper arm SND to the stepping switch relay coil KN. This current pulse advances the stepping switch relay SN so that the wiper arms SNA and SNB advance to their respective second contacts. As noted above, the wiper arm SND momentarily toggles to its alternate position while the stepping switch relay SN advances. When this happens, a low-level residual current flows from the one shot 534 through the wiper arm SND and the slew switch wiper arms 528C and 5288 and into the one-shot 530. This residual current fires the one-shot 530 and causes a current pulse to be applied to the relay coil KM, thus advancing the stepping switch relay SM to the home position. As explained above, the stepping switch relay SM immediately advances the wiper ar'ms SMA and SMB to their respective first contact position thus energizing the line M 1 once again. At this point in time the lines M 1 and N l are both energized, and they illuminate the lamps shown in FIG. 5. The pacer 524 continues to generate pulses, and these pulses cause the stepping switch relay SM to advance the wiper arm SMB so that is once again sequentially energizes all of the lines M 1 through M 20. This causes the lamps 105 to 108 and all lamps similarly connected to the line N l to be sequentially energized.
In a like manner, each of the lines N 0 to N 19 is sequentially energized with a ground level signal by the wiper arm SNB. Each time one of these lines is energized, the entire sequence of lines M 1 through M 20 are sequentially energized with a positive potential by the wiper arm SMB. This causes all of the lamps shown in FIG. 5 to be illuminated in the manner explained above. The total number of possible illumination patterns that can be generated by this arrangement is equal to the number of M-lines multiplied by the number of N-lines, in this case 400. The time duration of each illumination pattern is determined by the spacing between the pulses generated by the pacer 524. As mentioned above, the assembler can shorten a time duration by depressing the external advance switch 526 and forcing the pacer 524 to generate a pulse prematurely.
A slew switch 528 allows the assembler to advance either of the stepping switch relays SM or SN manually. When the slew switch 528 is placed in the M-position, the stepping switch relay SM advances sequentially. When the slew switch 528 is placed in the N-position, the stepping switch relay SN advances sequentially. When the slew switch 528 is placed in either the N- or a M-position, the wiper arm 528A greatly accelerates the rate at which the pacer 524 generates pulses. If the switch 528 is in the M-position, these pulses are applied to the one-shot shot 530 by the wiper arm 528 B, and cause current pulses to be applied to the relay coil KM associated with the stepping switch relay SM. If the switch 528 is in the N- position, the pulses from the pacer 524 pass through the wiper arm 5288 to the one-shot 534 and result in current pulses being applied to the relay coil KN associated with the stepping switch relay SN. When the stepping switch relay SN is being slewed, the wiper arm 528C opens and prevents current from the one-shot 534 from passing through the wiper arm SND and back to the wiper arm 5288.
After the entire sequence of illumination patterns has been completed, the wiper arms SMA and SMB are adjacent their respective contacts 21, and the wiper arms SNA and SNB are adjacent their respective contacts 20. The stepping switch relay SM now slews until the wiper anns SMA and SMB are adjacent their respective contacts 25, in the same way that it slews past the home position H. A positive potential current now flows from the node 512 through the wiper arm SMA and the associated contact 25 into the pulse former 532, and causes the stepping switch relay SN to advance the wiper arms SNA and SNB to their respective contacts 21. A positive potential path is now established from the positive potential node 512 through the diode 514, the wiper arm SNA, contacts 21 through 25, a diode 536, and the wiper arm SND to the relay coil KN. Current flows the stepping switch relay SN to slew past the contacts 21 through 25 and back to the home position. While this is happening, the wiper arm SND sends current from the one-shot 534, through the wiper arms 528C and 5288 of the slew switch, and into the one-shot 530, thus causing the stepping switch relay SM to advance the wiper arms SMA and SMB back to their respective home positions. When the wiper arms SMA and SMB reach the home position, the wiper arm SMC returns to the position shown in FIG. 3 and cuts off power to the one-shot 530. This prevents the one-shot 530 from supplying any more current pulses to the relay coil KM. The only remaining path whereby current could flow to the relay coil KM is through the AND-gate 522, but this path is broken by a disabling signal supplied to the AND-gate 522 by an invertor 538. This invertor 538 is energized by the potential appearing upon the contacts 21 through 25 associated with the wiper arm SNA. The stepping switch relay SM is therefore locked in the home position until the stepping switch relay SN slews past the contacts 21-25 and also returns to the home position. When the stepping switch relay SN reaches its home position, the wiper arm SNC returns to the position shown in FIG. 3 and cuts off the supply of positive potential to the node 512. This disables the computer switching unit 500 and terminates the sequential lamp illumination process.
As mentioned above, it is possible to adjust the stepping switch relays SM and SN so that they automatically slew past any number of contacts. This is done with the assistance of two shorting switches, not shown in FIG. 3. A first shorting switch is connected to a terminal Z (connected to terminal 21, wiper arm SMA), and is arranged to connect the terminal Z to any desired number of the terminals labeled X (connected to terminals 2-20, wiper arm SMA). A second shorting switch is connected to a terminal W (connected to contact 2i, wiper arm SNA), and is arranged to connect the terminal W to any desired number of the terminals labeled Y (connecting to contacts 2-20, wiper arm SNA). Adjustment of these two shorting switches allows any desired number of additional contacts to be added to the two parallelly connected strings of slewing contacts labeled 21-24. Thus, the two shorting switches allow the two stepping switch relays to be set up to slew past any desired number of contacts.
In addition to the outputs M l to M 20 and N to N 19, the computer switching unit 500 has four other outputs. Two of these additional outputs are merely sources of operating current for external devices, such as the logic gates shown in FIG. 5. A B+ output 540 connects to the B+ node 508, and a ground output (not shown) connects to the ground node 506. Two additional outputs are provided to facilitate the process of sorting and arranging the wires in a multiconductor cable. The first of these outputs is called the C+ output 5&2, and the second is called the G-output 544. When the stepping switch relay N is in the home position, the wiper arms SNC and SNB respectively energize C+ output 542 and the G-output 544 with positive and negative level signals. The outputs 5&2 and 544 are thus energized when the computer switching unit 500 is in the standby condition before the beginning of or after the termination of an illumination sequence, the usual times when a multiconductor cable is added to a wiring harness.
Referring now to FIG. 6 there is shown an example of how the lamp illumination computer can be programmed so as to assist an assembler in positioning the leads from a typical multiconductor cable. The leads from such a cable cannot be individually placed in the compartments 10 (MG. 1) so special arrangements are required. The leads comprising the cable are numbered 602-608, and are assumed to be terminated by a plug or connector 610. A plug or connector of the opposite sex 612 is positioned permanently in the harness assembly area at a convenient location where the plug 610 can be connected to it. The harness assembler grasps a probe 6 and touches it to the exposed end of one of the conductors 602. This causes one or more lights to be illuminated in the assembly area. The lights indicate where this particular conductor is to be positioned. The assembler places this wire in the position indicated by the lamps, and then touches the probe 614 to the exposed end of the next conductor 604. This process is repeated until all of the conductors are properly positioned in the harness. The probe 614 is connected to the C+ output of the computer switching unit 500, and is therefore energized only during standby periods either before the commencement of a lighting sequence or after the end of a lighting sequence. These are the times when multiconductor cables are most usually incorporated into a wiring harness.
During this same period. the G-output 544 also energizes and supplies a negative potential to one side of a pair of lamps 620 and 622. These are the lamps which are respectively illuminated when the probe 614 is touched to the exposed ends of conductors 606 and 608. The G-output terminal 544 is also connected by two diodes 624 and 626 to the output lines N 1 and N 2. This allows lamps connected to these two output lines to be used in guiding the placement of connectors from a multiconductor cable. in particular, a lamp 210 is used to indicate the placement of the conductor 602 and a lamp 212 is used to indicate the placement of the conductor 604. Diodes 211 and 273 prevent the lamps 20$ and 205 from receiving power when the lamp 210 or the lamp 212 is illuminated. ln this manner, lamps included in the various normal lighting sequences can also be used to guide the assembler in the placement of the conductors in a multiconductor cable.
The switches SNB, SNC and SMB (FIG. 3) are duplicated in FIG. 6 and are shown in the positions which they occupy when the leads of a multiconductor cable are being placed into a harness. The wiper arm SNC supplies B+ potential to the Cloutput 542 and the wiper arm SNB supplies a ground level potential to the G-output, 544. When the assembler is finished positioning the leads of the multiconductor cables, the assembler depresses the pushbutton 510 (Fig, 3) and initiates the lamp illumination sequence. The wiper ann SNC then changes its position and supplies positive current to the wiper arm 8MB. The wiper arms SMB and SNB also change their positions and begin the process of sequentially energizing the lines M 1 through M 20 and N 0 through N 19. The lamps 201 through 206 and all other lamps which might be included in the programming sequence are then sequentially illuminated in the same manner as were the lamps shown in FIG. 5.
FIGS. 4A and 4B, when placed side by side, form a detailed schematic diagram of the computer switching unit 500. Since this diagram has already been explained for the most part in connection with FIG. 3, it is only necessary now to describe those features of the diagram which are represented as blocks in F 16. 3.
The power supply 504 is conventional in every respect. It includes two parallelly connected transformers 550 having their respective input windings connected in parallel for H0 volts or in series for 220 volts. The output voltage is stabilized by a filter capacitor 552, and a leakage resistor 554 is provided to discharge the capacitor 552 when the unit 500 is turned off.
The pacer 524 comprises basically a unijunction transistor oscillator. When a positive potential is supplied to a node 558 by the wiper arm SMC, this unijunction transistor oscillator generates periodic pulses which appear at the wiper arm 528B. A capacitor 560, a resistor 562, and a variable resistor 564i determine the time delay between output pulses. The variable resistor 564 is adjusted to give the desired rate of operation. When the capacitor 560 is charged up to a level higher than the threshold voltage of a unijunction transistor 556, the capacitor 560 is discharged through the diode 564, the unijunction transistor S56, and resistor 566, thus producing an output voltage pulse at the wiper arm 5288. When the slew switch 528 is in either the M- or the N-position, a resistor 568 is connected in parallel with the resistors 562 and 564 in the circuit. The resistor 568 has a low ohmic value and therefore greatly accelerates the pulse repetition rate. The external advancc switch 526 causes a pulse to appear at the wiper arm 528B prematurely by connecting a capacitor 572 to the emitter of the unijunction transistor 556. The capacitor 572 is normally charged to a positive potential by current flowing through a resistor 570. When the external advance switch 526 is closed, the capacitor 572 discharges through the unijunction transistor 556. Only one pulse appears at the wiper arm 5288, because the resistor 570 has a low ohmic value to maintain the unijunction transistor 556 in a conducting state so long as the external advance switch is held closed, but does not have so low an ohmic value as to produce a substantial voltage across the resistor 566.
The pacer 524 includes a two position switch 565 which can decouple the resistor 564 from the timing capacitor 560 and disable the pacer circuit. This switch is thrown to the manual or MAN position whenever it is desired to have the light pattern changed only when the external advance switch 526 is depressed. Normally this switch is in the automatic or AUTO position, and the pacer 524 operates as explained above.
The one-shots 530 and 534 are identical, so a description of the one-shot 530 will suffice as a description of the one-shot S34. Basically, the one-shot 530 comprises silicon-controlled rectifier 574. This silicon-controlled rectifier 574 connects the wiper arm SMD to the positive potential point 558. When a positive pulse appears on the wiper arm 5288, this positive pulse is fed by a resistor 578 to the trigger input of silicon-controlled rectifier 574, and causes the rectifier 574 to conduct. A resistor 576 prevents low-level voltage pulses from firing the silicon-controlled rectifier 574. The silicon-controlled rectifier 574 remains in a conducting state until the wiper arm SMD breaks the circuit and allows the rectifier to turn off.
Elements 580, 582, and 584 prevent the silicon-controlled rectifier 574 from firing when the wiper arm SMC applies power to the one-shot circuit 530. Elements 586 and 588 suppress the transient which otherwise would occur between the wiper arm SMD and its respective contact. Diode 590 suppresses arcing of the stepping switch relay coil KM. The corresponding elements associated with the one-shot circuit 534 perform equivalent functions.
The inverter 538 includes a transistor 701 and two resistors 700 and 702. The input resistor 700 connects to the base of the transistor 701, and the resistor 702 connects the collector of the transistor 70] to the cathode of the diode 520. When no positive voltage is applied to the resistor 700, the transistor 701 does not conduct and the collector of the transistor 701 floats to the potential of the diode 520. When a positive signal is applied to the resistor 700, the transistor 701 conducts and pulls its collector to ground potential. The AND-gate 522 comprises the transistor 703. The output of the AND gate is the emitter of this transistor. The inputs are the collector and the base elements of this transistor. The emitter output element is positive only when both the base and the collector elements of this transistor are positive. This occurs only when the cathode of the diode 520 is positive, and simultaneously the transistor 701 is rendered nonconductive by a ground level signal applied to the resistor 700.
The pulse former 532 is designed around a unijunction transistor 591. This circuit generates a single high-current pulse in response to a rising potential applied to a resistor 596. Normally, the unijunction transistor 591 is nonconductive. A capacitor 594 is charged by resistors 597 and 598 to a potential slightly below the firing or threshold potential of the unijunction transistor 591. When a positive potential is applied to the resistor 596,'the current flowing through the resistor 596 renders the unijunction transistor 591 conductive between the emitter electrode and the lower base electrode. A conducting path is thus established from the nongrounded end of the capacitor 594, through the diode 595, the unijunction transistor 591, and a resistor 593 back to the grounded end of the capacitor 594. The capacitor 594 quickly discharges over this path and produces a voltage pulse which appears across the resistor 593. This voltage pulse is the output of the pulse former 532. After a single pulse has been delivered, current through the resistor 596 keeps the unijunction transistor 59] in a conducting state. So long as the unijunction transistor 591 continues to conduct, a conduction path is formed from the positive node 512 through the resistor 598, the diode 595, the unijunction transistor 591, and the'resist'or 593 to ground. Since the last three portions of this conducting path are of low ohmic value, these last three elements maintain the capacitor 594 in a discharged state. Only a small potential appears across the resistor 593. This small potential is not large enough to trigger the one-shot 534 a second time. Thus, the pulse former 532 generates a single pulse in response to a rising level input signal.
The circuit breaker 516 is not shown in detail in FIG. 4B. The purpose of this circuit breaker is to prevent dangerous shocks or excessive heating during the experimental period when the computer is being programmed. Preferably it should be a mechanical, fast-acting circuit breaker of a type that can be easily reset after it has been triggered by an overload. Such devices are readily obtainable.
Referring once again to FIG. 2, the front panel of the computer switching unit is shown in detail. The various controls are assigned index numbers corresponding to the numbers assigned to their schematic representations in FIGS. 3 and 4. The element 714 is a pilot lamp that is illuminated whenever a switch 502 is in the ON position. The switches 710 and 712 are the shorting switches used to control the slewing of the stepping switch relays SM and SN as explained above. The AUTO-MAN pacer switch 565 (shown in FIG. 4A) can be included as an electrical switch associated with the variable resistor 564. Alternatively, the switch 565 can be placed on the back panel of the computer switching unit 500. A jack for the external advance switch 526 is also conveniently located on the back of the switching control unit 500.
The following are the values of the components used in the computer switching circuit 500:
Element No. Name of Element Value 5 l4 diode IN207O 520 diode lN2070 536 diode lN2070 552 capacitor 2,500 microfarads 554 resistor l0.000 ohms 556 unijunction transistor 2N l 67 l B 559 resistor 470 ohms 560 capacitor I50 microfarads 562 resistor 33,000 ohms 564 variable resistor 500,000 ohms 566 resistor 15 ohms 567 resistor 220 ohms 568 resistor 4,700 ohms 570 resistor 470 ohms S72 capacitor I50 microfarads 574 silicon controlled rectifier C6! 576 resistor l0,000 ohms 578 resistor 22,000 ohms 580 resistor 470 ohms $82 capacitor l microfurad 584 diode [N483 586 resistor 50 ohms $88 capacitor l microfurud $90 diode IN2070 591 unijunction transistor 2N l 67 l B 592 resistor 220 ohms 593 resistor I00 ohms 594 capacitor l microfurad 59$ diode IN483 596 resistor 3,300 ohms 597 resistor l00,000 ohms 598 resistor 150,000 ohms 700 resistor 68,000 ohms 70| transistor 2143566 702 resistor 470 ohms 703 transistor 2N I6 I 3 7M pilot lump NESIH (for ll0v.)
NESB (for 220v.)
In the programming circuitry shown in FIGS. 5 and 6, any switching transistors and any diodes or any equivalent logic circuits having breakdown ratings in excess of the voltage generated by the power supply 504 can be satisfactorily used. The lamps used in conjunction with this invention should have voltage requirements which match the output voltage of the power supply 504. Any suitable power supply 504 can be used in conjunction with this invention. In the preferred embodiment, a 20 volt power supply is used. The present invention can be modified to drive 6 volts lamps either by choosing a lower voitage power supply 504 and modifying the logic and relay circuits to operate with the lower voltage power supply, or else by replacing the circuit breaker element 516 with a separate low voltage power supply connected between the wiper arm SMB and the ground potential node 506.
The discrete component logic circuits shown in the figures. can be replaced, if desired, by integrated circuit logic elements, which may be powered by a separate power supply. In addition to the logic programming shown, other arrangements may be used. For example, a flip-flop can be arranged to illuminate a lamp during one lighting sequence and to extinguish the lamp during a later lighting sequence. Such a flip-flop could be set by the transistor 151 (FIG. and cleared by the transistor 155, for example. A lamp connedted to the output of such a flip-flop would remain illuminated from the time when the lines N LZ-M 4 are energized until the time when the lines N S-M 3 are energized. Any desired sequential lamp illumination scheme can thus be obtained by proper logic programming.
What is claimed as new and desired to be secured. by Letters Patent of the United States is:
l. A device for creating sequential illumination patterns in a pluraiity of illumination sources comprising:
a switching unit having first and second sets of output leads;
first sequential energizing means for sequentially energizing each lead in said first set of output leads;
second sequential energizing means for sequentially ener gizing each lead in said second set of output leads each time one lead in said first set is energized; and
one or more logic circuits each including an OR gate having two or more inputs and further including an enable input, each logic circuit having an output connecting to one of the illumination sources and arranged to illuminate the illumination source when the enable-input and one of the OR gate inputs are simultaneously energized;
circuit means connecting the inputs of the OR gate within each logic circuit to leads in one of said sets of output leads; and
circuit means connecting the enable input of each logic circuit to a lead in the other ofsaid sets ofoutput leads.
2. A device in accordance with claim l wherein said first and second sets of output leads are energized with first and second signals differing from one another in potential, wherein the illumination sources are lamps having first and second terminals and operable on the power supplied by said output leads, wherein one or more of said logic circuits comprises a diode OR gate connected to the first terminal of a lamp, wherein the inputs to said diode OR gate are connected to leads in one of said sets and wherein the second terminal of the lamp is connected to a lead in the other of said sets to function as an enable input to said logic circuits.
3. A device in accordance with claim 1 wherein said first and second sets of output leads are energized with first and second signals differing from one another in potential, and wherein one or more of the logic circuits comprises:
a diode and transistor logical circuit having its inputs connected to leads in one of said sets and having an emitter lead connected to a lead in the other of said sets; and
a source of illumination connected to the output of said diode and transistor logical circuit.
4. A device in accordance with claim 1 wherein at least one source of illumination is connected to the outputs of two or more logical circuits so as to be illuminated by any one of the logical circuits.
5. A device for aiding in the assembly of wiring harnesses comprising:
A first plurality of lamps each mounted adjacent a harness component storage compartment, and a second plurality of lamps mounted in a harness assembly area to serve as assembly guides, said lamps each having first and second terminals;
a switching unit having first and second sets of output leads and including means for sequentially energizing the leads in the first set with a first potential signal and for sequentially energizing the leads in the second set with a second potential signal each time a lead in said first set is energized;
a plurality of diodes, two or more connecting the first terminal of each lamp to leads in one of said sets of output leads; and
an interconnection between the second terminal of each lamp and a lead in the other of said sets of output leads.
6. A device in accordance with claim 5 wherein some of the lamps are interconnected so as to function together.
7. A device in accordance with claim 5 wherein additional lamps are connected to the output leads in said sets by multiple input logic gates.
8. A device for aiding in the placement of multiconductor cables within a .wiring harness, said device comprising:
a plurality of lamps each having first and second terminals;
a switching unit including a plurality of output leads connectingto the lamps and also including means for sequentially energizing the leads so as to sequentially illuminate the lamps; I
a source of energizing potential for said lamps and second outputs;
a probe connected to one of said energizing potential out- Puis;
diodes connecting the other of said energizing potential outputs to one or more of the switching unit output leads connecting to the first terminals of said lamps; and
interconnections between a number of the cables comprising the multiconductor cables and the second terminals of some of said lamps;
whereby the placement of a selected cable can be determined by touching the probe to the conductor and observing the illumination pattern.
9. A switching unit for sequentially energizing lines in a first group of lines, and for sequentially energizing lines in a second group of lines whenever a line in the first group is energized, said unit comprising:
first and second wiper arms connected to an energization source and respectively arranged to sequentially make contact with the lines in the first and second groups;
first and second stepping relays respectively mechanically coupled to said first and second wiper arms, said relays each arranged to advance upon receipt ofa pulse;
a pacer source of pulses for advancing said second stepping relay;
a pulse former source of pulses energized by said second stepping relay for advancing said first stepping relay one position for each complete rotation of said second stepping relay;
an additional wiper arm and set of wiper arm contacts for each stepping relay; and
a shorting switch for shorting the additional wiper arm contacts of each stepping relay;
whereby the stepping switches can be adjusted to slew past any specified number of positions.
10. A switching unit for sequentially energizing lines in a first group of lines, and for sequentially energizing lines in a second group of lines whenever a line in the first group is energized, said unit comprising:
first and second wiper arms connected to an energization source and respectively arranged to sequentially make contact with the lines in the first and second groups;
first and second stepping relays respectively mechanically coupled to said first and second wiper arms, said relays each arranged to advance upon receipt of a pulse;
a pacer source of pulses for advancing said second stepping relay;
a pulse former source of pulses energized by said second stepping relay for advancing said first stepping relay one position for each complete rotation of said second stepping relay; and
having first I a slew switch connected to the pacer for accelerating the pacer and for routing the pacer pulses to either stepping relay.
11. A switching unit for sequentially energizing lines in a first group of lines, and for sequentially energizing lines in a second group of lines whenever a line in the first group is energized, said unit comprising:
first and second wiper'arms connected 'to an energization source and respectively arranged to sequentially make contact with the lines in the first and second groups;
first and second stepping relays respectively mechanically coupled to said first and second wiper arms, said relays each arranged to advance upon receipt of a pulse;
a pacer source of pulses for advancing said second stepping relay;
a pulse fonner source of pulses energized by said second stepping relay for advancing said first stepping relay one position for each complete rotation of said second stepping relay; and
an external advance switch included within the pacer which advance switch, when depressed, causes the pacer to generate a pulse prematurely.
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|U.S. Classification||345/73, 340/332, 29/755, 29/720, 345/204|