|Publication number||US3624610 A|
|Publication date||Nov 30, 1971|
|Filing date||May 21, 1970|
|Priority date||Jun 11, 1969|
|Also published as||DE2027521A1, DE2027521B2|
|Publication number||US 3624610 A, US 3624610A, US-A-3624610, US3624610 A, US3624610A|
|Inventors||Warring Stig Erik|
|Original Assignee||Ericsson Telefon Ab L M|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (6), Referenced by (5), Classifications (7)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent  Inventor Stig Erik Warring Skarholmen, Sweden  Appl. No. 39,419
 Filed May 21, 1970  Patented Nov. 30, 197 l  Assignee Telefonaktiebolaget LM Ericsson Stockholm, Sweden  Priority June 11, 1969 [3 3 Sweden  ARRANGEMENT FOR GENERATING A SERIES OF DIGITAL SIGNALS 2 Claims, 1 Drawing Fig.
 Int. Cl ..1-103b 29/00  Field oISearch 331/78; 340/166 R; 328/59, 61
l 5 6] References Cited UNITED STATES PATENTS 2,918,669 12/1959 Klein 340/166X n n I: "'"':g
Primary Examiner-John W. Caldwell Assismnl Examiner-David L. Trafton An0rneyl-1ane, Baxley & Spiecens ABSTRACT: An arrangement for generating a series of digital signals for use as a superimposition series in ciphering and deciphering digital signals. The arrangement comprises a contact matrix in which each contact can have two different conditions, one" condition and zero" condition. Said contacts are selected by a pseudorandom generator including a number of pulse generators corresponding to half the number of matrix points. Said generators generate individually a pseudorandom series of binary ones" and zeros" and each has two outlets of which the output signal of one outlet is inverted relatively to the output signal of the other outlet. All outlets are connected individually to a contact in the matrix, so that the number of contacts with zero condition always will be equal to the number of contacts with one condition.
ARRANGEMENT FOR GENERATING A SERIES OF DIGITAL SIGNALS BACKGROUND OF THE INVENTION The present invention relates to an arrangement for generating a series of digital signals for use upon generation of superimposition series when digital signals are ciphered or deciphered, comprising a contract matrix in which the contacts can have two different conditions, one condition and zero condition, and which are selected successively in a pseudorandom sequence controlled by stepping pulse generators, in order to define by their condition said series of digital signals.
In such a superimposition series it is required i.e. that, for example, in the case of a binary superimposition series, the distribution of ones and zeros should give the impression of being as far as possible random and at the same time it should be practically impossible to reproduce the superimposition series without knowing the used key positions.
SUMMARY OF THE INVENTION The arrangement according to the invention is characterized by comprising a pseudorandom generator arrangement having a number of pulse generators corresponding to half the number of matrix points, each of said generators generating a pseudorandom series of binary zeros and ones and each having two outlets of which the output signal of the one outlet is inverted relatively to the output signal of the other outlet and that all outlets are connected individually to a contact in the matrix so that the number of contacts with zero condition always will be equal to the number of contacts with one condition.
This implies that each pulse in the superimposition series is generated by random samples in a plurality of numbers which always contain exactly as many zeros as ones, even though the distribution of zeros and ones at times is changed during the time of information transferring. By this the desired random distribution of zeros and ones in the resulting superimposition series is secured, at the same time as it is very difficult to break the ciphered message.
BRIEF DESCRIPTION OF THE DRAWING The sole FIGURE of the drawing shows the preferred pseudorandom pulse generator comprising a matrix and alternative embodiments of driving means.
DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention will be explained herebelow by means of some embodiments with reference to the attached drawing.
M indicates a matrix which according to the example comprises 16 positions a a, ...a and in each of the positions and AND-circuit O O,,...O The outlets of all AND circuits are connected to an OR-circuit E the outlet of which forms the outlet U of the superposing arrangement. The matrix is provided with a stepping pulse generator arrangement comprising four stepping pulse generators X,, X,, Y,, Y each of which generates individually a pseudorandom series and can have an arbitrary design, for example a feedback shift register of the so-called maximum length type. The four stepping pulse generators generate pseudorandom series of different lengths. Furthermore a selecting means is provided, consisting of eight AND-circuits U,-U,,. The four stepping pulse generators are stepped by means of a clock pulse generator KG with a stepping frequency f and they produce on their outlets a fourdigit binary number. Thus the number can have l6 different values, each corresponding to one of the 16 positions of the matrix. If for example X,=l, X =0, Y and Y l the AND- circuits U and U deliver an output signal and select in this way the position a in the matrix by activating two of the three inlets of the AND circuit. If this position contains a one, a one will be obtained on the outlet of the OR-circuit E, if not, a zero will be obtained. Thus at each selecting only one of the 16 AND circuits can deliver an output signal to the outlet of the arrangement.
The arrangement comprises furthennore a pseudorandom generator arrangement consisting of eight pulse generators PG,PG producing different pseudorandom series. The pulse generators can for example consist of feedback shift registers which can be fed back directly from outlet to inlet, the number of stages in the different pulse generators having to correspond to difi'erent prime numbers. Alternatively the pulse generators can consist of maximum length shift registers and the difi'erent pulse generators have likewise to comprise different number of stages. Each pulse generator has two outlets, a true outlet and a false outlet which 16 outlets are connected individually to the third inlet of the AND circuit in a matrix point of the matrix M via a pennuting network P. This consists of a cross connection and makes it possible that each outlet of the pulse generators PG PG can be connected to an arbitrary matrix point. The cross connection can possibly be set in accordance with some selectable key combination. By connecting separately both the true and the false outlet of each pulse generator to a matrix point it is secured that at each selecting from the matrix the probability to obtain a one or a zero to the outlet U always will be exactly one-half. The pulse generators PG -PG are stepped forward by means of the clock pulse generator KG with pulses of the frequency f which can be equal to or less than f,, in the latter case suitably a submultiple of f,.
The arrangement described up to now corresponds to the position in which the switch SA, SB, SC is in the position according to the drawing where accordingly the pulse generators PG -PG are directly connected to the clock pulse generator KG while the blocks designated by A and B are completely disconnected.
Another embodiment is obtained if the switch SA is supposed to be set to its lower position and the switch SB is in closed condition whereby the pulses of the clock pulse generator KG do not pass directly to the pulse generator arrangement PG PG but are first passing through a further pseudorandom generator arrangement A. A number of pulse generators PG -PG are stepped forward with the frequency f, and each producing difierent pseudorandom series with different lengths. Each of the outlets of these pulse generators is connected separately to an outlet of an AND-circuit 0,, to the fourth inlet of which stepping pulses having the frequency f are fed from the clock pulse generator KG. Thus the pulse generators PG -PG shown on the drawing will be stepped with a pulse frequency f which on an average is one-eighth of f but the interval between the pulses to PG,-PG,, is varying, apparently at random. The contents of the positions of the matrix M will then be replaced by apparently random intervals.
In another embodiment of the invention each of the pulse generators PG,PG can be replaced separately by a flip-flop vl va cnmlllullna successive sinned Ola IIIUI miller S. (The switch SA and SC are In a lauvred POllHml. me much 88 in the Position drawn.) The mu! reairler can be led by a :epamtelu generated max (min with the alumina frequency )3, for example the ciphered pulse train. The embodiment implies a certain modification concerning the feeding in of the information to the positions of the matrix M, consisting therein that each matrix position is provided with a bistable memory flip-flop v -v These flip-flops are switched via AND-circuits 0-100-0-161 with apparently random intervals by means of a pulse train obtained from a pseudorandom generating arrangement corresponding to the block A.
The pulse train obtained from the outlet of the OR-circuit E can be used to form the superimposition series directly or after a further transforming.
1. Arrangement for generating a series of digital signals, for use upon generation of a superimposition series when digital signals are ciphered or deciphered, comprising a contact matrix in which each contact can have two different condioutlets are connected individually to a contact (a -a in the matrix (M), so that the number of contacts with zero condition always will be equal to the number of contacts with one condition.
2. Arrangement according to claim 1, in which a permuting circuit (P) is connected between the outlets of the pseudorandom generator arrangement and the matrix points, which permuting circuit makes it possible for each outlet to be connected to an arbitrary matrix point.
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|Citing Patent||Filing date||Publication date||Applicant||Title|
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|US4195196 *||Oct 15, 1973||Mar 25, 1980||International Business Machines Corporation||Variant key matrix cipher system|
|USRE30957 *||Jun 30, 1980||Jun 1, 1982||International Business Machines Corporation||Variant key matrix cipher system|
|U.S. Classification||327/291, 331/78|
|International Classification||H04L9/18, H04L9/24, H04L9/22|