|Publication number||US3629653 A|
|Publication date||Dec 21, 1971|
|Filing date||Mar 23, 1970|
|Priority date||Mar 23, 1970|
|Publication number||US 3629653 A, US 3629653A, US-A-3629653, US3629653 A, US3629653A|
|Original Assignee||Us Of America The|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (3), Referenced by (21), Classifications (18), Legal Events (1)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent Munt Irwin Ellilbeih, N-J.
Mar. 23, 1970 Dec. 21, 1971 The United States of America Inventor Appl No. Filed Patented Assignee CROSSED GRID EL DISPLAY DRIVER TECHNIQUE 3 Claims, 5 Drawing Figs.
U.S. Cl 315/169, 340/335 Int. Cl 05b 37/00 Field of Search 315/169,
[.56] References Clted UNITED STATES PATENTS 3,343,l28 9/1967 Rogers 3l5/l69X 3,069,596 i2/l962 Morgan 315/169 TV 3,054,929 9/1962 Livingston 3 lS/i 69 Primary ExaminerRoy Lake Assistant Examiner-Lawrence J. Dahl Attorneys-Richard S. Sciascia, John W. Pease and Harvey A.
David ABSTRACT: Variable brightness, crossed grid, electroluminescent panel driving circuitry and logic means are described wherein the brightness of a selected cell is controlled by the length of driver circuit input pulse. The length of the input pulse is controlled by logic means.
PATENTEU m2! 1921 3529553 sum 1 OF 3 je/ec e/ 6'(// IRWIN HUNT INVENTOR.
CROSSED GRID EL DISPLAY DRIVER TECHNIQUE BACKGROUND OF THE INVENTION This invention relates to electroluminescent displays of the type comprising a matrix of display elements or cells which can be individually accessed for excitation, and more particularly to the driving of such a display in a manner that permits the brightness of the excited cells to be varied in a controlled manner.
Electroluminescent displays utilizing a matrix or grid of electroluminescent cells or elements which may be individually accessed so as to generate pictures of other informational presentations have been known heretofore as exemplified by U.S. Pat. No. 3,054,929 of D. C. Livingston and U.S. Pat. No. 3,343,128, of R. J. Rogers. While it has been known that the degree of brightness of an electroluminescent cell is dependent upon the exciting voltage thereacross, as discussed in U.S. Pat. No. 3,069,569 of D. W. Morgan, the prior art crossed grid, matrix type of devices have been limited to voltage levels which produce either an on or an off condition of luminescence in each cell, with no degrees of brightness available in-between.
It has also been known to utilize the capacitive nature of the cells in resonant driver circuits which produce the necessary voltage levels to achieve luminescence in response to trigger or control pulses. Accession of cells to be illuminated has been achieved by addition of voltages applied to opposite terminals of a selected cell. Again, there is no known prior art wherein the resultant voltages can be selectively varied to produce varying degrees of brightness other than the full on or the fully dark condition.
BRIEF SUMMARY OF THE INVENTION With the foregoing in mind, it is a principal object of the invention to provide an improved electroluminescent display system utilizing driving methods and circuitry which will achieve variable brightness in selected cells in a controlled manner, thereby making it possible to generate realistic pictorial scenes on the display or otherwise increase the informational content thereof.
It is another object of this invention to provide improved driving means and techniques for a crossed grid electroluminescent display of the type concerned, wherein the variable brightness is controlled by utilizing exciting pulses for the resonant driver circuits, which pulses are difi'erent lengths or durations corresponding to the degrees of brightness desired.
As another object the invention aims to provide novel digital logic means for generating a driver exciting pulse the length of which is variable with respect to a reference length of pulse in response to brightness level input signals.
BRIEF DESCRIPTION OF THE DRAWINGS The invention may be further said to reside in certain combinations, arrangements of parts, and methods as will become apparent from the following description of a preferred embodiment when read in conjunction with the accompanying sheets of drawings, in which:
FIG. 1 is a diagrammatic illustration of electroluminescent driver circuitry embodying the invention;
FIG. 2 is a graphic illustration of input pulses and output wavefonns for the circuitry of FIG. 1;
FIG. 3 is an illustration in block form of a display system utilizing the invention;
FIG. 4 is a more detailed illustration in block form of the brightness control logic portion of the system of FIG. 3; and
FIG. 5 is a graphic illustration of the time relations of various pulses in the logic portion illustrated in FIG. 4.
DESCRIPTION OF THE PREFERRED EMBODIMENT In the form of the invention illustrated in the drawings and described hereinafter, there is provided an electroluminescent display of the crossed grid type. That type of display is well known and comprises first and second spaced arrays of parallel, separate conductors. The first array is illustrated as comprising conductors Y Y,-Y,,, while the second array is illustrated as comprising conductors X,, X, -X,, disposed in a direction normal to the conductors of the first array to form a plurality of crossover points. A discrete electroluminescent cell 11 is associated with each of the crossover points such that application of a sufficiently high alternating current voltage across the conductors at any of the crossover points will produce electroluminescence of the cell 11 associated therewith. The degree of brightness of such illumination of a particular cell is dependent upon the degree of voltage thereacross. A plurality of the matrixes 10 can be assembled to provide a larger display panel.
Associated with the array of Y conductors is a matrix driver means 12, and associated with the array of X conductors is a matrix driver means 14.
In recognition of the capacitive nature of the individual cells of the display, the driver circuits 12 and 14 which are about to be described, use resonating inductances in the form of stepup transformers to generate the high voltages required. This configuration relies on an exciting pulse charging the capacitance of a selected cell, and also producing a current flow in the associated inductance. The effect of the current is to generate higher voltages than the stepped-up level of the power supply. At the end of the charging pulse, the resonant circuit oscillates with the damping determined by the losses in the transformer and the capacitance. Practically, the oscillations disappear in about two cycles.
The driver means 12 comprises a switching transistor 16 of the PNP-type having an emitter 18, base 20, and collector 22. The emitter is connected at 24 to a suitable source of DC voltage, while the collector 22 is connected through a rectifying diode 26 to one terminal of the primary winding of a voltage step-up transformer 28. The base 20 of the transistor 16 is connected via a resistor 30 to an input terminal 32.
The other terminal of the primary winding of the transfonner 28 is connected to the collector 34 of a transistor 36 of the NPN-type. The transistor 36 includes an emitter 38 connected to ground, and a base 40 connected to ground, and a base 40 connected through a resistor 42 to an input terminal 44. The secondary winding of the voltage step-up transformer 28 has one end connected to the conductor Y,, and the other end connected to ground.
The collector 22 of the transistor 16 is further connected via conductor 48 and a plurality of additional diodes 26'-26" to the primary windings of additional transformers 28'-28" are connected to the conductors Y -Y The primary windings of the transformers 28 '-28 are connected to the collectors 3434x of transistors 36'36", the emitters 38'-38" of which are grounded and the bases of which are connected through resistors 42 '-42" to input terminals 44'44".
Similarly, the driver means 14 for the array of X conductors comprises a switching transistor 56 having its emitter 58 connected to a DC source 60, its base 62 connected via a resistor 64 to an input terminal 66. The transistor 56 has its collector 68 connected through a diode 70 to one terminal of the primary winding of a voltage step-up transformer 72. The other terminal of the primary winding of the transformer 72 is connected to the collector 74 of a transistor 76 of the NPN-type. The transistor 76 includes an emitter 78 connected to ground, and a base 80 connected through a resistor 82 to an input terminal 84. The secondary winding of the voltage step-up transformer 72 has one end connected to the conductor X, and the other end connected to ground.
The collector 68 of the transistor 56 is further connected via conductor 88 and a plurality of additional diodes 7070" to the primary windings of additional transformers 72'-72", respectively. The secondaries of these additional transformers 72'72K are connected to the conductors X,-X,,. The primary windings of the transformers 72'-72" are also connected to the collectors 74'74", respectively, of transistors 76'76, the emitters 7878" of which are grounded, and the bases 80-80K of which are connected through resistors 8282" to input terminals 84'-84' A selected cell is excited by the sum of the voltages applied to the X and Y electrodes (conductors) defining the cell (in a coincident voltage fashion). The voltage applied to one of the coordinate conductors is treated as a reference phase, while brightness is controlled by varying the width of the exciting pulse which operates the driver connected to the second coordinate conductor. Varying the'exciting pulse width varies the phasing of the oscillations generated and hence varies the sum of the voltages between the X and Y conductors of a selected cell.
Assuming exciting pulses y; y,; .x; x to be applied to terminals 32, 44, 66, and 84", respectively, the cell at the intersection of conductors Y and X, will be selected.
Referring to FIG. 2, it will be noted that the exciting pulses y; y,; and x are of the same time duration. This is treated as the reference time. The pulses y; y produce an output on conductor Y as shown by the voltage waveform 90.
The pulses x and x produce an output on conductor X, as shown by the voltage waveform 92. It will be noted that because the pulse duration of the exciting pulse x is shorter than the reference period, the waveform 92 is somewhat out of phase with waveform 90, and is characterized by a somewhat less peak voltage. The voltage across the selected cell is represented by the waveform 94.
It will be recognized that if the pulse x, were increased in length, the voltage peaks of the waveform 92 would become more in time with those of the waveform 90. Moreover, the longer the duration of the pulse x the greater will be the peaks of the waveform 92. The net result is an increase in the voltage 94 across the selected cell and a concurrent increase in brightness thereof. Conversely, shortening of the pulse x will reduce the brightness level of the selected cell.
Referring now to FIG. 3, the driver exciting pulses may be derived from X and Y line selection circuitry, generally indicated at 98 and 100, such as will, for example, provide a sequential sweep of the cells in the display 10. The degree of brightness exhibited by a selected cell is adjusted by brightness (gray level) control logic 102 which serves to shorten or lengthen excitation pulses to the X terminals 84, 84, 84", etc., with respect to excitation pulses of reference length such as applied to the terminals of the drive circuitry 12, in accordance with information, conveniently digital in form, received as shown by flow lines 104 from a source of gray level information 106.
The Y-line selection circuitry 98 and the X-line selection circuitry 100 may also be digital in nature. The circuitry 98 and 100, and the source 106 are not part of the invention per se but would be found in the type of equipment with which the display is to be used, such as a flight simulator for training pilots in landing field or aircraft carrier approaches.
Referring to FIG. 4, an exemplary portion of the brightness control logic 102 is illustrated. This logic comprises a flip-flop 110 which receives as one input a start pulse 112, as shown on base line (a) of FIG. 5, via line 114 from the X-Iine selection circuitry. The start pulse 112 is coincident with the beginning of the x and y pulses on lines 116, 118 (FIG. 3) which are of a reference length 120 as shown by pulse y, on base line (b) of FIG. 5.
The flip-flop 110 has, as a second or reset input, the output on line 124 of a register counter 126. The register counter 126 is conditioned by brightness code input, represented by lines 104, to provide an output on line 124 when a predetermined number of clock pulses 128 are applied thereto via line 130 and an AND-gate 132. The AND-gate 132 receives the clock pulses 128 via line 134 from a suitable clock pulse source 136.
These clock pulses are illustrated in FIG. 5 on a base line (0).
Upon the occurrence of a start pulse, the flip-flop is set to provide a voltage level change on line 138. This change constitutes the beginning of an X-line driver excitation pulse to the associated one of the terminals 84, 84, 84", etc. The
output of the fli -flop 110 is also fed via line 140 as a second input to the A -gate which is enabled thereby to begin passing clock pulses 128 to the register counter 126.
When the number of clock pulses 128 corresponds to the brightness code input via lines 104, the register 126 produces an output on line 124 which resets the flip-flop 110 terminating the excitation pulse .x, and also terminating the flow of clock pulses from AND-gate 132. It will be observed from FIG. 5 that the pulse x may be varied by increments corresponding to the number of clock pulse periods within the reference pulse period. As described before, increasing or decreasing the pulse length of x, will increase or decrease the brightness of the corresponding electroluminescent cell.
What is claimed is:
1. A variable brightness electroluminescent device comprismg:
first and second spaced electrodes with electroluminescent material therebetween and characterized by a predetermined capacitance,
first driver means comprising inductive means connected to said first electrode and operative in response to a first and second coincident pulses having a predetermined reference length to provide an alternating current voltage to said first electrode of a frequency determined by the capacitance of the cell and the inductance of said inductive means; and
second driver means comprising inductive means connected to said first electrode and operative in response to a third coincident pulse having said reference length and to a fourth pulse which starts in coincidence with said first, second, and third pulses but has a length which is less than said reference length to provide a second alternating current voltage to said second electrode, the peaks of which second alternating current voltage are out of phase with respect to said first alternating current voltage by an amount which varies with said length of said fourth pulse.
2. A variable brightness electroluminescent device as defined in claim 1, and further comprising:
logic means for generating said fourth pulse in response to a start signal and so as to have a length corresponding to brightness level input signals to said logic means.
3. A variable brightness electroluminescent device as defined in claim 2, and wherein said logic means comprises:
clock means for generating clock pulses at a predetermined frequency; AND-gate means connected to receive said clock pulses as a first input thereto;
flip-flop means having first and second states and responsive to initiate said fourth pulse as the second state output thereof;
said AND-gate means being responsive to said second state of said flip-flop means to pass said clock pulses as an output of said AND-gate means;
register means connected to receive said clock pulses from said AND-gate means and conditioned by said brightness level input signals to provide an output signal when a predetermined number of said clock pulses have been received; and
said flip-flop means being responsive to said output signal of said register means to return to said first state and terminate said fourth pulse.
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|Citing Patent||Filing date||Publication date||Applicant||Title|
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|U.S. Classification||315/169.3, 315/173, 345/77, 315/241.00S, 345/78, 315/240, 315/235, 315/234, 348/E03.16|
|International Classification||H04N3/14, G09G3/30, H05B37/02|
|Cooperative Classification||H05B37/029, H04N3/14, G09G3/30|
|European Classification||H05B37/02S, G09G3/30, H04N3/14|
|May 16, 1984||AS||Assignment|
Owner name: SYCON CORPORATION
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:SANGAMO, WESTON, INC.;REEL/FRAME:004270/0337
Effective date: 19840418