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Publication numberUS3661747 A
Publication typeGrant
Publication dateMay 9, 1972
Filing dateAug 11, 1969
Priority dateAug 11, 1969
Publication numberUS 3661747 A, US 3661747A, US-A-3661747, US3661747 A, US3661747A
InventorsPeter A Byrnes Jr, Martin P Lepselter
Original AssigneeBell Telephone Labor Inc
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Method for etching thin film materials by direct cathodic back sputtering
US 3661747 A
Abstract
Thin layers of material including dielectric films are etched or cleaned by placing them in a low pressure gas ambient, forming a plasma in the ambient, and establishing a periodic voltage between the layers and the plasma. One important application of the process is the formation of metal silicide contacts through small windows in a dielectric layer protecting the silicon surface. In one application, the metal is sputtered onto the exposed silicon at the same time that the surface is subjected to ion bombardment. The sputtering and etching rates are adjusted so that some of the sputtered metal reacts with the silicon upon impact and the unreacted metal is etched away.
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United States Patent Byrnes, Jr. et al.

[451 May 9, 1972 [72] Inventors: Peter A. Byrnes, Jr., Bridgewater Township, Somerset County; Martin P. Lepselter, New Providence, both of NJ.

[73] Assignee: Bell Telephone Laboratories, Incorporated,

Murray Hill, NJ.

[22] Filed: Aug. 11, 1969 [21] Appl. No.: 848,935

Related [1.5. Application Data [63] Continuation-in-part of Ser. No. 607,203, Jan. 4,

[52] US. Cl ..204/192 [51] Int. Cl C23c 15/00 [58] Field of Search ..204/192 [56] References Cited UNITED STATES PATENTS 3,479,269 11/1969 Byrnes et al. ..204/298 3,287,612 11/1966 Lepselter ..317/235 3,451,912 6/1969 DHeurle et al. ..204/192 Laegreid et al. ..204/192 3,021,271 2/1962 Wehner ..204/192 OTHER PUBLICATIONS Davidse, Theory &,Practive of RF Sputtering Vacuum Vol. 17, No. 3, l966),pg. 145

Maissel et al. Thin Films Deposited by Bias Sputtering J. of App. Phy., 1965 Primary Examiner.lohn H. Mack Assistant ExaminerSidney S. Kanter Attorney-R. J. Guenther and Arthur J. Torsiglieri [57] 1 ABSTRACT Thin layers of material including dielectric films are etched or cleaned by placing them in a low pressure gas ambient, forming a plasma in the ambient, and establishing a periodic voltage between the layers and the plasma. One important application of the process is the formation of metal silicide contacts through small windows in a dielectric layer protecting the silicon surface. In one application, the metal is sputtered onto the exposed silicon at the same time that the surface is subjected to ion bombardment. The sputtering and etching rates are adjusted so that some of the sputtered metal reacts with the silicon upon impact and the unreacted metal is etched away.

3 Claims, 8 Drawing Figures PATENTEDMAY 9 I972 3, 51,747

SHEU 1 [IF 4 WVENTORS" M. P. LEPSELTER ATTORNFV P. ,4 BYRNES,JR.

SHEET 2 OF 4 mox.

FIG. 4

KNEE 2 KNEE 1 max PATENTEDMAY 9 I972 HEET 4 [1F 4 FIG. 7

TO VACUUM SYSTEM METHOD FOR ETCHING THIN FILM MATERIALS BY DIRECT CATI-IODIC BACK SPUTTERING CROSS REFERENCES TO RELATED APPLICATIONS This application is a continuation-in-part of the copending application, Ser. No. 607,203, filed Jan. 4, 1966 by P. A. Bymes, Jr. and M. P. Lepselter.

BACKGROUND OF THE INVENTION This invention relates to cleaning or etching by cathodic back sputtering. More specifically, it concerns a method for cleaning or etching which utilizes a periodic voltage to extract bombarding ions from a plasma.

Since the dimensions of microelectronic devices and circuits are measured in thousandths of an inch, precise methods of etching and cleaning are of considerable importance in their fabrication. Various techniques, including chemical etching and indirect back sputtering have been adapted for use in microelectronic fabrication processes, but these methods have important limitations.

Chemical etching, such as is described by Schlabach and Rider in Printed and Integrated Circuitry (1963) at p. 83 et seq. is one commonly used etching or cleaning method. How,- ever, there are at least three difficulties associated with this approach. First, because the eroding action proceeds at a different rate as the etching depth increases, chemical etching generally produces cross sections that are either undercut or slop-sided rather than rectilinear. Second, since different materials react differently to the same etchant, chemical etching becomes a time-consuming, multi-step process when it is necessary to etch through several layers of different materials; and, third, chemical etching is not useful with certain materials, such as iridium and rhodium, because of their high resistivity to chemical action.

A second approach to etching and cleaning, which is of particular value in the fabrication of microelectronic circuits and devices, is positive ion bombardment. When positive ions, moving at high velocities, collide with the surface of a work piece, they remove material from it. Thus, for example, the workpiece may be etched or cleaned by placing it on a cathode in a low pressure noble gaseous ambient and applying a high constant voltage between the cathode and an anode. Ions, which are formed by collisions between electrons accelerated from the cathode and noble gas atoms, are accelerated toward the cathode where they bombard the workpiece surface.

Present methods utilizing ion bombardment are, however, of limited utility in the etching or cleaning of workpieces containing thin films of dielectric materials or other materials which cannot be subjected to high, constant voltages without damage. Typically, the voltages required to form ions and obtain etching are in excess of the breakdown voltage of thin dielectric films. And while the problem of breakdown may be overcome by placing an insulating layer between the workpiece and the cathode, (see M. P. Lepselter, U.S. Pat. No. 3,271,286, dated Sept. 6, 1966) the efficiency ofthe process is greatly reduced by the presence of an insulator because the electric field must be bent around it. As a result, the etching is produced by bombardment of stray ions from the surrounding field rather than by ions attracted directly to the workpiece, and is less satisfactory.

The method for etching or cleaning, in accordance with the present invention, comprises, in brief, the steps of placing the workpiece in a low pressure noble gas ambient, forming a plasma in the ambient, and effecting the bombardment of the surface by ions drawn from the plasma by the establishment of a periodic voltage between the workpiece and the plasma. This method is particularly useful in the subsequent formation of an atomically clean bond between a surface of the workpiece and some other material.

When it is desired to deposit a layer of material on the surface of a workpiece, the formation 'of an atomically clean bond is important because of greater adherence and greatly LII increased uniformity in its electrical properties. One difficulty typically encountered in depositing a layer of material on a metal or semiconductor workpiece surface is the formation of an unwanted, thin, oxide-like surface layer on the workpiece surface prior to deposition. Typically, such a surface layer forms immediately after cleaning when the substrate is exposed to air, and forms even at moderate vacuums so low as 10 torr. The presence of the surface layer prevents uniform reaction between the deposited material and the workpiece because the reaction must take place through randomly distributed voids in the surface layer. But when the intervening surface layer is eliminated, more uniform depositions may be obtained. The result is to produce more uniform ohmic and rectifying contacts. (See Kahng & Lepselter, Planar Epitaxial Silicon Schottky Barrier Diodes, Bell System Technical Journal 44:1525, 1965) While the advantages of atomically clean bonds are known, previously devised methods of forming them are of only limited utility in the fabrication of microelectronic devices. One method of forming such a bond is cleaving a sample of material in a vacuum and depositing a layer of material on the freshly cleaved surface. It is, however, impractical to cleave the surface of a workpiece containing layers of material as thin as those typically encountered in microelectronics. A second method is vacuum heating a sample of material to a very high temperature and then depositing a layer of material on it. A difficulty with this approach, however, is that the intense heat pits oxide layers and destroys the properties of delicate junctions.

In accordance with an important use of the invention, an atomically clean bond is formed by cleaning the workpiece surface utilizing ionic bombardment and then depositing a layer of material upon the freshly cleaned surface.

The invention may now be described in greater detail by reference to the accompanying drawings wherein:

FIG. 1 is a cross section of a typical workpiece to be etched or cleaned in accordance with the invention;

FIGS. 2, 5, 6 and 8 show various forms of apparatus which may be used for the practice of the invention;

FIG. 3 is a graph illustrating features of a preferred voltage waveform suitable for application between the workpiece and the plasma; I

FIG. 4 is a graph of the ion-induced etching of a typical material as a function of the voltage between the workpiece and the plasma; and

FIG. 7 is a typical workpiece upon which an atomically clean bond is to be formed in accordance with the invention.

Similar reference characters are applied to similar elements throughout all the drawings.

In FIG. 1 is shown a cross section of a typical workpiece. Typically, it comprises a relatively thick substrate 10 such as, for example, a silicon wafer, supporting a thin film of material 1 l. The thin film typically comprises several layers which have been deposited in succession upon the surface. These layers may be dielectrics, semiconductors, conductors or even ferrites. Also shown is a masking layer 12 which may be formed by known techniques, such as the well-known photo-resist method, to protect areas of the surface which are not to be etched. In typical applications the thin film 11 is a few tenthousandths of an inch thick or smaller with the thickness of the individual layers being a few hundred-thousandths of an inch.

Reference is now made to FIG. 2 which is a schematic illustration of apparatus used to practice the invented method.

The workpiece, along with an electron-emitting filament or cathode 20 and an anode 21, is placed within a vacuum chamber 22. In one typical arrangement the filament was placed approximately five inches from the anode and the workpiece was positioned two inches from the filament-anode line. The chamber is also provided with apparatus (not shown) for evacuating it and injecting a suitable gaseous ambient into it. Since a plasma 23 is to be formed between the filament and the anode, structure for containing a plasma and, incidentally,

for supporting the workpiece in proper relationship to the plasma, is advantageously provided. In the apparatus of FIG. 2, a quartz container 24, having suitably located apertures 25, 26, and 27 for the workpiece, filament and anode, respectively, is provided for this purpose. Additionally, apparatus for establishing a longitudinal magnetic field along the filamentanode direction, such as, for example, ring magnets 28, are provided in order to controlthe plasma. Terminals extending through chamber 22 are also provided for connecting the filament and the anode to external power supplies (not shown) and for connecting the workpiece to a periodic voltage power supply 31.

Using the above-described apparatus, a workpiece is etched in accordance with the invention, by the steps of evacuating the chamber, introducing a noble gas ambient, forming a plasma between the filament and the anode, and applying an appropriate periodic voltage between the workpiece and the plasma, as is now explained in greater detail hereinbelow.

With the various members in place, the workpiece is surrounded with a noble gas ambient which can be ionized to form a plasma. While argon is typically used, any noble gas will work. The reason a noble gas is used is to prevent unwanted chemical reactions between the ambient and the thin film. Ambient pressures between about one-half micron and several hundred microns have been found to be useful. As an exception to the ordinary practice of using ambients comprised solely of noble gases, it has been found that the etching rate of oxidizable metals, such as titanium, for example, can be controlled by "bleeding" oxygen into the ambient. Typically the partial pressure of the oxygen is about 1 to 5 percent that of the noble gas. The oxide layer which forms on the metal etches more slowly than the pure metal, thus slowing the etching rate. Other non-noble gases which react with the particular material of the thin film surface to form slowly etching compounds can be similarly used.

A plasma 23 is formed in the ambient between the filament 20 and the anode 21 by heating the filament by a current derived from an external power supply and by applying a constant voltage between the filament and the anode as provided by another external power supply. The plasma is formed by collisions between electrons emitted from the heated filament and atoms of the gaseous ambient. Ring magnets 28, which establish a longitudinal magnetic field, are used to control the shape of the plasma.

Etching of the thin films 11 is produced by applying an alternating voltage derived from an external power source 31, between the workpiece and the filament-anode system. When the workpiece is at a negative potential with respect to the plasma, positive ions 29 are drawn out of the plasma and toward the workpiece where they bombard the workpiece and produce etching and/or cleaning of the exposed surface area.

As indicated above, the workpiece may include a dielectric material as one of the layers of the thin film. When this is so, extra care must be given to the nature and parameters of the alternative voltage that is used, and to the details of the electrical circuit through which it is applied, in order that no significant average voltage is built up across the dielectric layer. Basically, the problem arises due to the fact that an electron is much more mobile than an ion. This means that there is a much greater flow of electrons to the workpiece, when the latter is at a positive potential relative to the plasma, as compared to the flow of ions when the workpiece is at a negative potential relative to the plasma. As a consequence of this disparity in the mobilities of an ion and an electron, an alternating voltage having an average value of zero, such as a simplesinusoidal wave, produces a net average voltage across the dielectric film.

When it appears that the resulting voltage buildup may be dangerously near the dielectric breakdown voltage, one or both of the following precautions are advantageously taken. The first of these precautions is to include a blocking capacitor in series with the workpiece. The blocking capacitor can take the form of a second dielectric layer 30 included between the workpiece and the connection to the periodic voltage supply as shown in FIG. 2. The inclusion in the circuit of a blocking capacitor results in a sharing of the'average voltage buildup between the two dielectrics. In particular, if the capacitance of the capacitor formed by the second dielectric 30 is smaller than the capacitance of the capacitorformed by the dielectric layer, a greater proportion of the average voltage appears across dielectric 30.

The second precaution that can be taken for reducing the voltage buildup across the dielectric layer is to use an alternating voltage that has a low average negative voltage. This has the effect of compensating for the lower ion mobility.

FIG. 3 illustrates a typical voltage waveform which has a negative average value and is suitable for use in connection with the invention. The periodic voltage shown comprises a train of negative pulses having a pulse peak, V,,,,,,, a pulse duration, t,, and a period, T. So long as the average voltage is less than a few hundred volts, typical dielectric layers are not damaged. It is understood, however, that the maximum permissible average in any instance depends upon the nature of the dielectric material and its thickness. A particularly advantageous negative pulse voltage is obtained when the pulse peak is chosen with reference to the yield curve of the materialto be etched so that the amount of etching is maximized.

FIG. 4 illustrates a typical etching yield curve. The Y-axis indicates the yield of atoms etched per bombarding ion, while the V-axis indicates the ion energy in volts. The curve is typified by three regions. As ion energy is increased, the curve passes through a first region of low yield until the ion energy is increased beyond a first knee (knee 1 This low yield region is followed by a second region of rapidly increasing yield until a second knee (knee 2) is reached. Beyond knee 2 is an upper plateau region in which the yield continues to increase but at a much slower rate. Thus, one can maximize the amount of etching per unit of average voltage by choosing a peak voltage for the negative pulse that is approximately equal to the voltage at a low end of the upper plateau of the yield curve, i.e., near knee 2.

In order to minimize the output voltage requirements of the periodic voltage supply 31, the impedance of the workpiece is advantageously made small. Since this impedance is primarily capacitive when a dielectric layer is present, it has been found advantageous to use a high frequency voltage source. In practice, it has been found that the range of frequencies between kilocycles and 10 megacycles is satisfactory.

An idea of the relative magnitudes of the parameters appropriate for use in accordance with this embodiment of the invention may be obtained by consideration of one set of parameters used in a typical operation.

In one example, a 2,000 angstrom thickness was removed from a film of SiO disposed on a one inch diameter slice of silicon in ten minutes. The ambient used in this example was argon at a pressure of 10 microns. The voltage applied between the filament and the anode was 50 volts. A 0.02 microfarad blocking capacitor was placed in series with the workpiece, and the waveform applied between the capacitor and ground (the workpiece being between the two) was a negative pulse train having a peak voltage of approximately 1 ,500 volts at frequency of I50 kilocycles per second.

It is understood that the example described above is merely intended to be illustrative. Many other combinations of parameters within the previously described ranges have been successfully employed; the exact combination being dependent upon the particular requirements of each case.

FIG. 5 is a schematic illustration of an alternative apparatus which can be used for the invention. The apparatus differs from that shown in FIG. 2 chiefly in that the filament and the anode of FIG. 2 have been eliminated and in that a grounded metal electrode 40 has been added. In this apparatus, the workpiece is supported on an insulating base 42 in a vacuum chamber 22. A quartz cylinder 24 surrounding the workpiece is also supported by the insulator, and a grounded metal electrode is placed across the opposite end of the cylinder. A ring magnet 41 is placed around the cylinder 24 above the workpiece.

In this apparatus, a plasma 23 is formed by collisions between excited electrons and the ambient gas atoms rather than by collisions involving filament-emitted electrons, as in the apparatus of FIG. 2. When the gas is at a sufficiently high pressure, the application of a periodic voltage between electrode 40 and the workpiece causes sufficient movement of the electrons to form a plasma. However, the plasma may advantageously be formed at a lower pressure by the addition of magriets for concentrating the electron movement. Thus, for example, in FIG. 5, ring magnet 41 can be used to establish a magnetic field in the direction of the electric field. Such a magnetic field concentrates the electron movement and the resulting plasma within the central region of the ring. An advantage in forming the plasma in this manner is its simplicity. The need for a separate electron source is eliminated, and a more nearly uniform plasma is generated. Etching or cleaning can be carried out in substantially the same manner as described previously.

In the discussion thus far, cleaning and etching of a workpiece have been considered. As previously mentioned, an important application of the invention is in the formation of an atomically clean bond between a workpiece surface and another material.

The present invention is particularly suited to dealing with the problem of unwanted surface layers and is especially useful where the workpiece contains one or more dielectric layers. In accordance with this use of the invention, the surface layer is removed and prevented from reforming prior to deposition. This is done by depositing the material either at the same time the surface layer is being removed, or immediately afterward, but before the workpiece is exposed to air. Known techniques such as, for example, sputtering or vacuum evaporation can be used to deposit the material on the cleaned surface.

FIG. 6 illustrates apparatus which can be used to atomically clean a workpiece surface and deposit a layer of material onto it. The apparatus differs from that shown in FIG. 5 chiefly in that a sputtering electrode 50 of the material to be deposited is placed in the quartz container 24 facing the workpiece. The sputtering electrode is connected to its own separate power supply, which can be either alternating or direct current.

Cleaning of the workpiece is accomplished by ionic bombardment in the manner described above. Material is sputtered onto the workpiece from the sputtering electrode 50 either immediately after the cleaning process or, advantageously, at the same time that the cleaning is taking place. The advantages of simultaneous cleaning and sputtering are that there is no time for a surface film to form and that the more loosely bound atoms of sputtered material are knocked off the workpiece while the more tightly bound atoms remain. The result is a denser and more strongly adherent contact.

One use for this atomically clean bonding process is the formation of a metal-semiconductor contact. FIG. 7 illustrates a typical workpiece comprising a semiconductor substrate 60 such as silicon upon which there is shown disposed a passivating film 61 such as silicon dioxide and a masking layer 62 such as photo-resist or a metal having a high sputtering threshold.

An atomically clean contact is formed by first back sputtering the workpiece so that the silicon substrate is exposed and then sputtering a contact metal such as platinum onto the workpiece. Back sputtering can be carried out at a reduced rate while the sputtering is taking place in order to achieve a cleaner, more adherent bond. By either controlling the energy with which the sputtered atoms reach the silicon or heating the silicon substrate (heater not shown), an atomically clean ohmic contact or barrier layer of metal silicide may be obtained.

When it is desired to clean the workpiece and sputter the material to be deposited in separate steps, the substrate is first cleaned by grounding the sputtering electrode and applying a periodic voltage to the workpiece. After the workpiece is cleaned, it is disconnected from the power supply or grounded, and an alternating current or a direct current negative voltage is applied between the sputtering electrode and ground to sputter metal onto the workpiece. A separate heating step is usually required to produce a metal silicide by sintering. An advantage of the technique is that both the cleaning and the metal deposition take place without breaking vacuum in the chamber.

The heating step can be eliminated by both etching the workpiece and sputtering metal simultaneously. The sputtered metal is ionized as it passes through the plasma and then accelerated toward the workpiece by a negative voltage. If the workpiece contains no dielectric layers, a d.c. negative voltage can be used. However, in the usual case, a protective layer will be present and a periodic voltage having a negative average value is used.) The metal ions are thus given sufficient energy to penetrate through surface barriers both chemical and physical and into the lattice structure of the silicon. In addition, the impact of the ionsboth of metal and of the noble gas-provide sufficient energy at the interaction region of the silicon surface that much of the sputtered metal reacts immediately with the silicon. By properly adjusting the rate of sputtering and etching, any metal which does not react can be immediately etched away, while the silicide builds up because it is more etch resistant than the loosely bound, unreacted metal. Thus, this process has two additional advantages: first, no separate heating step is required saving time and reducing stress in the workpiece; and, second, no separate step is required to etch excess metal from the surface of the workpiece.

More subtle advantages also accrue from the use of this process. Certain metals, such as zirconium, rhodium and palladium, are very difficult to use in forming metal silicides by prior art techniques. Zirconium, when deposited in films of 200 angstroms or more, usually cracks and peels when sintered. Rhodium cannot generally be chemically etched to remove the unreacted metal, and palladium usually forms a multiphase structure having nonuniform electrical properties. However, when the process just described is used, excellent silicide contacts are formed using any of these metals. In. the case of zirconium, sufficient metal is implanted into the silicon to overcome whatever surface barrier prevents the formation of good contacts, while in the case of palladium a single phase silicide is formed. The use of sputter etching simultaneously with the formation of rhodium silicide is clearly advantageous.

These processes and their advantages will become clearer by reference to FIG. 8, which illustrates an alternative apparatus for forming atomically clean bonds or contacts. This apparatus is substantially the same as that described previously except that a titanium cathode 81 has been added and adaptations have been made so that the workpiece 84 can be moved from a position beneath the titanium cathode to a position beneath the cathode of the metal to be deposited. This adaptation is accomplished by disposing the workpiece on graphite cathode on the outer circumference of a rotatable conductive disc 83. Electrodes 50 and 81 are electrically coupled to 5,000 volt d.c. power supplies, and the graphite cathode 80 is electrically coupled to an 800 Khz oscillator with a zero to minus 5,000 volt peak-to-peak output, ad-

vantageously through spring contact 82 so that the potential may be kept on the workpiece during 360 of rotation.

The workpiece, with contact windows previously etched in the protective oxide, is placed on the graphite and positioned so that it is beneath neither of the metal cathodes. The chamber is then evacuated to a pressure of 10 torr and argon is bled in at a rate sufficient to cause the pressure in the chamber to stabilize at approximately 10 microns of argon.

. The titanium cathode is then sputtered using a potential of 5,000 volts and a current density of l milliampere per square inch for about 10 minutes to be certain that the titanium surface is clean and is subsequently kept sputtering throughout the process to act as a getter. After this preliminary step, the cathode of the metal to be used in forming the metal silicide the contact areas, it is rotated into position under the depositing cathode. The energy coupled to the silicon surface by bombardment of noble gas ions and the impact of sputtered 1 metal ions is sufficient to cause a reaction between the metal and the silicon. For depositing platinum, it was found that rf voltages between 3,000 volts and 4,500 volts, and preferably between 4,000 and 4,300 volts, produced excellent platinum silicide contacts. Voltages below 3,000 volts result merely in the deposition of a platinum film on the silicon; and voltages above 4,500 volts produce a coarse platinum silicide contact. With these voltages, any unreacted metal which deposits on the slice is immediately sputtered off. The intermetallic compound formed by the metal and silicon is also removed by the back sputtering but since a two-to-one increase in volume occurs during its formation, a net gain results at a rate of approximately 35A per minute.

After an elapsed time commensurate with the thickness of metal silicide desired, usually in the order of 10 minutes, the d.c. potential is removed from the metal cathode and the slice is back sputtered for an additional 30 seconds to ensure a clean oxide surface. The slice is then positioned under the titanium for minutes and then the platinum for 15 minutes to build up a titanium-platinum overlay. The workpiece is then removed from the chamber, and the remaining steps in the standard Ti-Pt-Au overlay beam lead process followed, if desired.

An X-ray analysis of platinum silicide contacts formed in this manner shows it to be of the same phase and of the same preferred crystal orientation as platinum silicide formed by the standard sintering process. In addition, X-ray measurements of the stresses in the silicon show that they are only 25 percent of those developed by the standard process. Finally, it may be noted that Schottky barrier diodes fabricated in this manner have more nearly ideal electrical characteristics. The metal silicide contacts most advantageously produced by the technique of this invention include TiSi, ZrSi, HfSi, NiSi and the silicides of the six platinum group metals. Sputtering voltages in the range of l kv to 10 kv are appropriate for spontaneous formation of these materials.

It is understood that the above-described arrangements are simply illustrative of the many possible specific embodiments which can represent applications of the principles of the invention. Numerous and varied other arrangements can readily be devised in accordance with these principles by those skilled in the art without departing from the spirit and scope of the invention.

What is claimed is: 1; A method for forming a metal silicide layer into a silicon substrate and wherein the silicon substrate is covered with a protective dielectric layer except for exposed regions where the silicide layer is to be formed comprising the steps of:

cleaning the exposed regions of the silicon substrate in a low pressure noble gas ambient by positive ion bombardment;

sputtering a metal into the exposed regions to form a metal silicide layer and simultaneously back sputtering the silicon substrate by bombardment of noble gas ions to remove excess metal from the dielectric layer at the same time that the metal silicide layer is being formed; and

adjusting the sputtering and back sputtering rates so that the metal deposits only in the exposed regions thus forming the silicide layer.

2. The method of claim 1 wherein the metal is selected from the group consisting'of titanium, zirconium, hafnium, nickel, palladium, platinum, ruthenium, rhodium, osmium, and iridium.

37 The method of clai n 1 wh rei n the noble gas is argon.

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Reference
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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3904462 *Nov 27, 1973Sep 9, 1975Philips CorpMethod of manufacturing etched structures in substrates by ion etching
US3945902 *Jul 22, 1974Mar 23, 1976Rca CorporationMetallized device and method of fabrication
US3971684 *Apr 14, 1975Jul 27, 1976Hewlett-Packard CompanyEtching thin film circuits and semiconductor chips
US3983022 *Oct 7, 1974Sep 28, 1976International Business Machines CorporationProcess for planarizing a surface
US4024041 *Dec 16, 1975May 17, 1977Hitachi, Ltd.Method of forming deposition films for use in multi-layer metallization
US4126530 *Aug 4, 1977Nov 21, 1978Telic CorporationMethod and apparatus for sputter cleaning and bias sputtering
US4328081 *Nov 4, 1980May 4, 1982Micro-Plate, Inc.Plasma desmearing apparatus and method
US4416725 *Dec 30, 1982Nov 22, 1983International Business Machines CorporationCopper texturing process
US4690746 *Feb 24, 1986Sep 1, 1987Genus, Inc.Interlayer dielectric process
US5419822 *Feb 28, 1989May 30, 1995Raytheon CompanyMethod for applying a thin adherent layer
US5447613 *Dec 18, 1991Sep 5, 1995Mitel CorporationPreventing of via poisoning by glow discharge induced desorption
US5780929 *Nov 5, 1996Jul 14, 1998Siemens AktiengesellschaftFormation of silicided junctions in deep submicron MOSFETS by defect enhanced CoSi2 formation
US6087227 *Mar 25, 1999Jul 11, 2000United Microelectronics Corp.Method for fabricating an electrostatic discharge protection circuit
US6291345Dec 20, 1999Sep 18, 2001Honeywell International Inc.Controlled-stress stable metallization for electronic and electromechanical devices
US6458698Jul 17, 2001Oct 1, 2002Honeywell International, Inc.Controlled-stress stable metallization for electronic and electromechanical devices
US9211570 *May 16, 2011Dec 15, 2015Kobe Steel, Ltd.Ion bombardment treatment apparatus and method for cleaning of surface of base material using the same
US20130061872 *May 16, 2011Mar 14, 2013Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)Ion bombardment treatment apparatus and method for cleaning of surface of base material using the same
EP0616361A1 *Mar 3, 1994Sep 21, 1994Siemens AktiengesellschaftFormation of silicided junctions in deep sub-micron MOSFETS by defect enhanced CoSi2 formation
EP2578722A1 *May 16, 2011Apr 10, 2013Kabushiki Kaisha Kobe Seiko ShoIon bombardment treatment device, and method for cleaning of surface of base material using the treatment device
EP2578722A4 *May 16, 2011Oct 16, 2013Kobe Steel LtdIon bombardment treatment device, and method for cleaning of surface of base material using the treatment device
WO2000077839A1 *Jun 14, 2000Dec 21, 2000Honeywell International Inc.Controlled-stress stable metallization for electronic and electromechanical devices
Classifications
U.S. Classification204/192.23, 257/E21.165, 257/E21.507, 257/E21.252, 204/192.3, 257/E21.226
International ClassificationH01L21/311, C23C14/35, H01L21/306, H01L21/285, H01L21/60, C23C14/02
Cooperative ClassificationC23C14/35, H01L21/28518, H01L21/76897, H01L2924/3011, H01L21/02046, C23C14/022, H01L21/31116
European ClassificationH01L21/768S, C23C14/02A2, H01L21/285B4A, C23C14/35, H01L21/311B2B, H01L21/02F2B