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Publication numberUS3670106 A
Publication typeGrant
Publication dateJun 13, 1972
Filing dateApr 6, 1970
Priority dateApr 6, 1970
Publication numberUS 3670106 A, US 3670106A, US-A-3670106, US3670106 A, US3670106A
InventorsOrban Robert A
Original AssigneeParasound Inc
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Stereo synthesizer
US 3670106 A
A stereo synthesizer for synthesizing a stereo output from a monophonic input, according to which a source of monophonic sound signals is connected to two sound channels, the signals being applied directly to the two sound channels and also in delayed fashion thereto by means of a network transfer function so as to reinforce the direct signals in one channel and oppose them in another channel as a function of frequency. The network transfer function is such that the amplitude of the frequency response is independent of frequency while the phase response varies as a function of frequency.
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Description  (OCR text may contain errors)

United States Patent June 13, 1972 Orban STEREO SYNTHESIZER [72] Inventor: Robert A. Orban, East Palo Alto, Calif.

[73] Assignee: Parasound, Inc., San Francisco, Calif.

[22] Filed: April 6, 1970 21 Appl. No.2 25,775

Related U.S. Application Data [63] Continuation-impart of Ser. No. 667,216, Sept. 12,

1967, abandoned.

[52] U.S. Cl.. ..179/l G [51] Int. Cl [58] Field of Search ..179/6, 6 A, 6 P

[ 5 6] References Cited UNITED STATES PATENTS 3,124,649 3/1964 Pflager et al ..179/1 3,200,199 8/1965 Bang... ..179/l 3,219,757 11/1965 Palladin0.... .....l79/1 3,311,833 3/1967 Lewis et a1 ..325/474 NO/UU OTHER PUBLICATIONS Journal of the Audio Engineering Society, An Artificial Stereophonic Effect Obtained from a Single Audio Signal, M. P. Schroeder, Vol. 6, No. 2, pp. 74- 79 Primary Examiner-William C. Cooper Assistant ExaminerHorst F. Brauner AttorneyRobert S. Dunham, P. E. Henninger, Lester W. Clark, Gerald W. Gr'ifi'rn, Thomas F. Moran, Howard .1. Churchill, R. Bradlee Boal, Christopher C. Dunham, Robert Scobey, Henry T. Burke and John F. Ohlandt, Jr.

[57] ABSTRACT A stereo synthesizer for synthesizing a stereo output from a monophonic input, according to which a source of monophonic sound signals is connected to two sound channels, the signals being applied directly to the two sound channels and also in delayed fashion thereto by means of a network transfer function so as to reinforce the direct signals in one channel and oppose them in another channel as a function of frequency. The network transfer function is such that the amplitude of the frequency response is independent of frequency while the phase response varies as a function of frequency.

4 Claims, 12 Drawing Figures STEREO SYNTHESIZER BACKGROUND, OBJECTS AND SUMMARY OF THE INVENTION The present application is a continuation-in-part of application, Ser. No. 667,216, filed on Sept. 12, 1967, now abandoned.

This invention relates to sound translation systems and more particularly to a system that is adapted and intended for the translation of a monophonic or single-channel sound signals into stereophonic or two-channel sound signals for presentation in a variety of forms.

The present invention relates more specifically to what may be termed a stereo synthesizer. This stereo synthesizer is a device or apparatus, which is, in general, adapted to convert monophonic signals so that they may be conveyed or transmitted to any suitable medium for use in a stereophonic condition. A particular way of applying the apparatus would be to take a monophonic sound source and to create therefrom a simulated stereophonic output which could then be recorded in separate record channels and later reproduced by means of separated transducer devices.

In the past few decades, a great deal of interest has developed with regard to the transmission, recording and reproduction of binaural and stereophonic sound. To the audio purist, the term binaural usually applies to a system where separate sound channels are employed and signals are conveyed independently to the ears of a listener so that he is able to perceive musical sound just as it might be heard at a concert hall or the like. The term stereophonic has been conventionally applied in a broader sense to a conventional twochannel system with loudspeakers at the sound output. A true stereophonic system usually results from maintaining at least two channels completely distinct and separate from source to end point. For example, in the transmission and recording of stereophonic signals the general practice has been to provide spaced microphones at the program source and to keep the electrical signals, representative of the distinct sound signals picked up by the microphones, completely separated throughout the transmission thereof.

While the qualities of true stereophonic sound have been thoroughly appreciated, it has unfortunately been the case that such true stereophonic sound transmission is sometimes economically infeasible. It also sometimes happens that the program source already exists in the form of a record which was produced by a one-channel recording system so that the electrical signals representative of the original sound must be accepted in their preserved state.

In order to overcome the economic difficulties or because of the fact, as indicated above, the program source is a monophonic record, systems have been devised for simulating stereophonic sound. That is to say, some means have been employed to create the illusion of stereophonic sound with its well-known essential elements of direct and reverberent sound. One example of a system that has been known is described in U.S. Pat. No. 2,942,070 to Hammond et al. In this patent electrical sound signals from a monaural or singlechannel source are fed directly to a set of earphones and, also, the signals are passed through reverberation apparatus. Thereafter, the signals emanating from the reverberation apparatus are mixed with the direct signals and the resultant signals are supplied in two channels independently to the ears of the listener.

The Hammond et al system of U.S. Pat. No. 2,942,070 describes a mechanical phase-shifting device which produces a fixed time delay. It is apparent that control of high frequency phase shift is very imprecise with such a device; the "crossover points are not independently adjustable, but all vary simultaneously as a function of the time delay. It should be noted here that the term cross-over points" in this context, and as used hereinafter in the specification, refers to points where the phase response of the network is equal to 1r/2 mr, where n 0, 1, 2 and the output from the left and right channels is equal in amplitude and in phase quadrature.

It will be appreciated, therefore, that it is not possible to adjust the arrangement in the Hammond et al. system to product a subjectively logical directional effect, and the ability to adjust the time delay to obtain equal subjective loudness from both channels (dependent on having sufficient quantities of presence" frequenciesbetween 2 and 7 kilocycles and sufficient quantity of brilliance" frequencies above 7 kilocycles, present in both left and right channels) is purely a matter of chance.

In addition, the mechanical nature of the Hammond et al. arrangement is highly inconvenient. In other words, the mechanical arrangement makes for inflexibility in adjustment.

Accordingly, it is a primary object of the present invention to provide a very flexible and economical phase-shifting arrangement that is electrical in nature, is extremely effective in the short delay range, and which can be widely adjusted by very simple means.

Broadly stated, then, it is a basic feature of the present invention that electrical means are provided for achieving a network transfer function whereby the amplitude of the frequency response is independent of frequency whereas the phase of the frequency response varies as a function of frequency. By this provision it is possible to have the power spectrum of the input proportional to the sum of the power spectra of the left and right channels of the system. This is a very fundamental consideration and it results in the maximum of fidelity to the original monophonic signal.

An important advantage that is gained by the apparatus of the present invention is that, although very slight phase shifts are involved, they realize the desirable feeling normally associated with true stereophonic sound reproduction. In other words, while maximum fidelity is maintained in respect of the original monophonic signal because of the preservation of the power spectrum proportioning, a sensible stero effect is obtained because of the amplitude and phase differences between the channels of the system. These combined results are achieved by the unique provisions of the present invention.

A more specific feature of the present invention resides in the fact that the network transfer function, which achieves the essential results of the present invention, is in the form of a succession or cascade of phase shift networks which are uniquely calculated to produce a readily adjustable set of the aforenoted cross-over points in the range or spectrum of sound frequencies.

The stereo synthesizer of the present invention divides the audio spectrum of interest into five bands, nominally centering around 50, 250, 1,200, 4,000 and 10,000 cycles, and these are widely adjustable by means of control elements. Thus, at two points within the cascaded phase-shifting means referred to above, there are provided variable resistors which are used to achieve phase response adjustment. Each of the cascaded electrical phase shift networks essentially limits its action to one of the predetermined frequency bands. The total phase shift of each network is at one-f fth the cross-over frequency phase shift is only 22 and at five times the crossover frequency the phase shift is 158. The shift approaches 0 at low frequencies and 180 at high frequencies. By wide spacing of cross-over frequencies in the shifting cascade network, each individual cross-over frequency may be adjusted with relatively minor effect on the other cross-over frequencies. The advantages in terms of versatility, convenience and precision of control are evident.

The five bands of frequencies mentioned above are placed in alternating order to the left and right of center and the two control elements affecting the cross-over points are normally adjusted so that there is equal subjective loudness in the left and right channels, i.e., for correct subjective channel balance. A third control element adjusts the channel separation from pure, completely in-phase monophonic to pure, random phase stereo.

The cross-over points were carefully selected after extensive listening tests to assure minimum instrument wander and optimal subjective channel balance. By instrument wander" is meant the well-known tendency for the sounds of musical instruments to appear to move from one sound reproducer to another.

One way of emphasizing the results attained by the stereo synthesizer of the present invention is to note that there is no change in subjectively perceived frequency response but rather, a sudden increase in depth or dimensionality when the synthesizer is switched from the monophonic position to the stereo position, the latter position, of course, bringing into play the network transfer function alluded to above.

Another point to be emphasized is that with the stereo synthesizer of the present invention there is no attempt to recreate stereo directionality; the goal, instead, is to recreate stereo depth and ambience.

The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention, as illustrated in the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a simplified diagram illustrating the basic relations in the stereo synthesizer of the present invention.

FIGS. 2a and 2b are schematic diagrams of one embodiment of the stereo synthesizer of the present invention; in particular, FIG. 2a shows a processor including a phase shifting means, and FIG. 2b shows the matrix circuitry for mixing the main signal with the phase shifted signal.

FIG. 3 is a simplified diagram of the basic phase shifter and its differential amplifier, corresponding to certain parts of the processor of FIG. 2a.

FIG. 4 is a simplified diagram corresponding to certain other parts of the processor of FIG. 2a.

FIG. 5 is a phase-response diagram illustrating the relationship between frequency and phase shift in the processor.

FIG. 6 is a simplified diagram illustrating in general form a modified stereo synthesizer configuration.

FIG. 7 is a phase-response diagram of a single stage, first order, all-pass network.

FIG. 8 is a phase-response diagram of a second order, allpass network.

FIG. 9 is a circuit diagram of a basic phase shifting stage.

FIG. 10 is an equivalent circuit to that shown in FIG. S, for purposes of analysis.

FIG. 11 is a circuit diagram of the modified stereo synthesizer and illustrating particularly a center bass" realization.


Referring now to the drawings, and particularly, for the moment to FIG. I, the simplified diagram is there shown for the complete stereo synthesizer of the present invention. This diagram is simply used as an aid for an understanding in mathematical terms of the basic relation within the synthesizer apparatus. Thus, it will be seen that the monophonic input is applied to the input terminal and thence, is applied directly to an output device I2, and to another output device 14. At the same time, the monophonic input is applied to the network transfer function 16, that is to H(s) where (s) represents a complex variable in Laplace transform.

Taking the monophonic input to be equal to jwt in volts where w is frequency in radians per second) it will be understood that the separate outputs, that is, the L and R outputs, will be given by the following relation: input e volts w frequency, rad/sec. output: L e"" H(;'w)e volts I R a Hgww voltsi .'.L+R=2e 2 input signal. Mono listener to multiplexed stereocast hears original mono signal, regardless of form of H(s). Now, let HQw) E |H|e (II). Where IH] is magnitude of frequency response (=[re(H) 9m(H) )and arg H is phase angle of freq. response Taking magnitude and phase 1.=a 11 l)+2|H] cos (argH)]' e tan" [HI sin (argH) l |H| cos (argH) If output is loaded by resistor R, average powers in the two channels:

Sum of power in L & R channels:

Referring now to FIGS. 2a and 2b, there is shown the complete stereo synthesizer of the present invention in its more detailed form. Fig. 2a shows the L-R processor, generally designated 20, in which the fundamental transformations are performed, that is, the operations on the monophonic signal to produce the desired phase shifting. In FIG. 2b there is shown what is termed the matrix circuitry, generally designated 40, whose operation will be explained hereinafter.

The L-R processor of FIG. 20 may best be understood when considered as divided into a number of basic blocks or stages. The first block is the input amplifier stage 22. The next block comprises the differential amplifier 24, having two separate sides 24a and 2412. Another block is constituted by the constant current supply 26, specifically in the form of transistors 26a and 26b. Other basic blocks or stages of FIG. 2a are the input amplifying stage 28a which is in the form of a plural transistor, Darlington type of emitter follower, and the second differential amplifier 30. The second differential amplifier is shown having two separate sides, 30a and 3012, very much similar to the previous differential amplifier 24. The final or output amplifier stage for the processor is designated 32, and it is from this point that the processed or phase shifted signal is applied to the matrix circuitry of FIG. 2b.

What is termed a basic phase shifter and its operation may be readily comprehended by reference to FIG. 3. The differential amplifier illustrated in FIG. 3 corresponds, for example, to the differential amplifier 24 which is incorporated in the processor 20 of FIG. 2a. It operates in such a manner as to respond only to the voltage difference between its inputs and gives two equal but opposed outputs, that is to say, the outputs are outof-phase.

Considering point A on FIG. 3, the transfer function from the source or generator E(s) to the point A is:

The transfer function from EU) to point B is. on the other hand,

Taking polar coordinates and frequency response (letting s 1' It will thus be readily understood that the amplitude response of this network function is independent of the frequency and is independent of the value of any of the components in the network. However, the phase response is proportional to w, C and R Varying R is one convenient way of adjusting the range of the network. It will be noted by reference to FIG. 5 how the frequency is related to the phase shift in radians and how the spectrum is divided.

This figure graphically demonstrates the manner in which the essential purposes of the present invention are fulfilled. By the apparatus already described, and by that which is to be described, cross-over points are established, that is, points where the phase response of the network is equal to 1r/2 mr, where n 1- 0, l, 2 The five bands of frequencies are shown in accordance with FIG. 5 as placed in alternating order, that is, alternating between the left and right of center. Thus, a first band of frequencies having a center frequency of approximately 50 cycles, a third band of frequencies having a center frequency of approximately 1,200 cycles and a fifth band having a center frequency of approximately 10,000 cycles are enhanced in the left channel, while a second band of frequencies having a center at approximately 250 cycles and a fourth band having a center frequency of approximately 4,000 cycles are enhanced in the right channel.

Since the output from a differential amplifier is balanced to ground it is possible to use another simple network (equivalent to the network already analyzed), to obtain another phase shift and with a single-ended output. Thus, as depicted in FIG. 4, in which the center-tapped transformer is illustrated as being equivalent to a differential amplifier, a further phase shift is achieved as will be explained in greater detail in connection with the implementation of FIG. 2a.

Referring back to FIG. 2a, and in particular to the input labelled Mono In, the input is applied in standard fashion to the amplifier stage 22 shown in the form of an emitter follower transistor stage. The output of this stage 22 either goes directly to the matrix circuit of FIG. 2b by way of the output marked Main Signal Out or the signal is fed through the processor, i.e. it is operated on by the network transfer and it is then sent from the point marked Process Signal Out to the input of the matrix circuitry of FIG. 2b.

Referring specifically to the output of the emitter follower 22, the top of the emitter resistor 100 is connected to the aforesaid Main Signal Out output terminal. The mid-point junction of this emitter resistor 100, of course, gives one-half of the total output voltage. This voltage is A.C. coupled through the capacitor 102, and thence to the one side of the differential amplifier 24. namely, to side 24a. and more specifically to the base input of the first transistor thereof, that is transistor 104. The several resistors at the input, that is, resistors 106 and 108 and 110, are conventional resistors that are typically used to set the input bias. In particular, the resistor 108 forms a potentiometer of 25 kilohms in order to set the DC. balance of this amplifier stage. The collector resistor 112 and the emitter resistor 114 are provided in order to give this transistor 104 a voltage gain of about 4. This is provided regardless of the particular variations of a given transistor. Therefore it becomes unnecessary to use balanced transistors.

Although the several resistors, which are connected to the transistor 104 of the side 24a of the particular differential amplifier now being described, have been designated with specific numerals, it will be appreciated that, for the sake of simplicity, all of the passive components have not been given reference numerals since it will be apparent that the later stages to be described have the same or similar input biasing and load resistors. It should be noted that the values of these various components are given in brackets on the figures immediately adjacent the components. All the resistor values are given in ohms and capacitor values in MFD, unless otherwise indicated. All transistors are 2N324IA unless otherwise indicated.

The output of the two sides of the differential amplifier 24 are coupled to the stage 28 which is a Darlington emitter follower stage. This coupling, of course, is provided in order to give a low output impedance in the driving of the next or succeeding phase shift network.

It should be noted, in line with the previous description, that the right-hand side, that is side 24b of the differential amplifier 24, is essentially the same as the left-hand side 24a, but it is driven by an input network comprising the capacitor 116 which has a value of 0.01 micro farads, and with an R (corresponding to the R of the simplified diagram of FIG. 3) comprising a resistor of 118 in parallel with another resistor 120.

This combination sets the DC bias properly and provides the 1 phase shift in the 7-20 kilocycle region.

The constant current source for the differential amplifier 24 is provided by the transistor 26a. Likewise, the constant current source for the differential amplifier 30 is provided by the transistor 26b immediately adjacent 26a. The strong voltage feedback in the emitter resistor of these stages makes the current through the particular transistor to which the collector of the constant current source is connected a function simply of the base voltage and that emitter resistor. Low impedance voltage feed to the base of the transistor, such as transistor 26a, minimizes the noise factor. The desired constant current properties are, of course, further aided by the constant current I, vs. V curves of the transistor to which current is being supplied, that is, for example, the transistor 104.

In contrast with the phase shifting operation performed by the first phase shifter, that is, by the afore described differential amplifier phase shifter, the single ended phase shift network which is driven by the differential amplifier 24 is active in the 2-7 kilocycle region. This phase shifting network is designated 34, and comprises the resistor 122, the resistor 124 and the capacitor 126. This network is widely adjustable by means of the potentiometer control on the resistor 124.

The Darlington emitter follower stage 28 provides the required light loading for the network 34 and also provides the low driving impedance for the next differential amplifier and its succeeding single-ended network. In other words, the stage 28 provides a low driving impedance for the differential amplifier 30 and its associated phase shift network 36. The network at the input to the differential amplifier 30 is a non-adjustable network and is active in the 30 to cycle range, whereas the adjustable single-ended network just referred to, that is network 36, is active to the 100 to 2,000 cycle range.

Recapitulating, then, with regard to the basic functioning of the processor 20a, it is essentially consisted of phase shifting means comprising a succession of four phase shifting networks including control elements which give a total phase shift of 720.

Following its processing the phase shifted signal is matrixed with the main signal (which, as noted before, is not processed at all except that it is passed through the amplifier stage 22). As will be explained hereinafter, the phase shifted signal will tend to reinforce the main signal in one channel and will tend to cancel the main signal in the other channel as a function of frequency.

The final amplifying stage in the processor 20 is the stage 32 to which the output of the network 36 is connected. This is an emitter follower stage and the output thereof is taken from the emitter resistor 126.

Referring back to FIG. 1, it will have become clear that the processor of FIG. 2a has performed the network transfer function indicated by the block 16. In other words, the processor 20 is the specific implementation of that block 16. Now it remains to implement the output devices 12 to 14 of FIG. 1. These are shown implemented by means of the matrix circuitry 40 of FIG. 2b. As noted before, the main signal is brought out from the output of the stage 22 and is fed into the input of the matrix circuitry 40 at the terminal marked Main Signal In. The processed or phase shifted signal is brought to the lower input terminal so marked. Thus, the two signals are fed to a dual control designated separation control 42. This control is in the form of ganged potentiometers. Turning the separation control counterclockwise decreases the level of the Main Signal In and increases the level of the Process Signal In.

The Main Signal In drives two separate amplifiers which are the isolation amplifiers 44 and 46. The amplifier 46 is a unity gain phase inverter, whereas the amplifier 44 is a phase inverter with a gain adjustable from to 3 in order to adjust the drive to the right channel. Thus it will be seen that a potentiometer 128 is provided for this purpose of balancing the outputs. This enables making up for any channel imbalances that may occur for any reason. This balancing arrangement, as shown in the matrix circuitry 44, is not strictly necessary and, in fact, it would somewhat tend to spoil the fiat power spectrum feature of the synthesizer if this balance control were to be misadjusted.

The process Signal In is fed into the phase inverter 48 and the output of this phase inverter is to be applied to the respective outputs of the isolation amplifiers 44 and 46 in such a manner that the processed or phase shifted signal will be in opposite phases respectively, to the main signal. In other words, to the right channel the process signal is linearly added to the main signal and to the left channel it is linearly subtracted from the main signal. For this reason it will be appreciated that the in-phase signal, which is that derived from the emitter of the phase inverter 48 is combined with the output signal from the amplifier 44, which in turn is then applied to the input for the left channel, that is, to the amplifier block or stage 50. In contrast therewith the out-of-phase signal at the collector of the phase inverter 48 is combined with the output signal from the amplifier 44 and thence to the input of the amplifier stage 52.

It is, of course, evident that the outputs of the respective two-transistor stages 50 and 52 are applicable to any utilization device. However, for eventual reproduction, as indicated by the dotted lines, these left and right outputs are effectively applied to the loudspeakers 100 and 102.

Recapitulating, the operation of the matrix circuitry 40 is such that the in-phase and out-of-phase signals from the phase inverter 48 are combined with the signals of the same phase from the amplifier 44 and 46, and the resultant signals are transmitted to left and right output amplifiers. These output amplifiers 50 and 52 typically provide a voltage gain of 5, and will provide matching to 600 ohm broadcast impedances.

The control designated Null 130 is simply for the purpose of adjusting the output of the collector of the phase inverter 48 so that it is exactly equal to the output of the emitter thereof.

It should be noted that the Stereo-Mono switch 132 is normally operative in the open or Stereo position such that the desired stereo effects, as described, take place. However, in the event that these effects are to be eliminated, the switch is thrown to the closed or Mono position and, with the Null Control 130 properly adjusted, this Mono position for the switch 132 will result in complete cancellation of the processed signal. In other words, the eventual sound output will be only the original signals supplied by the monophonic source to the processor 20.

It should also be noted that in actual use the separation control 42 will be adjusted to the mid position so as to give roughly equal main signal and processed signal at the outputs.

EMBODIMENT OF FIGS. 6-1 1 It is sometimes desirable, such as when cutting a stereo disc,

to provide equal amplitudes of low frequencies on the left and right output channels. For this purpose a modification is herewith provided to the stereo synthesizer configuration already described.

Referring now to FIG. 6, such modified stereo synthesizer configuration may be seen. The configuration is shown in general form and it will be appreciated that the stereo synthesizer configuration of FIGS. l-S is simply a degenerate case of this generalized configuration.

In accordance with the modified version an all-pass network has been added in the sum channel. This network may be of zero order, or of any order less than the order of the difference channel all-pass network. (The standard difference channel all-pass network is of order 4). The time constants of the lowfrequency all-pass elements are chosen so that the difference in output phase between 20 Hz (the lowest audible frequency) and some higher frequency, F1, approximates Where this is true, the matrix will produce left and right output signals which are of equal amplitude and whose phase also differs by 90 Above F1, the signal will wander back and forth between the output channels as a function of frequency, as in the first embodiment, i.e. the stereo synthesizer configuration of FIGS. l-S.

The actual network realization of this ideal may be appreciated by reference to FIG. 7, which gives the phase response of a single stage (first order) all-pass network; also, by reference to FIG. 8, which depicts the phase response of a second order all-pass network, the time constants being arranged so that one is l() times the other. The straight lines are the ideal phase response, with the actual calculated points being shown by the curves.

In the case of FIG. 7, another all-pass network at about 0.22 times the characteristic frequency of the first will give an approximately 90 phase difference over perhaps a 2 or 3 octave range. In FIG. 8, another second order network, at 0.27 times the frequency of the first second order network, gives a 90 difference quite accurate over almost a decade.

Plainly, the first-order network is good for placing only the low base (below Hz) approximately in the center, while the second-order network is good for much greater accuracy to say, 250 Hz. Below 250 Hz, the ear has difficulty perceiving stereo directionality; above this frequency, stereo directional effects are pronounced. Therefore, the second order realization is the highest order realization that is used in practice.

It should be noted that the second order realization requires that the dimension controls be moved to the two highest frequency all-pass stages in the difference processor, since the two low frequency stages must have a stable, fixed relationship to the characteristics of the sum signal all-pass network in order to get the accurate 90 phase difference over the desired range.

A mathematic appendix, hereinafter provided, proves that the modified synthesizer has the following properties:

1. The sum of the power spectra of the left and right output channels is proportional to the power spectrum of the mono input signal, and

2. The amplitude response to the sum of the left and right output channels is proportional to the amplitude response of the mono input signal.

The basic phase-shifting stage is shown in FIG. 9. It is a slight variation on a well-known circuit. FIG. 10 shows an analysis.

The transistor pair (Q1 and Q2) possesses almost exactly unity gain from its input to the emitter of Q1. Q2 is controlled wholly by Q1, and the collector current of Q2 develops a negative feedback voltage across the lower resistance R1 to increase Qls input impedance and decrease the output impedance of the pair at that point. Across the upper resistance R1, there appears a voltage of almost equal magnitude (within typically about 0.01 percent), and of 180 opposite phase from the input voltage. Across the lower R1 there appears substantially the input voltage. These equal magnitude, out-ofphase points drive an all-pass network of the difierential-drive single-ended output type, as analyzed previously in connection with FIG. 4. Inserting this network does not change any of the output voltages at the emitter of Q1 or the emitter of Q2. We justify this by reference to FIG. 10, noting that the impedance at the emitter of Q1 is very low; this point will be equal (in AC. terms) to the input voltage: V;, =V,. That determines the current through the lower R,, by Ohms law. However, the path from the upper side of the upper R, to the lower side of the lower R is a continuous series circuit. From Kirchoff's law, the same current flows in all parts of a series circuit. Therefore, the voltage drop across the upper R will be identical in magnitude to the voltage drop across the lower R and therefore identical to the magnitude of the input voltage. This is true regardless of the nature of the impedance Z. This leads to the conclusion that:

a. We can invert R and C in FIG. 9 without affecting the essential operation of the circuit, and

b. We can drive more than one series RC circuit from the same transistor pair without interaction.

c. The time constant of the network is simply R 6, without efiect from R,. Understanding this, we now consider the center bass (1st order) realization, as depicted in FIG. 11.

Starting at the mono input, coupling capacitor 150 is provided for AC/DC isolation. Bias for the whole basic circuit is determined by the 200 K/ I K voltage divider connected to the +30 v. D.C. source. It will be noted that all the values of the resistors are indicated on FIG. 11 in ohms, and all the capacitors in microfarads except as noted. All of the N-P-N transistors are 2N 4123; all of the P-N-P transistors are 2N 4125.

The first transistor pair Q1, Q2 drives a pair of all-pass stages, one for the sum processor and one for the first stage of the difference processor. Time constants have been chosen on the basis of consideration of the effects of all the sections of the difference processor on the phase response in the bass region. Transistor Q12, an emitter follower, provides the required light loading on the sum all-pass section. Its emitter resistor is a voltage divider 152, 154 to reduce the gain of the sum channel below one. This compensates for the loss of difference signal caused by placing a 100 K rheostat 156 across the matrix points as a separation control.

The difference signal continues through three more all-pass stages consisting of the pairs of transistors Q4, Q; Q6, Q7; Q8, Q9, arranged in a complementary manner to preserve correct D.C. biasing. The difference signal is then processed through a phase inverter comprising Q10 and Q11, and then matrixed to the sum signal. The resistor 158 (22 K) compensates for the 2 K output impedance at the emitter of Q11, as opposed to the very low driving impedance of all the other sources of voltage for the matrix resistors.

D.C. isolation from the output amplifiers is provided by a pair of 3.3 mfd capacitors 160 and 162. The voltage divider network 164 consisting of two 47 K resistors and two 3.3 K resistors biases the output amplifiers at half the supply voltage.

The two output amplifiers 166 are standard db non-inverting connected integrated circuit operational amplifiers. Low frequency response is controlled by the series combination of resistor 168' and capacitor 170, having values of 4.7 K and 10 mfd, respectively; high frequency response by the parallel combination of resistor 172 and capacitor 174, having values of 43 K and 50 pf, respectively.

The relatively high irnpedances of the RC all-pass networks were chosen so as to minimally load the driver transistors, thus assuring maximum dynamic ran e without clgppin It should be especially noted at if the or er 0 the sum allpass network is selected to be the same as the order of the difference all-pass network, then these networks can be arranged as a phase-quadrature generator throughout the audio range.

In order that the man skilled in the art may have mathematical proof that the stereo synthesizer of the alternative embodiment of FIGS. 6-11 has the properties already indicated, the following is provided: Let M be mono input Let L be left output Let R be right output L M (B KA R M (B KA L +R 28M. Since B is all-pass, its amplitude response, |B|, is frequency indipendent, and |L+ R| IMI where IX I indicates magnitude of function X where X represents a general case (QED)- Note that |X| E VRe X +8m X E \/XX* where Re X is real part of X, amX is imaginary part of X, X* IS complex con ugate ReX-mX) of X. Consider power spectrum XX*) or |X| |L] |M| (B+KA) (8* KA*) WI (88* K (AB* BA) K AA*) IR] |M|'- (B-KA) (B*KA*)=IMI (BB*K (AB*+BA*) K2 AA*) |L| |R['- 2|M[ (88* [GA/1*) :2].l1P(|B|-' K IA 1 Since A and B are all-pass, 1A] and |B| are frequency-independent constants. K is also frequency independem, and constant. Therefore: define new constant d 2(|B| K IA P) then lL| [R| =d |M| and the sum of the power spectra of L and R is proportional to the power spectrum of M. (QED).

To prove for original stereosynthesizer, replace |B| by l,defined"2(l+K lA| l While there have been shown and described and pointed out the fundamental novel features of the invention as applied to the preferred embodiments, it will be understood that various omissions and substitutions and changes in the form and details of the device illustrated and in its operation may be made by those skilled in the art without departing from the spirit of the invention. It is the intention, therefore, to be limited only as indicated by the scope of the following claims.


1. Stereo synthesizer apparatus for synthesizing a stereo output from a monophonic input comprising:

a source of monophonic sound signals,

means directly connected to said monophonic source so as to form at least two separate sound channels for conveying said monophonic sound signals, electrical means connected in one of said channels providing a network transfer function for producing phasedelayed signals, according to which the degree of phase shift varies continuously and non-linearly with frequency,

means, directly connected to said electrical means, for combining the input signals from said separate sound channels, including said phase-delayed signals, so as to produce at the output channels thereof, respectively, enhancement signals and opposition signals corresponding to the algebraic sum of the input signals and opposition signals corresponding to the algebraic difference between the input signals, and

transducer means directly connected to said output channels of said means for combining so that the respective enhancement and opposition signals are reproduced by said transducer means.

2. Apparatus as defined in claim 1, further comprising electrical means for producing phase-delayed signals connected in another of said separate sound channels.

3. Apparatus as defined in claim 2, further including electrical means for adjusting the phase response of either or both of the means for producing phase-delayed signals.

4. Apparatus as defined in claim 2, further including means for controlling the ratio of the gains of the two means for producing phase-delayed signals, whereby control is established over the separation of the two output channels.

0 l i i

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U.S. Classification381/17
International ClassificationH04S5/00
Cooperative ClassificationH04S5/00
European ClassificationH04S5/00
Legal Events
May 9, 1989ASAssignment
Effective date: 19890426
Owner name: DELANTONI, JOHN H.
Effective date: 19881229
Jul 13, 1981AS02Assignment of assignor's interest
Owner name: ORBAN, ROBERT A.
Effective date: 19810630
Jul 13, 1981ASAssignment
Effective date: 19810630