US 3681654 A
Description (OCR text may contain errors)
United States Patent Quinn  LIGHT-REGULATING POWER SUPPLY CIRCUIT FOR GASEOUS DISCHARGE LAMP  Inventor: Halsey P. Quinn, Morris Plains, NJ.
 Assignee: Wagner Electric Corporation  Filed: Feb. 18, 1971  Appl. No.: 116,436
 US. Cl. ..315/151, 250/205, 315/158, 315/D1G. 4
 Int. Cl. ..H05b 41/36  Field of Search.....250/205; 315/DIG. 4, DlG. 5, 315/D1G. 7, 149,151, 158,159, 246, 291
 References Cited UNITED STATES PATENTS 3,483,428 12/1969 La Plante ..315/100 U [451 Aug. 1,1972
3,358,217 12/1967 Deelman; ..315/158 X 3,215,843 11/1965 Neil ..2 50/205' 2,388,854 11/1945 Le Page..; ..315/151 3,361,931 1/1968 Vollrath ..3l5/DIG. 4 3,473,084 10/1969 Dodge ..315/158 X Primary Examiner-John S. Heyman Assistant Examiner-R. C. Woodbridge Attorney-Eyre, Mann & Lucas  ABSTRACT A power supply circuit operative to supply sinusoidal high-frequency (28 kilohertz) electrical power which meets both the starting and running requirements of a gaseous discharge lamp, and further operative to regulate the light output of the lamp, all without mechani- I cal switching means or saturable reactors.
12 Claims, 2 Drawing Figures PKT'E'NTEDAIIB' 1 I972 Twill. 1
BRIEF SUMMARY OF THE INVENTION The present invention relates to a power supply circuit operative to generate sinusoidal high-frequency voltage and current outputs for a variable-impedance, light-generating load having widely variable voltage and current requirements, e.g., a gaseous discharge lamp. Such a load presents a unique problem because it initially requires a very high starting voltage and then, after the gaseous discharge has been initiated by the flow of current through the lamp, high lamp current at a low voltage is required. Earlier supply circuits have used a high-voltage starting circuit which, when the lamp passes current, is switched off by a relay which simultaneously connects the lamp to a low-voltage constant current supply circuit. Saturable reactors have also commonly been employed in such prior art circuits.
More recently developed circuits have sought to achieve a regulated light output from the lamp load by regulating the voltage and current supplied to that load. See, for example, copending application Ser. No. 102,610 entitled Voltage and Current Regulated Power Supply Circuit for Gaseous Discharge Lamp and filed on Dec. 30, 1970 by Halsey P. Quinn, the present applicant. Such circuits do not compensate for such factors as aging of the lamp, blackening of the lamp envelope, or variations in light output due to ambient temperature changes.
The present invention is embodied in a single power supply circuit which does not utilize mechanical switching means or saturable reactors, and which compensates for the condition of the lamp load. This power supply circuit has two modes of operation, one for starting and one for running the lamp. The output voltage is very high when the supply circuit is in the starting mode, and the output current is supplied at a relatively low voltage when the supply circuit is in the running mode. A resonant circuit builds up a controlled high voltage only during the starting mode. To regulate the light output of the lamp load at the lower voltage developed in the running mode, high-frequency current pulses of constant amplitude and variable width are supplied to the input of a power circuit. The width of the pulses is controlled by a variable bias voltage generated by a feedback circuit which provide a bias voltage component proportional to the light output of the lamp load. The variable bias voltage is combined with a series of saw-tooth pulses, both are amplified and then fed to a NAND gate as a first input, the second input being provided by the high-frequency rectangular pulse output of an oscillator. The saw-tooth pulses are generated in synchronization with the oscillators rectangular pulses by charging a Y capacitor through a first current path during one time interval corresponding to the duration of a rectangular pulse, and discharging that capacitor through the oscillator during a second time interval corresponding to the interpulse null of the oscillator.
BRIEF DESCRIPTION OF THE DRAWINGS A better understanding of the present invention may be had by reference to the accompanying drawings, of which:
FIG. 1 is a schematic diagram of the circuit which is the preferred embodiment of the present invention; and
FIG. 2 is a series of graphs showing a number of pertinent wave forms appearing at specific points in the circuit during operation, all of said graphs having a common time base.
DETAILED DESCRIPTION OF THE INVENTION Referring now specifically to FIG. 1, the circuit shown therein is operable with a standard alternating current power source (1 17 volts RMS, 60 hertz) connected between input terminals 002 and 004. A switch 006 connected to the high input terminal 002 enables control of the application of power to transformer 100, which energizes the filaments of lamp 200, and to the AC/DC conversion circuit 300, the output of which is fed to high-frequency oscillator 400 via switch 008 and resistance 010, to variable-width pulse generator 500, and to power circuit 600. The high-frequency sinusoidal output voltage and current developed by resonant circuit 700 are applied between the filaments of lamp 200, the output of which is sampled by light pipe 800. The light sample is fed to a photosensitive transistor in the feedback signal generating circuit 900, the variable output of which is fed to bias circuit 1,000. The output of the bias circuit 1,000 is fed to the variable-width pulse generator 500 to cause variations in the width of the high-frequency, constant-amplitude pulses which comprise the input to power circuit 600.
The AC/DC conversion circuit 300 includes a diode bridge full-wave rectifier circuit comprising diodes 302, 304, 306 and 308, a pair of choke coils 310 and 312 which are preferably inductively coupled by a common core 314 to act as a low-pass filter, and a capacitor 316 to eliminate substantially all of the AC ripple in the DC output. An output voltage of approximately volts DC is generated across capacitor 316 and is applied through switch 008 and resistance 010 to high-frequency oscillator 400, which is operative to generate rectangular output pulses as shown in FIG: 2(a). This oscillator 400 may comprise any circuit operative to provide the aforementioned output, but is preferably of the type shown in copending application Ser. No. 102,610 referred to earlier.
The DC power output of AC/DC conversion circuit 300 is applied to the variable-width pulse generator 500 through the current-limiting resistance 516, which is efi'ectively in series with zener diode 524 between the output terminals of the AC/DC conversion circuit 300. Thus, a constant DC voltage of approximately 5 volts DC is applied to the variable-width pulse generator 500, which comprises a charging circuit formed by resistance 502 and capacitance 520, their junction being connected via resistance 504 to the base of transistor 526. A discharge circuit for capacitance 520 is formed by diode 522 and resistance 506 connected in series between the aforementioned junction and the output terminal of high-frequency oscillator 400. During each of the positive high-frequency rectangular pulses which comprise the output of oscillator 400, the discharge path is effectively blocked because the cathode of diode 522 is placed at a positive potential. Thus, during each pulse, charging current flows through resistances 516 and 502 to capacitance 520. Between pulses,
through resistance 504 to the base of transistor 526.
These saw-tooth pulses, along with the variable negative DC bias derivedfrom the bias circuit 1000 and applied to the base of transistor 526, are amplified by the two-stage DC amplifier formed by transistor 526, resistance 508, transistor 528 and resistance 512. The combined and amplified saw-tooth pulses and variable DC bias comprise one input to the NAND gate 532, and the positive high-frequency rectangular output pulses of oscillator 400 comprise the second input to the NAND gate 532. Only when both of these positive input signals are above the threshold voltage of NAND gate 532 is a negative output signal generated. Since the period of time during which the first input signal is above that threshold varies according to the variable .DC component of the first input signal, the output pulses of NAND gate 532 will vary accordingly. The variable-width, constant-amplitude negative pulses which form the output of NAND gate 532 are fed via capacitance 518 to the base of normally-conductive amplifier transistor 530, which is resultantly pulsed non-conductive to provide variable-width, positive input voltage pulses to the low terminal of winding 614 in power circuit 600.
The primary winding 614 of transformer 610 is connected in series with resistance 604 between the positive terminal of AC/DC conversion circuit 300 and the collector of transistor 530. Thus, with each variable width, positive voltage pulse applied to the low terminal of primary winding 614, the flow of current through that winding is interrupted and a pulse of corresponding width is induced in the secondary winding 612 and applied across the base-emitter junction of I power transistor 608. Consequently, transistor 608 is rendered conductive for variable periods of time corresponding to the width of each input pulse thus generated across secondary winding 612 of transformer 610. During these periods of conductivity of transistor 608, current flows from the positive terminal of AC/DC conversion circuit 300, through input winding segment 618 of auto transformer 616, and through the collector-emitter junction of transistor 608 to ground. Thus, high-frequency power pulses are generated across the output winding 618 620 of auto transformer 616. These periodic power pulses, whose frequency corresponds to thatof high-frequency oscillator 400, are applied to the resonant circuit 700.
The resonant circuit 700 comprises first capacitance 702 connected across the output terminals of the auto transformer 616, a second capacitance 704 of approximately one-third the magnitue of first capacitance 702, and an inductance 706 connected between the low terminals of capacitances 702 and 704, whose high terminals are both connected to the positive output terminal of AC/DC conversion circuit 300, and to the lamp filament 204 by a center-tap connection to secondary winding 104 of transformer 100. The low side of capacitance 704 is connected through a center-tap connection to secondary winding 106 of transformer 100 to filament 202 of lamp 200. The high-frequency power pulses appearing across the output terminals of 5 autotransformer 616 are injected into the series resonant circuit 700 and cause that circuit to resonate at the second harmonic of the frequency of the power pulses when the impedance of lamp 200 is high, i.e., when the lamp has not been started. Consequently, the volta'ge across the smaller capacitance 704 becomes very high and effects start-up of the lamp 200. The voltage. thus developed across the relatively high impedance of capacitance 704 has the frequency of the second har monic of the high frequency power pulses injected into resonant circuit 700, i.e., 56 kilohertz. Whenthe impedance of the lamp 200 is lowered following the initiation of gaseous discharge therein capacitance 704 is effectively shunted and the resonant circuit which now includes the low impedance load resonates at the fundamental frequency of the power pulses injected into resonant circuit 700, i.e., 28 kilohertz. Inductance 706 also serves to isolate injection transients from the load. The leakage inductance of the auto transformer 616 provides the necessary slow-down action on the charging current to capacitance 702, which in turn loads the auto transformer 616 so as to prevent large inductive kicks on power transistor 608. By judicious selection of the characteristics of auto transformer 6l6,-dissipation in transistor 608 can be minimized.
Light pipe 800 channels a sample of the light output of gaseous discharge lamp 200 as a first input to phototransistor 956 in the feedback signal generating circuit 900. Because this first input is a small fraction of the output of lamp 200 shown in FIG. 2(f), it will have the same waveform as the sampled light output. A second input is provided to phototransistor 956 by the light-emitting diode 944, which is pulsed on during altemate nulls in the light output of lamp 200. Light emitting diode 944 is preferably of gallium arsenide, which has a half life of years and therefore makes a very stable photoelectric transducer. Each rectangular output pulse of oscillator 400 shown in FIG. 2(a) is fed to an integrating circuit comprising resistance 926 and capacitance 942, from the junction'of which a saw tooth wave input as shown in FIG. 2(b) is derived and provided to inverter 966, which is biased by resistance 919 connected between the +5 volt DC line and the inverter input terminal. Since the inverter 966 is responsive to generate an output only during the period of time in which the input voltage waveform is below the threshold voltage of the inverter, output pulses of I shorter duration and delayed in phase with respect to the input pulses from oscillator 400 will result. Absent an input signal, the output of inverter 966 is normally a low positive voltage. When an input signal is provided to the inverter 966, a positive-going pulse corresponding in duration to the below-threshold portion of the input signal results as shown in FIG. 2(0), and is fed through fixed resistance 904 and variable resistance 902 to the anode of light-emitting diode 944. Thus, because of the aforementioned phase delay, the lightemitting diode 944 is pulsed on during alternate nulls in the light output of lamp 200. Because the oscillator 400 has a duty cycle of approximately 50 percent, and because of the reduced width of the output pulses of inverter 966 as compared to those of oscillator 400, the light-emitting diode 944 has a duty cycle of about 10 percent.
With these two input components, the net light input to phototransistor 956 will have a waveform as shown in FIG. 2(g). The output voltage derived at the collector of phototransistor 956 will have a like waveform, but of inverted polarity and with a DC component added. Since the phototransistor 956 is operated in the AC mode, the circuit is not adversely affected by DC temperature drift, by the light history or aging of phototransistor 956, or by replacement thereof.
A voltage dividing network is formed by resistances 908, 910, 912 and 914 connected in series across voltage-regulating diode 524. A DC bias voltage derived from the junction of resistances 912 and 914 is provided to the base of transistor 962, which is part of a synchronous detector further comprising a differential amplifier comprising transistors 958 and 960. Transistor 958 is pulsed on in synchronization with the energization of light-emitting diode 944 by the application of each positive output pulse of inverter 966 through the differentiating circuit formed by capacitance 930 and resistance 916. Thus, each input signal at the base of transistor 958 is as shown in FIG. 2(d). Since transistor 958 is biased normally non-conductive, only the positive spikes of this input signal will cause an output to be generated at the collector. This output will be a negative-going spike, which will be fed through capacitance 938 to a positive peak-to-peak detector comprising diodes 954 and 952 and capacitance 940. Similarly, transistor 960 is pulsed on by the positive spike portion of the input signal formed by the differentiation of the rectangular pulses of oscillator 400 by the differentiating circuit formed by capacitance 932 and resistance 922. Again, the output at the collector will be a negative-going spike, which will be fed through capacitance 936 to a negative peak-to-peak detector circuit comprising diodes 950 and 948 and common capacitance 940. Capacitance 940 is normally charged slightly positive.
The magnitude of the pulses appearing at the collectors of transistors 958 and 960 is controlled by the degree of conductivity of transistor 962, which is determined by the output voltage of phototransistor 956. When fed through blocking capacitor 928 to the base of transistor 962, the DC component of the output voltage of phototransistor 956 is removed. Transistor 962 is biased by an emitter network comprising resistance 924 and capacitance 934 connected in parallel. Since transistor 958 is pulsed on in synchronization with the constant-intensity light pulses of the light-emitting diode 944, the negative-going spikes appearing at its collector will be substantially constant. However, transistor 960 is pulsed on in synchronization with alternate peaks of the light output of lamp 200, and as these peak values vary, the conductivity of transistor 962 and consequently the magnitude of the negativegoing spikes appearing at the collector of transistor 960 will also vary. For example, if the peak value of the light output of lamp 200 decreases below a predetermined normal level, transistor 962 will become more conductive than normal, thus providing larger-thannormal spikes at the collector of transistor 960, with the result that capacitance 940 becomes increasingly negative. Consequently, transistor 964 will become less conductive than normal resulting in a more positive DC bias being applied at the base of transistor 526 by bias circuit 1,000. Consequently, wider pulses are developed at the collector of transistor 530, and more power will be applied across the filaments 202 and 204 of lamp 200 to increase the intensity of the light output.
Bias circuit 1,000 comprises resistances 1002 and 1004 connected in series between the base of transistor 526 and the output of feedback signal generating circuit 900, and a resistance 1006 connected from the high side of voltage-regulating zener diode 524 to the 10 junction of resistances 1002 and 1004. The light pipe 800 in combination with feedback signal generating circuit 900 and bias circuit 1000 form a feedback loop from the lamp to the first stage of the two-stage DC amplifier in the variable-width pulse generator 500. The variable feedback signal is added through resistance 1004 to the steady positive bias voltage generated across resistances 1006 and 1002 of the bias circuit 1000. Thus, if the intensity of the light output of lamp 200 is too high, the variable DC voltage component supplied by feedback signal generating circuit 900 will alter the bias at the base of transistor 526 by making it less positive. Consequently, the DC component of the signal applied as the first input to the NAND gate 532 will be lowered so as to cause a decrease in the width of the output pulses of the pulse generator 500, resulting in decreased width of the power pulses fed to resonant circuit 700. On the other hand, if the intensity of the light output of lamp 200 is too low, the opposite variation is made upon the bias voltage at the base of transistor 528, with the opposite effect of increased pulse width.
In the circuit which forms the preferred embodiment of the invention and which is shown in FIG. 1, the values of the various circuit elements are as follows:
Resistances Capacitances 010 15K ohms 316 200 microfarads 012 470 ohms 518 .068 microfarad 502 ll( ohm 520 .068 microfarad 504 IOK ohms 606 .068 microfarad 506 ohms 702 .l microfarad 508 lOK ohms 704 .033 microfarad 512 10K ohms 928 .l microfarad 514 4.7K ohms 930 .033 microfarad 516 2K ohms 932 .033 microfarad 602 1.5K ohms 934 l0 microfarads 604 2K ohms 936 .068 microfarad 902 100 ohms 938 .068 microfarad 904 220 ohms 940 l microfarad 906 10K ohms 942 .068 microfarad 908 4.7K ohms 910 lOK ohms Inductances 912 22K ohms 914 22K ohms 310 .05 henry 916 22K ohms 312 .05 henry 918 4.7K ohms 706 .36 millihenry 919 10K ohms 920 4.7K ohms Diodes 922 22K ohms 924 4.7K ohms 302 Varo Part No. 926 2.2K ohms 304 V5447 1002 lOK ohms 306 1004 10K ohms 308 1006 lOK ohms 522 W914 524 1N523l Transistors 944 MV-SO 946 lN9l4 526 2N5l83 948 lN9l4 528 2N5 l83 950 1N9 14 530 M15340 952 1N914 608 DTS41 l 954 [N914 956 L14 958 ransformers 960 Part of CA305 962 100 Primary windin 102-4145 turns 964 2N5 183 Secondary windings 104 & 1.06-47 turns 610 Primary winding 6l4-5 turns NAND Gate Secondary winding 6l2-l50 turns 6l6 Winding segment 618-84 turns 532 integrated with Winding segment 620-14 turns oscillator 400; SN7400N lnverter 966 Part of SN7400N The advantages of the present invention, as well as certain changes and modifications of the disclosed embodiment thereof, will be readily apparent to those skilled in the art. It is the applicant's intention to cover all those changes and modifications which could be made to the embodiment of the invention herein chosen for the purposes of the disclosure without departing from the spirit and scope of the invention.
What is claimed is:
l. A voltage and current regulated power supply circuit for a variable-impedance, light-generating load comprising:
l. first circuit means operative to convert alternating current power to direct current power which is appliedto the remainder of said power supply circuit;
2. second circuit means operative in response to a variable bias signal to generate high-frequency pulses of variable width and substantially constant amplitude;
3. third circuit means which, when coupled to the variable-impedance load, is operative in response to the output of said second circuit means to generate high-frequency, high voltage output power when the load impedance is high, and to generate high-frequency, low voltage output power when the load impedance is low; and
4. fourth circuit means operative to compare the light output of the load with the light output of a reference source and to provide a variable bias signal to said second circuit means to vary the width of the output pulses of said second circuit means in response to variations from a predetermined level of intensity of. the light output of the load.
2. The power supply circuit according to claim 1 wherein said first circuit means comprises:
l a diode bridge circuit having first and second input and output terminals;
2. first and second inductances each having first and second terminals, said first terminal of said first inductance being connected to said first output terminal of said bridge circuit, and said first terminal of said second inductance being connected to said second output terminal of said diode bridge circuit; and
3. a filtering capacitance connected between said second terminals of said first and second inductances.
3. The power supply circuit according to claim 2 wherein said first and second inductances are inductively coupled by a common magnetic core.
4. The power supply circuit according to claim 1 wherein said second circuit means comprises:
1 high frequency oscillator means operative to generate high-frequency rectangular pulses;
2. saw-tooth pulse generating means synchronized with said high-frequency oscillator means;
3. first amplification circuit means connected to said saw-tooth pulse generating circuit and operative to amplify the output of said saw-tooth pulse generating means and said variable bias signal;
4. threshold circuit means having a first input terminal connected to the output of said first amplification circuit means and a second input terminal 1 connected to the output of said high-frequency oscillator means, and operative to generate output pulses of constant amplitude and of variable width corresponding to the period of time during which both of said input pulses exceed its threshold; and
5. second amplification circuit means operative to generate outputpulses of predetermined polarity, constant amplitude, and variable width .corresponding to the width of the output pulses of said threshold circuit means.
5. The power supply circuit according to claim 4 wherein said threshold circuit means comprises NAND gate.
6. The power supply circuit according to claim 4 wherein said second circuit means further comprises voltage regulation means.
7. Tire power supply circuit according to claim 6 wherein said saw-tooth pulse generating circuit comprises:
l. a capacitance and a charging resistance connected in series therewith to said voltage regulation means; and
2. a diode and a discharging resistance connected in series between the junction of said capacitance and said charging resistance and the output terminal of said high-frequency oscillator means.
8. The powersupply circuit according to claim 7 wherein said high-frequency oscillator means is operative to close a discharge current path for said saw-tooth pulse generating means through said second transistor switch in the periods between adjacent high-frequency rectangular pulses.
9. The power supply circuit according to claim 1 former, and having its collector connected through said second and first terminals of said autotransformer to said first circuit means; and 4. resonant circuit means connected between said first and third terminalsof said autotransformer and operative to generate a high voltage by resonating at a first high frequency in response to input power pulses from said auto-transformer when said load impedance is high, and by resonating at a second high frequency in response to input power pulses from said autotransformer when said load impedance is low.
10. The power supply-circuit according to claim 1 wherein said fourth circuit means comprises: g
I. light pipe means operative to sample the light output of the load and to channel the sample as-a first input to 2. feedback signal generating means including a phototransistor and operative to generate a variable component of said variable bias signal; and
3. bias circuit means coupled to said feedback signal generating means and operative to provide said variable bias signal to said second circuit means.
11. The power supply circuit according to claim 10 wherein said feedback signal generating means comprises:
integrating circuit means and inverter means operative in combination to shorten and delay in phase input pulses of constant frequency, amplitude, and width derived from said second circuit means;
. a light-emitting diode energized by the output of said inverter means and operative to provide a second input to said phototransistor;
. synchronous detector means operative in response first and second peak-to-peak detector means including a common capacitance and operative to vary the charge on said common capacitance as said variable signal from said synchronous detector means varies; and
5. transistor means having its input terminals connected across said common capacitance and having its output terminal connected to said bias circuit means.
12. The power supply circuit according to claim 11 wherein said synchronous detector means comprises:
1 a voltage dividing network;
2. first and second normally non-conductive transistors, said first transistor having a differentiating input circuit connected to the output of said inverter means and said second transistor having a differentiating input circuit connected to said source of pulses of constant frequency, amplitude and width; and
3. a variably-conductive transistor connected into the output current paths of said normally non-conductive transistors, and controlled by the output of said phototransistor.