|Publication number||US3701988 A|
|Publication date||Oct 31, 1972|
|Filing date||Feb 14, 1969|
|Priority date||Feb 16, 1968|
|Also published as||DE1903045A1, DE1903045B2, DE1903045C3|
|Publication number||US 3701988 A, US 3701988A, US-A-3701988, US3701988 A, US3701988A|
|Inventors||Allaart Houterman Jan|
|Original Assignee||Philips Corp|
|Export Citation||BiBTeX, EndNote, RefMan|
|Referenced by (20), Classifications (6)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent Allaart [451 Oct.31, 1972  CHARACTER DISPLAY DEVICE FOR TELEVISION MONITOR Houterman Jan Allaart, Emmasingel, Eindhoven, Netherlands Assignee: U.S. Philips York, N.Y.
Filed: Feb. 14, 1969 Appl. No.: 799,396
 Foreign Application Priority Data Feb. 14,1969 Netherlands. ..680228l  U.S. Cl. ..340/324 A, 340/1725  Field of Search ..340/324 A, 172.5
References Cited UNITED STATES PATENTS 2/l969 Clark ..340/324A 2/1967 Durr ..340/324.1
NPUTS BUFFER MEMORY REGISTER 62a mvur GATES Int. Cl ..G06f 3/14 PLACE COUNTER CONTROL DEVICE ELECTlON MEMBERS Primary Examiner-John W. Caldwell Assistant Examiner-Marshall M. Curtis Attorney-Frank-R. Trifari [5 7 ABSTRACT A device for displaying digital information in the form of characters on a television screen comprising a circulation memory in which the information for a line of characters circulates and in which during the display on a screen of a normal television monitor the information of the characters for a line is available per picture line at the output of the circulation memory for forming in a character generator control signals for producing dots on the television screen dependent upon the parts of the characters to be displayed on one line and coinciding with the picture line to be written at that instant, and in which during a space time between lines of characters the circulation memory is provided with information for a following line of characters from a buffer memory.
4 Claims, 8 Drawing Figures CHECKING DEVICE FEEDING DEVICE TELEVISON I MONITOR} g AMPLIFIER NE RATOR 7 OECODEI? OUT PUT REGISTER CIRCULATION MEM RY PATENTEDUBTIH I 1 v 7 3,701,988
' SHEET 1 OF 6 INPUTS PLACE COUNTER cHEcxma DEVICE I I BUFFER MEMORY 84 l l v R 83 ODIRESSBZ 1 FEEDING 51x55 50 TV m ozwce TELEVISON I OUTPUTS MONITOR E g 12 SELECTION MEMBERS g AMPLIFIER REGISTER 62a 1 INPUT am'as DECODER 63a b IN UT GATES camera; aeuarwon OUT PUT s 65a j+1 REGISTER INVENTOR.
BY HOUTE RMAN J ALLAART AGENT PATENTED BU I972 3,701, 988
' sum 6 or 6 INVENTOR.
HOUTERMAN J- AL LAART BY M AGE T CHARACTER DISPLAY DEVICE FOR TELEVISION MONITOR The invention relates to a device for displaying digital information in the form of characters on a television screen. Such adevice employs a circulation memory in which during the display process information circulates once per pictureline of the television screen, a decoder, and a character generator. The characters to be displayed are formed in the character generator and a checking device is provided with which, at given instants, only that information appears at the outputs of the circulation memory which serves for the character to be formed in the character generator and to be displayed on the television screen at that instant.
Such devices are known. It is desirable to use in such television display systems normal television monitors which need not be provided with additional means. This has been achieved in the known device by using a so-called monoscope tube as a character generator and using the video signal produced therein for the desired characters for the control of one or more normal television monitors. For both the monoscope tube and the television receiver(s) a common time base control device is present which also controls the circulation memory. A drawback of this known device is the fact that for displaying several lines of characters on the television screen, a complete circulation memory is necessary for each line. This extensive circulation memory is provided with information from a computer, a tape recorder, a typewriter, a light-pen and the like. Other devices are known for displaying digital information in the form of characters on a television screen in which by using a circulation memory of a very large storage capacity, for example, a delay line or a number of parallel delay lines, the video signal which has previously been derived in a character generator from the digital information for the characters to be reproduced, can be stored for a complete television screen picture. In this case the circulation frequency of the television screen. Another similar arrangement is known wherein particular arrangement of video information in the circulation memory will result in the circulation frequency of this information in the circulation memory being smaller than the picture frequency of the television screen. The drawback of the last-mentioned devices is that a circulation memory of a very large capacity is required with all the associated control and synchronization problems.
It is the object of the invention to avoid the drawbacks of the said devices. For that purpose the invention is characterized in that the storage capacity of the circulation memory is sufficient to take up the total digital information for a line of characters to be displayed on the television screen, and that a buffer memory with selection members is available in which the information for the characters to be displayed simultaneously on the screen can be collected. A checking device is provided with a characters-per-line counter and a picture counter which control the buffer memory selection members in such manner that during a period which corresponds maximally to the display time of a space between the lines on the television screen, the digital information for a line of characters can be displaced from the buffer memory to the circulation memory.
Thus, the required capacity of the circulation register is now restricted to the storage of only that quantity of information which is required per line of characters to be displayed. A buffer memory has become necessary in which the information for the characters to be displayed simultaneously on a picture screen from information sources, for example, a computer, a magnetic tape and the like, can be stored. The buffer memory may be, for example, a component of a computer memory itself or a separate memory. However, this memory need not be a very fast memory (see below). The circulation memory is always provided with new information for a following line at the correct instants during line spaces. Since the circulation memory is filled from the buffer memory during the space between lines of characters and the buffer memory is not necessary during the display of the characters, the buffer memory is available during the display for communication with an information source, so that new information can be recorded. If the buffer memory forms part of the computer memory, this memory is available for the computer itself during the said spaces. Thus, only a part of the computing period of the computer is occupied. The use of the combination buffer memory and circulation memory according to the invention has very advantageous consequences, particularly with regard to the possibility of displaying a large number of characters simultaneously on one or more normal television monitors.
In order that the problems which occur in displaying a large number of characters on a normal television monitor are understood, the following is to be observed:
A television picture on a normal television screen is rewritten 25 to 60 times per second. if, for example, 2,000 characters are to be displayed simultaneously on a television screen, then this means that per 12.5 to 30 m-sec (10- sec) all these characters have to be presented once to the television display system or, on average, one character every 10p. sec (10 sec. When the information from, for example, a computer, a tape, a keyboard and the like, is stored in a separate buffer memory, one character must be read every 10p. sec. A character is characterized, for example, in a binary form with eight bits. These eight bits are usually read in parallel. When the number of parallel outputs of the buffer memory is larger, several characters can be read simultaneously so that, for example, in the case of 16 outputs, two characters must be available every 201:. sec. This requirement can readily be fulfilled, by means of the conventional forms of buffer memories (core memories and the like). However, this means that it must be possible for every available character to be displayed entirely on the television screen. Providing a full character simultaneously and in the correct place on a television screen, required a number of extra means in the deflection systems for said tubes. Normal television monitors are not suitable. Special character generators are used, see for example, Dutch patent application 6,616,905, FIGS. 7 and 8, Electric Applic. Vol. 26 nr. 1, 1965-1966, pp. 225, and US. Pat. No. 2,987,715. In order to enable the display on a normal television monitor, all the digital information required for a line of characters to be displayed per picture line (there are totally, for example, 512 lines) must be at the disposal of a suitable character generator (see below). If, for example, a line is considered for displaying 64 characters, the digital information of these 64 characters must be available from the buffer memory for every picture line per line of characters. This means that with a duration of a picture line of, for example, normally 64p. sec., one character per n sec. must be available from the buffer memory. In nowadays frequently used buffer memories, the cycle time is 6;; see so that for meeting the above-mentioned requirement, three of such memories with 16 parallel outputs or six of such memories with eight parallel outputs are required.
However, this makes the solution of the problem for being able to use a normal television monitor as a display device very expensive, or a large portion of a computer memory would be occupied as a buffer memory. In order to be able to display without too many complications a large number of characters per line on the television screen, according to the invention in the combination of buffer memory and circulation memory, according to a further embodiment of the invention, the control of the buffer memory selection members is carried out by the characters-per-line counter and the picture line counter in such manner that successively the digital information of characters to be displayed and located not immediately beside each other on a line can be displaced from the buffer memory to the circulation memory and that the circulation memory is filled during the time of a number of picture lines of a space between the lines while circulating in such manner that at least after the last picture line of a space the circulation memory is filled in the sequence of successive characters to be displayed on a line. When a line of characters on the television screen is sufficiently written with, for example, eight picture lines, this means that during said eight picture lines the information for a line of characters must circulate eight times in the circulation memory, for per picture line, the whole information for a line must always appear at the output of the circulation memory for being presented to the character generator. When the line is fully written, the information for the next line must be recorded in the circulation memory. According to the invention this is effected during the time which corresponds to the display time of a space between the lines of characters on the picture screen. That space must be chosen to be such that between two lines of characters there is sufficient time for transferring all information for the next line of characters from the buffer memory into the circulation memory. In displaying a large number of, for example, 64 characters per line and a buffer memory cycle of 6y. sec. the time required for this transport is 64 X 6p. sec. This corresponds to a space of minimally six picture lines between two lines. In order to maintain a correct sequence of the characters on a line, the control of the buffer memory selection members must take place as described above. The circulation memories required in the devices according to the invention must have a circulating time which is equal to the duration of a television picture line. They may be all types of shift registers controlled by clock pulses. However, delay lines as they are normal in television monitors themselves may advantageously be used. These may be, for example, glass delay lines or the so-called lumped component delay lines which are cheap and have a sufficiently large information bit storage capacity. The storage capacity of such a line is at least sufficient for storing a number of bits which is equal to the number of characters to be displayed on a line (for example 64). A character is represented, for example, by six bits, so that in that case six glass lines in parallel arrangement are necessary. The storage capacity is substantially larger so that fewer delay lines will suffice (see below). The rate at which it must be possible to read the information for a character from a circulation auxiliary memory lies in the order of the above mentioned 1p. sec. This is easily possible with the circulation auxiliary memories which may be used. If, for example, only two glass delay lines in parallel arrangement are used for six bits per character, it must be possible to read per line a bit in one-third 0.33;. sec. This is very well possible, for the maximum bit speed for such a line is approximately 5 mc/s (l0 c/s) or one displacement per 0.2;. see. A further great advantage of the use of such a television delay line is that its delay time can be used for deriving a synchronization signal for the whole device. When a line of characters is written, the digital information of the successive characters is supplied from the circulation memory to the decoder succeeded by the character generator. In the decoder the digital character information is decoded (in the case of 64 characters a decoding of l-out-of-64) and then supplies an energization signal for the character input in question of the character generator. As already indicated above, a monoscope tube may be used as a character generator. According to a further embodiment of a device according to the invention, a diode matrix made suitable for that purpose may alternatively be used as a character generator. A diode matrix as a character generator is known per se, (see US. Pat. N 0. 2,987,715 However, this serves for the formation of a full character at a time and therefore is designed and controlled for that purpose. The known diode matrix for use in a device according to the invention has one input per character which is connected to the relative output of the decoder and which comprises a number of control inputs corresponding to the number of picture lines per character. The inputs are energized after each other each time after the completion of a complete preceding picture line from the checking device. The diode matrix further includes a number of outputs which corresponds to a number of dots per character corresponding in the direction of the picture line which are controlled from the checking device during one picture line so many times after each other as characters can be displayed on a line at these outputs, dependent upon the parts of the characters to be displayed on a line coinciding with the picture line to be written at that instant, control signals for the television monitor are formed on which the characters appear in the form of a number of dots.
In order that the invention may be readily carried into effect, it will now be described in greater detail, by way of example, with reference to the accompanying drawings, to which, however, the invention is not to be restricted.
FIG. 1 shows a diagram of a device according to the invention,
FIG. 2 shows a diagram of another device according to the invention,
FIG. 3 is a detailed diagram of a device according to the invention,
FIG. 4 shows a time generator for a device according .to the invention,
FIG. 5 shows a diagram of a device for obtaining an intensity signal for a television monitor,
FIG. 6 shows a circulation memory delay line with inputs and output circuits,
FIG. 7 is a diagram of a picture on a television screen, and
FIG. 8 shows a character diode matrix for a device according to the invention.
In the figures corresponding components are referred to by the same reference numerals. FIG. 1 shows a principle circuit diagram of a device according to the invention. In this figure reference numeral 1 denotes a buffer memory which receives the information from without, for example, from a computer and the like, via inputs 1 l. The buffer memory may altematively be a component of a computer memory itself which is not, shown. This information contains per character, for example, eight bits which, for example, may include two parity bits and six character code bits. The address selection of the buffer memory 1 takes place by means of selection members 2 controlled from an address control device 3. When information is to be supplied to the buffer memory 1 from without through the inputs 11, the address control device 3 transmits the successive memory address places for the incoming information to the selection members 2, for example, from a memory place counter 30 commanded through an input 31. When information from the buffer memory 1 is to be displayed on the television monitor TV, the address control device 3 is controlled through input 32 from the checking device 4. In this case the information of a selected address is applied through outputs 12 of the buffer memory to a register 5, and also supplied through line 13 again to the inputs ll of the buffer memory 1 so as to write the information again in the normal manner in the buffer memory 1. The character code bits are assumed to be at the register places 51, 52, 56 of the register 5. Reference numeral 6 denotes the circulation memory. In this example, the circulation memory consists of 6 shift registers 61, 62, 63, 64, 65, 66, a number of controllable input gates 61a, 62a, 66a, and an output register 60. A decoder is denoted by 7, 7a, 7b. Reference 8 is a character generator in the form of a monoscope tube which is controlled through lines 80, 81, 82, 83, 84. The video signal produced in the monoscope tube is applied through line 90 to an amplifier 9 and thence to a device to which also time base signals are presented through lines 101 and 102. One or more television monitors TV are fed from the device 10.
The checking device 4 contains a picture line counter 41 and a characters per-picture line counter 42. G is a control output from the device 4 to the gates 61a 66a., of the circulation memory. The presence or absence of a control signal on line G determines whether information has to be transported from the buffer memory 1 to the circulation memory 6 or whether the information just has to circulate in the circulation memory 6. C is a clock pulse output connected to the shift registers 61 66 and R is a resetting output connected to the register 60. Let is be assumed that the buffer memory 1 is filled with the bit information of a number of lines of characters to be displayed on the television screen. The picture line counter 41 counts the number of picture lines, for example 512 in a rhythm equal to the picture frequency of a normal television monitor tube. A picture line has a duration of, for example, 64p. sec. In transporting during a space the information for a line of characters from the buffer memory to the circulation memory 6, the charactersper-line counter 42 counts the number of characters per line during one ormore picture line periods dependent upon the space between the lines.
In this example it is assumed that a space between the lines is two picture lines. In this time, 2 X 64 128p. see. the characters per line counter 42 counts, for example,'20 characters. This counter controls therewith the address control device 3 through line 32. As a result of this the information of a number of successive characters is selected in the buffer memory, through the selection members 2 and is supplied successively to the register 5, and simultaneously put in place in the buffer memory 1 through the lines 13. When the cycle time of the buffer memory is 6 .4. sec, 20 X 6 p. see. is required for the said 20 characters which thus falls within the 128p. sec. of the space period. The character code bits in the places 51, 56 of the register 5 are supplied parallel to the gates 61a, 66a of the respective shift registers 61, 66. During the transport of information from the buffer memory 1 to the circulation memory 6, these gates transmit the respective character code bits, for example b b b bfl, b b, of a character b, controlled through the line G from the device 4, after which the register Sis prepared again for a following character code through line 50. The information of a preceding line of characters possibly present in the shift registers 61, 66 is erased. So the speed of this transport is determined by the cycle time of the buffer memory. During this transport the shift registers 61, 66 are synchronized through line C with a clock pulse per cycle period. In this example in which one shift register is present in the circulation memory per bit of the character code, each shift register has a number of bit places equal to the number of characters per line, so in this case 20. After two picture lines the circulation register 6 is filled with information for the next line of characters. When on the TV-monitor screen a line of characters occupies, for example, eight picture lines, the information stored in the circulation memory must circulate eight times during the display process. This circulation must be carried out at a speed which corresponds to the picture line frequency. So in this case one circulation in 64p. sec. For that purpose, the clock pulse frequency is increased twice through line C from device 4, so that now every 3 11. sec. a shift in the shift registers 61, 66 takes place instead of every 6 [L sec. The character code bits of a character are sup plied to the register 60 and that for each character per line, so once per picture line of the line. The register 60 after handling a character information therein, is erased through the line R. The character code bits from the register 60 are supplied to the decoder 7, 7a, 7b. In this example, the brightness signal of the monoscope tube is controlled from the bits in 7 which is a logical network. In 7a, the horizontal deflection signal and in 7b the vertical deflection signal for the monoscope is formed, for which purpose 7a and 7b are simple digital-toanalog converters which supply a voltage for selecting the relative character in the mask of the monoscope. The selective character appears on the screen of the monoscope. The place thereof is determined by the value of the horizontal and of the vertical sweep signals which are supplied through lines 83 and 84, respectively, from the checking device to the horizontal and vertical deflection system input lines 81 and 82, respectively, for example, through an inductive coupling. The picture on the monoscope is scanned and supplied per picture line of a normal monitor picture screen a video signal which corresponds to the parts of the characters to be displayed on a line coinciding with that picture line. This video signal is amplified inan amplifier 9 and, together with the time base signals for a normal television monitor, formed to a signal immediately suitable for such a television monitor TV in a device 10. When a character code has been handled on a television screen, so when the part thereof coinciding with a picture line has appeared the following character code for a character on that line is available from the circulation memory and so on for a full picture line and this so many times in succession as there are picture lines per line of characters. The control hereof is effected from the checking device 4, in which the picture line counter 41 counts the number of picture lines per line of characters and the characters-per-line counter 42 counts the number of characters per line. The construction and operation of the checking device 4 will be described in greater detail hereinafter with reference to another example.
FIG. 2 shows a diagram of a second device according to the invention. In this example, the circulation memory 6 consists of three shift registers or particularly of three delay lines (hereinafter referred to as delay lines) 261, 262, 263, a number of input gates 264, 265, 266, a number of output gates 267, 268, 269 and a character register 60. The input gates 264, 265, 266 are commanded through lines AB from the checking device 4 and that in such manner that a character code b' of register place 51 of the register 5, a character code bit I: of register place 53, and a character code bit b of register place 55 are simultaneously applied to the delay lines 261, 262, 263, respectively, through the gates 264, 265 and 266, respectively, if in addition a control voltage which releases the information transport is applied to the line G. Then a character code bit I: of register place 52, bit b of 54 and b of 56 are simultaneously applied, through gates 264, 265 and 266, respectively, to the delay lines 261, 262, 263, respectively. A character code b b b bfl, I2 b for a character b, is incorporated in the delay lines as shown in the Figure. Now the character code b' b b for a subsequent character b to be displayed on the same line must immediately succeed the code of the preceding character b, in the delay lines. The cycle time of the buffer memory is smaller than the bit speed in a delay line. For example, every 6p. sec. a new character code is presented to the register 5. When this code is the character code of the character b; to be displayed immediately on the preceding character b the bit space in a delay line can only be used for a small part. It is a requirement that the correct sequence of the characters b b to be displayed is present at the output gates 267, 268, 269 of the delay lines, so that when the same sequence of characters is presented to the delay lines, through resistor 5, an intermediate space of approximately 6 p. sec in the lines will always not be used. This has for its result that the number of characters to be displayed on a line is only restricted, so, in this example of a line having a delay time of 64 sec. 64/6 z 10 characters.
According to an aspect of the invention, this may be obviated as follows. The picture line,counter 41 and the characters-per-line counter 42 command the address control device 3 through line 32 in such manner that successively the addresses of characters to be displayed which are located not immediately beside each other on a line, are selected through the selecting members 2. During filling, the circulation memory circulates during the time of a space between the lines lasting a number of picture lines, in such manner, that at least after the last picture line of a space the circulation memory is filled with characters on a line succeeding each other in sequence.
In this example, the address selection for filling the circulation memory takes place, for example, as follows: After a character b, a character b,, is selected which should be nine places furtheron on the line. Then b and so on. The character code of this character b comes at a distance of 6p. sec. relative to the code of character b, in the circulation register (see the figure). When the 64 sec. of the delay line have expired, for example, the codes of eight characters b b b b are incorporated in the lines in this manner and the code of character b again appears at the input. The next circulation cycle begins and during the next 64p. sec. successively the characters b b 12, b are selected and incorporated in the lines. This is continued during the space time between two lines, so in this case 8 X 64 p. sec. After termination of this, the characters b b b b for a line are incorporated in the circulation register exactly after each other.
During the display of a line which takes place immediately after the above filling process, the character code bits b b b g, b and so on appear after each other at the output gate 267 of line 261, the bits b b b b; and so on appear at the output gate 268 of the line 262, and the bits b,, b,; b2, b and so on appear at the output gate 269 of line 263.
A control input W at these gates, controlled from the checking device, ensures that the bits per character are recorded in the character register 60 parallel beside each other. This character register 60 is again succeeded by a decoder 7 and a character generator 8 as, for example, in FIG. 1, to which a normal television monitor TV is connected. The whole series of character codes appears once per picture line time circulation time of the circulation register) at the character register 60 and that so many times after each other as there are picture lines for a character.
FIG. 3 shows a more detailed diagram according to the invention. Much attention is paid particularly to the checking device 4, in addition to another form for a character generator (namely a diode matrix).
It is assumed that the circulation memory 6 comprises six, for example, television glass delay lines,
namely 601, 602, 603, 604, 605 and 606. The information which is introduced from without, for example,
from a computer, a keyboard, and the like through lines 11 into the buffer memory 1, in this case, for example a memory of 4 X 512 words of eight bits, produces for each new word a pulse through line 712 to a word counter 311. This counter 311 consists of a number of flip-flops F F FF with which 2,048 4 X 512) words can be counted. With this large number of 2,048 words characters to be displayed) a flicker effect will occur in normal television monitors. When this is inadmissible one may proceed to delaying the frame deflection generator two times and using a tube having a longer afterglow. A number of characters, for example, 1,024, gives no flicker effect, for in that case the known interlacing method may be used. When the buffer memory is a part of a computer memory itself, the word counter 311 may be a part of a computer memory place counter.
The position of the counter 311 is supplied to the address control device 3 through lines 31. This address control device 3 consists of a number of OR-gates, 300, 301, 310 which are connected to the selection members 2 of the buffer memory. The address control device 3 transmits the counter position from the counter 311 as an address code to the selection members 2. Therefrom the place in the buffer memory for the incoming word is indicated in known manner.
The successive counter positions give the successive addresses for aseries of incoming words.
When information has to be transported from the buffer memory 1 to the circulation memory 6 for filling the latter, it is necessary for a good degree of filling of the circulation memory, as was explained with reference to the device shown in FIG. 2, that after a character word) b has been selected and transported, the next character is not b but, for example, b then b,-, b and after one circulation of the circulation memory b b b and so on. This sequence of characters is ensured by means of the charactersper-line counter 42 and the picture line counter 41 in collaboration with the address control device 3. The characters-per-line counter 42 consists of a number of flipflops H H H H H 1-1 with which 2 64 characters per line can be counted. In addition there are three flipflops H'.,, H 5 and H',; which lead four counts with respect to H H 1-1 (see below). The picture line counter 41 comprises a number of flipflops V V V with which 2 512 picture lines can be counted. This counting occursin groups of eight picture lines with the flipflops V V V A first group of eight picture lines serves for the transport of information from the buffer memory to the circulation memory command to AND-gate G through line L (see below). 2 32 first groups of eight picture lines are to be distinguished (by flipflops V V also 32 second groups of eight picture lines, so that 32 lines for characters with the line spaces are available. The connections (lines 32) between the flipflops V V V with the OR- gates 300, 301, and 302, respectively, the flipflops H'.,, H',,, H' with the OR-gates 303, 304 and 305, respectively, and the flipflops V V V V V with the OR- gates 306, 307, 308, 309, 310, respectively, of the address device 3 ensure the above-mentioned sequence for the address selection to be present.
The flipflops H'.,, H H,, which lead four counts with respect to the flipflops H H H and not the flipflops H H H themselves are connected to the gates 303, 304, 305, because, due to the fact that the flipflops I-i H' H' lead by four counts, it is ensured that the selection of a following address has occurred timely before reading out the selected address place in question. Herewith it is prevented that the starting pulse of the buffer memory should already arrive before the information is transported to the circulation memory.
The counting positions of the flipflops 11 ,11 1-1 of counter 42, and of the flipflops V V V of counter 41 are compared with each other in a comparison device B. When the counting positions are equal, a pulse is supplied which is also supplied to the AND-gate G If at the same time a signal is set up across the line L, with which it is indicated that a first group of eight picture lines (space) is counted, the gate G is opened. in this manner the gate G, is opened at the instants at which information may be transported from the register 5 to the input gates 61a, 66a of the delay lines 601, 606. Herewith it is ensured that the information comes at an accurately defined place in the circulation memory. The requirement that the counting positions of the said parts of the counters 41 and 42 should be equal has for its result that with every picture line of a group of 8, after a character b a following character b of a line after a time precisely equal to 8 character widths counted in the characters-per-line counter is transmitted to the circulation memory. For that purpose a counting pulse is supplied to the characters-perline counter 42 from a generator D each time exactly after a time corresponding a character width. With a following picture line the counter 41 shifts one step which produces a change in the position of the flipflops V V V The equality of the counting positions between V V V and H H H consequently occurs now at a following counting position of H H H Picture line Positions Delay line 601 bit b' of H; H; H; V1 V V3 Equality characterbn i 000 000 x b! 001 l 000 000 X b'q O00 001 001 001 x Wt 000 001 X bm 64X b ss (there is then a space of one li ne on the screen). 65 Herewith it is ensured that after circulation of the second group of eight picture lines serves for displaying the line of characters. The transition between these two groups is recognized in the flip-flop V, which supplies a circulation memory upon filling thereof, no bits are written on each other but beside each other exactly at distances equal to 1 step of the characters-per-line counter. The read-write command pulses for the buffer memory are produced in a generator M after every eight pulses from generator D, counted by means of the flipflops H H H of the counter 42. These eight counting pulses indicate a time of 8 X a character width which is 768 nanoseconds sec.) for example, with: a space between characters (see below), so that every 8 X 768 11, see. a read-write command for the buffer memory is given. So this can be handled for a buffer memory having a cycle time of 6 .4. sec.
When the circulation memory is filled, which is the case after termination of a space of eight picture lines, V is switched and the gate G is closed. The command signal G now varies and the process of displaying the line of characters begins. In the sequence b,, b, the characters appear in the character register 60 from which they each the decoder 7. In this decoder a 1 -outof-64 selection is made in known manner so that for each of the 2' 64 possible characters an outgoing line is available. Always one line at a time is energized which leads to the character generator 8.
In this example the character generator is assumed to be a diode matrix having one input (so 64) per character and having a number of control inputs I (in this case eight) corresponding to the number of picture lines per character. These control inputs are energized after each other each time after termination of a picture line. This may be effected by using the counting positions of the flipflops V V V;, of the line counter 41 which give a 1-out-of-8 selection for the eight control inputs I in a decoder part 71. The diode matrix has a number of outputs U succeeded by a register DR with a number of places 01, 02, 03, 04, 05, 06 which corresponds to a number of dots per character corresponding in the direction of the picture line.
The device D is a time pulse generator which supplies a pulse to the outputs T T T at fixed instants, t t t respectively. This may be, for example, a delay line, having a tapping at certain places and the output of which is again connected to the input. The generator is impulsed, for example, by means of a pulse from a monostable multivibrator E which is started from an OR-gate P to which are connected the output T of the delay line D as a generator feedback coupling and a synchronization lead K originating from one of the glass delay lines, for example, 601 of the circulation memory. Herewith a good synchronization is ensured. A dot of a character on a television screen will be, for example, 96 nanoseconds (10 sec.). Per character there are, for example, six dots in the width with between the characters a space of two dots. This means that for a character space (6+2) X96 768 nanoseconds are required and hence for a line of 64.
characters, 64 X 768 50p. sec. This lies within the 64; sec. of a picture line and hence is admissible. Then there certainly is sufficient time for the flyback. The generator D now supplies pulses at six successive instants t t t which are at a distance of 96 nanoseconds. With these successive pulses the register places 01, 02, 06 of register DR are scanned and pulses or no pulses appear after each other after the ORgate Q, dependent upon the part of the presented character coinciding with the picture line to be written.
at that instant. These pulses are control signals for the television monitor, particularly for the brightness signal, which gives light dots on the screen. After the instant I, a pulse appears at the output T of generator D after 7 X 96 nanoseconds. This pulse is a counting pulse for the characters-per-line counter 42, and a resetting pulse across the line R for the character code register 60. Herewith it is indicated that a following character code must be transmitted from the circulation memory 6 to the decoder 7. When a new pulse appears at the output T at a following instant t information has meanwhile been introduced again into the character register DR, and so on. At the instant t a pulse appears at the output T of generator D and is returned to the input of gate P. Then at the following instant 1,, t, pulses appear again at the outputs T T,, During each time t, a part of a character coinciding with a picture line is written, while during t-, and l a space is formed between two characters. When a full line is written, the characters-per-line counter 42 is counted full. At that instant a pulse appears in part H of this counter, which indicates that the horizontal flyback of the television tube electron beam occurs. This pulse serves as a suppression signal (blanking) for the electron beam and is for that purpose applied to the device 10. In the same manner a pulse appears in part V of the line counter 41 when said counter is counted full which serves as a command for the vertical fiyback of the television electron beam. For that purpose said pulse is presented to a synchronization pulse generator S to which the synchronization signal from the circulation memory 6 is also presented through line K. The synchronization pulses produced in generator S are then also applied to the device 10. By combination of the signals supplied to the device 10, namely intensity signal, blanking signal and synchronization signal, the video signal is formed in said device which is applied to the television monitor TV.
FIG. 4 shows how the generator D may be constructed, for example, by means of a delay line. 400 denotes the delay line. From the monostable multivibratotor E controlled from OR-gate P the generator is impulsed at the input. The input is constituted by two transistors 401, 402 as amplifiers, The tappings for the various outputs T T T are denoted by T',, T';, T' at the point T,, of the line 400 an emitter follower with transistor 403 is provided. Through this and through the output T the output pulse of the line is returned to the input of the OR-gate P. Amplifiers with transistors 404 and 405 are present at the other taps T,, T, T, and supply pulses to the outputs T T T at the above-mentioned instants t t t,. The line is terminated by the impedance Z. The points where the generator D is connected to the supply voltage are denoted by FIG. 5 shows how the outputs T T T of generator D can cooperate with the outputs 01, 02 06 of the character register DR to obtain the intensity signal for the television monitor. The output T, of generator D and the output 01 of register DR (FIG. 3) are connected to inputs of a part Q of the OR-gate Q (FIG. 3). The outputs T of the generator D is also connected, through a gate 0, which serves for inverting the signal at T to a further input 0,. The function of Q, is such that only at the instant that a time pulse appears at T and no pulse has been transmitted yet to T is the signal transmitted to the output 01 of the register DR. A signal or no signal is then formed at the line N suitable for a dot on the television screen. The same applies to the other parts Q; with Q'z, Q3 with Q's e with 's for the instants t t t FIG. 6 shows a diagram of a part of the circulation memory particularly of a delay line with input and output circuits. It relates, for example, to the delay line 606 of FIG. 3. 607 is the input, 608 the output of the line 606. To the input 607 is connected an input amplifier with transistors 609, 610 to which the input signal is presented through line 611. The output 608 is connected to an amplifier with the transistor 612 together with a diode resistance network 613 so as to bring the output pulse at a certain level. The amplifier with transistor 612 is succeeded for impedance matching by an emitter follower with emitter 614. The line 615 constitutes the output of the circuit.
FIG. 7 shows a television screen picture of a character. There are E picture lines, subdivided into 1 1, 1 totally eight picture lines per line R of characters, 1 are the picture lines of a second line R of characters. Between the two lines R and R there is a line space S,, likewise shown by eight picture lines s s s,,,. In the horizontal direction the picture is divided into pieces K K K K K K K K, K over the length T of a picture line. On these line pieces, a light dot is formed or not formed dependent on the character to be displayed controlled from the matrix. Between two characters on a line there is always a character space of, for example, two pieces KS, namely KS KS KS In the example the following numbers are feasible: 64 characters per line, length of a line picture line) 64p.sec. six dots as character width plus two dots as a character space eight dots per character. A practical choice of a dot length in time is 96 nanoseconds sec), so that the 64 X 8 X 96 nanoseconds SO 11sec. fall amply withinl the picture line time of 64p.sec. FIG. 8 shows how a diode matrix can be constructed. as a character generator. The inputs on the upper side of the Figure are the 64 character inputs from right to left for P. B, I, L, The control inputs I are shown on the right by 1 I The outputs U to the character register DR are denoted by U U U The meanings of the various symbols in the matrix are shown on the right top side of FIG. 8. The matrix is constructed so that parts of characters which correspond to other characters are used for all those characters in common. This provides the advantage that many diodes can be saved. The part 800 of the matrix serves for making the connections for those common parts. The operation is as follows: Let it be assumed that character input K is energized. K has its I limb in common with many other characters for example L, P and so on. For this purpose the part of the matrix which is constructed for this is to be connected to the K"-input. Diode 801 serves for this purpose. The K input is connected, besides to the matrix line 802, also to the matrix line 803.
Let it also be assumed that picture line I (see FIG. 7) is displayed. In this case the input I of the matrix is energized. Lines 804, 805 809 convey voltage. The
lines 802 and 803 also convey voltage for K as a character to be displayed. At those points where these lines 802, 803, 804, 809 intersect each other and a diode is provided, in this case 810 and 811, current paths are produced.
When the outputs U U U are scanned after each other as described above through the register DR, the voltage situation at each of the lines 804, 809 is investigated after each other. For this purpose, diodes U',, U';, U U',, are provided between the lines 804, 809 and the outputs U U U In this case a voltage will appear at the output U, as a result of the connection by diodes U 810 and diode 801 to the character in'put K which gives dot Y see FIG. 7. No voltages appear at the outputs U U because there are no connections. A voltage does appear at the output U, as a result of the connection by diodes U and 811 to character inputs K (dot Y, in FIG. 7).
This is carried out for all characters which partly coincide with the picture line I With picture line I the control input I insteadof I, of the matrix is energized so that the lines 814, 815 819 convey voltage. Now those parts of the characters for the line (R in FIG. 7) are written which coincide with the picture line 1 When it is again the turn of character K, line 802 is again energized and current paths are opened through the diodes 801, 820 and 821, The outputs U U, are successively scanned. A connection is made between the output U through the diodes U 820 and 801 to character input K so that the output U conveys voltage, which produces dot Y see FIG. 7. The same applies to output U at which a voltage is formed by the connection across diodes U and 821 to character input K which produces dot Y (see FIG. 7).
When the whole picture line I with the further character parts of the character for that line R, coinciding therewith is written, the control input I is energized and the lines 824, 825 829 convey voltage. The diodes 830 and 831 now play a part with the diode 801 and the diodes U U U Herewith the dots Y and Y are formed (see FIG. 7). Preceding in this manner a character is formed as may be read from the matrix. The character forms may be chosen differently, if desired, for which purpose the diodes may be placed at other places on the matrix.
What is claimed is:
1. A character display device for display on a television monitor having a plurality of picture lines comprising a buffer memory for storing a plurality of rows of characters, a circulating memory for storing a line of characters, said circulating memory including a plurality of circulating registers each storing a portion of said row of characters, a decoder coupled to said circulating registers, said decoder responsive to the output of said circulating registers for providing a signal for selecting a character, a character generator coupled to said decoder and responsive to said decoder signal for generating the selected character, said television monitor coupled to said character generator for displaying each selected character, a checking device coupled to said circulating memory for recirculating said character line for as many times in succession as there are picture lines per line of characters, said checking device including a picture line counter and a character line counter, said checking device further coupled to said buffer memory for transferring the next successive character line to said circulating memory during the time interval corresponding to the plurality of picture lines representative of the space between adjacent rows of characters, said buffer memory including an address control device coupled thereto, said picture line counter and said characters per line counter being coupled to said address control device for selecting addresses of characters, in a sequence independent of the sequence of characters in a line of the display, in said buffer memory, and means for circulating said circulation memory during the time of a space between lines for a period of a number of lines whereby after the last, picture line of a space, the circulation memory is supplied with characters on a line in succession.
2. The combination of claim 1, wherein each of said circulating registers is a delay line.
3. A device as claimed in claim 1, wherein the delay time of a television delay line serves for providing a synchronization signal for application to said television monitor.
4. A device as claimed in claim 1, wherein said character generator is a diode matrix having one input per character which is connected to the relative output of the decoder and which has a-plurality of control inputs corresponding to the number of picture lines per character, said control inputs being energized after each other each time after termination of a complete preceding picture line from said checking device, said diode matrix further comprising a number of outputs corresponding to a number of corresponding dots per character in the direction of the picture line said outputs controlled from the checking device during a picture line a number of times after each other in accordance with the numbers of characters which can be displayed on one line and at which outputs, dependent upon the parts of the characters to be displayed on one line coinciding with the picture line to be written at that instant, control signals are formed for the television monitor on which the characters appear in the form of a number of dots.
I UNITED STA TE S PATENT OFFICE I CERTIFICATE OF CORRECTION j 7 3,701,988 7 October 31, 1972 Patent No Dated Inventor(s) HOUIERMAN JAN ALLAAR'I It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:
f v I p " Foreign Applications Priority Data v Feb. 14 1969 Netherlands. .6802281 should be  Foreign Applications Priority Data Feb. 16, 1968' Netherlands.,. ..6802 28 l--- Signed and sealed this 15th day of May 1973.
EDWARD M.FLETCHER,JR. '1 ROBERT GOTTSCHALK Attesting Officer Commissioner of Patents
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|U.S. Classification||345/26, 345/29, 345/27|