|Publication number||US3703900 A|
|Publication date||Nov 28, 1972|
|Filing date||Dec 2, 1969|
|Priority date||Dec 2, 1969|
|Publication number||US 3703900 A, US 3703900A, US-A-3703900, US3703900 A, US3703900A|
|Inventors||Holznagel Melvin A|
|Original Assignee||Cardiac Resuscitator Corp|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (9), Referenced by (55), Classifications (12)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent [1 1 3,703,900 Holznagel [4 Nov. 28, 1972  CARDIAC RESUSCITATOR 3,384,075 5/1968 Mitchell ..128/2.06 F  Inventor: Melvin A. l-lolnmgel, Sherwood, FOREIGN PATENTS 0R APPLICATIONS Ore g a 274,612 7/1951 Switzerland ..l28/2.06 E  Assxgnee: Cardiac Resuscitator Corporation,
Portland. g- Primary Examiner-William E. Kamm  Filed: 2, 1969 Anomey-Buckhom, Blore, Klarquist and Sparkman  Appl. No.: 881,470  ABSTRACT  US. Cl. ..128/419 1, 128/2.06 F, 128/419 D  Int. Cl. ..A61n 1/36  Field of Search ..128/2.05 T, 2.06 A, 2.06 B, 128/2.06 E, 2.06 F, 2.06 G, 2.06 R, 2.06 V, 2.1 E, 419 D, 419 P, DIG. 4, 421, 422
 References Cited UNITED STATES PATENTS 3,460,542 8/1969 Gemmer 128/419 P 3,236,239 2/1966 Berkovits ..128/419 P 3,547,108 12/1970 Seiffert ..128/419 D 3,174,478 3/ 1965 Kahn ..128/2.06 F 3,520,295 7/1970 Kelly ..l28/2.06 R 3,144,019 8/1964 Haber ..128/2.06 A 3,510,765 5/1970 Baessler ..128/206 A A resuscitator apparatus includes means for detecting and counting the heart beat of a suspected heart attack victim, and means for substantially immediately applying a pacing pulse or a defibrillating pulse, as required. Thus, if the patients pulse rate is extremely low or nonexistent, a pacing pulse is automatically applied for stimulating a heart beat in time with such pulse. However, if the electrocardiac signal from the patient indicates an extremely high rate indicative of ventricular fibrillation, a defibrillating pulse is applied to the patient. If a normal beat occurs, appropriate indication is given, and no corrective action is taken. The apparatus attaches to the patient for administering the correct electrical stimulation to the patient as soon as possible after the occurrence of the suspected attack.
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MELVIN A. HOLZNAGEL INVENTOR BUCKHORN, BLORE, KLARQUIST & SPARKMAN ATTORNEYS PMENTED um 28 I972 SHEET 2 [IF 7 K3 FIIL 4M 7 m EOPUMCDO 13mm MELVIN A.HOLZNAGEL INVENTOR BY BUCKHORN, BLORE, KLARQUIST a. SPARKMAN ATTORNEYS PATENTED 3, 703, 900
sum 3 or 7 FIG. 4
MELVIN A. HOLZNAGEL INVENTOR BUCKHORN, BLORE, KLARQUIST & SPARKMAN ATTORNEYS PATENTED 28 I97? 3. 703.;900
- sum u or 7 VEN TOR BBY BUCKHORN, BLORE, KLARQUIST 8. SPARKMAN ATTORNEYS MELVIN A. HfP LZNAGEL PATENTEDnuvze I972 SHEET 5 0F 7 m VI 0 B in VI 0 m4. 4U XUOJU MELVIN A. HOLZNAG'EL INVENTOR BUCKHORN, BLORE, KLARQUIST & SPARKMAN ATTORNEYS w oE PATENTEDnnvea 1972 SHEET. 6 BF 7 rLBOI MHH @ INPUT OUTPUT OUTPUT @Q OUTPUT OUTPUT i L F- OUTPUT MELVIN A. HOLZNAGEL INVENTOR TIME QOUTPUT BUCKHORN, BLORE, KLARQUIST 8. SPARKMAN ATTORNEYS PATENTEDHHHB I972 SHEET 7 OF 7 703 9 0 MELVIN A. HOLZNAGEL INVENTOR BUCKHORN, BLORE, KLARQUIST & SPARKMAN ATTORNEYS CARDIAC RESUSCITATOR BACKGROUND OF THE INVENTION An unusually large number of heart attack victims die each year as a resultof delays in providing the intensive care required. A suspected heart attack victim typically must be hospitalized before receiving adequate medical attention. However, a great many patients suffering from a coronary attack never reach the hospital. Cardiac arrests and arrhythmias such as ventricular fibrillation frequently develop within a short time after the onset of the attack, e.g. within the first hour, with fatal results unless remedial steps are taken within minutes. Unless a normal rhythm can .be restored to a heart in ventricular fibrillation within minutes, serious brain damage or death will result.
SUMMARY OF THE INVENTION In accordance with the present invention, a cardiac resuscitator is provided which is compact enough for attachment to a suspected heart attack victim at nearly any location, and which may be operated by comparatively unskilled personnel. The resuscitator may be carried in an ambulance, for example, or may be conveniently stored in an industrial plant, ofiice building, hotel, or the like, for immediate application to the suspected victim of a heart attack. The resuscitator electrode current applicator is applied to the patient, and the apparatus measures the electrocardiac signal from the patients heart. If a normal heart beat is detected, an appropriate indication is given. However, if the heart beat is excessively slow or nonexistent indicating substantial cardiac arrest, a pacing pulse is applied to the patient for restoring a normal heart beat. If the electrocardiac signal is very high in frequency, indicative of ventricular fibrillation or ventricular tachycardia, an appropriate defibrillating impulse is applied to the patient. The apparatus may remain applied to the patient for detecting possible arrhythmias occurring after the onset of a possible heart attack until adequate hospitalization can be provided.
It is an object of the present invention to provide an improved cardiac resuscitator apparatus which may be applied to a suspected heart attack victim in nearly any location prior to hospitalization.
It is a further object of the present invention to'provide an improved cardiac resuscitator apparatus for detecting arrhythmias and providing appropriate corrective action in the absence ofa physician.
It is a further object of the present invention to provide an improved cardiac resuscitator apparatus which is substantially portable in nature.
It is a further object of the present invention'to provide an improved cardiac resuscitator apparatus which accurately interprets the electrocardiac signal from a suspected heart attack victim and applies a corrective impulse in cases of then determined arrhythmias.
It is a further object of the present invention to provide an improved cardiac resuscitator apparatus which is substantially fool-proof in operation.
The subject matter which I regard as my invention is particularly pointed out and distinctly claimed in the concluding portion of this specification. The invention, however, both as to organization and method of operation, together with further advantages and objects thereof, may best be understood by reference to the 7 heart;
following description taken in connection with the accompanying drawings wherein like reference characters refer to like elements.
DRAWINGS FIG. 1 is a perspective view of cardiac resuscitator apparatus according to the present invention, shown applied to a patient;
FIG. 1a is a side view of an electrode current applicator portion of the present resuscitator apparatus;
FIG. 2 illustrates a typical electrocardiogram trace of the electrical signal generated by an average healthy FIG. 3 is a block diagram of cardiac resuscitator apparatus according to the present invention;
FIG. 4 is a schematic diagram of interface 1 portion of the apparatus as referenced in the FIG. 3 block diagram;
FIG. 5 is a schematic diagram of the signal conditioning unit 2 portion in the block diagram;
FIG. 6 isa schematic diagram of the peak'detector 3 in the block diagram;
FIG. 7 is a schematic diagram of comparator 4;
FIG. 8 is a schematic diagram of counter 5;
FIG. 9 is a waveform chart illustrating typical operation of counter 5;
FIG. 10 is a schematic diagram of clock 6;
FIG. 11 is a schematic diagram of pacer 7; and
FIG. 12 is a schematic diagram of the defibrillator 8 portion of the FIG. 3 block diagram.
DETAILED-DESCRIPTION Referring to FIGS. 1 and la, illustrating resuscitator apparatus according to the present invention, the apparatus includes a U-shaped electrode current applicator provided with a handle 116 and electrodes anc@which are individually connected to the control cabinet 112 via cable 114. The applicator is desirably formed of spring plastic or plastic-covered metal electrically insulated from the electrodes. As illustrated in the FIG. la, the applicator tends to urge contactsQ and @toward one another so that when placed on the patient as illustrated in FIG. 1, contacts@, 2 and 3 make firm contact with the patients body.
The electrode current applicator is placed over the left shoulder of the patient so that electrodesand are positioned approximately above and below the heart, with the patient ordinarily being in a prone position. The patient is desirably strippedto the waist so that such contact may be made with the body, or, alternatively, the applicator can be inserted beneath clothing to some extent. Electrodeis designated the chest electrode, with electrodecomprising the back electrode. The third electrode@, termed an indifferent or neutral electrode, makes contact with the patient in the shoulder region.
The control cabinet 1 12 contains electronic circuitry for receiving electrocardiac signals from the aforementioned electrodes, and for analyzing the same in order to determine whether a corrective electrical impulse should be applied to the patient through the electrodes. A typical cardiac signal, illustrated as an ECG trace, represents an' individual heart beat in FIG. 2. In the normal heart, the atrial portion of the heart impulse corresponds to the P wave indicated on the ECG trace.
a 3 The impulse then stimulates the atrioventricular node and the ventricles producing the QRS complex. The final portion of the trace, designated as the T wave, is
' provided by repolarization or recovery of the ventricular muscles. The circuitry of the present invention counts the rate of the signals of the type illustrated in FIG. 2 produced by the individuals heart in order to determine whether the heart rate is normal, abnormally low, or abnormally high. If the heart beat falls within normal limits, the normal heart indicator -J, suitably comprising a pilot lamp, will light. If the heart rate is so low as to indicate substantial cardiac, arrest, a pacing pulse will be applied to the aforementioned electrodes in a manner hereinafter described. If the heart signal indicates an extremely high rate, indicative of ventricular fibrillation or ventricular tachycardia, a defibrillating pulse will be applied.
In order to render the device substantially fool-proof, and to preventimproper application of electrical impulses when a proper signal cannot be received, the circuitry accordingto the present invention is provided with continuitymeans for determining whether electrodes@,@, and@are making proper electrical connection with the patients body. Only after such a determination is the heart rate indication able to bring about the aforementioned pacing or defibrillating impulses. In addition to the inhibition of the device in the absence of proper contact with the patients body, a poor contact indicator 1-D, suitably comprising a pilot lamp, also warns the operator that proper contact with the patient has not been established. Cabinet 1 l2 additionally includes power supply circuitry and batteries for use in case of portable operation. An off-on switch as well as a pilot lamp indicating the presence of power are suitably also included.
In operation, the electrode current applicator is applied as illustrated in FIG. 1, and the power switch is operated for energizing the apparatus. A normal heart indication may reveal the patient has merely fainted, rather than having suffered a heart attack. However, such an indication may only indicate that arrhythrnias have not as yet developed. The device is suitably left applied to the patient until adequate medical attention is provided, and meanwhile the device continuously monitors the heart during the critical period after a possible attack. For example, battery powered apparatus of the present type may be left attached to the patient while he is being transported to a hospital in an ambulance.
The apparatus is relatively compact, and may be carried in an ambulance, or conveniently stored in an industrial plant, ofiice building, hotel, or the like, for immediate application to a suspected victim of a heart attack. The apparatus may be operated by comparatively unskilled personnel, without the need of an expert diagnosis, while awaiting conventional medical attention.
Block Diagram FIG. 3 isan electrical block diagram of the apparatus according to the present invention, principally located within cabinet 112. Referring to FIG. 3, sensitive amplifier 1-8 in interface unit 1 receives the electrocardiac signals from the patient electrodes, jointly indicated at l-A, and applies an amplified version thereof ato conditioning unit 2 wherein the signal is which may be due to movement of the patients body. I
Also removed are portions of thenormal electrocardiac signal, as seen in- FIG. 2, known as the P and T waves, leaving only detection of the QRS complex. As
it is hereinafter indicated, disabling clamp 2-B operates to inhibit transmission of the QRS signal at times when electrical stimulation is being delivered to the patient.
The outputof signal conditioning unit 2 is applied to peak detector 3 and comparator 4. These units comprise detection means of varying sensitivity for detecting or developing peaks from the QRS complex relative to previously stored values of such peaks. The detection means functions over a wide range of input signal amplitude with little or no degradation in performance. Without such a variable sensitivity feature, the system would be susceptible to noise present on large amplitude signals, or would be unable to detect the presence of small amplitude complexes, or both. The apparatus also includes means for essentially ignoring the occasional signal of unduly high amplitude, e.g. peaks associated with ectopic beats.
Referring to the drawing, output from signal conditioning unit 2 is applied to positive peak limiters 3-A and 3-B as well as positive peak detectors 3-C and 3-D. The peak detectors remember and store positive and negative peaks of the signal received, while the limiters prevent storage of a signal higher than a predetermined multiple of a previously stored signal, e.g. twice the previously stored signal. Therefore, ectopic beats or the like do not unduly influence peak signal storage so as to interfere with nonnal circuit operation. Depending upon whether the positive or the negative peak stored is higher, polarity selector 3-E applies an output to polarity gate 4-C causing the comparator 4 to pass either positive or negative signals, according to the predominantpolarity of the particular electrocardiac signal at hand. Thus, the maximum voltage peak developed by the heart may be either positive or negative, and the circuit is effective to employ the signal values of the proper polarity.
Positive peak detector 3-C provides an outputto positive comparator 4-A while negative peak detector 3-D provides an output to negative comparator 4-B. The comparators also receive the input signal at and supply respective positive and negative outputs only insofar as incoming signal peaks exceed a predetermined fraction of the previously stored peak. Thus, in the case of high amplitude signals, the input at will have to be large in order to produce a response mm a comparator. However, if the stored signal is smaller, a smaller input at will operate the comparators. In this manner, the sensitivity is adjusted for determining peaks from the electrocardiac signal without noise which may be associated therewith. I
The output of polarity gate 4-C is applied to oneshot multivibrator 4-D. The one-shot multivibrator produces output pulses having a width of approximately milliseconds to provide pulse widening. The purpose of this widening is to prevent two or more peaks of a QRS complex from producing multiple out uts at Therefore one output will be produced at for each heart beat. The output atis also coupled to inverting gate LE for supplying a resetting signal to the pacemaker as hereinafter more fully describe The output from the comparator is applied to counter 5, the purpose of which is to determine the heart beat rate of the patient. First, second, and third indications are produced by the counter in accordance with whether heart beat of the patient is appreciably lower than normal indicating cardiac arrest, appreciably higher than normal indicating ventricular fibrillation or ventricular tachycardia, or normal. The counter 5 includes first counter S-A receiving the signal at First counter 5A is a divide-by-five circuit, producing an output applied to flip-flop 5-B and second counter 5-D for every five input pulses received at Second counter 5-D is also a divide-by-five counter and applies its output to flip-flop S-E for every five input pulses it receives. Each counter is controlled by clock 6 to count for a period of approximately eight seconds, after which each of the counters is reset. If, during this time, counter 5-A produces an output, flipflop S-B is set. If second counter 5-D also produces an output, flip-flop 5-E is set. At the end of eight seconds, J-K flip-flops S-C and 5F are enabled by clock signal and assume conditions representative of flip-flops S-B and S-E respectively. A not-Q signal from .l-K flipflop 5-C would indicate counter 5-A has counted at least four pulses (counter 5A providing an output at the end of the fourth, ninth, fourteenth, etc. pulses). Similarly, a not-Q output from flip-flop S-F indicat s the presence of at least twenty-five pulses at input during the eight second period. Four pulses in eight seconds is equivalent to a heart rate of 30 pulses per minute, and twenty-five pulses in eight seconds is equivalent to a heart rate of 187.5 pulses per minute. Thus, the presence of a not-Q output from flip-flop 5-C together with a input from flip-flop F will be representative of a heart beat between the aforementioned values. For purposes of the present discussion, these values are chosen as normal limits. Therefore, the not-Q output of flip-flop 5-C and the Q output of flipflop 5-F are applied to and-gate 5-l-l which operates normal heart indicator 5] when both its inputs are present. Indicator 5J may comprise a pilot lamp or the like.
Flip-flops 5-B and 5-E constitute means for remembering or storing the count achieved during an eight second cycle by the counters. Similarly, flip-flops S-C and S-F constitute output means for remembering or storing for a longer period the count achieved by the previous flip-flops.
It is noted that counters S-A and 5-D as well as flipflops S-B and 5E are reset at least each eight seconds by clock 6 via signal paths and However, J-K fli -flops 5-C and 5-F are only cleared by a clear signal from or-gate 6-A in clock 6. If, at a given ,time, a not-Q output is provided from J-K flip-flop 5-F, it indicates a count of at least 25 from second counter S-D having occurred during an 8 -second interval. This not- Q output is applied to and-gate 5-K. The other input to and-gate 5-K is derived from flip-flop S-E. Thus, if during the next eight-second interval, and-gate 5-K receives an input from flip-flop 5E, it will indicate a heart rate of over 187.5 for two successive 8 second intervals. The circuit thereby double checks at high heart rate before supplying a signal to defibrillator 8. Defibrillator 8, as hereinafter described, applies a single defibrillating pulse to the patient electrodes l-A. Because of the seriousness of applying the defibrillator output, a double count of the heart rate is made.
If a Q output is present at from flip-flop 5-C, a very low heart rate below 30 pulses per minute is present, which indicatesunduly low heart beat or cardiac arrest. The output operates pacer 7 as hereinafter indicated for applying a periodic pacer pulse to the patient electrode 1-A for stimulating a heart beat at the rate of the pacer pulse.
Clock 6 includes a clock pulse generator6-B roviding pulse outputs at eight second intervals at If a signal is present at either indicating defi rillator operation, or at 'ndicating faulty interface operation or initial start conditions, the clock pulse generator 6-B is reset from or-gate 6-A. At the same time the J-K flip-flops S-C and 5-F are cleared via lead and a reset pulse is provided at via or-gate 6-C. Likewise, flip-flop 6-D is set. After being initially reset from or-gate 6-A, clock ulse generator 6-B starts providing clock pulses at at eight second intervals. At the end of each such clock pulse, a reset is provided or-gate 6-C and flip-flop 6-D. The reset via leads and reset the counters 5-A and 5-D as well as flipflops B and E for another cycle. At the end of such cycle, the clock pulse at causes the .l-K flip-flops to register the condition 0 flip-flops S-B and 5-E as hereinbefore described. Flip-flop 6-D provides an output at effective for enabling the pacemaker only after a suitable period of time has elapsed for counter 5 actually to count the heart rate. Otherwise, pacer 7 could falsely indicate .a low heart rate before proper counter operation. Operation of flip-flop 6-D will be further described hereinafter.
In pacer 7, pacemaker timer 7-B generates a series of timing pulses with a period of approximately 0.85 seconds, whenever the output of and-gate 7-A is high. The output of and-gate 7-A is high, (1) when the circuitry has operated at least eight seconds as indicated by a signal at@?, (2) when comparator 4 does not detect a present eart beat, and (3) when counter 5 indicates a heart rate of below 30 beats a minute. The output of timer 7-B triggers one-shot multivibrator 7-C which operates pacer pulse generator 7-D. The latter delivers a pacing pulse to the patient electrodes via leads@,@, and switching diodes l-F. The switching diodes l-F essentially disconnect the pacer from the patient electrodes when the pacemaker produces no output. During each pacemaker pulse, output of one-shot multivibrator 7-C operates or-gate 2-C for disabling the signal path. If, between pacer pulses, a heart beat is detected, reset signal will reset pacer timer 7-B via and-gate 7-A, restarting the timing of the 0.85 second interval. Thus, the pacer operates on a demand basis and produces no output when spontaneous heart beats are present.
When defibrillator 8 receives an input at, oneshot multivibrator -A is set in a second state for approximately milliseconds. Output disables the signal path, and output resets clock 6 as well as counter 5. The third output of multivibrator 8-A operates defibrillator generator through and-gate 8-H if input@is also present. A defibrillating pulse, a high energy electrical pulse, is applied through leads@ and switching diodes l-E, to patient electrodes l-A.
lnpuis present if the patient electrodes make proper contact and certain. other conditions are met as hereinafter more fully described. The switching diodes essentially disconnect the defibrillator when the same is not in use. It is observed the defibrillator operation resets clock 6 and counter forsuccessive operations. If, after a defibrillating pulse is applied to the patient, fibrillation or tachycardia persists, defibrillator operation will again be initiated in the same manner as hereinbefore described.
Interface 1 further includes continuity checker l-C, which determines if the patient electrodes are in proper electrical contact with the patients body. If not, a poor contact indicator 1-D, suitably comprising a pilot lamp, is energised, and defibrillator and-gate'8-B is disabled via or-gate l-K and lead@ thus preventing defibrillator operation and possible patient burns in case of poor electrical contact. Also in such case, clock 6 is reset vialead and'flip-flop 6-D is set to prevent operation of the pacer via output When the resuscitator is first started, start circuit l-H disables orgate l-K thereby disabling defibrillator 8, resetting clock 6, and disabling pacer 7. Pacer 7 is operable when flip-flop 6-D is reset from clock pulse (5-3. The output from the start circuit 1-H is of short duration, and the main purpose thereof is'the disabling of the pacer until the counter has time to count.
The individual units of the resuscitator will now be considered in greater detail.
Interface Referring to FIG. 4, illustrating interface unit 1 in greater detail, transistors 0101 and 0102 provide DC current sources for patient electrodes and (2) to ground via indifferent or neutral patient electrode@. The DC voltage at electrode@an@depends upon the resistance between each electrode and ground, and therefore, if either electrodeoris in poor contact with the patient, a comparatively high DC voltage will occur at that electrode. Patient electrodeis coupled to the input and an operational amplifier U101, while the patient electrodeis coupled to the input of an operational amplifier U102, with diodes D105, D106, D107, and D108 protecting the amplifiers during the application of a pacing or defibrillating pulse. If the voltage at patient electrodeis less than about +0.15 volts, then the output of'U101 will be about +15 volts, and the voltage at the junction of D109 and D110 will be clamped to about +5.6 volts. However, if the voltage at patient electrodeexceeds +0.15 volts, the voltage at the output of U101 will be about -15 volts, and the voltage at the junction of diodes D109 and D110 will be clamped at about 0.6 volts. The output of amplifier U102 is similarly controlled by the voltage at patient electrode@. Integrated circuit package l-K, employed as an and-gate, here comprises four nand-gates 30, 32, 34, and 36 cascaded as shown. Each nand-gate has the following characteristics: If both inputs are high, the output is low. However, if either input is low, the output is high. Nand-gate 30 receives the output of both amplifiers U101 and U102, and drives nand-gate 32,
the output of which is coupled to transistor Q103 having a poor contact indicator lamp in its collector circuit. Thus, if the output of either amplifier U101 or U102 drops, indicating poor patient electrode contact, lamp l-D will light.
Likewise, nand-gate 32'drives nand-gate 34 in conjunction with start circuit l-H comprising transistor 0104. When power is first turned on, transistor Q104 is momentarily turned on. Capacitor C101 charges so that Q104 cuts off, thereby providing a high input to nand-gate 34. Assuming good contact is made by the patientelectrodes, and the power has been applied for a'short period of time, both inputs to nand-gate 34 will be up, and the output of nand-gate 36, driven by nandgate 34, will also be up. The output of nand-gate 36 is applied to leadsand Since nand-gates are employed throughout, no inverting gate is employed in lead nor is an inverting gate required in the output of the start circuit. Both outputsandwill be energized so long as continuity is present to the patients body from the patient electrodes, and so long as power has been applied to the apparatus'for at least a short time. Then, the clock and defibrillator are operable.
Switching diodes 1-E and l-F, from the defibrillator and pacerrespectively, couple these units to the patient electrodes, and essentially decouple these units when neither provides an output pulse. Also, the respective diodes prevent application of a defibrillator pulse to the pacer, or a pacer pulse to the defibrillator.
Operational amplifiers U104 and U105 receive signal outputs from patient electrodes@and@, and diodes D116 and D117, D118 and D119 limit the voltage excursion of the inputs of these amplifiers during the occurrence of defibrillator or pacer pulses. Each of the amplifiers U104 and U105 is connected as a voltage follower, so the outputs thereof are the same as those from patient electrodesand@respectively except the DC component has been removed, and the impedance level is greatly reduced. The outputs of amplifiers U104 and U105 are applied as inputs to differential amplifier U106 which has a voltage gain of approximately 1000 as determined in part by feedback resistor R135. The output of amplifier U106 at leadis therefore an amplified version of the electrocardiac signal existing between patient electrode@an@except that any DC component has been removed.
Signal Conditioning Circuit @provides an input for amplifier U201 via a high pass filter comprising capacitor C201 and resistor R201. This filter reduces the amplitude of frequency components which lie below about 3 Hertz. The amplifiers feedback circuit comprising resistor R203 in parallel with capacitor C202 between the output of the amplifier and its negative input, together with resistor R202 disposed between such negative input and ground, are arranged to inhibit amplification of frequency components above about thirty Hertz. Reverse connected diodes D201 and D202 couple the output of amplifier U201 to a high pass filter comprising capacitor C203 and resistor R205. The reverse connected diodes substantially eliminate components reduced in amplitude by the preceding filter, while the last mentioned high pass filter attenuates components of the signal which lie below about 10 Hertz. Transistors 0201 and Q202, having their bases connected to the junction of capacitor C203 and resistor R205 provide a low impedance output to drive subsequent circuits, and form a second nonlinear filter. The signal at their common emitter connection consists primarily of fast rising voltage peaks or pulses which correspond to the fast rising portions of the original electrocardiac signal, i.e. the QRS complex. The common emitter junction of transistors Q] and 0202 is connected to output leads and Also connected to the same junction is the collector of transistor Q203 having its base driven from gate 2-C, the latter here comprising a nand-gate receiving inputs and When the output of gate 2-C is low, transistor 0203 is turned off and has no effect u n the signal at However, if either inputor @2120 the base of transistor Q203 rises, and the sign ati s clamped to ground. Thus, ashereinbefore descri d, the signal path is clamped during the occurrence of either the pacing pulse or the defibrillating pulse.
Peak Detector In FIG. 6, an input on leadis coupled to peak detectors 3-C and 3-D. Peak detector 3-C comprises an amplifier U301 having a parallel combination of capacitor C301 and R301 shunting its positive input to ground. Similarly, negative peak detector 3-D includes amplifier U302 with capacitor C301 and R302 shunting its positive input to ground. The time constants of the C301 and R301 combination and the C302 and R302 combination are long with respect to the normal period between heart beats. Therefore, capacitors C301 and C302 act as peak detector storage capacitors and discharge only slightly between input pulses.
Amplifiers U301 and U302 are connected as typical voltage followers except that diode D303 is connected between the output and the inverting input of amplifier U301, while diode D304 is connected between the output and the inverting input of amplifier U302. In the case of diode D303, for example, this diode compensates for the voltage drop which occurs across diode D301 w'hile capacitor C301 is charging, in order to make the output voltage of amplifier U301 more nearly equal to the peak value of the positive input pulse. Amplifier U301, for example, then provides a low impedance source of a voltage which is representative of the peak value of the preceding positive voltage pulses which have occurred at Amplifier U302 provides a similar source of voltage representative of the peak value of preceding negative voltage pulses.
The outputs of amplifiers U30] and U302 are applied to amplifiers U303 and U304, respectively, each having a voltage gain of two. Thus, the output of each is approximately twice the stored values on the aforementioned capacitors C301 and C302. The outputs of amplifiers U301 and U302 are coupled to the bases of transistors 0301 and Q302, respectively, which operate as positive and negative limiters inasmuch as their emitters are coupled to the inputs of amplifiers U301 and U302. Thus, if the input atbecomes more positive than twice the previously stored peak value, transistor Q30l conducts, preventing an input pulse of large amplitude but short duration from charging C301 to a voltage more positive than twice the previously stored positive peak value. This limiting feature prevents a single large pulse, whether originating in the patient as in the case of an ectopic beat, or as induced into the patient from an external source, from raising the stored peak value to some value which is entirely unrepresentative of the average signal amplitude. Especially, the limiting feature prevents the large voltage peaks associated with ectopic beats from decreasing the sensitivity of the circuit to the point where the next normal QRS complex would be undetected.
The output of U301 is attenuated by resistive dividers R317, R319 so that approximately one-third of the stored positive peak value from amplifier U301 is coupled to the comparator via lead Similarly, divider R318, R320 c ples one-third the output of amplifier U302 to lead Amplifier U305 acts as a voltage comparator, and has both positive and negative signals coupled in common to its negative input terminal. The output at will be low if the magnitude of the stored positive peak value is greater than the magnitude of the stored negative peak value, and high if the stored negative peak value is greater.
Comparator is more positive than the positive reference voltage at Q and negative when the input signal is less positive than the reference. As a result, only signals are transmitted which exceed about one-third the previously stored value. Without this feature, the system would be susceptible to noise present on large amplitude signals. This system is of variable sensitivity, rendering it operable with respect to cardiac signals of different average amplitude values. The negative comparator 4-B, of course, operates similarly. It is noted that the one-third reference values allow signal detection of a normal signal after an ectopic beat, the storage of which is restricted to double amplitude.
Polarity gate 4-C comprises four nand-gates, 38, 40, 42, and 44, connected as shown. The signal from polarity selector 3-H provides one input for nand-gates 38 and 42, while the output of comparator 4-A is connected to an input of nand-gate 40, and an output of comparator 4-B is connected to an input of nand-gate 42. The output of nand-gate 44 is identical to the output of comparator 4--A, or to the output of comarator 4-B, depending upon the level of the input at For example, if the input is high, then the signa at the output of nand-gate 44 is identical to the signal from comparator 4-B. On the other hand, if the input is low, the output of nand-gate 44 is identical to the signal from comparator 4-A. Thus the output of nand-gate 44 is either the output of positive comparator 4-A or the negative comparator 4-3, depending upon whether the positive or negative peak amplitude of the electrocardiac signal is greater as indicated by the level on lead One-shot multivibrator 4D comprises transistors 0401 and 0402 connected in a conventional circuit and operated according to the output of polarity gate 4-C. As hereinbefore described, the one-shot multivibrator rates as a pulse extender providing an output at for about 100 milliseconds when an input pulse occurs. This extension prevents the QRS complex of the normal electrocardiac signal, which may comprise several peaks closely adjacent in time, from being registered as multiple pulses. Gate 4-E here comprises a nand-gate providing an output for resetting the pacer. l
Counter Referring to FIG. 8, the counter comprises a first counter S-A receiving an input from the comparator and driving a second counter 5-D. Each of these counters are divide-by-five counters providing an output corresponding to five input pulses. First counter 5-A supplies an output at the end of the fourth input pulse. Its output will go high at the end of the fourth pulse and low at the end of the fifth pulse. if the input pulse train continues, the output will go high at the end of the ninth, fourteenth, nineteenth; etc. pulses as illustrated in the waveform chart of FIG. 9, where input pulses at are indicated at the top with the corresponding outputs of first counter 5-A immediately thereunder.
The output of first counter 5-A also drives an integrated circuit package connected to form flip-flop 5- B. The package includes consecutively connected nand-gates 46, 48, 50, and 52. The first and the last of these act as inverters. The output of nand-gate 50 is connected to provide a circuit input for nand-gate 48, while a second input of nand-gate 50 is provided from connection providing a reset pulse fromthe clock circuit. A momentary low input on lead resets the flip-flop so that the output of nand-gate 50 is high. After resetting, a momentary low level at the input of nand-gate 48, produced by momentary high levelat the input of nand-gate 46, will cause the output of nandgate 50 to go low and remain low until the flip-flop is again reset. Thus, the fourth input pulse which is applied to counter 5-A after resetting causes the flip-flop to change to a state wherein the output of nand-gate 50 is low, and to remain in this stateuntil the next reset pulse is applied. At the same time that the output of nand-gate 50 is low, the output of nand-gate 52 is high. These respective outputs are provided to the J and K terminals of J-K flip-flop 5-C.
The outputs Q and not-Q of flip-flop 5-C are always in opposite states. A low input at the J terminal sets the Q output to the low level. The states of the Q and not-Q outputs are determined by the states of the J and K inputs at the time of the preceding clock pulse on line J-K flip-flops are well known to those skilled in the art. A low level at the J input and a high level at the K input at the beginning of the clock pulse will result in a low level at the Q output, and a high level at the not-Q output after the end of the clock pulse. The relationship between the clock pulse and the setting of the J-K flip-flop s c atis illustrated in FIG. 9.
Thus, if more than four input pulses are received at after resetting of first counter 5-A and flip-flop 5-B, but before the occurrence of a clock pulse, then the 0 output of J-K flip-flop 5-C will be low and the not-Q output high after the end of the clock pulse. Conversely, fewer than four input pulses at between the end of the reset pulse and the beginning of the clock pulse will result in a high level Q output of J-K flip-flop 5-C after the end of the clock pulse.
The circuitry comprising counter 5-D, flip-flop 5-E, and J-K flip-flop 5-F operates similarly.
After the end of a clock pulse, there are three possible states which may exist for Qand not-Q outputs of the J-K flip-flops 5-C and 5-F. if both Q outputs are high, it is indicative that fewer than four counts were received duringv the previous eight second clock period, or that the heart beat was less than thirty beats per minute, symptomatic of cardiac arrest. If the Q output of flip-flop 5-C is low. (and its not-Q output is high), and the Q output of flip-flop 5-F is high, the number of counts received during the previous eightsecond clock period was at least four but less than twenty-five, or a heart beat rate within the substantially normal range of 30 to 187.5 beats per minute. If both not-Q inputs are high, indicating that 25 or more countswere received during the previous 8-second'clockperiod, it is indicative of a heart beat rate of 187.5 beats per minute, or greater, symptomatic of ventricular tachycardia or ventricular fibrillation. it should be noted that the clock period and counting ratios are parameters which may easily be changed. Therefore, if further research or clinical evidence indicates that the lower or upper limits of acceptable heart beat rate should be altered, this may be readily accomplished.
As hereinbefore indicated, the Q output of flip-flop 5-C is connected via lead to the pacer while the not- Q output of flip-flop 5-C together with the Q output of flip-flop 5-F are connected to gate 5-l-l for operating normal heart indicator 5-J. The'latter suitably comprises a transistor Q50! operated by gate 5-H having a lamp in its collector lead.
The not-Q output of J-K flip-flop 5-F is connected to one input of riand-gate 56 of gate 5-K. The other input of nand-gate 56 is derived from nand-gate 54, the input of which is connected to a differentiating network comprising C503 and R509 receiving an output of flip-flop 5-E. If, in a given 8-second clock period, 25 or more input pulses are received at the not-Q output of J-K flip-flop 5-F will be high during the next clock period. if, at any time during the following clock period, 25 input pulses are received at an input will also be provided at nand-gate 54. Thus, if both inputs of nand-gate 56 are high for a short interval during two consecutive clock periods of 8 seconds, a heart rate of 187.5 or greater is indicated. In turn, the output of nand-gate 56 is applied to nand-gate 58 which provides output for operating the defibrillator. As hereinbefore mentioned, signals on leads and reset the first and second counters 5-A and 5-D, as well as flipp 5-B and 5-E, respectively. A clear pulse on lead Considering the waveform chart of FIG. 9, it is observed that an output occurs from counter 5-A for each five input pulses at The first output from counter 5-A sets flip-flop 543 so that the output thereof changes from a first state to a second state and stays in this contidition until reception of a subsequent reset pulse. When a clock pulse is then received, the J-K flip-flop S-C is changed from a first state to a second state, while the counter -A and flip-flop 5-B reset via the reset pulses received at and In the present example, second counter 5-D is operated at the end of the fourth pulse from counter S-A. At the conclusion of the fourth pulse from second counter S-D, flip-flop 5-E is set, and J-K flip-flop 5F changes state when the subsequent clock pulse is received. These waveforms, of course, are only typical, and do not necessarily indicate the exact number of input pulses which may be received between a given pair of clock pulses for every patient. Rather, a high number of pulses are indicated which would result in defibrillator operation.
Clock Referring to FIG. 10, gate portions 6-A' and 6-C perform the functions of or-gates 6-A and 6-C on the block diagram. This structure is conveniently provided as a four-nand-gate integrated circuit including nandgates 60, 62, 64, and 66, which are consecutively connected. Nand-gate 60 receives inputs from the interface circuit, and from the defibrillator circuit. Providing both these inputs are up, the output of nandgate 60 is low, and the clock pulse generator 6-B ca operate in a normal fashion.
ln clock pulse generator 6-B, transistor 0601 receives the output of nand-gate 60 at its base, and its collector-emitter terminals are coupled across capacitor C601 coupled between the emitter and lower base terminals of unijunction transistor 0602. The circuit normally operates as a relaxation oscillator whereby the unijunction transistor periodically discharges capacitor C601 to su ply a ulse output at its lower base. If either input or qgshould drop, transistor 0601 would be rendered conducting causing C601 to discharge rapidly through R603, which serves to limit the maximum current in 0601 during dischar e of C601. At the conclusion of such input ator the operation of the oscillator including unijunction transistor 0602 would be restarted.
The normal period of the oscillator is here adjusted to be eight seconds by means of potentiometer R606, and at the end of conduction of transistor 0601, a new 8-second interval is started. Thus, at the conclusion of a defibrillator pulse, or the conclusion of a period of time during starting, or a period of time when the electrodes are improperly connected to the patient, a new 8- second interval will start.
The output of unijunction transistor 0602 is connected via a Schmitt trigger circuit, comprising transistors 0603, 0604, and 0605, to an input of nandgate 68, the output of which provides the clock pulse on lead The output of the Schmitt trigger circuit comprising transistors 0603, 0604, and 0605 is also coupled to a second Schmitt trigger circuit comprising transistors 0606 and 0607. The output of the latter trigger circuit is applied to nand-gate 70 and the output of nand-gate 70 is connected to an input of nand-gate 74 which forms flip-flop 6-D together with nand-gate 72. The output of nand-gate 74 is connected to one input of nand-gate 72, and vice versa. Another input of nand-gate 72 is derived from the output of nand-gate 62. As thus appears, flip-flop 6-D will be set upon the operation of hand-gates 60 and 62, and will then be reset upon the occurrence of a clock pulse. The signal at from nand-gate 74 enables the pacemaker at the first clock pulse after power has been applied for a short period, or after any difiiculty with respect to continuity has been rectified, or after the occurrence of a defibrillator pulse. Thus, as hereinbefore mentioned, the pacer is disabled until a proper count can be made.
The output of nand-gate drops at the end of a clock pulse, and the output of nand-gate 70 is also applied to nand-gate 64 in conjunction with the output of hand-gate 62. Thus, assuming both signals and are up, a reset is provided by nand-gate 64 on leadat the conclusion of a clock pulse. This signal is inverted by hand-gate 66 to provide the reset signal on lead@.
It is noted a clear signal is provided on lead 20 at the same time that either input or lowers, and the JK flip-flops in the counter circuit will be cleared at such time.
Pacer In FIG. 11, nand-gate 7-A receives inputfrom the counter, and enabling signal from the clock circuit, and reset signal from the comparator. Input from the counter is the one indicating a slow heart beat and desirability for applying pacing pulses. Enabling signal indicates that the interface is operating properly and that sufiicient time has elapsed for the counter to make a proper count after application of power or application of a defibrillator pulse. The output of gate 7-A, which here comprises a nand-gate, is applied to transistor 0702, and assuming all three of the aforementioned inputs, and are present, the input to transistor 702 will be low. Therefore, the pacer 7-B is operable.
Pacer timer 7-B comprises a unijunction transistor 0703 having a capacitor C703 coupled between its emitter terminal and lower base. This circuit is a relaxation oscillator similar to that described in connection with the clock circuit, except in the present instance the relaxation oscillator suitably has a period of approximately 0.85 seconds. The output of timer 7-B is applied to one-shot multivibrator 7-C including transistors 0704 and 0705. The output at the collector of transistor 0705 is a series of positive pulses, each pulse having a duration of about milliseconds, and this output is connected to the input of nand-gate 76. Nand-gate 76 provides signal applied to the signal conditioning circuit for disabling the signal channel when a pacer pulse is being generated. It should be noted that the duration of the output pulse at is considerably longer than the duration of the pacing pulse applied to the patient. This allows time for the amplifier 11-3 and signal conditioning circuit 2-A to recover from the overdriven condition imposed by the pacing pulse.
The output of one-shot multivibrator circuit 7-C is also applied via transistor 0706 as the input of pulse transformer T701, the secondary of which is coupled to provide the input of thyristor 0701. AC voltage from a power supply is normally applied across a bridge circuit comprising diodes D701, D702, D703, and D704 connected in DC charging relationship to capacitors C701 and C702, with thyrister 0701 being interposed between the positive end of capacitor C702 and connectiorcoupled to the patient electrodes. Thus when transistor Q706 turns on, current flow rapidly increases through the primary winding of pulse transformer T701, and a resultant secondarypulse triggers thyristor Q701 into a conducting state. When thyristor 0701 is turned on, capacitor C702 discharges through diodes l-F and through the patients body. As capacitor C702 discharges, the current through thyristor Q70l decreases until the minimum holding current is reached. At this point, thyristor Q70l turns off, and capacitor C702 begins recharging.
If, during the operation of the pacer, spontaneous heart beats occur in the patient, the spontaneous beats are detected by the comparator circuit, and a low level pulse is applied to one input of gate 7A.resetting the pacer timer. Another pacing pulse will occur after 0.85 seconds unless another spontaneous beat takes place. Thus, the pacer is of the demand type and produces pacing pulses only in the absence of spontaneous heart beats in the patient.
- Defibrillator Referring to FIG. 12, illustrating the-defibrillator 8, an input is received at from counter 5 when a count for two consecutive c ock periods reveals an unacceptably high input pulse rate indicative of ventricular fibrillation or ventricular tachycardia. The input pulse operates one-shot multivibrator 8-A, comprising transistors 0802 and 0803, which in turn applies a lengthened output to gate 8-B, here comprising nandgate 78, 79, and 80 consecutively connected. The output of nand-gate 78 is connected to leads which respectively disable and recycle the clamp the input signal channel during the defibrillator pulse. The output of the one-shot multivibrator 8-A is longer than the duration of the defibrillating pulse applied to the patient to allow time for the amplifier and signal conditioning circuits to recover. Signal@, comprising a disabling input from the interface circuit, is also connected to nand-gate 80, and when this signal drops, indicating improper connection of the patient electrodes or the start of operation, the defibrillator is disabled.
The output of nand-gate 80 is connected to the base of transistor 0801 which has the operating coil of relay K801 serially connected in its collector circuit. The contacts of relay K801 normally connect capacitor C801 to the output of a bridge circuit comprising diodes D801, D802, D803, and D804, receiving a high voltage alternating current input. However, when transistor 0801 conducts, relay K801 connects capacitor C801, theretofore charged through the aforementioned bridge circuit, to leads@and@via inductance L801. Lead(@an@are coupled through diodes l-E to the patient electrodes, as hereinbefore mentioned. Capacitor C801, initially charged to a high voltage from the power supply, applies this high voltage across a circuit comprising inductance L801, the switching diodes l-E, and the body resistance of the patient. [n-
16 lowed to pass through the disabling clamp 2-B so that monitoring of the electrocardiac signal is resumed.
Operation In general operation, the device is applied to the suspected heart attack patient as illustrated in FIG. 1, with the patient electrodes in direct contact with his body. Thus, patient electrodeis positioned in good contact with the patients chest, and patient electrode@ is positioned in direct-contact with the patients back, forward and rearward of the heart, respectively. The device is turned on to operate the apparatus power supplies, and if proper contact is not made with the patient, indicator 1-D will light, and moreover, operation of the instrument is prevented. Normally, counter 5 will cycle under the control of clock 6 for the first eightsecond period, and if a normal heart rate is counted, normal heart indicator 5-] will light. However, if a cardiac arrest has taken place, or the heart rate is extremely low, pacer 7 will operate through switching diodes l-F, and the patient electrodes, to provide a pacing pulse to the patient as long as required. Should a normal heart beat resume without the aid of the pacer, the pacer will be disabled via inputof and-gate 7-A. lf,
- on the other hand, the heart rate is excessively high, in-
ductance L801 controls the resulting current. At the 6 conclusion of the defibrillation pulse, clock 6 is recycled as the output at rises. Thus, the clock circuit begins a new eight second period, and signals are alfirst aid personnel have reached the patient, thechances for survival are materially increased as compared with the chances for survival after transport of a heart patient to a hospital before possible treatment.
While I have shown and described a preferred embodiment of my invention, it will be apparent to those skilled in the art that many changes and modifications may be made without departing from my invention in its broader aspects. 1 therefore intend the appended claims to cover all such changes and modifications as fall within the true spirit and scope of my invention.
l claim: 1. A cardiac resuscitator comprising: electrode means for application to a patient suffering from possible heart attack, means coupled to said electrode means for detecting the electrocardiac signal generated by the patients heart including the QRS wave of the electrocardiac complex for indicating the patients heart beat, means responsive to the detecting means for determining the patients heart rate and for producing a first output for a heart rate below predetermined normal limits, and a second output for a heart rate above said predetermined normal limits, pacer means coupled to said electrode means and automatically responsive to said first output for applying a periodic pacing pulse at a predetermined rate in the range of a normal heart rate to said electrode means,
and defibrillator means coupled to said electrode means and automatically responsive to a said second output for applying only a single substantially higher voltage defibrillating pulse to said electrode means within a period on the order of at least several seconds and in response to a given determination of heart rate above said predetermined normal limits.
2. The apparatus according to claim 1 wherein said means responsive to said detecting means includes means operative for initiating said second output only in response to occurrence of a heart rate above said predetermined normal limits for at least two successive periods of several seconds each.
3. The apparatus according to claim 1 including diode means for decoupling said detecting means from said electrode means during an output from said pacer means or said defibrillator means in response to an electrical output therefrom.
4. The apparatus according to claim 1 wherein said detecting means includes a variable sensitivity signal channel and means for storing previous peak values detected, the sensitivity of said signal channel being responsive to the previous level of said peak values as stored by said storing means for causing said detecting means to be responsive to signals exceeding at least a predetermined proportion of stored peak values.
5. The apparatus according to claim 4 further including means for limiting the level stored by said storing means to a predetermined multiple of said peak values stored theretofore, a said predetermined proportion of said multiple being less than unity.
6. The apparatus according to claim 1 including switching diode means between said defibrillator means and said patient electrode means as well as between said pacer means and said electrode means for substantually automatically disconnecting said pacer means and said defibrillator means from said electrode means and from each other except during operation of one of the respective pacer means or defibrillator means, at which time said one of said respective pacer or defibrillator means is connected to said electrode means.
7. The apparatus according to claim 1 further provided with a normal heart indicator, said means responsive to the detecting means providing a third output for operating said normal heart indicator when said heart rate is within said predetermined normal limits.
8. A cardiac resuscitator comprising:
electrode means for application to a patient suffering from possible heart attack,
means coupled to said electrode means for detecting the electrocardiac signal generated by the patients heart including the QRS wave of the electrocardiac complex for indicating the patients heart beat,
means responsive to the detecting means for determining the patients heart rate and for producing a first output for a heart rate below predetermined normal limits, and a second output for a heart rate above said predetermined normal limits,
pacer means coupled to said electrode means and automatically responsive to said first output for applying a periodic pacing pulse at a predetermined rate to said electrode means,
U-shaped applicator, said U-shaped applicator being positionable for yieldably urging said electrode means into firm contact with the patients body, one of said electrode means being mounted from an upper leg of said applicator for location against the patients chest over the heart area, and a second separately connected electrode means being mounted upon a lower leg of said applicator for positioning against the patients back opposite the first mentioned electrode means. 9. The apparatus according to claim 8 wherein said applicator further carries an indifferent electrode for application to the patients body at a separate location, and means for connecting the indifierent electrode to a neutral or grounded point in the apparatus. 10. A cardiac resuscitatoe comprising: electrode means for attachment to a patient suffering from possible heart attack,
means coupled to said electrode means for detecting an electrocardiac signal generated by the patents heart including successive pulses derived from the electrocardiac complex for indicating the patients heart beat,
means responsive to the detecting means for counting said successive pulses during a predetermined period of time for producing a first output for a heart rate below predetermined normal limits, and a second output for a heart rate above said predetermined normal limits,
pacer means coupled to said electrode means and responsive to said first output of said counting means for applying a periodic pacing pulse at a predetermined rate in the range of a normal heart rate to said electrode means,
and defibrillator means coupled to said electrode means and responsive to a said second output of said counting means for applying only one substantially higher voltage defibrillating pulse to said electrode means within a period on the order of at least several seconds.
11. The apparatus according to claim 10 further including a clock means operatively connected to said counting means for predetermining a period of time during which said counting means counts said pulses, wherein said clock means resets and recycles said counting means.
12. The apparatus according to claim 11 including means for determining the continuity between said electrode means and the patients body, and means for inhibiting said clock means as well as inhibiting said pacer means and defibrillator means in response to the lack of such continuity.
13. The apparatus according to claim 11 wherein said counting means includes means for remembering a given count during a given cycle of said clock means, and output means responsive to said means for remembering for producing said first and second outputs at the end of a given cycle of said clock means.
14. The apparatus according to claim 13 wherein said defibrillator means is provided with connection means coupled for resetting said clock means and said counting means, and connection means for clearing said means for remembering, upon the occurrence of a defibrillating pulse.
15. The apparatus according to claim including means for inhibiting operation of said pacer means until time has elapsed for occurrence of an output from said counting means.
16. The apparatus according to claim 10 wherein said counting means comprises:
a first counter operable to produce an output after a predetermined number of said pulses,
first storing means for temporarily storing'an output of said first counter,
a second counter responsive to the output of the first counter,
and a second storing means for temporarily storing an outputof the second counter,
a first output means for receiving and remembering an output from saidfirst storing means indicative of a heart rate below a predetermined minimum rate,
and a second output means for receiving and remembering an output from said second storing means indicative of a heart rate above a predetermined maximum rate.
17. The apparatus according to claim 16 wherein said first output is provided by said first output means, and further including means for recycling said first and second countersand for recycling said first and second storage means, and gate means providing said second output in response to a level of said second output means and said second storing means at a given time to produce said second output after two successive counting cycles for indicating a heart rate a above said predetermined normal limits.
18. A cardiac resuscitator comprising:
electrode means for attachment to a patient suffering from possible heart attack,
means coupled to said electrode means for detecting an electrocardiac signal generated by the patients heart including successive pulses derived from the electrocardiac complex for indicating the patients heart beat,
means responsive to the detecting means for counting said successive pulses during a predetermined period of time for producing a first output for a heart rate below predetermined normal limits, and a second output for a heart rate above said predetermined normal limits, said counting means comprising a first counter operable to produce an indication after a predetermined number of pulses and a second counter for producing a second indication after a higher count of pulses, said first output being responsive to the indication of said first counter, and said second output being responsive to said second indication,
pacer means coupled to said electrode means and responsive to said first output of said counting means for applying a periodic pacing pulse at a predetermined rate to said electrode means,
and defibrillator means coupled to said electrode means and responsive to said second output of said counting means for applying a defibrillating pulse to said electrode means.
19. The apparatus according to claim 18 wherein said second counter receives as its input the said indication of said first counter. v
20. The apparatus according to claim l8including means responsive to said indication of said first counter and the absence of an indication from said second counter for producing a third output indicative of a heart rate within said predetermined normal limits.
21. The apparatus according to claim 1 wherein said detecting meansincludes means for detecting positive excursions of said electrocardiac signal, means for detecting negative excursions of said electrocardiac signal, means for determining the predominant polarity of said electrocardiac signal, and gating means responsive to the last mentioned means for coupling an output from the detecting means the polarity of which predominates.
22. A cardiac resuscitator comprising:
electrode means for application to a patient suffering from possible heart attack,
means coupled to said electrode means for detecting the electrocardiac signal generated by the patients heart including the QRS wave of the electrocardiac complex for indicating the patients heart beat,
means responsive to the detecting means for determining the patients heart rate and for producing a first output for a heart rate below predetermined normal limits, and a second output for a heart rate above said predetermined normal limits,
pacer means coupled to said electrode means and automatically responsive to said first output for applying a periodic pacing pulse at a predetermined rate to said electrode means,
defibrillator means coupled to said electrode means and automatically responsive to said second output for applying a higher voltage defibrillating pulse to said electrode means,
means for determining the continuity of connection of said electrode means with a patients body, said means for determining the continuity including means for applying a DC current to ones of said electrodes and means for measuring a resulting DC voltage at the same electrodes, and means for inhibiting operation of said resuscitator apparatus in response to a lack of such continuity.
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|International Classification||A61N1/39, A61N1/365, A61B5/0452, A61B5/046|
|Cooperative Classification||A61N1/39, A61N1/3987, A61B5/046, A61N1/365|
|European Classification||A61N1/39, A61N1/365, A61B5/046|