|Publication number||US3706906 A|
|Publication date||Dec 19, 1972|
|Filing date||Jun 8, 1970|
|Priority date||Jun 8, 1970|
|Publication number||US 3706906 A, US 3706906A, US-A-3706906, US3706906 A, US3706906A|
|Inventors||Iboshi Lawrence K, Koussa Edward T|
|Original Assignee||Hughes Aircraft Co|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (4), Referenced by (5), Classifications (16)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent Koussa et al.
 BEAM INTENSITY CONTROL FOR DIFFERENT WRITING RATES IN A DISPLAY SYSTEM 12/1969 Bouchard ..3l5/22 9/1968 Bradley et al ..3l5/l8 R Primary Examiner-Benjamin R. Padgett  Inventors: Edward I' T. Koussa, Yorba Linda; Assistant potenza Fulhrwn, Attorney-James K. Haskell and Walter 1. Adam 0 a I  Assignee: Hughes Aircraft Company, Culver  ABSTRACT y. Calif- The invention comprises an arrangement for con- J 8, the uniform intensity Of different length dlS- played strokes, produced at difi'erent writing rates by a 1 PP -F 44,465 deflectable beam of a CRT, during a series of equal I duration clock periods. The arrangement which is pro-  U CL 3 2 A 315,18 vided with the writing rates of each stroke along the X  bk Cl oi, 29/70 d Y axes of the display surface, estimates stroke a: l g h L i d i d i pl i g  Field of Search ..315/22, 27 R, 18, 340/324 A P12) where x and Y are me writing rates along the two axes; P is the greater of the two rates and k is  References cited either i or preferably 0.94. The estimated stroke UNTED STATES PATENTS length is used to control beam intensity as the beam is deflected from the strokes start point to its end point. 3,537,098 10/1970 Nielsen ctval. ..3I5/18 R 3,394,367 7/1968 Dye .315]!!! R 19 Claims, 11 Drawing Figures 1 7732 ra 1m ZZ I I a If: v 4/ 4/) m I 4 ax Mr KAI/lid! was? 7 awr JIMWM any -0- 41:25:41, act 7 l a j 52147: 4 2: 1 74 (I 3' j /fi/6/M) 2 4 l a/u44 /4z4A/z 5515,55
PATENTED on: 19 Ian I SHEU 2 0F, 5
m nnow 19 m2 SHEET Q UF 5 K 5km" PATENTEU I97? 3. 706, 906
sum 5 [IF 5 BEAM INTENSITY CONTROL FOR DIFFERENT WRITING RATES IN A DISPLAY SYSTEM The invention herein described was made in the course of or under a Contract or Subcontract thereunder with the Air Force.
BACKGROUND OF THE INVENTION 1. Field of the Invention: v
The present invention generally relates to a digitallycontrolled display system and, more particularly, to a novel beam intensity control arrangement for such a display system.
2. Description of the Prior Art:
Typically, in a digitally-controlled display system of the type which includes a display unit, such as a cathode ray tube (CRT), each line or symbol is displayed by deflecting the beam of the tube to successive points on the tubes display surface to form successive strokes. The amplitudes and relationships of beam deflection voltages for each stroke control the stroke length and its direction along two orthogonal axes, which are generally referred to as the X and Y axes. Although each stroke is produced during an equal time period, which is the clock period of the digital circuitry, since strokes lengths are not necessarily equal, the displayed strokes are of varying intensities unless the beam's intensity is controlled as a function of each strokes length.
In the prior art, beam intensity control is accomplished by generating an analog signal which is proportional to the rates of change of the deflection voltages which are used to deflect the beam to produce each stroke. However, this can be accomplished only by employing voltage differentiating circuits. These circuits increase system complexity and often do not provide sufficient control for the production of a display with a high enough intensity uniformity. Thus, a need exists for a new arrangement for beam intensity control for a display system in which different length strokes are formed or written during equal clock periods.
OBJECTS AND SUMMARY OF THE INVENTION It is a primary object of the present invention to provide a novel arrangement for controlling beam intensity in a digitally-controlled display system.
Another object of the invention is to provide beam intensity control means in a display system, in which beam intensity is controlled by other than the differentiation of deflection voltages.
' A further object of the invention is to provide, in a digitally-controlled display system of the type in which the display is formed by different length strokes written during successive equal clock periods, beam intensity control to make each stroke be of a uniform intensity.
These and other objects of the present invention are achieved by providing an arrangement which is supplied with the writing rates of each stroke along the X and Y axes. These rates represent the stroke's length along the two axes. The rates are converted into analog signals and are supplied to a novel length estimator whose output is an estimate of the stroke's length L. The estimator implements the equation L=k(X/2 Y/2 H2) where X and Y represent the strokes writing rates along the X and Y axes, P is the larger of X or Y and k is either equal to one resulting in an estimate error of 12 percent, or is equal to 0.94, resulting in an estimate error of :6 percent. The estimated length is used to control the beam's intensity so that strokes of different lengths have the same intensity.
The novel features of the invention are set forth with particularity in the appended claims. The invention will best be understood from the following description when read in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is an example of a displayed letter R formed by a succession of strokes;
FIG. 2 is a chart of the writing rates for each of the strokes shown in FIG. 1;
FIG. 3 is a block diagram of a beam intensity control arrangement in accordance with the teachings of the present invention;
FIG. 4 is a curve useful in explaining the estimate error produced in accordance with the teachings of the present invention;
FIGS. 5a, 5b, 6, 7a and 7b are diagrams of curves or signals useful in explaining the operation and purpose of different units, shown in FIG. 3;
FIG. 8 is a schematic diagram of the novel part of the arrangement shown in FIG. 3; and
FIG. 9 is a partial schematic diagram of a modification of the arrangement shown in FIG. 8.
DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention may best be described by first considering the type of system in which the invention is incorporated. The invention is assumed to be incorporated in a display system in which each line or symbol, such as the letter R, shown in FIG. 1, is formed by one or more strokes formed on a display surface 12. The surface may be assumed to define a plurality of points 14 arranged in a matrix of rows in a vertical direction or axis Y, and columns in an X axis. The distance or length between adjacent rows or columns represents a unit of length. The symbol, such as R, is formed by deflecting an unblanked beam during each clock period between selected points to form or write a succession of strokes, designated A-l-l. In the present explanation, it is assumed that the maximum stroke length along each axis is not more than 3 units of length.
In practice, for each symbol to be displayed, deflection or writing rates for each stroke may be stored in terms of the strokes length along each axis. The information for each stroke is then sequentially read out during each clock period, during which the stroke is formed. For the particular example, the information may be as outlined in the chart shown in FIG. 2. Assuming that at a given point in time, the beam is at point at which the letter R is to be displayed, the letter may be displayed by first forming stroke A, by providing the beam with a deflection rate of 0 units in the X axis, represented by 0X, and +3 units of deflection in the Y axis, represented by +3Y. Each of the other strokes 8-6 is formed during a successive clock period, while the beam is unblanked. The beam could then be returned from point 14b to point 143 during a succeeding clock period during which the beam is blanked, and during the following clock period stroke lO60ll 06l0 H would be formed to complete the display of the letter R.
It should be apparent that since the strokes may be of different lengths, though each is formed during an equal period, their intensities would be inversely proportional to their lengths unless beam intensity control is provided. In accordance with the present invention, this is accomplished by using the X and Y deflection rates of each stroke, as the beam is deflected to form r the stroke, to compute an estimate of the stroke's length. The estimated strokes length is then used to linearly control the beams intensity so that all strokes, regardless of length, are of the same intensity. The invention includes a simple, yet highly novel circuit for stroke length estimating.
The invention is diagrammed in block form in FIG. 3 wherein blocks 22 and 24 represent storage units which respectively store the X and Y deflection rates or simply the X and Y rates for each stroke of a particular symbol to be displayed. One example of such rates is represented in FIG. 2. Assuming that maximum rate in each axis is 3, the X rate in binary representation of a particular stroke is supplied to X buffer 26, at the start of the clock period when the stroke is to be formed, while the strokesY rate is loaded in Y buffer 28. The buffers are assumed to be of the parallel input parallel output type.
The invention includes a delay unit 30, which together with units 22 and 24 of unit 20 are clocked by a clock pulse in line 31. The function of the delay unit 30 is to delay the supply of the clock pulse to the buffers which when clocked unload their contents in parallel into D/A converters 32 temporarily 34. Thus, the function of the buffers is to temporarily hold the X and Y rates during the clock delay period provided'by unit 30. The function of this delay unit will be explained later. Briefly, it is to compensate for the inherent time delay of present day deflection amplifiers.
The converters 32 and 34 respectively convert the X and Y rates into analog signals which are supplied to a novel stroke length approximator 35. The latter provides an analog signal which is a close approximation of the length, designated L,.of the particular stroke which is being formed.
I As is appreciated, L may be expressed in terms of X and Y by L V X Y. To generate theexact value of L, based on the above expression, requires the use of logarithmetic amplifiers which are expensive and complex. This requirement is eliminated in the present invention by having approximator 35 approximatethe length L by a relatively simple arrangement, with a total error of less than 12 percent. If desired, the error can be reduced to be not greater than 6 percent. In operation, approximator 35 implements the equation I L=k(S/2 Y/2 P12), where K is a selected constant nand P is either X or Y depending on which is the largest of the two rates. If a plot of this approximation is made for the equation V cos+sin 0=1 with 0 varying from 0 to 90, the resulting graph is as the one shown in FIG. 4. Basically, this graph is generated by adding Vi cos 0 and 5: sin 0 of either cos 0 or sin 0 which ever is greater and determining the percent difference of the sum from one (1). It can be seen that the total error is less than 12 percent and is always greater than the true value. If the sum is multiplied by a k factor of 0.94, the error never exceeds :6 percent, as represented by the dashed line 36.
As will be shown hereafter approximator 35 is implemented in a novel manner to provide the length approximation in accordance with the equation L k (X/2 Y/2 H2).
Thus, the amplitude of the output of approximator 35 is a close estimate of stroke length with an error of not more than 6 percent if k=0.94 and of not more than 12 percent if k=l. This output is supplied to an amplifier driver 40 through a controllable gate 41. Preferably, the output of the approximator 35 is adjusted by a pedestal level adjuster 42. The function of the latter is to adjust the approximator output so that the intensity level of the symbols is substantially the same as other elements, such as lines, which are displayed on the display surface 12. The driver 40 drives a non-linear video amplifier 43 whose output is supplied to the display unit to control beam intensity such as by controlling the negative voltage in the grid of the display tube.
As is appreciated by those familiar with CRTs, a CRT has a non-linear transconductance as shown in FIG. 5a wherein the abscissa denotes grid to cathode voltage designated V and the ordinate designates beam brightness. To compensate for this non-linearity, the amplifier 43 is chosen to have a non-linear gain as shown in FIG. 5b. Therein, line 44 represents an ideal gain characteristic, while lines 45a-45c represent actual gain characteristics of a non-linear amplifier.
Gate 41 is controlled by a leading and trailing edge control unit 45 which is assumed to be supplied with a beam unblank/blank signal. Basically, unit 45 consists of two manually adjustable one shots. Their operation may best be explained in conjunction with FIG. 6. Assuming that the unblank/blank signal is a positive signal 46 whose positive leading edge 47 at t, represents the unblank signal, one of the one shots is operated to provide a positive signal 48 starting at t, where t -t is adjustable. Thus, positive signal 48 opens gate 41. Likewise, when the negative trailing edge 50 of signal 46, representing the blank signal, is received at 1,, the second one shot is activated to provide a negative signal 51 with a leading edge at t where t t, is adjustable. Signal 51 closes the gate 41. Such an arrange ment provides an advantageous control for stroke start and end points.
The operation of the system described so far may best be summarized with a specific example which will be explained in conjunction with FIGS. and 7b. Let it be assumed that a symbol 60 (FIG. 7a), consisting of two strokes 61 and 62 is' to be displayed and the required deflection rates'of the two strokes along one axis such as the X axis are as designated by lines 64 and 65. It is also assumed that stroke 61, in addition to having twice the X deflection rate of stroke 62, is the longer of the two. Let it be assumed that the beam is at a point 66 and that at time t, a system clock pulse 67 (FIG. 7b) is applied to unit 20. Unit provides the CRT with X and Y deflection rates for stroke 61. In FIG. 7b, only the X deflection rate represented by line 64 is shown.
As is appreciated, due to the delay in present day deflection amplifiers, the deflection of the beam from point 66 to end point 67 starts at a low rate until the full deflection rate is achieved as represented'by line 64a. This delay is designated by t and is accounted for by delay unit 30. Thus, whereas the unit 20 supplied the X and Y rates to buffers 26 and 28 at t,, they do not change state until they are clocked by the delayed clock pulse 67d at time At time t, the gate 41 is operated by the unblank signal 70 which is provided by unit 20 through control unit 45. Consequently, the potential at node 41:: rises from a reference potential such as ground to a potential or voltage controlled by the pedestal level adjuster 42. This level is represented in FIG. 7b by numeral 71. Then at t,', the buffers are clocked and receive the X and Y rates for stroke 61. They in turn activate the converters 32 and 34 whose analog outputs are operated upon by approximator 35. The latter estimates the length L of stroke 61 and raises the potential at point 41): above the pedestal level 71 by an amount proportional to the length L. This is represented by line 73. Thus, it is seen that while the beam is deflected to form stroke 61 its intensity is controlled by a potential at point 41x, represented by line 75 which is a function of its length.
At time one system clock period after t,, the unit 20 is again clocked to supply the X and Y rates for stroke 62. However, due to the delay t, the beam does not reach the end of point 67 of stroke 61 until t Thus, until t, the intensity of the beam is controlled by the level represented by line 75 which is a function of the length of stroke 61. Then at t, the buffers are again clocked to be set to the X and Y rates of stroke 62. Since stroke 62 is shorter than stroke 61, the approximators output is reduced as represented by line 80. Consequently, the voltage at 41x which controls beam intensity is decreased during the formation of stroke 62. The intensity controlling voltage at point 41x for stroke 62 is represented by line 82.
The unit 20 is again clocked at t, and since the end of the symbol 60 was reached its output to the buffers is set to zero. However, due to the delay t, the beam does not reach the end point 84 of stroke 62 until i when the buffers are loaded with the all zero values. Consequently, the contribution to the potential at 41x is only that of the pedestal adjuster 42, as represented in FIG. 7b by line 71. Thereafter, during the next system clock pulse at I the unblank signal 70 is terminated and the beam is blanked by the closing of gate 41 so that the potential at point 41x is again zero. If desired, the unblanking signal 70 may be terminated by unit 20 at t, and control unit 45 may be used to actually close the gate 41 at time t, after t, as represented by dashed line 84. 7
From the foregoing description it should thus be appreciated that in the present invention, the intensity of the beam as it is deflected to form each stroke of a symbol is controlled as a function of stroke length. Consequently, the strokes which may be of different lengths, though formed during equal duration clock periods, are of substantially uniform intensity.
Reference is now directed to FIG. 8 which is a schematic diagram of one embodiment of the approximator 35, the gate 41 and the pedestal level adjuster 42. Basically, the approximator 35 comprises a resistance network which includes equal resistors R1, R2 and R3. Also shown is a capacitor C. One side of the capacitor is grounded and the other is connected to a point 41x. The output of digilog 32 at which the analog value X is applied is connected to point 41:: through R1 and to the anode of a diode D1, while the output of digilog 34, at which the analog value Y is applied, is connected to point 41x through R3 and to the anode of diode D2. R2 has one end connected to point 41:: and the other end to the anode of a diode D3, whose cathode is connected to the cathodes of D1 and D2 at point 92. The anode and cathode of D3 are connected to positive and negative voltages, such as +l5V and l5V through resistors 74and 75 respectively, so that D3 is always forward biased.
The pedestal level adjuster 42 is shown comprising a variable resistor 97, connected across a potential of +l5V, and with its movable arm connected to point 41X through a resistor 98. The gate 41 consists of a switchable transistor Q1, shown for explanatory purposes as being of the NPN type. The emitter of O1 is grounded and the collector is connected to point 411:. The base is connected to control unit 45 through resistor and through a resistor 101 to a negative potential such as I5V.
In operation, during beam blank periods, O1 is conducting or ON thereby connecting point 41x or.capacitor C to ground through the transistor's collector to emitter junction. The pedestal level adjuster 42 is set to provide the desired pedestal level, designated by nuv metal 71 in FIG. 7b, to the driver 40 through an output resistor 102. When the unblanking signal 48 (See FIG.
6) is applied to the base of Q1 from the control unit 45, O1 is driven to cut off or OFF. Thus, the potential at 41x rises to tee level controlled by the setting of resistor 97. This level is represented by line 71 in FIG. 7b. Then y when the buffers are clocked such as t,, the outputs of the digilogs 32 and 34 represent the X and Y deflection rates of the stroke being formed, whose L is approximated by approximator 35.
As'previously pointed out, the approximator 35 estimates L by deriving a value k (X/2 Y/2 H2). In FIG. 8, k is assumed to be 1. Assuming that X Y, the desired estimated value of L is In the circuit shown in FIG. 8, when X Y, i.e., the input from 32 is greater than the input from 34. Consequently, diode D1 becomes forward biased and D2 is backbiased. The voltage drop across D1 is compensated by the voltage drop across D3. Consequently, the output of digilog 32 is effectively connected to terminal 41:: through R1 and R2 in parallel which effectively represents 54R. However, digilog 34 at which the Y rate is applied is connected to terminal 41x through R3=R. Thus effectively the rise in potential at 411: is a function of X+Y/2.
On the other hand when Y X, D2 is forward biased and D1 is backbiased. Thus, the total increase of the potential at 41x is related to Y+Xl2. When X=Y due to l060ll 0612 some difference between the actual properties of D1 and D2, one of them becomes forward biased and the other is back biased so that the potential increase is related to either X+Yl2 or X /2 Y. However, since X=Y, the resultant increase in the same, regardless of which diode is forward biased.
As previously pointed out, in FIG. 8, k is assumed to be 1 in which case the maximum error is 12 percent. If desired k can be made to equal 0.94 for an error of 16 percent by incorporating a variable resistor 95, as shown in FIG. 9, and by setting it so that only 0.94 of.
.the potentialat terminal 41x is applied to the driver 40 with controlling beam intensity in a display system, it
can be employed whenever a distance between two points is to be computed, if the distances between the points along two orthogonal axes are known.
The invention has been described in connection with controlling beam intensity when strokes which together form symbols (such as the letter R) are produced. It should be apparent that if desired a separate length approximator with its associated pedestal level adjuster and gate may be used to control beam intensity when strokes which form parts of lines or other displayed elements are produced. The generated intensity control signal from such an arrangement can be supplied to' amplifier driver 40 as represented in FIG. 3 by line 108.
Although particular embodiments of the invention have been described and illustrated therein, it is recognized that modifications and variations may readily occur to those skilled in the art and consequently it is intended that the claims be interpreted to cover such modifications and equivalents.
WHAT IS CLAIMED l8:
1. in a digitally-controlled display system of the type in which a display is formed on a display surface of a display tube containing a deflectable beam whose intensity is controllable by producing a succession of strokes, each stroke being formed by deflecting the unblanked beam from a selected stroke start point on said surface to a selected stroke end point, each stroke being formed during a fixed clock period, with the strokes being of varying lengths, the system further including data containing means which contain data related to the length of each stroke along a first axis and its length along a second orthogonal axis, an arrangement for controlling the beam intensity as a function of stroke length, comprising:
first means for utilizing during each clock period the length data along said first and second axes of a stroke to be formed during said clock period and for estimating the strokes length between .its start and end points, the estimated length definable as L being a function of n x/2 m m).
it is deflected from the strokes start point to its end point.
2. The arrangement as recited in claim 1 wherein 3. The arrangement as recited in claim 1 wherein k=0.94.
4. The arrangement as recited in claim 1 wherein said data containing means contain the strokes length data along said X and Y axes in digital form and said first means include buffer means for receiving the strokes length data along each axis from said data containing means and for holding it during the period when said beam is deflected from the strokes start point to its end point, and said first means further include converting means for converting said data in said second means during said period into related analog signals.
5. The arrangement as recited in claim 4 wherein said first means include estimating means coupled between said converting means and said second means for providing the latter with an input potential which is a function of the estimated strokelength.
6. The arrangement as recited in claim 4 wherein said converting means include a first converter for providing an analogsignal which is a function of the strokes length along the X axis and a second converter for providing an analog signal which is a function of the strokes length along the Yaxis, said first means further including estimating means coupled to said first and second converters and further coupled to said second means at a junction point, for providing at said junction point a potential which is a function of the estimated stroke length.
7. The arrangement as recited in claim 6 wherein said estimating means comprises first, second and third resistors, said first resistor being connected between said first converter and said junction point, said third resistor being connected between said junction point and said second converter, said second resistor having one end coupled to said junction point, and diode means for coupling the other end of said second resistor to said first and second converters, whereby when the analog signal from said first converter is greater than the analog signal from said second converter, said first and second resistors are effectively in parallel and when the analog signal from said second converter is greater than the analog signal from said first converter said second and third resistors are effectively in parallel.
8. The arrangement as recited in claim 7 wherein said diode means include first, second and third diodes with their cathodes connected together at a common point, the anodes of said first and second diodes being respectively connected to said first and second converters, the anode of said third diode being connected to said other end of said second resistor and means for maintaining said third diode in a forward biased state.
9. The arrangement as recited in claim 8 wherein Fl when the potential at said junction point is directly applied to said second means.
l060ll 0613 first means for receiving 10. The arrangement as recited in claim 8 further including variable resistive means at said junction point for controlling the percentage of the potential at said junction point which is applied to said second means to thereby control the value of k to be less than 1.
11. In combination with a display unit of the type which includes a beam which is deflectable on a display surface from one point to another to form a stroke therebetween, the unit including means which are responsive to a beam intensity control signal to control the beam intensity, and a symbol data storage unit which contains the deflection rates of each stroke of a symbol to be displayed in terms of the strokes length along two orthogonal axes of said display surface, said axes being definable as X and Y, said unit being clockable by a clock pulse of a sequence of clock pulses supplied thereto to supply said display unit with the stroke's deflection rates in said X and Y axes so as to deflect said beam from the strokes start point to its end point, an arrangement for controlling the intensity of said beam as it is deflected to form said stroke, the arrangement comprising:
from said storage unit the deflection rates of said stroke along said X and Y axes and for converting said rates into a potential at an output junction of said first means, said potential being a function of k(X/2 Y/2 P12), wherein X represents the strokes X deflection rate, Y represents the stroke's Y deflectionrate, P is the greater of X or Y and k is a constant; and
second means for utilizing said potential to provide a beam intensity control signal to said display unit, said control signal being a function of the amplitude of said potential.
12. The arrangement as recited in claim 11 wherein the X and Y deflection rates from said storage unit are in digital form, said first means include a first buffer for receiving the strokes X deflection rate from said storage unit and a second buffer for receiving the strokes Y deflection rate from said storage unit, first and second digital-to-analog converters coupled to said first and second buffers for converting the digital strokes deflection rates in said buffers into related X and Y analog signals, and stroke length estimator means for providing said potential as a function of said X and Y analog signals.
13. The arrangement as recited in claim 12 further including delay means responsive to said clock pulse for providing said first and second buffers with a thereto.
delayed activating clock pulse to activate said buffers to receive said X and Y deflection rates from said and to hold said rates therein until a subactivating clock pulse is applied storage unit sequent delayed 14. The arrangement as recited in claim 12 wherein said stroke length estimator means comprises first, second and third resistors, said first resistor being connected between said first converter and said junction point, said third resistor being connected between said junction point and said second converter, said second resistor having one end coupled to said junction point, and diode means for coupling the other end of said second resistor to said first and second converter, whereby when the analog signal from said first converter is greater than the analo signal from said second converter, said first and secon resistors are effectively in parallel and when the analog signal from said second converter is greater than the analog signal from said first converter said second and third resistors are effectively in parallel.
15. The arrangement as re ited in claim 14 wherein said diode means include first, second and third diodes with their cathodes connected together at a common point, the anodes of said first and second diodes being respectively connected to said first andsecond converters, the anode of said third diode being connected to said other end of said second resistor and means for I maintaining said third diode in a forward biased state.
16. The arrangement as recited in claim 15 wherein k=l when the potential at said junction point is directly applied to said second means.
17. The arrangement as recited in claim 15 further including delay means responsive to said clock pulse for providing said first and second buffers with a delayed activating clock pulse to activate said buffers to receive said X and Y deflection rates from said storage unit and to hold said rates therein until a subsequent delayed activating clock pulse is applied thereto. g p
18. The arrangement as recited in claim 17 wherein k--l when the potential at said junction point is directly applied to said second means.
19. The arrangement as recited'in claim 17 further including variable resistive means at said junction point for controlling the percentage of the potential at said junction point which is applied to said second means to thereby control the value of k to be less than 1.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US3394367 *||Jul 14, 1965||Jul 23, 1968||Bendix Corp||Symbol generator|
|US3403288 *||Oct 28, 1965||Sep 24, 1968||Ibm||Dynamic intensity corrections circuit|
|US3482309 *||Apr 28, 1966||Dec 9, 1969||Sanders Associates Inc||Intensity control for vector generators having uniform vector trace time|
|US3537098 *||Sep 27, 1966||Oct 27, 1970||Ametek Inc||Circuit|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US4156915 *||Mar 28, 1977||May 29, 1979||Vector General, Inc.||Font generating system|
|US4511892 *||Jun 25, 1982||Apr 16, 1985||Sperry Corporation||Variable refresh rate for stroke CRT displays|
|US4727288 *||Oct 9, 1985||Feb 23, 1988||Anritsu Corporation||Digital wave observation apparatus|
|US20060061518 *||Aug 30, 2005||Mar 23, 2006||Honeywell International Inc.||Angular and positional dependent vector display|
|WO2006034386A1 *||Sep 22, 2005||Mar 30, 2006||Honeywell International Inc.||Angular and positional dependent vector display|
|U.S. Classification||315/30, 315/386, 345/16, 315/367|
|International Classification||G01R13/22, H03K6/00, G09G1/06, G01R13/26, H03K6/04, G09G1/10|
|Cooperative Classification||H03K6/04, G01R13/26, G09G1/10|
|European Classification||G01R13/26, G09G1/10, H03K6/04|