|Publication number||US3746773 A|
|Publication date||Jul 17, 1973|
|Filing date||Feb 4, 1972|
|Priority date||Feb 4, 1972|
|Publication number||US 3746773 A, US 3746773A, US-A-3746773, US3746773 A, US3746773A|
|Original Assignee||Baldwin Co D H|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (5), Referenced by (32), Classifications (5), Legal Events (5)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent 1191 Uetrecht July 17, 1973 ELECTRONIC ORGAN EMPLOYING TIME POSITION MULTIPLEXEI) SIGNALS  US. Cl 84/1.0l, 84/103, 84/117  Int. Cl. G10h 1/00  Field of Search; 84/].01, 1.03, L04, 84/l.1l,l.l7, 1.19
Primary Examiner-Richard B. Wilkinson Assistant Examiner-Stanley J. Witkowski Attorney-W. l-l. Breunig et ai.
1571 I ABSTRACT An electronic organ including a counter acting as a source of twelve repetitive time position multiplexed signals, one time position being provided for each note nomenclature of the musical scale, time positioned pulses being gated through respective key switches having the same nomenclature as respective time position slots. All time positioned signals passed by any octave of key switches are combined on a single octave output lead assigned to that octave, and signals on octave out-  References Cited put leads are selectively combined by coupler logic, UNITED STATES PATENTS output signals derivable from the coupler logic network 3,696,201 10/1972 Arsem et al. 84/l.0l being with Pulse f i derived f 3,697,66l 10/1912 Deutsch 84/101 reclly from the Source 10 provlde comcldem gate g- 3,610,799 10/1971 Wa n 3411,01 nals which cause tone source signals to be fed via tone 3,610,800 10/1971 Deutsch 84/ 1.01 color filters to an output load. 3,610,801 l0/l97l Fredkin et al. 84/103 1 11 Claims, 6 Drawing Figures i2 14 a 3 KEY E E \(Ef 3111111211 SLUHCHES MULT \PLEXER COUPLER i DUWSE SLUTCHES COUPLER LD (:\C psOguTlggl B KEY 31111101 DEMULTlPLEXER .h
AU Di D TONE GQT ES GENERR URS TUNE C ULDR FiLTERS and: AB Sllll'TCiHNCr AMPLlFl ER PAIENIED JUL 1 7091s KEY SUHTCH DEMUEH PLEXER lllll H IIIIH &
PULSE PDSWWN SOURCE llllll Ampum ER Ki8 AUDHJ T GATES GENERPTTDQS TONE CDLDR v FILTERS and; AB SLUFTCHNE:
ELECTRONIC ORGAN EMPLOYING TIME POSITION MULTIPLEXED SIGNALS BACKGROUND Many prior art electronic orgaps have employed key switches, which control gates which serve to transfer tone signal from tone signal sources to an amplifier and loudspeaker. A lead is provided for each note of the organ, and since leads must be provided for connecting the tone sources of the organ to the gates, and the outputs of the gates-to tone signal collection buses, an enormous footage of wire is employed in each organ,
and a large number of soldered connections.
Any organ of some degree of sophistication requires octave couplers, which are essentially networks for causing to sound notes an octave above or below that called for by a given key, or notes otherwise related tonally to the called for note may be required to sound in place of the called for note.
It is an object of the present invention to transmit sigwhich key nomenclatures are played within that octave.
It follows that for a 61 note keyboard, which is usual, six octave leads are required, each carrying one or more of twelve time positioned pulses representing the twelve semi-tones of that octave, and that provision must be made for the 61st note. The fact that all notes of a given nomenclature are represented by the same time slot of the time division multiplexed signals provides a practical opportunity for octave coupling, by transfer of time pulses from one octave lead to another.
SUMMARY A time division multiplex system for controlling the tone signal gates of an electronic organ, wherein to each octave of notes of the organ is allocated one lead, over which the twelve notes of that octave are transmitted as time position multiplexed note pulses, thereby reducing wiring costs in production of an organ, and transferring note pulses from one octave lead to another in order to achieve octave coupling.
DESCRIPTION OF THE DRAWINGS FIG. 1 is a signal flow diagram of a system broadly according to the invention;
FIGS. 20 and 2b together comprise a circuit diagram, largely schematic of an organ including the features of FIG. 1;
FIG. 3 is a block diagram of a pulse position source which applies time modulated signals to the multiplexer of FIGS. 1 2;
FIG. 4 is a circuit diagram illustrating an octave of keying circuits; and
FIG. 5 is a schematic circuit diagram of demultiplex gates employedin the system of FIGS. 1 3, inclusive.
DETAILED DESCRIPTION Referring to FIG. 1 of the accompanying drawings, 11 is a source of sequential pulses, for example a clock driven counter, which provides pulses on 12 output leads Ila, each lead being connected to one stage of the counter, so that the pulses on the spatial array of leads ll occur on a time division basis, each lead having its own time slot. The leads 11a proceed to a multiplexer 12, which selects the pulses of each group of 12 according to which key of an octave of keys is actuated and steers it to an output lead 12a on a per octave basis, so that signals on any lead can have any one of twelve positions representing note nomenclatures, the lead itself being identified with a specific octave.
The signals fed to multiplexer 12 from source 11 are selectively fed through the multiplexer in response to activation by organist of key switches 14. In a typical organ, having an upper and lower manual and a set of foot pedals, 154 key switches are provided. Each of the upper or swell manual and lower or grand manual includes five octaves of keys, each of which includes 12 semi-tones, in addition to a key for C of the octave immediately above or below the lowest or highest full octave. Key switches, in one embodiment of the invention, are provided for two full (12 semi-tone) pedal octaves, plus eight semi-tones for the octave adjacent the highest pedal full octave.
Key switches 14 are connected to multiplexer 12 in such a manner as to gate all of the notes for a particular octave in each manual to a different output lead of the multiplexer. Therefore, for the exemplary situation presented supra multiplexer 12 includes 15 output leads 120 on which are selectively derived pulse position signals in accordance with activation of the key switches 14.
The 15 output leads of multiplexer 12 are fed to coupler logic network 15 which is also responsive to settings of coupler switches 16 made by the organist. Coupler switches 16 control interconnections between the fifteen output leads of multiplexer 12 so that signals from different octaves can be coupled together. Coupler logic network 15 includes a relatively small number of output leads, one for each octave of each manual of the organ. In a typical organ, of the type described, there are nineteen output leads of coupler logic network 15, one for each of the 15 output leads of multiplexer 12, one for the pedal super coupled octave, one for the lower manual super coupled octave, one for the upper manual super coupled octave, and one for the upper manual subcoupled octave. On each of the 19 output leads of coupler logic network 15, there are selectively derived 12 pulse position signals indicative of the twelve semi tones in each octave.
The output signals of coupler logic network 15 are combined with the pulse position signals derived from source 11 in decoder or demultiplexer l3. Decoder 13 includes one coincidence gate for each tone of each of the 19 octave outputs of 15. The coincidence gates are arranged by octaves so that all of the gates of one octave are responsive to the output lead of coupler logic network 15 which is designated for that octave. Within each octave, a coincidence gate is provided for each semi-tone. Like semi-tone coincidence gates of the several octaves are driven in parallel by the same pulse position output signal of source 11, whereby at any time all of the gates having the same semi-tone nomenclature are enabled by an output signal of source 11. In response to time coincidence between the signal supplied to each gate of decoder 13 by source 11 and coupler logic network 15, a control signal is generated to enable a selected one of gates 17.
One or more of gates 17 is provided for each of the organ tones. Gates 17 include circuitry for converting (filtering) the relatively high frequency coincidence outputs of decoder 13 into d.c. gating voltages for controlling the passage of signals from generators 18 to the output of the gates. Signals from generators 18 are key switches, at times dependent upon the nomenclapassed because the length of time a key is depressed relative to the frequency of pulses derived from source 111 is such that at least several hundred pulses are derived from decoder 13 for each activation of one of key switches 14. Each D.C. gating voltage controls a multiplicity of audio gates of 17, one for each footage to be tone colored. A typical manual would have 16', 8', 4', 2 1S and 2' available. Thus audio signals would be gated from one D.C. gating voltage.
The signals derived from gates 17 are fed to conventional output circuitry including tone color filters and a tab switch network 19. Network 19 drives amplifier 20, which in turn feeds loudspeaker 21.
Reference is now made to FIGS. 2a and 2b of the drawings wherein is illustrated a block diagram of a portion of the circuitry associated with deriving the control signals for the swell output. In FIG. 2a, shift register 31 is illustrated as including 12 different output leads 121 132. One of leads 121 132 is provided for each of the semi-tones of an octave. The pulse position signals derived on leads 121 132 occur in timed sequence so that there is no overlap between any of the pulses and each has its own individual time slot that is unique to the'time slot of all of the other pulses. To prevent the possibility of overlap between the pulses derived on leads 121 132, shift register 31 includes circuitry whereby the duty cycle of the pulse derived on each of the leads is approximately per cent less than 1 part in 12. The pulses derived on leads 121 132 are assigned the twelve semi-tone note designations in accordance with:
TABLE I Note Designation No.
The multiplexing pulses sequentially derived on leads 121-132 are supplied in parallel into five octaves of key switches for upper manual key switches 35 and lower manual key switches 36, as well as for two full octaves of pedal switches 37. The five octaves of key switches for the upper manual are respectively indicated by reference numerals 141-145, while the switches for the lower manual key switches 36 and the pedal switches 37 are respectively indicated by reference numerals 146 and 147. To facilitate the descripture of the depressed key. Since a key is invariably depressed for a time interval approaching or exceeding a significant portion of a second, a large number of pulses having the same relative time position is derived for each key activation.
In addition to the five octaves of key switches included in the upper and lower manuals, these manuals include a further key switch, indicated by reference numeral 1480 for the upper manual, to provide the 61 keys in each manual. Key switch 148 and the corresponding key switch for the lower manual are connected to output lead 121 of shift register 31 so that a high C note can be derived. The high C note has the same time position as the C notes derived for the other octaves.
The five octaves of signals derived from key switches for multiplexer 146 arederived on leads 151-155. The single lead for the partial octave (for the note C) on the lower manual is derived on lead 156.
The two full octaves of notes derived from pedal switches or multiplexer 147, are derived on leads 161 and 162, while the partiaLeight-note octave is derived on lead 163.
Consideration will now be given to the specific circuitry in coupler logic networks 41, 42 and 43. Coupler logic network 41 includes eighteen selectively energized inverting amplifiers 171-188. Amplifiers 171-188 are arranged in three sets of six, whereby power is supplied to the six amplifiers of each set simultaneously. if no power is supplied to the amplifiers of a particular set, the amplifiers can be considered as open circuited switches. in response to power being supplied to the amplifiers, they function as unity gain, inverting amplifiers and can be considered as closed circuited switches. Power is supplied to amplifiers 171-188 through three normally open circuited coupler tab switches 191-193. In response to the organist closing any of the coupler tab switches 191-193 power is supplied to a selected six of the inverting amplifiers to activate them into a closed state. Amplifiers 171-188 are connected to be responsive to closure of coupler tab switches 191-193 so that there is coupling to the next adjacent higher footage octave of each of the octaves associated with switches 141-145 and 148 in response to closure of switch 191. There is coupling to the same octave in response to closure of switch 192, while there is coupling to the next adjacent lower footage octave in response to closure of switch 193. To these ends, power is supplied to amplifiers 171-176 in response to closure of switch 191; power is supplied to amplifiers 177-182 in response to closure of switch 192; and power is supplied to amplifiers 183-188 in response to closure of switch 193.
The outputs of amplifiers for similarly designated octaves of coupler logic network 41 are connected to like output signals, in accordance with:
.. V TABLE 11 Output octave Amplifien... 183 (3a) 177 (2a) 171 (1a) 172 (1a) 173 (1a) 174 (1a) 175 (1a) 176 (1a) Amplilr 184 (38) 178 (2a) 179 (2a) 180 (2a) 181 (2a) 182 (2a) Amplifier 185 (3a) 186 (3a) 187 (3a) 188 (3a) In Table II, the numbers in parenthesis indicate the use of multiple integrated circuit inverting amplifiers,
In Table III, the numbers in parenthesis indicate which amplifiers are responsive to coupler tab switches 221-222, whereby those amplifiers responsive to switch 221 are indicated by (1b) and those responsive to switch 222 are indicated by (2b).
Coupler logic network 43 includes six selectively energized inverting amplifiers 231-236, arranged in two sets of three. Power is selectively applied to the two sets of amplifiers in response to closure of coupler tab switches 241-242. Amplifiers 231, 232 and 233 provide coupling to the higher footage outputs, and amplifiers 234-236 provide coupling to the outputs at the same footages as coupled through switches 147 to leads 161-163. Connections between the output le adsofamplifiers 231-236 and control of the amplifiers in response to activation of the selected ones of coupler tab switches 241-242 is in accordance with:
Output Octave w l 2 3 4 Amplifier 234(2c) 231(k) 232(k) 233(k) Amplifier 235(k) 236(2c) In Table IV, the numbers in parenthesis designate which of coupler tab switches 241-242 is depressed, whereby (1c) designates activation of coupler switch 241 and (2c) designates coupler switch 242.
A convenient packaging arrangement for the amplifiers included in coupling matrices 41-43 involves the unit order values for the activated coupler tab switches, 10 each mounted on a single integrated chip and having a the numbers running in ascending order from 0 to 7 incommon power supply terminal. One particular, presdicate the eight output octaves of coupler logic netently available integrated circuit chip includes six amwork 41, and the three-digitnumbers indicate the referplifiers thereby rendering it particularly adapted for use ence numerals for the amplifiers. Hence, e.g., Table II in conjunction with the present invention. These ampliindicates that in response to coupler tab switch 193 15 fiers have open collector outputs allowing them to sink being closed, the output signals derived from key current to the negative supply only if they are energized switches 141-145 are fed to the output leads for the ocfrom the coupler tab and turned on from the time multaves from 0 to 5 via amplifiers 183-188. tiplexed key switch input. These open collector outputs Coupler logic network 42 includes l2 amplifiers can then be wired OR without using additional logic ,201-212 arranged similarly to the coupling amplifiers 0 gates. of logic network 41. Inverting amplifiers 201-212 are Demultiplexer or decoder 13, FIG. 1, is illustrated in responsive to two additional coupler tab switches FIG. 2a as including seven sets of AND gates (coinci- 221-222 which energize the amplifiers so that they sedence gates) 251 257. Each set of AND gates 251 lectively operate as open and closed circuited switches. 257 includes twelve individual AND gates, one for. each Output leads of amplifiers 201-212 are connected to 25 of the semi-tones of a complete octave. AND gate sets output leads corresponding with those of amplifiers 251 257 are respectively responsive to the output sig- 171-182. The particular connections between these nals derived for the seven lowest octaves (0,l,2,3,4,5 amplifiers and the output leads are given by: and 6) derived by combining the outputs of coupler TABLE 111 Output octaves Amplifier 207 (2b) 201 (1b) 202 (1b) 203 (1b) 204 (1b) 205 (1b) 2 206 (1b) Amplifier 208(213) 200 (2b) 210 (2b) 211 (2b) 212 (2b) logic networkni 43. The individual gates within each set of AND gates 251 257 are responsive to the twelve pulse position signals derived on leads 121 132, as coupled through driver amplifiers 261. The- AND gates in each of sets 251 257 respond to the signals fed thereto from driver amplifiers 261 and the combined output leads of coupler logic networks 41, 42 and 43 to derive d.c. gating signals that enable audio tones from tone generators 91 97 to be selectively passed through the sets of audio gates 281 287 to network 19, FIG.'1.
In addition to the seven sets of twelve AND gates, a further AND gate 271 is provided. AND gate 271 is responsive to the octave number 7 output derived by combining the signals of coupler logic networks 41 43 and the C note output signal by shift register 31 on lead 121. AND gate 271 responds to coincidence between the octave number 7 input thereof and the signal on lead 121 to derive an enable signal that gates the output of tone generator 98 through audio gate 288 to circuit 19.
Reference is now made to FIG. 3 of the drawing wherein there is illustrated an embodiment for an oscillator and shifi register that derives the pulse position or l2 phase signal. Basically, the 12 phase source includes a free running transistorized multivibrator 301 which drives a plurality of cascaded bistable flip-flops, that in turn drive a logic network 300 having twelve output leads for deriving the l2 phase or pulse position signal.
Transistorized multivibrator 301 is of conventional design and derives a square wave voltage at terminal 302, with a frequency, for example, of 240 KHZ. The square wave voltage developed at terminal 302 is shaped into a series of positive and negative pulses, one of which is derived in response to each transition of the square wave by differentiator 303. The negative going pulses derived by differentiator 303 are amplified by driver 304 which feeds toggle flip-flop 305 in parallel with input terminals of AND gates 306 and 307. Flipflop 305 includes a true output terminal (O) which drives the other input terminal of AND gate 306 in parallel with clock input terminals (C) of J K flip-flops Flip-flops 308 310 are cascaded with each other so that they, in effect, form a three-stage counter, having a maximum count of eight. Connections between flipflops 308-310 enable them to function as a divide-bysix ring counter responsive to the voltage developed at the Q output terminal of flip-flop 305. Because of the toggle action of flip-flop 305, the flip-flops 305 and 308-310 effectively form a divide-by-l2 counter, or frequency divider for the 240 KHZ output of multivibrator 301. To provide feedback required to establish the divide-by-six count from the counter including flipflops 308-310, AND gate 311 is provided. AND gate 311 includes input terminals responsive to signals developed at true output terminals (C) and (D) of flipflops 309-310 and develops an output signal that is supplied to the K input terminal of flip-flop 308, the J input tern 1 inal of which is responsive to the complementary (D) output terminal of flip-flop 310.
The square wave voltages developed at the true and complementary output terminals of flip-flops 30S and 308-310 are combined in logic network 300 to derive the 12 phase output signal of pulse position source 31.
Logic circuit 300 for deriving the 12 phase signal, in addition to including AND gates306 and 307, respectively responsive to the signals developed at the true and complementary output terminals and Q, respectively) of flip-flop 305 and the output of driver 304, includes l2 three-input NAND gates 321-332. Threeinput NAND g'ates 321-332 respond to the output signals of gates 306 and 307 and signals developed at the true and complementary output terminals of flip-flops 308-310 to derive a twelve phase, pulse position signal, in such a manner that each pulse has a duty cycle of approximately percent less than one part in 12. The signal derived at the output terminal of each NAND gate is in a nonoverlapping time position relative to the signal derived at each of the other NAND gates, and each of the signals is equispaced from adjacent signals.
The connections between gates 306 and 307 and the output terminals of flip-flops 308-310 and input terminals of NAND gates 321-332 are given by:
TABLE V NAND GATE INPUT SIGN A1.S s21 A B D 322 A E 313 ABC :24 ABC 32s AC5 32s Acii s21 Kan 32s ago 329 A33 52 331 Ago :32 ACD In Table V, the outputs of gates 306 and 307 are respectively denominated as A and A; the signals derived at the true output terminals of flip-flops 308, 309 and 310 are respectively denominated as B, C and D; and the signals derived at the complementary output terminals of flip-flops 3 08, 302 and 310 are respectively denominated as B, C and D.
To positively prevent overlap between the signals derived at the output terminals of NAND gates 321-332 and thereby enable the duty cycle of each output of the several NAND gates to be approximately 10 percent less than 1 part in 12, each of the NAND gates is responsive to a pulsating output of one of gates 306 and 307, as indicated in Table V by the inclusion of anyA or A input signal to each of the NAND gates.
Reference is now made to FIG. 4 of the drawings, wherein is illustrated a preferred embodiment of a typical octave of key switches, such as the first octave 41 of upper manual key switches 35. The octave of key switches includes twelve input leads, one for each semitone of an octave and each responsive to a different one of the signals on leads 121-132, as derived from NAND gates 321-332. Each of leads 341-352 is connected through a separate key switch 361-372 to the input terminal of inverting amplifier 373. One of the key switches 361-372 is provided for each of the keys of the octave being considered. Only one switch is provided for each of the keys, regardless of the tab coupling which might be desired for a particular key because of the inclusion of matrices 41-43.
To prevent sneak currents, each of key switches 361-372 is connected in series with a different one of diodes 374, biased in such a manner as to pass the negative going multiplexing signals supplied to leads 341-352 by NAND gates 321-332. Because the multiplexing signals are supplied to leads 341-352 in different time positions, the waveform developed on the single output lead of amplifier 373, which is responsive to signals supplied to all of leads 341-352, is, in effect, time position modulated by the depression of key switches 361-372.
In FIG. 5 of the drawings is illustrated a portion of the circuitry included within one of the groups of twelve AND gates, such as group or set 257 of AND gates. In FIG. 5, complete circuitry is given for the C gate included in group 257, while fragmentary circuitry is given for the B gate.
The C gate includes NPN transistor 391, having a base electrode responsive to a positive going multiplexing pulse derived by the driver inverting amplifier 261, responsive to the signal on lead 121, while the B gate comprises NPN transistor 392 having a base electrode responsive to the multiplexing pulse derived by the driver, inverting amplifier 261 responsive to the signal on lead 132. The emitters of transistors 391 and 392 have a common connection to 1000;0hm resistor 393 that is responsive to a negative going pulse derived by the Number 6 output lead of a matrix comprising networks 41-43. The emitter collector path of transistor 391 is biased to a conducting state with a duty cycle of ten percent less than one part in twelve, the same duty cycle as the multiplexing pulses, in response to the positive and negative multiplexing pulses applied to its base and emitter electrodes. The 20 KHz, low duty cycle activation of the emitter collector path of transistor 391 is converted into a dc. gating potential for tone generator sources connected to terminals 394 and 395 by connecting a relatively large, 0.33 microfarad capacitor 396. between the collector of transistor 391 and ground. Capacitor 396 serves as a bias for slow attack and fast attack gating circuits for the tone signals supplied to terminals 394 and 395.
The slow attack circuit for the tone supplied to terminal 394 includes a resistive voltage divider comprising two 100 kilohm resistors 397 and 398, the junction of which is connected to the cathode of diode 399, having an anode that is biased through resistor 401. The tone source at terminal 394 is connected to the other terminal of resistor 398 and is selectively coupled through diode 399 to tone color circuits 319. The tone signal supplied to terminal 394is a square wave voltage havwhich enable selective coupling through the anode cathode path of biased diode 399.
If there is no time coincidence between the positive and negative pulses supplied to the base and emitter of transistor 391, the square wave voltage at terminal 394 alternately charges and discharges capacitor 396 between a pair of voltage levels, both of which are sufficiently high to maintain diode 399 in a back biased condition. In response to transistor 391 being forward biased at 20 KHz rate with a low duty cycle of approximately one part in 12, the charge on capacitor 396 is reduced, with a resulting decrease in the voltage across the capacitor electrodes. In response to the reduced voltage across the electrodes of capacitor 396, the d.c. voltage level at the cathode of diode 399 is reduced sufficiently to enable the square wave tone signal at terminal 394 to be passed through diode 399 to tone color circuit 319.
To provide fast attack in response to activation of transistor 391 into a conducting state, the tone signal at terminal 395 is selectively coupled to the collector of transistor 391 via resistors 402 and 403, which are connected in series with the parallel combination of resistor 404 and capacitor 405. A junction between resistors 402 and 403 is connected to the cathode of diode 406, the anode of which is connected to a +15 volt d.c. biasing source at terminal 407 via resistor 408. The voltage of the tone source connected to terminal 395 has a different frequency than the tone source connected to terminal 394 but varies between +15 volts and +23 volts so that diode 406 functions in a similar manner to diode 399. The time required for the source In this general case, generator tones at 16, 8, 4', 2
i k, 2 and 1 can be keyed on responsive to coupler ing variations between l5 volts and +23 volts, voltages connected to terminal 395 to be coupled through diode 406 is considerably less than that required for the source connected to terminal 394 to be coupled through diode 399 because of the inclusion of capacitor 405 in the circuit between terminal 395 and the collector of transistor 391. Typically, the time constant of the fast attack circuit is 20 milliseconds, a result achieved by selecting the values of resistors 403 and 404 to be 47 kilohms, the resistance of resistor 402 to be 100 kilohms, and the value of capacitance 405 to be 0.33 microfarads.
In general more than one audio gate would be connected to the slow and fast attack bias. Only one each are shown for simplicity. For'example, if three sets of gates are connected to the collector of transistor 391 and three sets of gates are connected to terminal 409, capacitors 396 and 405 would be increased to one microfarad and resistors 393 and 404 would be reduced to 330 ohms and 15 kilohms respectively. This scaling would maintain the same time constant or attack rate as in the exemplary case.
gates 175, 182, 205 and 212. The lower footages (16, 8' and 4) on the slow attack and the higher footages (2 5S, 2, and 1') on the fast attack.
It is to be understood that similar circuits are connected in the collector circuit of transistor 392 and are selectively activated in response to simultaneous application of positive and negative multiplexing pulses to the base and emitter thereof. Simultaneous application of the multiplexing pulses to the base and emitter of transistor 392 results in passing B tones from tone generator sources connected in fast and slow attack circuits in the collector thereof in the manner described with regard to the slow and fast attack circuits of transistor 391.
What I claim is:
1. An electronic organ, comprising an array of key switches, a source of twelve sequential pulses each occupying a predetermined time slot on a time division multiplex basis and each time slot corresponding with all keys of a given nomenclature, a plurality of leads each corresponding with a different octave of keys of said organ, means responsive to selective actuation of said key switches for selecting said pulses for transmission on said leads to convey the selected pulses according to the octave of each actuated key and its note nomenclature, an array of tone signal sources, and means responsive to said pulses for gating through to a load circuit the tone signals provided by said sources according to the time positions of said pulses and the leads on which said pulses occur.
2. The combination according to claim 1, wherein is included means for transferring pulses from one of said channels to another one of said channels at will.
3. In an electronic organ, at least two octaves of keys operative selectively to unoperated and operated conditions, means for providing only 12 time division multiplexed pulses, means responsive to said pulses for simultaneously scanning in sequence the operative conditions of those of said keys on a per note nomenclature basis which are of the same nomenclature for both said octaves and thereby converting the operated keys to timed signals in a time division multiplex sequence of only 12 pulses, means for decoding said timed signals to form spatially distributed signals, and means for converting said spatially distributed signals into tones of said organ.
4. In an electronic organ having plural octaves of keys, means for converting notes of a first octave of said organ into time positions of first pulses occupying those of l2 time positions corresponding with actuated ones of the keys of said first octave, means for converting notes of a second octave of said organ into time positions of further pulses occupying those of said 12 time positions corresponding with actuated ones of keys of said second octave, a sequence of tone gates for said first and second spatially distributed groups of pulses, and means for selectively applying said groups of pulses to turn on said tone gates.
5. In a multiplex organ system, a key switch for each note of a multi-octave manual, means for converting actuated ones of the keys of each octave of said manual separately into time positions of only 12 pulses in con current octaval note frames which occur in common for the separate octaves, and means for converting the time positions of said pulses to tones of said organ.
i 6. The combination according to claim 5, wherein is included means for convening the time positions of pulses in one note frame pertaining to one octave of said organ to tones of a difi'erent octave of said organ.
7. An electronic organ, comprising a source of 12 re- 1 petitive time position multiplexed nomenclature signals, one time position being provided for each note of different nomenclature of the musical scale, a sequence of plural octaves of keys having musical nomenclatures, a keyswitch associated with each of said keys, a separate octave lead for separate octaves of said organ, means responsive to closure of any of said keyswitches for gating through corresponding ones of said nomenclature signals corresponding in time position with the nomenclature of the closed keyswitchcs to said leads corresponding in octave with the octaves occupied by the closed keyswitches, and means responsive to the signals on said octave leads for efiecting sounding of tones of said organ. 7
8. The combination according to claim 7, wherein is provided means for intercoupling signals from one of octave signal from one of said octave leads, and a nomenclature signal.
10. In an electronic organ, plural arrays of keys representing diverse manuals of said organ, each key having a manual nomenclature, a source of twelve repetitive time positioned nomenclature pulses, each time position representing one note nomenclature of the musical scale, a series of octave leads, means responsive to actuation of any key of said plural arrays for transferring to that one of said octave leads corresponding with the octave occupied by that key that one of said nomenclature pulses corresponding with the nomenclature of said key, means for at will intercoupling said octave leads, and means responsive to the signals on said octave leads and to said nomenclature pulses for generating tone signals.
1]. In an electronic organ, plural octaves of keyswitches, a source of twelve sequential nomenclature pulses having time positions representative of note nomenclatures, respectively, means for applying said pulses to said octaves of switches in parallel, each pulse time position representing a note nomenclature and the pulse at that time position being applied to a note of corresponding nomenclature, means collecting the nomenclature pulses pertaining to each separate octave on a separate octave lead, means for at will intercoupling the nomenclature pulses of adjoining octave leads.
t i t k
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|U.S. Classification||84/655, 84/682|
|Jun 25, 1990||AS||Assignment|
Owner name: BALDWIN PIANO & ORGAN COMPANY, F/K/A/ BPO ACQUISIT
Free format text: RELEASED BY SECURED PARTY;ASSIGNOR:SECURITY PACIFIC BUSINESS CREDIT, INC., A CORP. OF DE.;REEL/FRAME:005356/0321
Effective date: 19890616
Owner name: FIFTH THIRD BANK, THE, A OH BANKING CORP., OHIO
Free format text: SECURITY INTEREST;ASSIGNOR:BALDWIN PIANO & ORGAN COMPANY, A CORP. OF DE.;REEL/FRAME:005356/0333
Effective date: 19890615
|Nov 5, 1985||AS01||Change of name|
Owner name: BALDWIN PIANO & ORGAN COMPANY
Owner name: BPO ACQUISTION CORP.
Effective date: 19840612
|Nov 5, 1985||AS||Assignment|
Owner name: BALDWIN PIANO & ORGAN COMPANY
Free format text: CHANGE OF NAME;ASSIGNOR:BPO ACQUISTION CORP.;REEL/FRAME:004473/0501
Effective date: 19840612
|Apr 1, 1985||AS||Assignment|
Owner name: BPO ACQUISITION CORP., 180 GILBERT AVE., CINCINNAT
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:D.H. BALDWIN COMPANY AN OH CORP.;REEL/FRAME:004385/0934
Effective date: 19840615
|Jun 26, 1984||AS||Assignment|
Owner name: GENERAL ELECTRIC CREDIT CORPORATION, A NY CORP., C
Free format text: SECURITY INTEREST;ASSIGNOR:BPO ACQUISITION CORP., A DE CORP;REEL/FRAME:004297/0802
Owner name: SECURITY PACIFIC BUSINESS CREDIT INC., 10089 WILLO
Free format text: SECURITY INTEREST;ASSIGNOR:BPO ACQUISITION CORP. A CORP OF DE;REEL/FRAME:004298/0001
Effective date: 19840615