US 3747098 A
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[ 51 July 17,1973
1 1 PHASED-ARRAY ANTENNA  inventors: George M. Kirkpatrick; Norman R. Wild, both of North Syracuse, N.Y.
 Assignee: Syracuse University Research Corporation, Syracuse, NY.
 Filed: July 23, 1970  Appl. No.: 57,618
 References Cited UNITED STATES PATENTS 4/1968 Connolly 343/100 SA UX 12/1966 Hair 333/24.1
Primary Examiner-Samuel Feinberg Assistant Examiner-Richard E. Berger Attorney-Paul & Paul  ABSTRACT A phased-array radar antenna system has a scan pattern which is pivotal about the center of the array. The scan pattern is directed from a common set of scancontrol circuitry which consists primarily of digital counters and logic whose output describe the settings of ON-OFF ferrite phase shifters for the elements on one side of the array. The one's complements of these outputs are used to control the settings for the other one-half of the array, without need for an extra least bit. Each phase shifter consists of four hits. When all four bits are in their ON state, a phase shift of 360' is obtained. The minimum or increment of phase shift is 24.
18 Claims, 8 Drawing Figures SCAN GENERATOR PULSE RECEIVER PATENIEUJUL 1 1 m5 SHEET 1 [1F 5 if a mokdmmzww 240w kw mm QOPDQEkmE mm ba ATTORNEYS,
PATENIED JUL 1 7 SHEEI 2 0F 5 MICROWAVE FERRITE PHASESH\FTERS 'x DIPOLE FROM TRANSMITTER TO RECEWER C i I E LATCHING WlRES--- i .L SCR OR TRANSISTOR\ DRIVERS THE LOGIC SELECTS ONES SW'TCHES I COMPLEMENT FOR RECEIVE (LOGC) A x A i CONTROL PULSES i Q i 0 10 1O 1 CLOCK PULSES FF FF FF FF -dc COUNT UP i i U COUNT DOWN PHASESHIFTERS 5) FROM CORPORATE FEED [f] DRIVERS Q aNARY COUNTERS (FE) r PULSE INPUTS l NPOT PULSES PER SECOND N N N Fig. 3
INVENTORS George M. Kirkpotnck By Norman R. Wild ATTORN EYS.
PATENIED 1 3. 747. 098
saw u or 5 INVENTORS.
TIMING PULSES TRANSMlT/RECEIVE CLOCK PULSES George MKirkpcIrick Norman R Wild BIT1 DRIVER BIT 1 BIT 2 DRIVER SIT 2 I COUNTER OII I BIT 4 DRIVER GATES GATES GATES BIT 4 BIT 8 DRIVER GATES z wEw TO/ FROM TRANSMITTER/ DUAL CLR DRIVER RECEIVER RESET OR CLEAR PAIENIED 1 3. 747. 098
sum 5 0r 5 lNPUT INPUT 2N5|83 FERRITE 2N5|83 BT lOK; l l IOK DUAL RESET DRIVERS Fig 8 INVENTORS. George M. Kirkpatrick BY Norman R. Wild WY ME ATTOR N EYS PHASED-ARRAY ANTENNA FIELD OF THE INVENTION The present invention relates to scanning antennas for radar, and in particular to phased-array radar antennas.
ln phased-array radar antennas of the type here involved, the radiating elements are arranged in a rectangular array of rows and columns, and the transmit signals applied to each column of radiating elements are phase-shifted relative to the transmit signals applied to the other columns of elements, thereby to shape and position the beam in space. By changing the phase shifts for succeeding pulses, the beam is steered back and forth. The scanning rates may, of course, be substantially higher than where the beam is steered by a mechanically rotating dish.
While phased-array or electronic scanning radar antennas may be used in ground installations, they are particularly suitable for airborne or spaceborne application since their construction is substantially lighter in weight than that of mechanical rotating dish antennas. A phased-array antenna may, for example, be fitted into the nose or wing of an aircraft without disturbing the aerodynamic lines of the craft.
The phased array of radiating elements may be fed through either series or corporate feed. Each branch may include a phase-shifter which is digitally controlled electronically. The phase shifters may be reciprocal or non-reciprocal in their action.
OBJECTS OF THE INVENTION A principal object of the present invention is to provide a phased-array radar antenna the radiating or dipole elements of which are under the control of ON- OFF ferrite phase shifters which are non-reciprocal in their action, and in which each phase shifter comprises a plurality of individually controlled ferrite units, which will be referred to herein as bits."
Another object of the invention is to provide a phased-array radar antenna system having a scan pattern which is pivotal about the center of the array, and in which the scan pattern is directed from a common set of scan control circuitry, consisting primarily of digital counters and logic, whose outputs describe the phase-shifter settings for the elements on one side of the array, and the ones complements of these outputs describe the settings for the other side of the array.
Another object of this invention is to provide an improved method, or improved circuitry, for utilizing current pulse driver circuits to control the 4-bit binary phase shifters of the antenna system.
While the invention is applicable to systems employing phase shifters of other than four bits, it will be convenient to describe a system in which four-bit binary phase shifters are used. These four bits are weighted in the ratios of l, 2, 4 and 8.
BACKGROUND OF THE INVENTION In a linear phased-array radar antenna system, the beam is steered by controlling the relative phase of the microwave energy emitted from the radiating elements in a linear manner. The phasing of the energy delivered to each radiating element must be proportional to the distance of the element from the point on the array about which it is desired to pivot the beam. If the elements are spaced equidistant, then the microwave energy to the first element from the pivot point will be shifted by an amount of q), the energy to the second element will be shifted by an amount of 2gb, the energy to the third element will be shifted by an amount of 3d), and so on.
Since phase shifts beyond 360 are redundant, it would seem appropriate, in the development of a 4-bit phase shift system, to design the system on the basis of an incremental unit of phase shift of 360/2, or 22%". Stated in somewhat more technical terms, it would seem that the incremental or minimum unit of phase shift Atb would be (211 radians)/2" where n is the number of bits. Thus, for a 4-bit phase shifter, the smallest unit of phase shift Ad) would be 21r/2== 21r/l6=1r/8 radians, or 22- /2". Hence, the smallest ON-OFF phaseshifter bit would have a phase increment of either zero when OFF or 22-;6 when ON. Each of the other phaseshifter bits would have values ofeither zero, when OFF, or twice that of one of the other phase-shifter bits, when ON. Accordingly, the bits of the 4-bit phase shifter would, on this basis, accomplish phase shifts of zero, when OFF, or of 22-%, or 45, or or 180", when ON. It will be understood that, on this basis, the phase shift introduced by each of the latching ferrite bits is zero, when the ferrite bit is in one of its two states, denominated OFF, and would be 22-56, or 45, or 90, or 180, when the ferrite bit is in its other state, denominated ON It was indicated above that a principal object of the present invention is to provide a phased-array radar antenna system having a scan pattern which pivots about the center of the array and in which the scan-control circuitry uses complements to control one-half of the array. In using complement control, a single control wire controls two phase-shifter bits, one on each side of the array. A pulse signal on this wire sets one ferrite bit on one side of the array to a particular state (1 or 0) and sets the corresponding ferrite bit on the other side of the array to the complement (0 or 1 Unfortunately, the complement obtained in this manner is the ones" complement, also known as the diminished radix complement, rather than the required "twos" complement. The twos" complement, or radix complement, differs from the ones" complement by one bit of the least significant bit. Consider the following binary number 0110. The ones" complement (the bits inverted) is 1001, but the desired twos" complement is 1010, which is one bit larger.
There are several ways of adding the extra bit. One way would be by binary adders. Another way would be by addition ofa least bit phase shift to each antenna element on the side of the array using the complement. Thus, a 1r/8 phase shifter would be used in addition to the regular 4-bit phase shifter.
The other use for the complement is in switching the array from transmit to receive. As indicated previously, the present invention relates to non-reciprocal phaseshifter action. With non-reciprocal phase shifters, the array must be switched to the receive position immediately following the transmit pulse. This may be done by using the complements to switch the array. In such case, the ones" complement is correct, as each phase shifter must be magnetized in the opposite direction to the transmit condition. The extra bit added to each element receiving the complement prior to transmit must also be reversed. If the beam is initially scanned to the right of the normal, then the left hand set of phase shifters receives the binary number, and the right hand side receives the complement plus one bit. This is equivalent to providing negative phase shifts to the right side. When the beam is scanned to the left of the normal, then the right side uses the binary count, and the left side receives the complement plus one bit. Therefore, the extra bit must be on the right side when the beam is on the right, and must be on the left side when the beam is on the left.
It will be understood from the foregoing that where the least bit size is determined by the relation A=21r/2", and an extra bit is needed, and is added, each binary phase shifter would have five bits, two of which would be least bits. Moreover, an extra driver would be required on each side of the array to insert or remove all eight of the least bits in unison.
SUMMARY OF THE INVENTION As indicated previously, one of the objects of the present invention is to provide a scan-control system for a phased-array radar antenna which avoids the need for the extra bit.
The above object, as well as the other previously recited objects of the invention, are accomplished by providing a scan-control system in which the binary phase shifters use a least bit size determined by the equation A=21r/(2"l rather than by the equation A=21rl2", as heretofore discussed. Thus, the present invention proposes that the least bit of the binary phase shifters be of such size so that the sum of the bits of the phase shifters totals 211 radians or 360, rather than 360 minus 22%;.
Restated, the present invention provides a scancontrol system for a phased-array radar antenna in which the binary phase shifters have a minimum bit size determined by the following equation: A=21r(2"l Thus, for a 4-bit phase shifter, where n=4, the least bit size equals 360/( l6-l )=24.
The following is a truth table for n=4 and a bit size given by the equation A=360/(2"-1 TABLE 1 Table For Bit Size A=21rl(2"1) for n=4 Series Input Phase Shifter Control Signals Total Phase Shift pulse 1611/15 81r/l5 41r/l5 21r/l 5 radians degrees No.
1] l) l) 0 0 1| 1 l 1 1 21: 360 l 0 0 0 1 211/15 24 1' l l l O 281r/l 336 2 0 0 l 0 411/15 43 2 l l 0 1 261r/l5 312 3 0 0 l l 61r/l5 72 3' l l O 0 241r/l5 288 4 0 l 0 0 Err/l5 96 4 l 0 l l 221r/l5 264 5 0 1 0 l IO'rr/IS 120 5 l O l 0 201/15 240 6 0 l 1 0 121:!15 144 6' l 0 0 1 I81r/l5 216 7 0 l l l l41r/15 I68 7' l 0 0 0 l61r/l5 192 B l 0 0 0 161r/l5 192 8' O l l l l4'll5 168 9 l 0 0 l l81rll5 216 9' 0 l 1 0 IZ'Ir/IS 144 10 l 0 l 0 2011415 240 1D 0 l 0 l 101r/15 120 l l 1 0 l I 221lll5 264 1 l 0 l 0 0 81r/1S 96 12 1 l 0 0 2411-115 288 I2 0 0 l 1 61/15 72 13 1 l 0 1 261r/15 312 l3 0 0 I 0 41r/1S 48 14 l l l 0 ZlIw/lfi 33b 14' (I 0 (I l 21r/l 5 24 l5 1 l I l 211 M10 l5 0 (I 0 (I 0 0 l6 0 ll 0 0 ll 0 lo I l l I In 360 The prime indicates ones complements Inspection of the foregoing table for 4-bit phase shifters with bit size in accordance with the equation Ad =21r/(2 1 where n=4, shows the following:
a. the "ones" complement is satisfactory since the sum of the phase shift plus the complementary phase shift for each number is 360.
b. the phase shift totals 360 (or 0) on both of counts 15 and 16. Therefore, there is a redundant setting, and count 15 must be avoided. This may be done by adding an extra count when 15 is reached. This may be done by the use of a counter for each dipole element on one side of the array.
The method proposed by the present invention of determining the least bit size of the phase shifters by the relation A=21r/(2"l) has the additional advantage, previously indicated, of decreasing the number of drivers which would otherwise be required.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram illustrating a corporate feed to a l7-dipole array and the scan control therefor;
FIG. 2 is a block diagram illustrating the control system for the 4-bit ferrite phase-shifter of one of the dipole elements;
FIG. 3 is a block diagram illustrating the pulse inputs to the binary counters;
FIG. 4 illustrates, on a greatly enlarged scale, the meander line of a phase shifter;
FIG. 5 is an elevational view, in section, of a ferrite phase-shifter showing the ferrite torid through the center hole of which the meander line passes;
FIG. 6 is a perspective view of a 4-bit ferrite phaseshifter showing the four ferrite torid.
FIG. '7 is a schematic diagram of the presently preferred driver system;
FIG. 8 is a schematic of the reset drivers.
DETAILED DESCRIPTION OF THE INVENTION FIG. 1 is a simplified block diagram showing the corporate feed to an illustrative radar array which is seventeen dipole elements wide and eight dipole elements high. Each phase shifter FS feeds eight verticallyarrayed dipole elements. The seventeen-dipole wide array is symmetrical on each side of a center element BC, the elements being identified as E1 to E8 on one side of center and E1 to E8 on the other side. A hybrid arrangement is used to distribute energy equally to the eight vertically-arrayed dipoles fed by each phase shifter.
It will be assumed that the antenna is operated at 10 ghz (gigahertz), which is 10 billion cycles per second. A wavelength at this frequency is 0.8 inches (approx.) and accordingly each dipole element is about 0.4 inch long. The entire dipole array occupies a rectangular area about 12 inches wide and 6 inches high.
In FIG. 1, a transmitter T is shown for applying the microwave radar pulse signal R to the seventeen-dipole wide array through to a transmit-receiver TR box. Following the transmit period, a period of 5 to 10 microseconds ma be allowed for switching the array from transmit to receive or listening condition. The listening period may, for example, be 950 microseconds in duration. Following the receive or listening period, 50 microseconds may be allowed for switching to the transmit condition and for placing the beam in a new position. During the 50 microseconds which are allowed for switching from receive to transmit, the scan generator SO delivers the necessary pulse scan signals S to place the 4-bit ferrite phase-shifters F8 in the ON-OFF states necessary to determine the new beam position.
In FIG. I, in order to simplify the drawing, the rectangles identified FS represent not only the 4-bit ferrite phase-shifters FS but also their control components, including counters, logic switches, current drivers, etc. Further details of these control components are schematically shown in FIGS. 2, 7 and 8.
Referring again to FIG. 1, the array illustrated contains seventeen equidistantly spaced elements, and it is desired to pivot the beam about the center element of the array. Thus, there is a center radiating element BC with eight elements symmetrically located on each side of center. Associated with each of the radiating elements, there is a four bit phase shifter to control the phasing of the energy delivered to the element.
Since the array is constructed to be symmetrical about its center, to steer the beam the phasing of the microwave energy required by an element on one side of the array must be of the same degree but opposite in sign as that required of the corresponding element on the other side. For example, in FIG. 1, where the elements are numbered E1 through E8 on the one side of center, El thru E8 on the other side, and EC for the center, and it is determined that to steer the beam to a particular angle, the microwave energy of E6 requires to be shifted in phase by an amount if), then the energy of E6 must be phase shifted by an amount Since phase is a relative measurement, negative phase shifts are realized by taking 360 Similarly, phase shifts of greater than 360 are redundant, and it is only necessary for the phase shifters to cover the range of 0 to 360.
As shown in FIGS. 2, 3, 6 and 7, each phase shifter is constructed of four ferrite cores or bits, with the bits weighted in the relative ratios of 8, 4, 2 and l. The ferrite bits are two-state devices which are switched from state to state by current pulse driver circuits directed from the scan control circuitry. One state of the ferrite bits is designated as an OFF state, and is taken as the reference state. If the bit is switched to its 0N state, additional phase shift over and above that due to the reference state is realized. When all four bits of the phase shifter are in their ON states, 360 of phase shift are obtained. Theoretically, the four-bit phase shifter could be used to divide the 360" into increments of 22 However, we have discovered that due to the nature of the phase shifter and the linear phased array antenna system, there are advantages to using the slightly larger increment of phase shift of 24. Accordingly, this is the increment of phase shift used in the phase shifters of the present application.
If the phase shifter setting is represented by a binary number ABCD, where A is associated with the 8-bit B with the 4-bit, C with the 2-bit, and D with the 1 bit, and where A, B, C, and D have a binary notation of l or 0, corresponding respectively to the ON and OFF states of the bits, then the following Table 2, defines the possible phase shift settings obtainable from the four bit phase shifters.
TABLE 2 Degrees Phase Shift I68 I92 216 240 264 288 3l2 336 360 A first advantage of the 24 phase shift increment is that the negative phase shifts, realized by taking 360" are readily obtainable from the scan control circuitry. As can be seen from Table 2, for any of the possible phase shift settings 360 is the one's complement of it. The ones complement of a binary number is obtained by simply changing l s to 0's and 0's to 1'5. For example, from Table 2, the phase shift setting for 96 is (M00). The negative phase shift of 96 would be the ones complement (10H which represents a phase shift of 264 and which is 360 96".
In digital circuitry of the scan control, where the pri mary control element is the flip-flop circuit, the normal one and the inverted zero outputs are both directly available, and thus, for any phase shift setting number, the one's complement number for the corresponding negative phase shift is also available.
Another use of the ones complement of the phase shift setting, is in switching the array from a transmit to a receive condition. The phase shifter is a nonreciprocal device. The phase shift necessary for the microwave energy when it is being delivered to the radiating dipole elements in the transmit condition is different from that of the receive condition, when received energy is being collected from the elements. The phase shifter setting for receive must be the ones complement of the transmit setting, as each phase shifter ferrite bit must be switched to the opposite state of its transmit condition. Therefore, just prior to transmit pulse time in each radar pulse repetition period, a transmit beam steering angle is entered into the phase shifters. Then, just following the transmit pulse time, the one's complement of each of the phase shifter settings is entered for the receive beam steering angle.
To generate the phase shifter settings for each of the beam steering angles of the antenna scan, the scan control circuitry uses eight 4-bit digital counters. Each of the counters is associated with a pair of phase shifters, located in corresponding positions on opposite sides of the array. This is illustrated in FIG. 7. The phase shifter associated with the center element of the array requires no counter, as its phase shift setting is kept constant at 0 relative phase shift for all beam steering angles. The antenna scan produced is unidirectional, starting at ap proximately 45 left of the normal to the array center, and scanning to approximately 45 to the right of the normal to the array center.
The 4-bit digital counters are constructed of flipflops, with both the normal one and inverted zero outputs provided. The counter outputs are pro-vided to gating circuits, where the appropriate outputs are selected, depending upon whether it is a transmit or receive phase shifter setting. The outputs of the gating circuits trigger the current pulse driver circuits which switch the phase shifter ferrite bits to the proper states.
A second advantage of the 24 phase shifter increment is that it allows the number of current pulse driver circuits required by the phase shifters to be minimized. As stated previously, the phase shifter setting of an element on one side of the array is always the ones complemcnt of the setting of the corresponding element on the other side of the array. This is the case, whether it is a transmit or a receive setting.
The current pulse required to switch the ferrite bits of the phase shifters must be relatively large in magnitude, in the order of amperes. Since many ferrite bits are required to be switched simultaneously, a large peak demand during the switching time would be placed on the systems power supply, if the driver circuits were allowed to draw the necessary current directly from the supply.
In accordance with a feature of the present invention, and as illustrated in FIG. 8, each driver circuit is provided with a storage capacitor to store the energy to provide a sufficient current pulse at the switching time. During the radar pulse period, the capacitor is allowed to re-charge for the next switching time. In this manner, the demand peak on the power supply is decreased, but because of the recharge time of the drivercircuit storage capacitors, a driver circuit is not able to be used to set in both transmit and receive phase shift settings. However, because of the manner the driver circuits are implemented in this invention, this restriction is of no consequence. It is never necessary to use the same set driver circuit for both transmit and receive settings in the same radar pulse period. The number of driver circuits are also minimized, as shown in FIG. 7, in that one driver circuit is used to set corresponding bits in corresponding phase shifters on each side of the array. For example, bit 4 of E6 and bit 4 of E6 are both set by the same driver circuit. A total of 32 set drivers are thus required for elements El thru E8 and EI' thru E8. The method for entering phase-shift settings into a pair of corresponding phase shifters one on each side of the array, is described as follows:
Step I: Just prior to transmit time, all bits of the phase shifter on the left side of the array are cleared to the one state and those on the right side are cleared to the zero state. This operation is performed by the clearing current pulse drive circuits CLR in FIG. 7.
Step 2: The transmit phase shifter settings are entered in by the set current pulse drivers. The direction of the current pulse in its course through the ferrite cores of the phase shifter will cause the bit states on the left side of the array to be switched from one to zero and those on the right side from zero to one.
Step 3: The radar then transmits its microwave energy.
Step 4: The phase shifter bits on the left side of the array, are again cleared to the one state and on the right side to the zero state by the clearing current pulse driver CLR.
Step 5: The receive phase shifter settings are entered by the set current pulse drivers. The settings remain until the next radar pulse period.
An example of the above sequence of events is as follows:
Step LEFT RIGHT B 4 2 l 8 4 2 l l l l l 1 0 0 0 0 2 l 0 l I 0 l 0 0 3 TRANSMIT 4 1 l l 0 0 0 0 5 0 l 0 0 l o l I It can be seen that the set current pulse driver for bit 4 is only used during step 2 and the set current pulse drivers for hits I, 2, and 8 are used only in step 5. Thus, any one set current pulse driver is used only once per radar pulse repetition period.
Since the reset drivers must be operated twice during each transmit-receive cycle, the reset drivers are dual, as shown in FIG. 8. That is, two reset drivers are connected to each reset wire, since the storage capacitors, C1 or C2, will not be able to recharge in the limited time (less than microseconds) between the two reset operations.
A preferred construction of the 4-bit ferrite phase shifters is illustrated in FIGS. 4, 5 and 6 of the drawing. Each of the 4-bit ferrite phase shifters consists of three basic configurations as follows: (a) the basic meander line ML on Tellite board Te as shown in FIG. 4; (b) the ferrite toroids FT and tellite Te between the ground planes GP, as seen in elevation in FIG. 5; and (c) the ferrite toroids FT, insulating spacers I, and latching wires LW, as illustrated in perspective in FIG. 6.
Referring now to FIG. 4, the basic meander line ML consists of twenty-two copper lines arranged as illustrated. Each line may have a width of 0.0 l 25 foot separated by 0.025 inch. The meander line ML is encapsulated in Tellite board Te, a low loss dielectric (polyolefin) having a dielectric constant of 2.38. The Tellite coating increases the peak power hndling capability significantly.
The four rectangular ferrite toroids FT are slipped one by one over the end of the encapsulated meander line ML and along the meander line into the positions indicated in FIG. 6. The relative positions indicated in FIG. 6 are preferred, but not essential. In the preferred arrangement indicated in FIG. 6, the first ferrite toroids to be encountered by the transmit radar signal R enroute from the transmitter T to the dipole elements E is the 192 delay core (8 bits), next the 24 delay core (I bit), then the 48 delay core (2 bits), and finally the 96 delay core (4 bits). Each ferrite toroid or core is separated from its neighbor by a spacer of insulating material I. These spacers I provide adequate magnetic isolation between bits. The opposite ends of the meander line ML function as an external impedance-matching transformer as the radar signal goes from Tellite to ferrite, and vice versa.
In the illustrative phase shifters being described, the l92 delay (8 bits) has a width of 0.270 inch of ferrite, the 24 delay (I bit) has a width of0.040 inch of ferrite, the 48 delay (2 bits) has a width of 0.065 inch of ferrite, and the 96 delay (4 bits) has a width of 0. l inch of ferrite. The total width (or length along the meander line) of the 4-unit or 4-bit phase shifter is 0.821 inch.
FIG. 5 is a cross-section view of the phase shifter. The encapsulated meander line ML goes through the center bore of the rectangular ferrite toroid FT. The toroid may have a height of 0.105 inch. A ground plane GP of aluminum or copper is placed on both the upper and lower sides of the ferrite toroid and separated therefrom by Tellite insulation Te having a thickness of 0.0195 inch.
CONTROL OF BINARY PHASE SHIFTERS Each set of 4-bit phase shifters associated with one radiating element can be controlled by a binary counter. In the system of the present invention, each binary counter consists of four stages of flip-flops in series. The number of input pulses to each counter must be proportional to the position of the dipole element relative to the reference point. For an array with the dipole elements spaced equally apart and the reference point on one dipole, for example, the center dipole element EC, the input pulses to each counter are proportional to the element number. This is illustrated in FIG. 3. By using a bit size determined by the equation A4 =2n/(2"l as proposed by the present invention, the least bit is 24, where n=4. The proper ones complement is then available directly from the binary counter, although the redundancy in the pulse numbers and 16 must be eliminated by circuitry, as previously indicated.
LOGIC As indicated above, each set of phase shifters associated with one antenna element can be controlled by a binary counter. The counter controlling the end dipole element furthest from the center of the array receives all of the input pulses, and the phase shift of the end element increases directly with the number of input pulses. Ideally, the phase shift in each of the other elements would then be proportional to the product of element position relative to the center of the array and the phase shift in the end element. This can be expressed as follows for a l7-element array, where the end element is the eighth element from the center:
1) N/8 di N/8 P Ad) where N number of the element, counted from the center dJ phase-shift in the Nth element (by) phase-shift in the eighth element P number of input pulses Adz least bit size It will be seen from the above that the phase shift in the Nth element is not necessarily an integer multiple of the least bit size. Since only discrete increments in phase shift are available from the ferrite phase shifters, the phase shift in the Nth element must be rounded off to the clostest integer multiple of the least bit size. The pulses which each counter must receive to give the proper round-off are listed in Table 1] below:
TABLE II Number of Input Pulses The ones" in a particular row of Table ll indicate the pulses which must be sent to the counter. For example, the counter controlling the third set of phase shifters must receive the second, fifth and seventh pulses. In some instances the value of the phase shift in the Nth element falls midway between two integer multiples of the least bit size. In these cases, the values shown in Table ll have been chosen so as to minimize the error in the beam pointing angle. The numbers in Table I] repeat every eight pulses.
The end of the scan cycle may be detected by sensing a unique state of 5 bits out of the total of 32 bits, comprised of 4 bits at each of 8 ferrite phase shifters. A unique state exists, for example, when the counter FF for dipole element No. 8 is 0100 and the element No. 1 counter is 0! It).
In the system of the present invention, it is only necessary to provide counters to keep track of one half of the array. The other half of the array is controlled by the complement. Stated another way, it is only necessary to calculate the phase-shift settings on one side of the array since the other side is the direct ones complement. The ones complement is available directly from the 4-bit binary counters FF each comprised of four flipflops in series.
The proposed system permits the use of a single driver, if desired, for corresponding bits on the two sides of the array.
What is claimed is:
l. A phased-array antenna system comprising:
a. an array of radiating elements;
b. a microwave signal source;
c. coupling means providing branch coupling between said signal source and the individual elements of said array;
d. phase shifters in the individual branches of said coupling means;
e. pulse-signal scan generating means for generating phase-shifter control signals;
f. means coupling said scan generating means to individual phase-shifters in various branches to control the conditions of the phase shifters, thereby to control the phase shift of said microwave signal in each branch as it passes therethrough to its associated radiating element;
g. each of said phase shifters comprising a plurality of individual ferrite units each of a different size to introduce a phase shift corresponding to one of a series of binary bits;
h. the ferrite unit which introduces a phase shift corresponding to the minimum bit being of a size to introduce a phase shift equal to 360 divided by 2"l, where n is equal to the number of ferrite units in the ferrite phase shifters.
2. A phased-array antenna system according to claim 1 characterized in that the sum of the phase shifts capa ble of being introduced by the plurality of individual ferrite phase shifter units in each phase shifter is equal to 360.
3. A phased-array antenna system according to claim 1 characterized in that said phased-array antenna sys tern is characterized by having two complementary sides, each side comprising an even number of radiating elements on each side of a center element; and further characterized in that said coupling means is an assembly which is symmetrical on each side of the branch to the center radiating element, and in that each ferrite phase shifter on one side of the center branch has a corresponding ferrite phase shifter on the other side of the center branch.
4. A phased-array antenna system according to claim 3 characterized in that a pulse counter is provided for each phase shifter in each branch on one side only of the center branch.
5. A phased-array antenna system according to claim 4 characterized in that said pulse counters comprise a plurality of bistable circuits connected in series.
6. A phased-array antenna system according to claim 3 characterized in that driver means are provided for driving the ferrite phase shifters.
7. A phased-array antenna system according to claim 1 wherein n is equal to 4, and the phase shift introduced by the minimum ferrite units, when in the one state, is equal to 24.
8. A phased-array antenna system according to claim I wherein n is equal to 4 and the phase shifts introduced by the four ferrite units when in the one states are equal to 24, 48, 96 and 192.
9. A phased-array antenna system according to claim 6 characterized in that said driver means includes common driver means for driving corresponding ferrite phase shifter units on the two sides of the antenna array.
10. A phased-array antenna system according to claim 6 characterized in that the coupling means provides a corporate feed between the microwave signal source and the individual elements of the array.
11. A phased-array antenna system according to claim 10 characterized:
a. in that each branch of the corporate feed includes a meander line,
b. in that the phase-shifter units are ferrite toroids through the aligned centers of which the meander line passes, and
c. in that each ferrite toroids unit of a phase shifter has a different width along the meander line than the other toroid units of the same phase shifter.
12. A phased-array antenna system according to claim 11 characterized in that the toroid having the greatest width and providing the largest phase shift is more remote from the radiating element than the other toroids of the same phase shifter.
13. A phased-array antenna system according to claim 9 wherein:
a. said system includes means for establishing and controlling the durations of a transmit period and a receive period;
b. said common driver means are adapted for setting the phase-shifter units in one state for the trasmit period and in the opposite state for the receive period;
c. the setting of the phase-shifter units on one side of the array is the ones complement of the setting of the corresponding unit on the other side of the array during both of the transmit and receive periods.
14. A phased-array antenna system according to claim 13 wherein:
a. said driver means includes reset means;
b. said reset means are dual means including dual storage capacitors for collecting energy to provide sufficient reset current to reset the phase-shifter units twice during each transmit-receive cycle.
15. A phased-array antenna system according to claim 14 characterized in that a set driver is provided for each pair of corresponding ferrite toroids, and in that a separate dual reset or clear driver is provided for each pair of corresponding 4-bit phase shifters.
16. A phased-array antenna system according to claim I wherein said system has two complimentary sides, wherein said coupling means is an assembly which is symmetrical on each side of the branch to center, and wherein each ferrite phase shifter on one side of center has a corresponding ferrite phase shifter on the other side of center.
17. A phased-array antenna system according to claim 10 characterized in that:
a. each branch of the corporate feed includes a meander line, and
b. the phase shifter units are ferrite toroids through the aligned centers of which the meander line passes.
18. A phased-array antenna system according to.
claim 9 characterized in that each common driver means is utilized but once during each transmit-receive cycle.