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Publication numberUS3750191 A
Publication typeGrant
Publication dateJul 31, 1973
Filing dateSep 25, 1972
Priority dateSep 25, 1972
Also published asCA972027A, CA972027A1, DE2346557A1
Publication numberUS 3750191 A, US 3750191A, US-A-3750191, US3750191 A, US3750191A
InventorsNaylor H
Original AssigneeIbm
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Synchronization of multiple ink jets
US 3750191 A
A method is described for sequentially determining if drop formation for each jet in an array of ink jets is occurring at the proper time.
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Description  (OCR text may contain errors)

United States Patent 1 [11] 3,750,191

Naylor, III July 31, 1973 SYNCHRONIZATION 0F MULTIPLE INK [56] References Cited JETS UNITED STATES PATENTS n e t r: H gh E- ylo Lexington, y- 3,298,030 1/1967 Lewis et al 346/75 [73] Assigneez memafionamusinessMachines 3,681,778 8/1972 Kelll' 346/75 Corporatlon Armonk NY Primary Examiner-Joseph W. Hartary Filed! p 25, 1972 Attorney- D. Kendall Cooper et al. [21] Appl.No.: 292,688 57 ABSTRACT A method is described for sequentially determining [52 .U.S.Cl. 346/75 1 I 51 1111.0. G0ld 15/18 i dmp f l Jet of Jets [58] Field 61 Search 346/75 .epmper 5 Claims, 5 Drawing Figures II/911R CLOCK I i 5I 001111101 L09; "li'l".'fll"' T'TZ'ITIIT'LL4ILQ'I:




c rgsgm 1% 9 as ELECTRONIC DETECTOR 6 T R SWITCH cmcun 3 G E v s NOZZLE 12 H.V.I/ no.3 39 0 .oooo0 no.3 350 I: 35


SHEET 2 0F 2 44 2 FIG. 2

SWITCH FORBIDDEN "was us TIME SYNCHRONIZATION i TIME i PATENT APPLICATION OF INTEREST U. S. Patent application Ser. No. 266,790 filed June 27, 1972, entitled Ink Jet Synchronization and Failure Detection System," and having James D. Hill, et al., as inventors.

BACKGROUND OF THE INVENTION AND PRIOR ART A multitude of systems have been proposed in the prior art utilizing ink jet printing techniques. Many of these devices have a plurality of ink jet heads arranged in an array or side by side with either simultaneous or sequential operation of the heads. In any ink jet system, synchronization is of prime importance. This relates to the fact that drops formed for printing need to be formed at a proper and synchronized time particularly with respect to charging potentials used in the system for deflection purposes.

SUMMARY OF THE INVENTION In a preferred embodiment of the invention, a plurality of ink jet printing heads are monitored and controlled in a manner to obtain accurate synchronization of drops propelled from the heads.

OBJECTS A .paramount object of the present invention is to provide a system for synchronizing ink jet drop formation and propulsion in order to insure high quality and accurate printing.

The foregoing and other objects, features, and advantages of the invention will be apparent from the following more particular description of the preferred embodiment of the invention as illustrated in the accompanying drawings.

DRAWINGS In the Drawings FIG. 1 represents an ink jet system including a character generator and three ink jetnozz'les or head assemblies with associated synchronizing circuitry.

FIG. 2 is an electronic switch circuit that isuse'ful in the circuit of FIG. '1.

FIG. 3a illustrates-the fundamentals-ofdetector circuit while FIG. 3b illustrates the preferred embodiment of the detector'circuit. The switc'hing-circuit-of FIG. 2 is ultimately derived from the circuit of FlG. 3b.

FIG. 4 illust'rates'various'timing relationships during a single drop interval in the system of FIG. 1.

DETAILED DESCRIPTION The system of FIG. 1 includes anumber of ink jet nozzle assemblies], 2, and 3-for forming and propelling drops of ink toward a record-medium.-notshown. he respective nozzle assemblies 1,2, and 3 include crystals 6-8, charge electrodes 10-12, deflection electrodes I'd-l6, and-sensor gutters 18-20. Each nozzle has arespectively associated charge electrode driver, designated 22-24. The charge electrode drivers 22-24 are controlledby the synchronization pulse generator 26 as well as a character generator -28.'lnitial control of the circuitsis frommasterclock '30 and control-logic 31.

'As is known in the art. dropsareformed bytherespective-nozzle assemblies in'the formof streams of drops designated 33-35. During synchronization, a sequence of drops which, numerically, can be in a wide range as from only several drops to a hundred drops are directed to the respective gutters 18-20. Drops passing in the gutters 18-20 develop signals on lines 37-39 that are applied to the electronic switch circuit 40. Associated with switch circuit 40 is a detector amplifier cir cuit 41, the output of which is returned by line 42 to control logic 31.

Synchronization of the individual streams of drops formed by the nozzle assemblies 1-3 may be formed in a sequential fashion. That is, all of the synchronizing efforts for one nozzle assembly may be completed prior to initiation of efforts for any of the other nozzle assemblies. However, it is preferable to synchronize the respective nozzle assemblies in what might be characterized as a semi-parallel fashion.

With a semi-parallel arrangement, control signals are directed to the individual nozzle assemblies 1-3 in such a way that sequences of drops are propelled from the respective nozzle assemblies in rotation during drop synchronization procedures with signals developed from each assembly and corrective action taken with all assemblies, if and as required.

As is known, synchronization, may be achieved by varying the phase of the crystals with respect to the charging potentials applied to the respective charge electrodes 10-12. In the semi-parallel mode, all crystals are driven with the same phase signal initially. To start synchronization, a sequence of drops 33a, such as three drops, is formed and propelled, charged in nozzle assembly 1 and directed to gutter 18. This results in a signal on line .37 to switch circuit 40. Shortly thereafter separated by a few drops perhaps, a sequence ofdrops 34a is formed, propelled, and charged .in nozzle assembly 2 and directed to gutter 19 to develop a signal. The signal is applied byline 31 to switch circuit 40. Shortly after that,.an d aftera short interval of several drops, as before, anothersequence of drops 35a is formed, propelled and charged in nozzle assembly 3 and directed to gutter 20 in order todevelop a signal on line 39 for application to switch circuit 40. In this manner only a slightinterval exists between the checkingofeach nozzle assembly and while a-determination ismade by con- 'trol logic 31 as to the correctionrequired to achieve synchronization for any particular-nozzle, signals are developed for'the other nozzles as wellto at least initiate corrective action.

Thecharging of drops for synchronizationpurposes :is'customarily carried outin a mannersimilar to regular printing of characters and as described in the Hill, et al, application referredto previously.

Someof the relationships during atypical drop interval areillustrated inFIG. 4. One drop time is-assumed tobe l0 micro-seconds with a first portion of 2.5 micro-seconds constituting a forbidden time interval when drops should notbeformed. Synchronization of dropformation withrespect to chargingpreferably occursin a 3 micro-second interval in the latter portion of the IOmicro-second dropinterval. II" he forbidden time interval corresponds to-the time whenthe-charge electrode voltage is changing and thus drop formation should not occur. at this time. lf a drop is formed during the synchronization time illustrated: then formation will occurin a correct relationship with respect to the chargeelectrode voltage and at a stable time.

In-operation, if drops landing in the gutters 18-20 createno output, as an example. then the dropswere formed outside of the synchronization time, that is improperly. Corrective action can then be taken by control logic 31 to change drop formation by either shifting the phase of the crystal device frequency for crystals 6-8 or changing the amplitude of the voltages applied to crystals 6-8, or by changing the phase of the voltage pulse (applied to the charge electrode) with respect to the crystal.

Comparable corrective action is required of course in the event of relatively low signals developed from gutters 18-20 and applied through switch circuit 40 and detector circuit 41 to logic 31. If a sufficient number of properly charged drops pass into gutter 18-20, then signal levels are developed that are of sufficient magnitude to indicate proper synchronization of drop formation and charging by charge electrodes 10-12. Thus, under such circumstances, no corrective action is required.

Some ofthe switching logic useful in the circuit of FIG. 1 and particularly in the switch circuit 40 is illustrated in FIGS. 2, 3a, and 3b.

The basic circuit of FIG. 3a uses an operational amplifier 45 with an FET (Field Effect Transistor) input which draws a negligible current, less than 0.5NA (nanoamperes) at 55C. Resistor 46 (R1) is a high value resistor such as 50 m!) i percent carbon. Resistors 47 and 48 (R2 and R3) serve to increase the apparent feedback resistance as seen by amplifier Al. The voltage applied across R1 is determined by the ratio of R2 and R3 (minus input of amplifier 45 is at virtual ground). If R2 is 3000 and R3 is 2.7kQ, percent of the op-amps output voltage is fed back to R1. The effective feedback resistance R is thus given by Equation I:

As an example, if gutter current 1 4NA and resistor R1 SOmQ, V1 is virtual ground, then, neglecting bias current into amplifier 45, all the gutter current flows through R1. V2 50111!) X 4NA 0.2V if R2 3000 and R3 2.7k0, V3 must be as follows:

V3 (.2V/R2) (R2 R3) .2 (300 2700)/300 2.0 volts Capacitors 50 and 51 (C1 and C2) are chosen so that the gain of amplifier 45 tapers off at an appropriate frequency.

The circuit of FIG. 3b operates on the same basic principle as that in FIG. 3a except that a non-FET input, less expensive, amplifier 53 is used. A matched pair of junction Field Effect Transistors 55 and 56 provides a high input impedence buffer for amplifier 53. The matched pair of transistors is needed because of the wide variation of FET characteristics with currently available manufacturing procedures.

The method of synchronization is extended to synchronize N" ink jets by using the circuits of FIG. 3b and N" analog switches, as shown in FIG. 2. Using the principles of the circuits of FIGS. 30 and 3b, electronic logic determines if drop formation is occurring at the proper time. If it is not, the magnitude or the phase of the signal applied to the respective crystals 6-8, FIG. 1, is changed to shift drop formation to the desired point in time. Inputs on lines 37-39 are derived from FIG. 1 for the circuit of FIG. 2. The circuit of FIG. 2 includes matched pairs 60-62 of Field Effect Transistors, designated Q11 and O21, Q12 and Q22, and Q13 and 023, respectively, each pair having a respectively associated resistor 63-65 and a switch circuit 66-68.

The outputs of the switch circuits 66-68 are directed to the detector amplifier circuit 41. Resistors 63-65 correspond to resistor R1 designated 57 in FIG. 3b. The matched pairs 60-62 of Field Effect Transistors serve as high impedence buffers between the high impedence sensor inputs 37-39 (sensing gutters) and the lower impedence input to operational amplifier 70 on line 72. Switches 66-68, which are analog switches, serve to isolate the Field Effect Transistor pair 60-62 from one another. Switches 66-68 are operated by control logic 31 on line 44 representative of a cable operable in a timed sequence at inputs 44a, 44b and 440, respectively. Preferably, only one switch 66-68 is coupled to amplifier 70 at any given time, the other switches being opened. By appropriate sequential closure of switches 66-68, the signals developed in gutters 18-20 reflected on lines 37-39 are sequentially scanned in order to determine what corrective action is required for synchronizing the ink jet strams of drops from the respective nozzle assemblies.

While not shown, it may be feasibleto operate several ink jets from one crystal. One ink jet in agroup attached to a single crystal could be used for synchronization. Then sufficient crystal assemblies could be used to provide the required number of jets. By combining the multiple jet per crystal technique with the sequential synchronizing cricuitry described above a significant reduction in the cost of multi-jet synchronization appears feasible.

Although the methods shown herein utilize thetechnique of sensing the stream current by means of a DC measurement, the same basic approach used here could work utilizing a non-contacting sensor. This would result in an AC measurement. The detector senses the sequence of charged drops passing by a small electrically isolated sensor near the gutter. This method has the advantage of not requiring direct sensor contact with the ink. Thus it is not as subject to contamination.

While the invention has been particularly shown and described with reference to a preferred embodiment, it

will be understood skilled in the art that various changes in form and detail may be made without departure from the spirit and scope of the invention.

What is claimed is:

1. An ink jet synchronization system particularly suitable for apparatus utilizing a plurality of ink jets, comprising:

a plurality of nozzle assemblies for forming and propelling ink drops in respectively associated ink jet streams, each of said nozzle assemblies incorporating driving crystals, charge electrodes, and deflection electrodes,

means for driving said respective crystals at a predetermined frequency in order to form streams of drops for propulsion from said respective nozzle assemblies;

individual charge driving circuits interconnected with said charge electrodes, respectively, for producing a charge potential on drops passing therethrough, when required;

6 gutter-sensor means respectively associated with charge drive, as appropriate, to insure proper syneach of said nozzle assemblies, said gutter-sensor chronization of drop formation and charging in the means being positioned f reception of drops proctiv nozzle assemblies. Pelled from said assemblies when said drops carry 3. The apparatus of claim 2, wherein said switching a Particular predetermined charge level and said 5 means comprises individual Field Effect Transistor gutter'sensor means developing Signals representa' pairs and associated switch circuits operable in timed tive of charge levels on drops passing therethrough; sequence:

a detector circuit responsive to signal levels devela common operational amplifier; and

m P mean? to Provlde a means interconnecting the respective switch circuits recnve S'gnal m Sald System for msurmg proper 10 to the input of said operational amplifier in timed lationship of said crystal driving circuits and said Se uence durin S chronization activities charge driving circuits; and q E y switch circuit means interconnected for reception of 4. The apparatus of claim 1, further comprising:

signals from each of said gutter-sensor means and control logic in said system for activating the crystal operable to supply signals from one and one only drive and charge electrode drive circuits associated of said gutter-sensor means to said detector circuit with each of said respective nozzle assemblies and during each of a number of Succeeding synchr nifor applying corrective potentials as required for zation testing inter a seach of said nozzle assemblies, in turn, in order to Tne apparatus of Claim 1, further comprising: complete the synchronization process for each reeentl'ol logic in said system for sequentially gating spective nozzle assembly in turn prior to any syneach of said charge driving circuits in order to develop a sequence of charged drops from each of said nozzle assemblies, each of the sequences of chronization activities with respect to the other nozzle assemblies.

drops from the respective nozzle assemblies being The appel'atus of l m h r individual P P separated by an inactive charge time interval; are formed in successive drop intervals comprising ameans in said system for synchronously activating ni tim ims a anfl'further P 5 said switch circuit to receive developed signals control s System for b: said from said gutter-sensor means during any time incharge dl'lvlng Clrcults during an early Portion of r l h h d drops are b i g received by said drop time intervals and for activating said said respective gutter-sensor means; and crystal driving circuits during a later portion of means responsive to output signals from said detector said drop interval thereby achieving synchronizacircuit means for correcting the crystal drive or tion.


Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US3298030 *Jul 12, 1965Jan 10, 1967Clevite CorpElectrically operated character printer
US3681778 *May 3, 1971Aug 1, 1972Dick Co AbPhasing of ink drop charging
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3981019 *Sep 26, 1974Sep 14, 1976Nippon Telegraph And Telephone Public CorporationCharging signal supply circuit for ink jet system printer
US3999188 *Dec 2, 1974Dec 21, 1976Hitachi, Ltd.Ink-jet recording apparatus
US4016571 *Sep 12, 1975Apr 5, 1977Hitachi, Ltd.Ink jet recording apparatus
US4025926 *Mar 28, 1975May 24, 1977Sharp Kabushiki KaishaPhase synchronization for ink jet system printer
US4358775 *Jul 24, 1980Nov 9, 1982Ricoh Company, Ltd.Ink jet printing apparatus
US4417256 *Mar 22, 1982Nov 22, 1983International Business Machines CorporationBreak-off uniformity maintenance
US4631550 *Aug 15, 1985Dec 23, 1986Eastman Kodak CompanyDevice and method for sensing the impact position of an ink jet on a surface of an ink catcher, in a continuous ink jet printer
US5408255 *Nov 16, 1992Apr 18, 1995Videojet Systems International, Inc.Method and apparatus for on line phasing of multi-nozzle ink jet printheads
EP0015727A1 *Feb 28, 1980Sep 17, 1980Xerox CorporationElectrostatic ink jet printing apparatus and method
EP1944163A1 *Jan 11, 2008Jul 16, 2008Domino Printing Sciences PlcConversion circuit for continuous inkjet printers
WO1986003457A1 *Dec 5, 1985Jun 19, 1986Commw Scient Ind Res OrgApparatus for monitoring and adjusting liquid jets in ink jet printers
U.S. Classification347/80
International ClassificationB41J2/07, H04N1/034, H04N1/032, B41J2/115
Cooperative ClassificationB41J2/115
European ClassificationB41J2/115