|Publication number||US3757917 A|
|Publication date||Sep 11, 1973|
|Filing date||Dec 30, 1971|
|Priority date||Dec 30, 1971|
|Publication number||US 3757917 A, US 3757917A, US-A-3757917, US3757917 A, US3757917A|
|Inventors||Cross T, Friedl W, Trybuski J, Waiwood W|
|Original Assignee||Design And Dev Inc|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (5), Referenced by (26), Classifications (16)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent [1 1 Waiwood et al.
[451 Sept. 11, 1973 LOGIC SYSTEM FOR A POSTAL FACILITY  Inventors: William P. Waiwood, Mentor; John E. Trybuski, Parma; Wendel M. Friedl, Cleveland; Thomas S. Cross, Richfield, all of Ohio  Assignee: Design and Development,
Incorporated, Cleveland, Ohio  Filed: Dec. 30, 1971 211 Appl. No.: 213,995
V .57]. W .7 V
Salava 177/5 Dlugos et a1 235/151.33
Primary Examiner-Stanley H. Tollberg Attorney-Richard D. Mason et al. Attorney-Richard D. Mason, Reginald K. Bailey et al.
A logic system including an array of input push buttons, a scale, a postage printer, and a money changer performs all the necessary steps in calculating the postage required by parcels. The system includes a memory containing all the postage charges applicable to any given combination of weight, class of postage, delivery zone, and special service. When a parcel has been placed upon the system scale and after appropriate class, zone, and special-service push buttons have been depressed, the logic system computes postage by summing the applicable postage charges which are retrieved from the system memory. The system then accepts money, makes change, and prints out an appropriate postage label for attachment to the parcel.
13 Claims, 9 Drawing Figures 306 2 LOWER oooR AND PLACE r PACKAGE ON PARCEL SCALE 3. FOLLOW STEPS THRU 310 w 308 SPECIAL DELIVERY E} SPECIAL HANDLING [5E] I REFER BELOW FOR INFORMATION ON TVPES OF SERVICE 1 I a w TO OPERATE v C @IEEIIIEHEI IIHI] %",j',2 3352 (4) us: connscr cums: lv DEPOSIT 25 IN MACHINE CLASS E E DEPOSIT ME MONEY 304 30l2 NO MORE MONEY msunzu VALUE El E] @@l@ REGISTERED VALUE E @EEEE] (9 POEI'TAL SERVICE lNFORMATlON CERTIFIED DE m RESTRICIED DELIVER/1E @rsle ousz NICKELSDIMES cwmrzns -INSERT 60115 on norm alus 'ro EQUAL 10m. CHARGES MONEY N EXCESS OF TOTAL CHARGES RETURNED AS CHANGE POSTAGE AND RECEIPT INSERT 5 v ONE DOLLAR 5111.5
YOUR POSTAGE IS BEING PRINTED TAKE POSTDGExeM SELECTION comma-rs 445 AMOUNT DEPOSITED INCREASE THE AMOUNTTO EQUAL TOTAL CHARGES CANCEL AND REFUND TOTAL CHARGES 22B Patented- Sepf. 11, 1973 .FIG 3A MOT EJ N 338 zONE'BcLAss SELECTED DETECTOR AND 207 r scALE A s 02. so LE CONTROL COUNTER OvERwE|eHT (O-ISOZ.) COUNTER DETECTOR 330 5 (O-3l LBS) 3 l 8? 332 334/ Q 206 RESET f cONTROL 3004 LB. I WEIGHT ZONE R.S I BINARY GATE P B.'s F/F ENCODER no em 1 302. 303 RESET NA CONTROL 1 3008 L oz. WT. r R 8.5 F/F LOGIC GATE (4" BIT) 304) REsgET SELEQT ENABLE 305 CONTROL 3006 INSURL R.S. 22 BINARY 3002 P. B.s .F/F I ENCODER 3032/, (MW) J RESET ENABLE 305 307 v CONT ROL 3020 REGISI R.S. 1 BINARY 3034 REGIST. .P.B 's F/F ENCODER GATE .4
, (4- BIT) 3036\ SP DEL: RS. BINARY SSATDEELVAI P B F/F l ENCODER (4-3m J RESET WEIGHT ENABLE j CONTROLH 3024 LOGIC SP. HAND RS. 326 I BmARY 3044 3038\ Sg/i/gNOH R B.'s F/F ENCODER (4-BIT) 38 30826 ENABLE 1 3040 OER Rs. BINARY 1 31 11 F: I ENCODER (4 B|T) H I RESET ENABLE 1 CONTROL 3028 REs s. s. I BNARY 3O42\ REST. P B. S F/F ENCOD ER 3 7 v MASTER RESET 3030 M E L E L LB JL LO VISUAL mil R v ||N$URANCE SCAN DISPLAY (6-BIT) 7 LOGIC l INSURANCE SELECTED \3044 SCAN 3Q|Q DEOODER x 305 L I 3O52 //vv/vr0/?$: I w W/L LIAM R WA/WOOD, JOH/Vt'. TRYBUS/(l l l WE/VDEL M. FR/EOL, THOMAS 5. mass ATTORNEYS Patented Se t. 11, 1973 3,757,917
8 Sheets-Sheet 4 FIG. 35
TO PRINTER PROGRAM CONTROL v (FIG. 5)
TO OVERWEIG HT- LlGH T TO 3RD CLASS OVERWEIGHT LIGHT TOTAL COST ADDRESS ENABLE POSTMANS KEY IO lNE E SCAN DECODER INVENTORS.
WILLIAM E WA/WOOD, JOH/VVE. mmusx/ 5 mass COMPLETE WENDEL M. FRIEDL, moms (FROM Hal) 8) ATTORNEYS Patented Sept. 11, 1973 3,757,917
S'SheetS-Sheet 5 F IG. 3 C
\ AND Q j 368 J AND AND 'AND 362 I l BASIC INSUR/ SPECIAL DEL CERTIFIED/ TOTAL VISUAL POSTAGE REGIS. SPECIAL HAND RESTRICTED COST DISPLAYSI L m s m 50 A .1 1 2m I f 3012 3060 ADDRESS INPUT k2l2 CORE MEMORY DATA OUTPUT CYCLE 'INITIATE "A" REGISTER TER ENABL m IB REGIS RESET READ/ 4 "-(WRITE DATA INPUT (l6 BIT) RESET 6 BIT) 4 an aco ADDER COUNTER (l6 BIT) N 7 3 377 I BASIC POSTAGE DAILY TOTALS 363 M50 (TO Fla-.5) GATE I GATE 36! CLOCK WILLIAM R WA/WOOD JOHN E. TRYBUSK/ FIG FIG F/G. WE/VDEL M. FR/EDL 3A 38 30 F [6 7 THOMAS 5. mass LOGIC SYSTEM FOR A POSTAL FACILITY The present invention relates to logical systems, and more particularly to a system for computing and printing postage and for also accepting and changing money.
In the past, it has been customary for parcel postage computations to be carried out by a clerk with the assistance of a scale and postage rate charts. The clerk would first weigh the parcel and then check the chart to determine theapplicable basic postage charge. The clerk would then add the cost of any special services requested and would manually sum the charges to determine the total applicable postage charge. The clerk would then stamp the parcel with an indication that the postage had been paid and would collect the postage charge from the patron. This procedure has always been slow and time consuming, and often errors occur in the clerks computations. Heretofore, the extreme complexity of the charts used in computing postage has made it necessary that the postage rates be calculated by a clerk and not by a machine.
The primary object of the present invention is therefore the production of an automated mechanism which can calculate parcel postage, accept money and make change, and print out an indication that the postage has been paid. Another object of the invention is to equip such a mechanism with an alterable memory having room to store all of the applicable postage rates and which may be readily updated whenever the rates change. A further object of the present invention is the inclusion in such a mechanism of means for adding the cost of special services to the computed postage and for providing aprinted indication of the special service which were requested and paid for.
in accordance with these and other objects, the preferred embodiment of the present invention comprises briefly a system which can calculate postage, make change, and print out a record of postage and special services purchased. The system includes a front panel having a plurality of selector switches or push buttons which present to the patron all possible combinations of postage and special services which may be purchased. The system additionally includes scales upon which the patron may place ,his parcel and also means for accepting the patrons money and for making change. The system includes a memory within which are stored the postage rates applicable to differing types of services and a printer capable of printing out an itemized list of the items'wich make up the total postage cost of mailing a parcel.
A patron wishing to purchase postage for a parcel places the parcel upon the system scales and then depresses an appropriate combination of push buttons indicating the class of postage desired, the postal zone to which the parcel is to be mailed, the insured value or registered value of the parcel (if any), and whether special delivery, special handling, certified delivery, or restricted delivery is desired. Under the control of the push buttons and scales, logic circuitry continuously scans and retrieves from the system memory the cost of the services requested. These costs are summed by an arithmetic unit. The cost of each individual service and also the total cost of all services are displayed for the benefit of the patron.
I The logic circuitry continuously scans the push buttons and updates the displayed costs. To the eye of the patron, the displayed costs appear to change instantaneously when a new combination of push buttons'is depressed.
When the patron has made his final selection, he presses a selection complete push button and then inserts dollar bills and coins into a money accepter. The money accepter continues to accept the patrons money until the amount accepted is equal to or greater than the total cost of the services selected. The money accepter then refuses to accept any more money. The
patron is then given the option of requesting either postage or cancellation and a refund of his money. If the patron requests postage, a format generator is placed in operation. The format generator obtains the costs from their normal locations in the system memory and transfers the costs to a separate location within the memory along with printing format instructions whose purpose is to control the operation of the system printer. The costs and the format instructions are then fed out of the system memory and are supplied to a printer control logic as needed to control the operation of the system printer. The system printer prints out a postage slip for the patron. Simultaneously, a change maker dispenses change such that the amount dispensed plus the total charge for postage equals the amount deposited. The patron takes the postage slip and attaches it to his parcel. A second copy of the postage slip is also provided for the patrons records, and a third copy is retained by the system. If the patron requests cancellation and a refund, all of the money which he has deposited is returned and the system is returned to its standby state.
When the postage costs are to be altered, the new costs are fed into the system memory locations which the old costs occupied. No alteration of the system logical structure is required to alter the costs stored within the system.
In addition to calculating postage, the system maintains running totals of the amounts collected for each type of postal service. Whenever a patron requests postage, the system reads the costs out of the system memory in accordance with the push button selections of the patron and adds the costs to running cost totals stored within a special section of the system memory. At periodic intervals, a supervisory employee with a proper key can cause the system to print out these running total costs. The running total costs can be compared to the amount of money removed from the systern as a check on the honesty of other employees who periodically remove money from the system.
Further objects and advantages of the present invention are apparent in the detailed description which follows and in the drawings. The features of novelty which characterize the invention are pointed out with particularity in the claims annexed to and forming a part of this specification.
In the drawings: I
FIG. 1 is an elevational view of the front panel of a postal facility designed in accordance with the present invention;
FIG. 2 is an overview block diagram of the preferred embodiment of the invention;
FIGS. 3A, 3B, andv 3C together form a block diagram I of the logic which is used to scan the system push buttons, to retrieve corresponding costs from the system memory, and to display the costs to the patron;
FIG. 4 is a block diagram of the logic which is used to count the money deposited by a patron and to calculate the amount of change which is returned to a patron;
FIG. 5 is a block diagram of the-format logic which retrieves costs corresponding to the selectionsindicated by the push buttons from the system memory, formats the costs, adds appropriate control instructions to the costs, and feeds the resultant formatted data back into the system memory;
FIG. 6 is a block diagram of the printer control logic which reads control data out of the system memory and generates the necessary signals for controlling the system printer; and
FIG. 7 illustrates how FIGS. 3A, 3B, and 3C are to be assembled.
Referring now to the drawings, FIG. 2 is a block diagram of a logic system 200 for a postal facility designed in accordance with the present invention. The system 200 is placed in operation when the patron inserts 25 cents into a coin accepter 201. The coin accepter 201 causes change circuits 202 to generate a 25 cents DE- POSITED signal which sets a flip-flop 203. An output of the flip-flop 203 causes a gate 204 to terminate a 25 cents NOT DEPOSITED signal, thus causing an OR gate 205 to disable the coin accepter 201 and prevent the immediate acceptance of more coins. The output of the flip-flop 203 is also fed as an ENABLE signal to an array of selection push buttons 206. The patron then makes his selection as to class and zone of postage, insurance, registration, and whatever else he desires using the selection push buttons 206 which are shown in FIGS. 1 and 2.
The patrons parcel is placed upon scales 207. The scales 207 generate a digital signal outpu which represents the weight of the parcel. The digital signal output from the scales 207 and additional output signals generated by the selection push buttons 206 are repeatedly checked by a customer service and weight logic 208 (marked C8. W.L. in FIG. 2). The logic 208 cal-- culates the addresses within a memory 210 of charges that are applicable to the services requested by the selection push buttons 206 for a parcel weighing the amount indicated by the scales 207. The applicable charges are repeatedly presented by the memory 210 and displayed by digital displays 212 so that the patron may have an advance indication of the cost of each service which he has requested. The charges are also fed to a scanning, arithmetic, and daily totals logic circuit 214 where the individual charges are summed in an arithmetic unit (not shown in FIG. 2). A total cost is then fed from the arithmetic unit to the displays 212 so that the patron can see the total cost of the postage which he has selected. The logic circuits 208 and 214 continuously update the material presented to the displays 212 Ma fast enough rate so that the displays appear to change instantaneously when the patron changes one of his selections by depressing the selection push buttons 206.
When the patron has completed his selection, he presses a selection complete push button 216. If the customer has properly selected a postal zone and class, as indicated by a ZONE AND CLASS SELECTED signal generated by the logic 208, and AND gate 218 allows a signal generated by the selection complete push button 216 to pass through the gate 218 and to set a flip-flop 220. The output of the flip-flop 220 is called the SELECTION COMPLETE signal. The SELEC- TION COMPLETE signal directly enables a dollar bill accepter 224 and also passes through the OR gate 205 and indirectly enables the coin accepter 201. In addi tion, the SELECTION COMPLETE signal stops the scanning,-arithmetic, and daily totals logic 214 from updating the displays 212 and partially enables an AND gate 222.
The patron now inserts dollar bills into the bill accepter 224 and inserts change into the coin accepter 201. When the change circuits 202 determine that the amount deposited exceeds the amount which is to be charged, the change circuits 202 generate a signal which also partially enables the AND gate 222.
' The patron now has the choice of depressing a push for postage push button 226 or of depressing a cancel and refund button 228. If the patron chooses to push the push for postage push button 226, the AND gate 222 is fully enabled and sets a flip-flop 230. An output of the flip-flop 230 causes the change circuits 202 to give the proper amount of change to the patronthe difference between the cost of the postage and the amount deposited. The same output of the flip-flop 230 also causes an escrow mechanism232, in which the patrons money is stored, to accept the patrons money. Thee flip-flop 230 output also causes the scanning, arithmetic, and daily totals logic 214 to add the costs involved in the transaction to the running total amounts stored within the memory 210 and causes a programmer 234 and the scanning, arithmetic, and daily totals logic 214 to retrieve the costs from the core memory 210, to add printer control information to the costs, and to replace the formatted cost data and printer control instructions within the memory 210. Finally, after a suitable time delay, the flip-flop 230 output energizes a printer logic 236 to retrieve the formatted charge and printer control information from core memory at a slow speed and to sue this information to control the actuation of the system printer. When the printing of postage has been completed, the printer logic 236 generates a signal which passes through two OR gates 238 and 240 to reset all components of the system. The printer mechanism is disclosed in a contemporaneously filed application Ser. No. 213,879 in the names of Charles R. Levesque et al., which application is assigned to the same assignee as the present application and which application is hereby incorporated by reference into the present application.
If the patron chooses to depress the cancel and refund button 228, a signal is generated which passes through an AND gate 242 that is enabled by the absence of a signal at the output of the flip-flop 230 and sets the flip-flop 244. The flip-flop 244 then generates a CANCEL AND REFUND signal. The CANCEL AND REFUND signal causes the escrow 232 to return the patrons money and also passes through the OR gates238 and 240 and resets the system 200. Thee flipflop 244 output signal, after passing through a 'time delay 246 and a one-shot 248, resets the flip-flop 244 and thus is self-terminating.
The core memory 210 has a read/write control 250 which determines whether the memory 210 accepts new data or presentsstored data. The read/write control 250 is driven by a number of the system 200 elements, as is indicated in FIG. 2 and as is explainedmore fully below. In addition, the core memory 210 has address, cycle initiate and data input terminals each of which may be connected to any one of three or four inputs depending upon the setting of a 28-pole, solidstate switch control 252. As in the case of the read/- write control 250, the switch control 252 is placed in differing states by elements of the system 200 as is required.
The discussion which follows is broken into four major sections, and each of the four sections is accompanied by a single figure. The four sections correspond to the four major operations which are carried out by the present invention: The retrieval and the display of, charges are carried out by the logic shown in FIG. 3; the collection of money and the return of change are carried out by the logic shown in FIG. 4', the formatting of charges and control instructions for the printer is carried out by the logic shown in FIG. 5; and the actual control of the printer is carried out by the logic shown in FIG. 6.
The logic elements which participate in retrieving postal charges from the core memory and displaying charges to the patron are shown in FIG. 3. FIG. 3 includes three sections, FIG. 3A, FIG. 3B, and FIG. 3C. The three sections are assembled as indicated in FIG. 7. The push buttons which the patron'actuates, the scales, and the logic used to generate memory address signals corresponding to combinations of parcel weights and push button selections are shown in FIG. 3A. These memory address signals are used to access charges stored in the core memory 210 shown in FIG. 3C under the control of logic control circuitry shown primarily in FIG. 3B. The displays 212 are. shown in FIG. 3C, and the arithmetic logic which sums the charges appears at the center of FIG. 3C.
Eight arrays of mutually resettable push buttons are provided within the system 200. With reference to FIGS. land 3A, the arrays are as follows:
Zone push buttons 302;
Class push buttons 304;
Insurance push buttons 306;
Registered push buttons 308;
Special delivery push buttons 310;
Special handling push buttons 312;
Certified delivery push buttons 314; and
Restricted delivery push buttons 316.
As a means for recording which push button was the last to be depressed within each array, each array of push buttons 302, 304, 306, 308, 310, 312, 314, and 316 is equipped with a corresponding array of reset-set flip-flops 303, 305, 307, 309, 311, 313, 315, and 317 (FIG. 3A). When any push button is depressed, the
corresponding reset-set flip-flop in the corresponding array of flip-flops is also set. The setting of a flip-flop causes a reset control to clear all of the flip-flops associated with other push buttons in the same array. Sometimes the reset control also clears all the flip-flops in an adjacent array as well. Six reset controls 318, 320, 322, 324, 326, and 328 are provided and are interconnected as shown in FIG. 3A. The reset controls contain conventional logic circuitry for supplying a reset pulse to all flip-flops in an array or arrays whenever a single flipflop is locked in the set state by depression of the corresponding push button. Some special services cannot be properly selected simultaneously with other special services, so the reset controls for the special services are designed to prevent redundant selection by cancelling out all selections which are inconsistent with the most recent selection. For example, the reset controls 322 and 324 for the insured and registered arrays of push buttons are interconnected so that only one flip-flop corresponding to one push button in both arrays may be set at any given time. The reset control 326 similarly interconnects the special delivery and special handling push buttons 310 and 312, and the reset control 328 interconnects the certified and restricted delivery push buttons 314 and 316. Only one YES push button in either of these composite arrays may be depressed at any one time. The push buttons are illuminated from the rear by illumination means which are actuated by the corresponding flip-flops. After a push button is depressed, the push button remains illuminated until another selection is made.
The scales 207 and a scale control 330 are connected to an ounce counter 332 and to a pound counter 334 in such a manner that the weight of the parcel placed on the scale 207 is registered on the counters 332 and 334. The counters 332 and 334 are conventional updown counters and are driven by separate up'and down pulse signals supplied by the scale control 330. The
scale control 330 derives the up and down pulse signals from a two-phase pulse signal that is generated by the scales 207. The two-phase pulse signal comprises pulses on two lines which are'out of phase with one another and which represent movements of the scales 207 corresponding to one ounce increments of weight or to any other convenient weight increment. The two-.phase pulse signal may be generated in anyconvenient manner. If the scales 207 have a platform that moves as a load is applied, for example, alternate black and white stripes carried by the platform can be sensed by a pair of photocells, and the photocells may be staggered so as to generate pulse signals that are out-of-phase with one another. The counters 332 and 334 count in the up or in the down direction depending upon the phasing of the two pulse signals and are thus able to follow movements of the scales 207. A suitable scale control module is part no. BC-8l3 and a suitable up-down counter is partno. BC-800, both manufactured by the Tyco Instrument Division, Waltham, Mass.
The display of postage rates to the patron does not begin until the patron has selected a zone and class and until the scales 207 have settled. When these three conditions are fulfilled, an AND gate 338 generates a ZONE AND CLASS SELECTED signal which starts the scanning and arithmetic sections of the invention.
The AND gate 338 is enabled whenever a flip-flop in each of the arrays 303 and 305 is set indicating that a zone and class selection have been made, and when a zero motion detector 336 determines that no more pulses are being generated by the scale control 330. The detector 336 can comprise, for example, a delayed pulse generator that generates a pulse after-a fixed delay interval, but that is re-initiated each time a pulse is given off by the scale control 330.
The display of costs to the patron is initiated by the ZONE AND CLASS SELECTED signal. This signal passes through an AND gate 340 and an OR gate 342 (FIG. 3B) and enables a gate 344 (FIG-.3C) to allow pulses from a high frequency clock 346 to advance serially connected counters 348 and 350. The counter 348 is a decimal counter having 10 outputs which are energized sequentially in response to pulses from the clock 346. The counter 350 is a binary counter which advances one count each time the counter 348 resets itself. The two counters 348 and 350 together generate all the necessary control signals for computing addresses inn accordance with the settings of the push buttons 206 and the scales 207, for retrieving from the core memory 210 the charges stored in the specified addresses, and for presenting the charges to the displays 212.
The counter 348 establishes the basic cycle for accessing the memory 210 and for transferring data from the memory 210 to the displays 212. The steps carried out at each count are indicated in the following table:
set memory to read 1 reset A and B registers 354 and 356 2 enabledata address gate 358 3 initiate core memory cycle 4 enable B register 356 and individual cost display gates 362, 364, 366, and 368 5 enable total cost address gate 374 6 initiate memory cycle 7 enable A register 354 and total cost display gate 8 set memory to write 9 initiate memory cycle.
The above steps carry out the following sequence of operations. First, a read/write flip-flop 352 is set to the read position so that the core memory 210 is adjusted to output data. Two arithmetic registers 354 and 356 are then cleared to zero. A lO-line data address gate 358 is then enabled by a flip-flop 360 and a core memory read cycle is initiated. At this time, the memory address of a desired postal charge is presented by the gate 358 to the address input of the core memory 210. The charge stored in this address therefore appears at the core memory 210 data output. This charge is immediately loaded into the register B (356) and also into one of the displays 212 by a signal which passes through a gate 361 to the register B (356) and which also passes through one of the gates 362, 364, 366, or 368 to one of the displays 212 depending upon which of the displays 212 the charge is to be routed to. The displays 212 each comprises a conventional array of storage flip-flops and an array of neon-filled digital display tubes each of which can display any digit between 0 and 9. The flip-flop 360 is then reset so that a total cost address 370 is passed through data gates 372 and 374 to the address input of the core memory 210. Another memory read cycle is then initiated, and a total cost is entered into the A register 354. This total cost can also be entered into the total cost visual display 3060(FIGS.1 and 3C), but only if a gate 369 is enabled by a scan decoder 378 at a particular setting of the counter 350. A binary coded decimal (BCD) arithmetic unit 376 now calculates the sum of the total cost and the new cost. These costs are presented by the registers A and B (354 and 356). The arithmetic unit 376 pres ents this sum to the data input of the core memory 210. A memory write cycle is then initiated. Since the address input to the core memory 210 is still connected to the total cost address 370, the sum presented by the arithmetic unit 376 is loaded back into the total cost address within the core memory 210. In this manner, costs successively presented at the output of the memory 210 can be summed, and the resultant sum can be presented to the display 3060.
The binary counter 350 determines precisely what event happensduring each complete cycle of the decade counter 348. As the counter 350 advances, addresses of costs are successively extracted from the arrays of push buttons 206 and are modified, where necessary, by the parcel weight as indicated by the counters 332 and 334. During each such cycle, the contents of one core memory location is fed to one of the displays 212 and is also added to a running total of all costs that is maintained in the total cost address within the core memory 210. After the arrays of push buttons have been scanned, another cycle is carried out to retrieve the total cost from the total cost address and to place this total cost into the total cost display 3060. At this time, the scan decoder 378 enables the AND gate 369. A final cycle is then carried out during which zero is loaded into the total cost address. This is a standard cycle in all respects except that the scan decoder 378 disables the two gates 361 and 363 and thus causes zero to be loaded into the registers A and B (354 and 356). The adder 376 adds zero to zero and presents zero to the memory 210 data input during the memory write cycle. Hence, zero is stored in the total cost address. The two counters 348 and 350 then reset to zero count, and the entire procedure is repeated again and again.
The pulse repetition rate of the clock 346 is chosen to be high enough so that the displayed data is updated many times a second, too fast for the eyes to detect any flicker in the displays 212. Insofar as the patron is concerned, each time he depresses a new push button, the displays 212 are updated instantaneously.
The gate 344 is held enabled by a CYCLE COM- PLETE signal generated by the scan decoder 378. This signal passes through gates 376, 340, and 342 in its noninverted form and through the gate 378 in its inverted form to continuously hold the gate 344 enabled. When a patron has completed his selection, he de presses the selection complete push button 216 (FIGS. 1 and 2) and causes the generation of a SELECTION COMPLETE signal (see FIG. 2). The SELECTION COMPLETE signal, in inverted form, disables the AND gate 376 and thus causes the scanning procedure to stop the next time the CYCLE COMPLETE signal is generated by the scan decoder 378. In this manner, the updating of the display continues until the patron depresses the selection complete push button and is ready to deposit his money.
When the patron has finished depositing his money and is ready to receive his postage, he depresses the push for postage push button 226 (FIGS. 1 and 2) which sets a flip-flop 230 (FIGS. 2 and 3B). The flipflop 230 (FIG. 38) causes a one-shot multivibrator to set a flip-flop 380. The flip-flop 380 initiates aspecial cycle of the counters 348 and 350 during which the charges are added to running totals of charges which are maintained in a special running total section of the memory 210. The output signal developed by the flipflop 380 passes through the gates 378 and 342, and enables the gate 344 to pass clock pulses from the clock 346 to the counters 348 and 350. The output signal developed by the flip-flop 380 also disables the gate 372 and enables an alternative array of gates 382 which connect the ten-line gate 347 to the binary output of the counter 350. The gate 382 supplies additional, preset bits to the counter 350 output lines so as to form a complete, ten-line address signal. A single, complete cycle of the counters 348 and 350 is then carried out in exactly the manner heretofore described except that the data charges are now added to the individual running total addresses rather than into a single total cost address. When this cycle has run to completion, the
amount which the patron is charged for each individual service is reflected in the updated running total amount for that particular type of service. The cycle is termiv nated when the scan decoder 378 causes a one-shot 384 to reset the flip-flop 380, thus terminating the signal which enables the gate 344.
A portion of the scan decoder 378 appears in FIG. 3A and is called the scan decoder 378. It is .used to control the extraction of address data from the countcrs 332 and 334 and from the push button, arrays 206. For any given setting of the counter 350 (FIG. 3B), the scan decoder 378' (FIG. 3A) causes a unique address to be applied to'the lO-line address cable entering the lO-line gate 358 (FIG. 3B). This unique address specifies which charge within the core memory 210 is to be retrieved and displayed.
During the first scanning cycle, the charge for basic postage is extracted from the core memory 210. This rate may be dependent upon the weight in ounces or in pounds of the parcel and is also dependent upon the class of service selected, and in some cases upon the zone to which the parcel is to be delivered. The scan decoder 378 causes a gate select logic 3002 to enable either a pound weight gate 3004 or an ounce weight gate 3006. A weight logic circuit 3008 determines which of the two gates 3004 or 3006 is actuated in dependence upon the weight of the parcel in ounces as indicated by the counter 332 and upon the settings of the class push buttons 304. Ounce postal rates are used for first class parcels weighing 13 ounces or less, for air parcel post parcels weighing 7 ounces or less, and for third class parcels weighing less than 16 ounces. In any of these cases, the weight logic 308 causes the weight in ounces to pass through the ounce weight gate 3006 to four of the 10 address lines along with a six-bit preset code generated by a preset encoder 3010. The particular preset code is determined in part by the settings of the class push buttons 304, as indicated. In this way, a unique address is generated for each combination of class and ounce weight. The corresponding postage charges are stored in the designated addresses within the core memory 210.
Pound rates are in effect for first class parcels weighing more than 13 ounces, for air parcel post parcels weighing more than 7 ounces, for third class parcels weighing a pound or more, and for all fourth class pareels. Whenever the class push buttons 304 and the ounce counter 332 indicate that pound rates are to be used, the weight logic 3008 disables the ounce weight gate 3006 and enables in its place the pound weight gate 3004. The pound weight gate 3004 presents to the l0-linc address cable a 10-bit address which may include a binary number representing the weight in pounds, another binary number representing the postal zone, and a final binary number representing the class of postage as indicated by the push buttons 304. In this manner, a unique address within the'core memory 210 is established for every possible combination of pound weight, zone, and class.
The same line from the scan decoder 378' (FIG. 3A) which enables the gate select logic 3002 also enables an AND gate 362 (FIG. 3C) that allows the basic postage charge to be displayed in a basic postage display 3012 when the charge is fed out of the memory 210. The
the memory 210. The total cost address location initially contains zero, as has been explained.
After the basic postage charge has been retrieved from the memory, additional memory retrieval cycles are initiated for each of the six baxic services which are available. In each case, the states of the flip-flops 307, 309, 317 (FIG. 3A) corresponding to the basic service are translated into a digital code by a binary coder 3020, 3022, 3024, 3026, 3028, or 3030 and are passed through the gates 3032, 3034, 3036, 3038, 3040, or 3042 to a number of the lines comprising the IO-line address cable. The remainder of the address cable lines are supplied with a preset code generated by the preset encoder 3010. With the exception of the outputs of the binary coder 3024 and 3026 for special delivery and special handling, this process is uneffected by the weight of the parcel. In the case of special delivery or special handling, a second weight logic 3044 checks the weight in pounds and varies the outputs of the binary encoders 3024 and 3026 in accordance with the weight. This allows the cost of these services to vary with parcel weight. The scandecoder 378' sequentially enables the gates 3032, 3034, 3042 during successive memory scan cycles of the counter 348 (FIG. 3B).
Outputs from the scan decoder 378 (FIG. 3A) are also passed to a visual display logic 3044 which generates signals to enable the AND gates 364, 366, and 368 (FIG. 3C) associated with the displays 3046, 3048, and 3050. Since the displays 3046, 3048, and 3050 can each be used by either of two special services, it is necessary to provide a means for enabling each display only when the service selected by the patron has its corresponding gate 3032, 3034, 3042 enabled. A typical example of the logic which comprises the visual display logic 3044 is shown at 3052. The logic 3052 determines whether an insurance or a registration charge is displayed on the display 3046. If the patron has selected insurance, an INSURANCE SCAN signal from the scan decoder 378 is enabled to pass through gates 3054 and 3056 by an INSURANCE SELECTED signal which is derived from the insurance push buttons 306. If the patron has selected registration, the absence of the INSURANCE SELECTED signal prevents the IN- SURANCE SCAN signal from passing through the gate 3054, but allows a REGISTRATION SCAN signal from the scan decoder 378' to pass through the gates 3058 and 3056 to enable the AND gate 364 (FIG. 3C) at the proper time to load the charge for registration into the display 3046. The other elements of the visual display logic 3044 are essentially identical to the illustrative logic 3052 and are not shown.
After seven complete cycles of the counter 348 (FIG. 3B), charges have been loaded into the displays 3012, 3046, 3048, and 3050 in accordance with the patrons selections. These same charges have also been summed and the sum has been stored in the total cost address within the core memory 210. During an eighth cycle of the counter 348, the contents of the total cost address are retrieved and are stored in the display 3060. This completes the scanning process. The next scanning cycle can begin immediately or after a delay determined by the size of the counter 350 or by other appropriate means. In the preferred embodiment, scans are carried out rapidly enough so that the values displayed by the displays 212 do not flicker and appear to change instantaneously whenever a patron makes a new selection.
The following paragraphs are directed to the money accepting and change making logic shown in FIG. 4. References are also made to other figures occasionally to show how the money accepting and change making logic interacts with other sections of the system 200.
After a patron has completed selecting the postage rate which he desires, he depresses the selection complete push button 216 and begins feeding money into a coin accepter 201 and into a dollar bill accepter 224 (FIGS. 1 and 2). When a patron presses the selection complete push button 216, the total of the charges which he has selected is retrieved from the display 3060 (FIG. 3C) and is loaded into a buffer 402 (FIG. 4) and from thence into a decade counter 404 (FIG. 4). The patron then deposits money until the amount deposited, as indicated by a deposit accumulator 406, equals or exceeds the count in the decade counter 404. A digital comparator 408 carries out this comparison. Each time the patron deposits a coin or a bill, the coin accepter 201 or the bill accepter 224 (FIG. 2) supplies one of four signals to a comparator 410 (FIG. 4). The comparator 410 enables a gate 412 to pass clock pulses to both the deposit accumulator 406 and to a counter 414. When the value stored within the counter 414 equals the amount of money represented by the signal input to the comparator 410, the comparator 410 disables the gate 412 and resets the counter 414 to zero. In this manner, an accurate record of the amount deposited is maintained within the deposit accumulator 406. The total amount of the count within the accumulator 406 is displayed on a credit display 446 (FIG. 1). The display 446 is directly connected to the accumulator 406.
When the amount indicated by the deposit accumulator 406 exceeds the amount stored within the decade counter 404, the comparator 408 sends a signal back to the system 200 control logic. With reference to FIG. 2, this signal is one of the three signals which enables the AND gate 222 to allow the push for postage push button 226 to be actuated. If the patron now depresses the push for postage push button 226, an output of the flip-flop 230 (FIG. 2) is sent back to the change making circuits in FIG. 4 to cause the appropriate amount of change to be returned to the patron. Clock pulses from the control logic are supplied simultaneously to the decade counter 404 and to the change making circuitry which is shown in the right hand portion of FIG. 4. These clock pulses are allowed to continue until the comparator 408 generates a signal indicating that the value stored within the decade counter 404 equals the value stored within the deposit accumulator 406. The signal generated by the comparator 408 causes the control logic to terminate the flow of clock pulses to the change making circuitry. The control logic then generates an ENABLE WHEN CHANGE COUNTED signal which causes solenoids to dispense the proper amount of change to the patron.
The change making circuitry is placed in operation by a single pulse from the control logic. This pulse passes through an OR gate 420 and is presented as data to a shift register 422 having five stages. The first clock or shift pulse loads a first data bit into the first stage of the shift register 422. The control logic pulse also sets a pair of flip-flops or registers 416 and 418 which present second and third data bits to the inputs of the additional shift registers 424 and 428.
The clock pulses generated by the control logic are applied to a shift input of the shift register 422. The clock pulses cause the data bit within the shift register 422 to shift through the register stages and to represent the amount of change which is to be given in pennies. A serial output of the register 422 is passed through the OR gate 420 and back to the serial input of the register 422 so that this first data bit continues to circulate through the shift register 422 always indicating by its position the amount of change which is to be given in pennies.
When the data bit flows to the output or buffer stage of the shift register 422, the data bit is applied as a shift pulse to the second shift register 424. The first time this happens, the register 424 accepts the second data bit from the register 416 through an OR gate 426. The register 416 is simultaneously cleared. Subsequent appearances of the first data bit at the output of the first shift register 422 cause the second data bit to advance and to circulate continuously through the shift register 424 and the OR gate 426. The position of this second data bit indicates the amount of change which is to be given in nickels and in dimes, as is indicated in FIG. 4. In a similar manner, the serial output of the shift register 424 is applied to a third shift register 428. Each time the second data bit circulates fully through the shift register 424, the third data bit is advanced in the registers 418 and 428. The position of the third bit in the shift register 428 then keeps track of the amount of change which is to be given in quarters.
Output signals from the various stages of the shift registers 422, 424, and 428 are applied to enabling inputs of IO solenoid drivers 430 to 439. When the clock pulses have been stopped and the change computation process has run to completion, the solenoid drivers 430 to 439 are enabled by the ENABLE WHEN CHANGE COUNTED signal which comes from the system control logic. The solenoid drivers 430 to 439 which have been enabled by bits in the shift registers 422, 424, and 428 actuate change dispenser solenoids 440 to 449 as is indicated in FIG. 4. In this manner, the proper amount of change is dispensed to the patron.
As an example of how the change making circuitry functions, assume that the total cost of postage is $9.33 and that the count stored in the decade counter 404 (FIG. 4) is 933. Assume that the patron now feeds ten one dollar bills into the bill accepter 224 (FIGS. 1 and 2). As each bill is stored in the escrow 232 (FIG. 2), the comparator 410 is supplied with a 1.00 signal. The comparator 410 enables the gate 412 10 times and allows the counter 414 to count clock pulses 10 times. In this manner, 1,000 clock pulses are supplied to the count input of the deposit accumulator or counter 406. The comparator 408 then generates a DEPOSITS CHARGES signal which enables the AND gate 222 (FIG. 2) and which thus enables the push for postage push button 226 (FIGS. 1 and 2).
When the patron depresses the push for postage push button 226, the change making circuitry is placed in operation. First, a single pulse from the system control logic loads data bits into the registers 416 and 418 and presents a data bit to a data input of the shift register 422. The system control logic then commences to generate clock pulses. These clock pulses are fed into a count input of the decade counter 404 and into a shift input of the shift register 422. The first such clock pulse advances the decade counter 404 to a count of 934 (933 plus I) and also loads a data bit into the first or I cent stage of the shift register 422. If the ENABLE WHEN CHANGE COUNTED signal were generated at this point in time, the signal would pass through the solenoid driver 430 and cause the solenoid 440 to return one cent of change to the patron. Of course, the EN- ABLE WHEN CHANGE COUNTED signal is not generated until the comparator 408 signals that the count stored within the decade counter 404 equals the count stored within the deposit accumulator 406.
The system control logic continues to generate clock pulses. Each such clock pulse increments the decade counter 404 by one count and also shifts the data bit within the shift register 422, thus increasing by one cent the amount of change which will ultimately be returned to the patron. Each time the data bit within the shift register 422 enters the final buffer stage of the register 422, the data bit within the register 416 or within the shift register 424 is advanced, thus replacing four cents worth of change with a nickel, replacing nine cents worth of change with a dime, or performing some similar change substitution. In a similar manner, each time the data bit within the shift register 424 enters the buffer stage of the register,-24 cents worth of change is replaced with a quarter through a shift of the data bit within the register 418 or the shift register 428. In this manner, the amount of change which would be returned in response to the ENABLE WHEN CHANGE COUNTED signal at any given moment always equals the amount which has been added to the count within the decade counter 404.
When the count within the decade counter 404 finally becomes equal-to the count within the deposit accumulator 406, the comparator 408 generates the DEPOSITS=CHARGES signal. This signal causes the control logic to cease generating clock pulses and to generate the ENABLE WHEN CHANGE COUNTED signal. At this point in time, both the counter 404 and the accumulator 406 contain a count of 1,000. Since the initial count within the decade counter 404 was 933, 77 clock pulses were required to advance the counter 404 to a count of 1,000. These 77 clock pulses caused the first data bit within the shift register 422 to recirculate l times and to finally stop in the 2 cent stage of the register 422. The recirculation of this first data bit caused the second data bit to be transferred out of the register 416 and into the shift register 424, and also caused the second data bit to recirculate twice and to finally stop in the buffer stage of the register 424. The recirculation of this second data bit caused the third data bit to be transferred from the register 418 to the 75 cent stage of the shift register 428. Hence, when the ENABLE WHEN CHANGE COUNTED signal is aeutally generated, the solenoid drivers 431 and 439 pass the signal to the three 1 cent solenoids 440 and 44I, and to the three 25 cent solenoids 447, 448, and 449. The patron thus receives $0.77 in change.
The remaining elements shown in FIG. 4 need little in the way of explanation. The logic elements 450, 452, and 456 reset the other logic elements shown in FIG. 4. Resetting is initiated by: 3 MASTER RESET signal that is identical to the RESET signal generated by the I clears the shift registers 422, 424, and 428 in response to the DEPOSITS=CHARGES signal. The deposit accumulator 406 generates a 25 cent signal when the patron has deposited 25 cents or more, and this 25 cent signal is used to set the flip-flop 203 (FIG. 2) and to unlock a door which protects the system scales.
The following paragraphs describe the logical subsystems wich format and which add printer control instructions to the basic charges. These logical subsystems are illustrated in FIG. 5 of the drawings.
After the patron has deposited his money, the patron has a choice of actuating the push for postage push button 226 (FIGS. 1 and 2), thereby commanding the system 200 to print out his postage; or of actuating the cancel and refund push button 228, thereby cancelling out the entire transaction. If the patron chooses to press the push for postage push button 226, the flipflop 230 (FIG. 2) generates signal which passes through a time delay 297 and flows to the system programmer 234. With reference now to FIG. 5, the time delay unit 297 is shown in the lower left-hand corner of the figure. The signal from the flip-flop 230 passes through an AND gate 502and enables a gate 504 to connect a clock 506 to a decade counter 508 that repeatedly and sequentially energizes an array of nine outputs. When the counter 508 energizes the seventh or the ninth output, a signal is generated which passes through an OR gate 510 and advances a binary address counter 512. The counters 508 and 512 together read charges from the core memory 210, format the charges as required by the system printer, and store the charges in a plurality of sequential addresses within the memory 210. Printer control instructions are added to the formatted charges, and the sequential addresses include all the information needed to control the system printer. When the address counter 512 reaches a count of 48, the counter 512 causes an AND gate 514 to reset a flip-flop 516, thus disabling the AND gate 502 and cutting off the flow of clock pulses from the clock 506 to the counters 508 and 512. The flip-flop 516 and the counter 512 are not reset until the entire system 200 is reset by the RESET signal which flows from the OR gate 240 (FIG. 2).
. Before one can gain a full understanding of the circuitry shown in FIGS. 5 and 6, it is necessary for one to have some understanding of the nature of the postage printer unit used in conjunction with the present invention. The printer used in constructing the preferred embodiment of the invention is described in the above identified Levesque et a1. application. In brief, this printer includes: a paper supply having locks and a papercutter; a printing assembly including three numeral or digit printers mounted upon a carriage that is shiftable to two positions, and a drum or symbol printer; a paper takeup mechanism and solenoid; a paper dispenser latch for controlling the patrons access to the printed postage; and a TAKE POSTAGE signal lamp for indicating to the patron when his printed postage is ready. The printer is arrangedso that data from the drum and from the three digit printers may be printed simultaneously as a single line on paper. If more than three digits are to be printed, the three digit printers are shifted laterally on the carriage to a position intermediate their former positions and a second set of three digits are printed. The print drum carries designations as to what the various amounts are for, for example basic postage," special handling,
special delivery, etc., and also bears a representation of the seal of the United States Post Office at one point on its perimeter. The system printer is completely flexible and is controlled entirely by circuitry which is shown in FIG. 6. The control signals for the circuitry in FIG. 6 are generated by the logic which is shown in FIG. 5 and which is the present topic of discussion.
In brief summary, the logic shown in FIG. 5 functions as follows. An instruction encoder 518 generates 4-bit instruction codes under the control of the address generator 512. These instruction codes are stored in sequential addresses within the core memory 210, again under the control of the address generator 512. The instruction codes are read out of the memory 210 at a later time and are used to control the system printer. The printer can print up to three numerals at a time. When numeric data is to be printed by the system printer, up to three 4-bit BCD digits (12 bits total) which are to be printed may be fed into an appropriate core memory address along with a 4-bit instruction code. If more than three numerals are to be printed at a time, the printing must be carried out in two stepsthe first, third, and fifth numerals must be printed first, and the second, fourth, and sixth numerals are printed last as a separate step. Customarily, a multidigit number is extracted from the memory 210 and is placed into a register 520. The even 4-bit numerals of the muIti-digit number are gated through 'a first l2-line gate 522 and into the memory 210 along with a first printer instruction code from the encoder 518, and the odd 4-bit numerals are gated through a second l2-line gate 524 and into the next sequential address within the memory 210 along with a separate instruction code from the encoder 518. In this manner, the even digits are printed first by the numeral printers, and the odd digits are printed separately after the numeral printers have been shifted. The instruction codes cause the printing modules to shift laterally between the printing of the even and odd digits, and the odd digits end up printed in between the adjacent even digits.
The following steps are carried out by the logic shown in FIG. 5. during the time it takes the counter 508 to count from to 9:
0 the memory is set to read 1 the electronic switch control is switched to the number 1 position to access the address lines in FIG. 3
2 a memory read cycle is initiated 3 the 24-line register is enabled to receive the memory output data 4 the electronic switch control is set to position number 2 to access the address generator 512 5 the memory is set to write 6 a memory write cycle is initiated 7 the address counter 512 is advanced by one count 8 a second memory write cycle is initiated '9 the address counter 512 is again advanced by one count.
The above steps usually extract a postal charge from an address within the memory 210 that is specified by the scales 207 and by the push buttons 206 shown in FIG. 3A. This retrieval of data is carried out in exactly the same manner as similar retrievals were carried by the circuitry shown in FIG. 3. The charge passes through a gate 526 and into the 24-line register 520 where the charge is stored. The even digits of the charge pass throughh the gate 522 and are loaded into a first memory location along with an appropriate instruction code from the encoder 518, and the odd digits of the charge pass through the gate 524 and are loaded into the next successive memory location along with another instruction generated by the encoder 518. The gates 522 and 524 are alternatively enabled under the control of the least significant bit of the address generator 512; In this manner, the charge data is formatted and stored in the memory 210 along with the appropriate instructions to the printer for controlling the proper printout of the charge.
In addition to charges, a facility number, the'time and date, and a sequence or transaction number are also placed sequentially into the memory 210-for printout. These data items flow through the gates 528, 530, and 532 under the control of an address decoder 534 that decodes the output of the address generator 512. The address decoder 534 may or may not be identical to the scan decoder 378 shown in FIG. 3A.
The particular instructions which are printed depend in part upon the class of postage which is selected by the patron and also upon the particular special services which are selected by the patron. Class selection information' is passed directly from the flip-flops 305 (FIG. 3A) to the instruction encoder 518 (FIG. 5). The presence or absence of a particular special service is indicated by the contents of the register 520-if the register 520 contains all zeroes,'a"particular service has not been selected. A zero detector 536 generates an appropriate signal for the instruction encoder 518 whenever the register 520 contains zero.
The particular order in which data is loaded into the core memory 210 determines the order which the data is printed out by the system printer. Any desired ordering of the printed data can be achieved. The following table illustrates the ordering of the printed data in the preferred embodiment of the invention. In the table, the left-most number indicates the memory address in which cost data and the instruction code listed to the right are stored. The message is printed by the rotating print drum, except that items enclosed in parenthesis are explanatory remarks which are not printed. If a number sign follows the message, then a series of digits are printed out. A dollar sign indicates that a dollar sign is printed along with numeric data.
TABLE I Memory Address Message Instruction Code 0 (Time and Date) 1 I I g (Rotate Print Drum) 4 3 g (Wavy Line) 0 3 6 SPECIAL HANDLING 8 it: 9 or 4 7 4k 9 or 3 8 SPECIAL DELIVERY 4!: 9 or 4 9 4t: 9 or 3 [0 RESTRICTED DELIVERY 3 4k 9 or 4 11 4t: 9 or 3 I2 CERTIFIED DELIVERY 4s 9 or 4 l3 4k 9 or 3 14 REGISTRATION S as 9 or 4 I5 4; 9 or 3 I6 INSURANCE as 9 or 4 17 as 9 or 3 18 AIR MAIL 0 or 4 l9 3 or 3 20 CLASS 3 1 or 4 21 l or 3 22 BASIC POSTAGE =19. 9 or 4 23 =k 9 or 3 24 (Rotate Print Drum 2 and Advance Paper) 25 3 26 US. POSTAGE 5 Qt 9 27 4k 9 28 (Rotate Print Drum 2 and Advance Paper) 29 3 30 (Rotate Print Drum) 4 3| 3 32 (Rotate Print Drum) 4 33 3 34 (Shield-Sequence Number) 4;, l 35 l 36 (Shield) 37 3 38 (Shield) 0 39 3 40 (Shield) 0 4| 3 42 (Rotate Print Drum 2 and Advance Paper) 43 3 44 (Facility Number) i 1 4s 1 46 (Rotate PrintDrum 2 and Advance Paper) 47 3 48 (Stop) The above sequence of instructions produces a printout of postage such as the one illustrated in the Levesque et al. application. Other sequences may be obtained by repositioning the print elements on the print drum and by using different combinations of instruction codes.
In the above table, wherever a number sign appears without a dollar sign, a series of up to six numbers or symbols may be printed out with no decimal point. This format is used when printing out a class number, a sequence number, the date and the time, or a facility number. The facility number is permanently wired into the machine at a location 554 (FIG. and is obtained through a gate 528. The sequence number is stored in a counter 552 that is incremented each time the circuitry shown in FIG. 5' is placed in operation. The time and date are presented by digital clock circuitry 550 (FIG. 5).
When a number symbol appears above with a dollar sign, the instruction codes cause a decimal point to be printed out along with the numbers and one of the printed characters is a dollar sign symbol. The four numerals comprising the cost in dollars and in cents pass through the l6-line gate 526. A BCD symbol for a dollar sign is supplied by a 4-bit dollar sign code generator 596 that is enabled at appropriate times by the address decoder 534. The decimal point is added between the amount in dollars and the amount in cents by the instruction code 9, as will be explained.
Periodically it is necessary to print out the running totals of all the charges for various types of services. This is done by a supervisory employee having a special postmans key. A printout of this type is initiatedby insertion of the postman's key into the system 200. When the postmun's key is inserted, the key actuates a oneshot or digital timing circuit (not shown) and causes a POSTMANS KEY signal to be generated. With reference to FIG. 3B, the POSTMAN'S KEY signal connects the counter 350 to the first address input of the core memory 210 through the gates 382 and 374. While the gates 382 and 374 are held open, the POST- MANS KEY signal initiates the operation of the format circuitry shown in FIG. 5 by applying a pulse to the start input of the AND gate 502. The POSTMANS KEY signal also supplies a signal to an AND gate 560 and thus causes extra digits to be added to the printout of the basic postage running total. The basic postage running total can overflow the BCD adder 376 (FIG. 3C). To prevent loss of these overflow bits, they are stored in a 4-bit counter 377. When the basic postage running total is printed, these four extra bits are transferred through the gate 558 and into the 24 line register 520 for printout. In this manner, the basic postage running total can run as high as $999.99 without causing a memory overflow. The POSTMANS KEY signal also causes the dollar sign to be shifted four bit positions to the left to make room for an extra digit during the running totals printout.
The remainder of this specification is a detailed discussion of FIG. 6, the printer control logic. This logic retrieves printing instructions from the system memory, interprets the instructions, and causes the printer to carry out the desired operations. 7
After all of the necessary printer control information has been formatted and stored within the core memory 210, program control is transferred to the printer control logic shown in FIG. 6. The printer control logic retrieves the formatted data and printer control instructions, one at a time, from the core memory 210. Numeric or other data which is to be printed is fed directly to print module logical units 602, 604, and 606. The logical units control the settings of the three numeral printers and are of conventional design. The three least significant bits of each 4-bit instruction code are fed to an instruction decoder 608 which control the overall operation of the printer mechanism. The most significant bit in each 4-bit instruction code is the decimal point bit and is fed directly to a decimal point printing solenoid 610 through an AND gate 612.
The printer control logic is placed in operation by a BEGIN PRINT CYCLEcommand which comes from the flip-flop 230 (FIG. 2) through a series of time delays. The BEGIN PRINT CYCLE command is fed into a start logic 614 along with clock pulses. The start logic 614 sets an address counter 616 to zero count. The start logic 614 also supplies pulses. through an OR gate 618 to a print drum drive solenoid 620, causing the solenoid 620 to rotate the print drum 622 to proper starting position. When the drum 622 reaches the proper starting position, the drum 622 generates a DRUM AT POSITION No. 1 signal which causes the start logic 614 to terminate the flow of pulses to the OR gate 618. The start logic 614 unlocks a paper supply lock mechanism 624 and supplies a PERFORM INITIAL CYCLE signal to the instruction decoder 608.
In response to the PERFORM INITIAL CYCLE signal, the instruction decoder 608 generates a memory read cycle pulse and causes the contents of the zeroth core memory 210 address to appear at the data output of the core memory 210, in accordance with the zero setting of the address counter 616. An operation is then carried out in accordance with the instruction code which appears at the memory 210 data output. When the operation has been completely carried out, a RE- CYCLE signal increments the address counter 616 and also causes the instruction decoder 608 to generate another memory read cycle pulse. Another printeroperation is then carriedout in accordance with the contents of the first core memory 210 address. This process con- END OF PRINT CYCLE pulse to the instruction decoder 608 which pulse terminates the printing process. The end of print cycle logic 626 simultaneously actuates an indicia cutter solenoid 628, a paper takeup mechanism 630, a dispenser latch 632, and a take postage signal light 634. The dispenser latch 632 is a latch on the postage and receipt door 636 shown in FIG. 1. When the printing process is completed, the paper supply is locked by the lock 624 and a duplicate printed record of the transaction is rolled up on the paper takeup mechanism 630. A printed receipt for the patron and the actual printed postage is cut from a roll by the indicia cutter solenoid 228 and the take postage signal light 634 (FIG. 1) is illuminated. The instruction decoder 608 finally generates a SYSTEM RESET signal which is supplied to the OR gate 238 (FIG. 2).
The particular operation that is carried out is determined first by the instruction code and secondly by whether the address counter 616 is presenting an odd or an even count. Bit 13 of the instruction code determines whether or not the numeral printers are actuated. If bit 13 equals l," the instruction decoder 608 supplies an enabling signal to an AND gate 636. When all other parts of the printing system (and in particular the numeral printers) are ready, the AND gate 636 supplies a PRINT MODULES pulse to a module 'platten solenoid 638 and simultaneously sends a MOD- ULES HAVE BEEN PRINTED pulse through a pulse former 640 and an OR gate 642 to the RECYCLE input to the instruction decoder 608, thus initiating the next instruction. If bit 13 equals 0, a double RECY- CLE signal comes from a pulse former 644 and appears immediately after the print drum has been indexed. The instruction decoder 608 is then recycled immediately after the print drum is rotated to a new position, and no numeral printing is carried out. By way of further explanation, the module platen solenoid 638 is connected to a platen which is positioned opposite the numeral printers. The paper upon which indicia is to be printed passes between the platen and the numeral printers. The logic elements 602, 604, and 606 cause drive solenoids 603, 605, and 607 to position the circu- I line 650 also actuates a drum print logic 646 which in turn actuates a drum platen solenoid 648. The solenoid 648 drives a platen against the print drum 622 and causes indicia to be transferred from the drum 622 to the paper (not shown) which passes between the drum 622 and the platen.
If bits 13-15 of the instruction code are 010, a line 658 is actuated to cause the drum and paper to be advanced or without any printing taking place. In response to the code 100, the drum is advanced but no printing takes place and the paper is not advanced.
The following is a summary of the various codes to which the instruction decoder 608 may respond:
TABLE II BCD Decimal Address Instruction Equivalent Counter Operation Code 0000 0 Even Advance paper, print drum rotate drum. 0001 1 Even Advance paper, print drum, print numerals, rotate drum. 0001 1 Odd Print numerals only. 0010 2 Even Advance paper, rotate drum. 0011 Y 3 Odd No action. 0100 4 Even Rotate drum. 1001 9 Even Advance paper, print drum, print numerals, rotate drum. 1001 9 Odd Print numerals and print decimal point.
When any instruction code is accompanied by 12 bits of data, the data is routed directly to module logic elements 602, 604, and 606. The module logic elements 602, 604, and 606 actuate the drive solenoids 603, 605, and 607 which rotate the numeral printers from initial starting positions to the desired printing positions. The
lar numeral printers so that the indicia specified by the core memory 210 data output lines are presented to the paper. The actual printing operation is carried out when the module platen solenoid is energized to strike the platen against the numeral printers. No numeral printing occurs until the solenoid 638 is energized. The module logic elements 602, 604, and 606; the drive solenoids 603, 605, and 607; and the numeral printers are of conventional design. The mechanical details of this printing mechanism are shown in the Levesque et al. application.
Since it takes two actuations of the numeral printers to print a single array of six characters, a paper indexing solenoid 654 and a print drum drive solenoid 620 are actuated by a line 650 only during the printout of even addresses. The line 650 is actuated whenever bits l4 and I5 of an instruction code are both 0 and when the address counter 616 is simultaneously at an even count. A signal applied to the line 650 actuates a paper indexer logic 652 and the paper indexer solenoid 654, thus causing the paper to advance one position. A signal applied to the line 650 also actuates a drum indexer logic 656 which supplies 'a triple pulse group through an OR gate 618 to the print drum drive solenoid 620 and thus rotates the print drum 622 one position. The
module logic elements 602 604, and 606 simply count the number of drive solenoid pulses which they produce. When the number of pulses is equal to the fourbit binary number presented by the memory 210 to a given module logic element, the element stops actuating the corresponding drive solenoid and generates a MODULE SET signal which is supplied to the AND gate 636. The MODULE SET signals partially enable the AND gate 636. If the MEMORY BIT 13 l signal is present, then when the module carriage 662 is in the proper position as indicated by a CARRIAGE STOPPED signal, the AND gate 636 generates the PRINT MODULES signal which actuates the module platen solenoid 638 and causes the indicia presented by the numeral printers to be printed upon the paper. The mechanical details of this arrangement are disclosed in the Levesque et al. application. I
The positioning of the numeral printers is controlled by a carriage control and decimal point logic 660. The logic 660 receives from a numeral-printer carriage 662 signals indicating whether the carriage is positioned to the left or to the right. The logic 660 has an input from the least significant bit of the address counter 660 that is called the EVEN ADDRESS signal. When the EVEN ADDRESS signal is present, the logic 660 generates a STEP CARRIAGE signal as needed to shift the carriage 662 in one direction; When the EVEN ADDRESS signal is absent, the logic 650 generates the STEP CARRAIGE signal as needed to shiftthe carriage 662 in the other direction. Operation of the logic 660 is controlled by a START CARRIAGE signal generated by the instruction decoder 608. The decoder 608 thus can save time by suppressing the operation of the logic 660 when no indicia is to be printed out by the numeral printers. When the logic 660 detects that the carriage is properly positioned, the logic 660 generates a CAR- RIAGE STOPPED signal which fully enables the AND gate 636 and allows the module platen solenoid 638 to be energized.
The decimal point printing solenoid 610 is energized by an AND gate 612. The AND gate 612 has three inputs one of which comes from the most significant bit (bit 16) of the instruction code, another of which comes from the least significant bit position of the address counter 616, and the third of which comes from the logic 660. A decimal point is only printed during the printed during the printout of an instruction from an odd address, when the most significant bit of the instruction code is l, and when the logic 660 indicates that the carriage 662 is properly positioned (for convenience, the decimal point printer is mounted upon the carriage 662 in the preferred embodiment of the invention). A
The details of a particular printing mechanism which the logic shown in FIG. 6 is designed to control may be found in the Levesque et al. application. It is to be understood, however, that the logic shown in FIG. 6 could be modified to control the actuation of any type of automated printing mechanism suitable for printing out a postage receipt. 7
While the prefered embodiment of the invention has been described, it will be understood that numerous modifications and changes will occur to those skilled in the art. It is therefore intended by the appended claims to cover all such modifications and changes as come within the true spirit and scope of the invention.
What is claimed as new and desired to be secured by Letters Patent of the United States is:
1. A system for dispensing postage or the like comprising:
a memory containing charge data stored in addresses; a plurality of manually actuatable switches; address code generating means including the manually actuatable switches for generating memory address codes corresponding to the status of the switches; data retrieval means connecting to the address code generating means and to the memory for retrieving charges from the memory addresses whose address codes are generated by the generating means; postage dispensing means connecting to the data retrieval means for dispensing postage as specified by the manually actuated switches at a cost determined-by the charges retrieved from the memory; money accepting means for accepting money and for generating signals indicative of the amount of money accepted; deposit accumulatingmeans connected to these signals for keeping track of the total amount deposited; charge storage means for the charges retrieved from the memory; a comparison means connecting the deposit accumulating means to the storage means for disabling the money accepting means when the amount deposited exceeds the charges;
either said deposit accumulating-means or said charge storage means including a second counter that is initially set to the amount deposited or to the amount of charges, said first and second counters then advancing simultaneously until the amount presented by said second counter is increased from the amount of charges to the amount deposited or is decreased from the amount deposited to the amount of charges. 2. A system for dispensing postage or the like comprising:
a memory containing charge data stored in addresses; a plurality of manually actuatable switches; address code generating means including the manually actuatable switches for generating memory address codes corresponding to the status of the switches; data retrieval means connecting to the address code generating means and to the memory for retrieving charges from the memory addresses whose address codes are generated by the generating means; postage dispensing means connecting to the data retrieval means for dispensing postage as specified by the manually actuated switches at a cost determined by the charges retrieved from the memory, said dispensing means comprising a printer which prints out a postage label including indications of the type of postage in accordance with the state of the manually actuated switches and also the cost of the postage in accordance with the charges retrieved from the system memory, said printer including first means for printing pre-defined indicia, second means for printing characters or numbers in response to receipt of data words containing instruction codes and code representations of the characters or numbers, and third means for printing a decimal point at an appropriate position between the characters or integers under the control of single bit in the instruction code, whereby a multi-bit code designating the decimal point as a character is not required. 3. A system for dispensing postage or the like comprising:
a memory containing charge data stored in addresses; a plurality of manually actuatable switches; address code generating means including the manually actuatable switches for generating memory-address codes corresponding to the status of the switches; digital display means for displaying data; data retrieval means connecting to the address code generating means and to the memory for cyclically retrieving charges from the memory addresses whose address codes are generated by the generating means and for displaying said charges by pres-
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|International Classification||B07C1/00, G07F17/26, G07F17/42, G07F17/00, G07B17/00|
|Cooperative Classification||B07C1/00, G07B2017/0062, G07B2017/00701, G07B2017/00258, G07F17/26, G07B2017/00225, G07B17/00193|
|European Classification||G07F17/26, B07C1/00, G07B17/00E1|