US 3763358 A
A coordinate converter system for high speed and accurate updating of a direction cosine matrix which describes the relative orientation of one orthogonal coordinate frame such as a body frame to another frame such as a stable frame in response to rotations of both frames. The coordinate converter utilizes an interweaved series-parallel-reversal type algorithm that allows simultaneous cosine updating for both the body frame and the stable frame rotation without additional adders, while requiring only three word times for updating for body rotation. The system includes nine DDA dual adders operating in parallel in which the body update computations of the cosine matrix is maintained at full speed and the adders unused by the body frame computations are utilized during each word time to provide the stable frame computations. Because the algorithm updates the cosine matrix in response to both body frame and stable frame rotations with reversing computations when input incremental rotation pulses are received, a high degree of accuracy is provided without undesirable interactions due to the simultaneous processing of body frame and stable frame rotations. Thus the coordinate converter performs simultaneous calculations of the cosine matrix for both the body frame and the stable frame rotations and operates at a fast speed and with a high degree of resolution of the body motion.
Description (OCR text may contain errors)
iJnited States Patent [1 1 Cargille 1 1 Oct. 2, 1973 INTERWEAVED MATRIX UPDATING COORDINATE CONVERTER Donald R. Cargille, 2807 Ocean Front Walk, Venice, Calif. 90291  Filed: Oct. 21, 1971  Appl. No.1 186,870
 US. Cl 235/l50.25, 235/152, 235/164  Int. Cl G06f 15/50, G06f 7/48  Field of Search 235/1502, 150.25,
3,244,862 4/1966 Press at al 235/l50.27
Primary ExaminerEugene G. Botz Assistant Examiner-Jerry Smith AttorneyW. H.. MacAllister, Jr. et al.
 ABSTRACT A coordinate converter system for high speed and accurate updating of a direction cosine matrix which describes the relative orientation of one orthogonal coor- Gyro unit (Shop-down) Accerometer unit (Stropdown) dinate frame such as a body frame to another frame such as a stable frame in response to rotations of both frames. The coordinate converter utilizes an interweaved series-parallel-reversal type algorithm that allows simultaneous cosine updating for both the body frame and the stable frame rotation without additional adders, while requiring only three word times for updating for body rotation. The system includes nine DDA dual adders operating in parallel in which the body update computations of the cosine matrix is maintained at full speed and the adders unused by the body frame computations are utilized during each word time to provide the stable frame computations. Because the algorithm updates the cosine matrix in response to both body frame and stable frame rotations with reversing computations when input incremental rotation pulses are received, a high degree of accuracy is provided without undesirable interactions due to the simultaneous processing of body frame and stable frame rotations. Thus the coordinate converter performs simultaneous calculations of the cosine matrix for both the body frame and the stable frame rotations and operates at a fast speed and with a high degree of resolution of the body motion.
The invention herein described was made in the course of or under a Contract or Subcontract thereunder with the Navy.
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INTERWEAVED MATRIX UPDATING COORDINATE CONVERTER BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to coordinate converter systems and particularly to an improved coordinate converter having a simplified and high speed updating of the cosine matrix in response to rotation of two coordinate frames.
2. Description of the Prior Art Conventional methods for high speed and simplified updating of a cosine matrix in response to rotations of a first or body frame relative to a stable or reference frame when both frames are rotating, such as may be utilized in a coordinate converter for a strap-down inertial navigation system, time shares the two sets of computations. Some computational cycles are devoted to updates due to rotations of body frame while other cycles are reserved for updates due to rotation of the reference frame. Parallel algorithms have been utilized to perform the computations but have been found to be inaccurate and unstable during operation. A series-parallel-reversal algorithm has been utilized for updating the cosine matrix as a function of the body frame rotations only, and has been found to be substantially accurate. In this series-parallel-reversal algorithm, three computation cycles are utilized to process each set of body rotation angular increments so that the maximum body rotation rate (when the rotation increment is limited to the range of three values 0, +q and q) is q/3 radians per computational cycle. A prior art system that utilizes the reversal algorithm and performs updating in response to rotations of two coordinate frames, time shares the computations to accomplish both body frame rotation updating and stable frame rotation updating. Also, variations of this technique may be utilized such as, for example, three successive computation cycles can be devoted to body frame updates followed by three cycles devoted to stable frame updates. Because of the number of computation cycles required to process each set of incremental rotations, these time sharing arrangements result in a substantial reduction in the maximum turning rate that can be accommodated below that of simply updating body frame rotations with the series-parallel-reversal'algorithm. It would be a significant improvement to the art if a highly accurate cosine matrix calculating system were developed for updating in response to rotation of two coordinate systems and that operated with the updating due to body frame rotations being performed at maximum speed and that only required a relatively simple arithmetic unit.
SUMMARY OF THE INVENTION tal. differential analyzers (DDA) is utilized with the speed of calculation of the matrix due to body rotation being at a maximum while the updating due to stable frame rotation is simultaneously performed by otherwise idle DDA Although the cosine matrix updating is in response to simultaneous rotations of both coordinate systems, no undesirable interactions are developed and a high degree of accuracy is provided by the coordinate converter of the invention. I
It is therefore an object of this invention to provide an improved and simplified coordinate converter system. V
It is another object of this invention to provide an improved and simplified strap-down inertial navigation system.
It is a further object of this invention to provide an improved high speed direction cosine transformation computer.
It is a further object of this invention to provide an arrangement for updating a cosine matrix in response to both first and second frame rotations respectively being relatively fast and slow and in which the first frame rate turning capability may be maintained at a maximum value.
It is a still further object of this invention to provide an improved high speed cosine matrix updating calculator using digital differential analyzers.
BRIEF DESCRIPTION OF THE DRAWINGS The novel features of this invention as well as the invention itself, both as to its method of organization and method of operation, will best be understood from the accompanying description, taken in connection with the accompanying drawings, in which like reference characters refer to like parts, and in which:
FIG. 1 is a schematic block diagram of the coordinate converter system operating in a strap-down inertial navigation system in accordance with the invention;
FIGS. 2, 3 and 4 are coordinate vector diagrams showing the relationships of the axes of the first and second coordinate frames computed by the coordinate converter in accordance with the invention;
FIG. 5 is a schematic flow graph of a network 0 nodes and directed branches of a series-parallelreversal algorithm that is utilized for explaining the system of the invention;
FIG. 6 is a schematic diagram of a network of nodes and directed branches for a prior art system which times shares the computations of the series-parallelreversal algorithm to accomplish both frame rotation updating and stable or reference frame rotation updating;
FIG. 7 is a schematic diagram of a network of nodes and directed branches of the interweaved matrix updating algorithm in accordance with the principles of the invention;
FIG. 8 is a schematic network of nodes and direction branches of the interweaved matrix updating algorithm in accordance with the invention responding to a constant source of input rotational pulses for explaining the reversal operation of the stable or reference frame updating;
FIG. 9 is a schematic timing diagram for explaining the body frame rotation of the series-parallel-reversal algorithm;
FIG. 10 is a schematic timing diagram showing the stable frame rotations of the series-parallel-reversal algorithm for explaining the operation of the system in accordance with the invention;
FIG. 11 is a schematic timing diagram of the bit or clock times of a word time for further explaining the serial operations of each of the digital differential analyzers;
FIG. 12 is a schematic block diagram of a typical digital differential analyzer adder utilized in the cosine matrix calculator of FIG. 1 in accordance with the invention;
FIG. 13 is a schematic block diagram of the R adder cell of the digital differential analyzer of FIG. 12 for further explaining the operation thereof;
FIG. 14 is a schematic block diagram ofa timing unit that may be utilized in the system of FIG. 1 for developing 13,, B and B signals to the digital differential analyzer of FIG. 12;
FIG. 15 is a schematic block diagram of a timing unit that may be utilized in the system of FIG. 1 for developing 8,, S and S signals to control the digital differential analyzer of FIG. 1;
FIG. 16 is a schematic diagram of the multiplex unit of FIG. 13 for further explaining the operation ofa typical digital differential adder;
FIG. 17 is a schematic diagram of the Y register and the R register for further explaining the operation of the digital differential analyzer of FIG. 12;
FIG. 18 is a schematic block diagram of a Y adder cell of the digital differential analyzer of FIG. 12 for further explaining the operation thereof;
FIG. 19 is a table with time shown along the horizontal axis for further explaining the reversal operations of the body and stable frame updating cycles;
FIG. 20 is a schematic diagram of a curve of iterations versus amplitude showing the direction cosines provided by a simulated calculation in accordance with the system of the invention in which the gyro or body frame inputs are limit cycled on all three axes and the stable frame inputs consist of continuous rotations about all three axes; and
FIG. 21 is a schematic diagram of curves of iterations versus amplitude showing the difference between the direction cosines of FIG. 20 and a simulated result without gyro inputs for explaining the error provided by the simulation of the system of the invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT Referring first to FIG. 1, which shows coordinate conversion in accordance with the invention operating with a strap-down inertial navigation system, a coordinate converter 10 is provided which may include digital differential analyzer (DDA) adders C C C C C C C C and C Supplying signals to the coordinate converter 10 is a gyro unit 14 including gyro B gyro B and gyro B and an accelerometer unit 16 including accelerometer B accelerometer B and accelerometer B each of the gyros and accelerometers being strapped down along the coordinate axis of the vehicle indicated at 18. The gyro unit 14 supplies incremental body frame rotation signals A0,, A0, and A0, in the form of pulses such as shown by a waveform 11, on respectively and composite leads l3 and 15, to the converter 10. The acceleration unit 16 supplies incremental acceleration signals A(B, A(B and A(B in the form of pulses on respective and composite leads 17 and 19 to an acceleration transformer or calculator 21. The coordinate converter 10 provides an updated cosine matrix as signals on a composite lead 20, which signals are applied to a suitable guidance or navigation computer 22, the latter providing incremental stable frame rotation pulse signals AIfi, AI' and AI on a composite lead 24 which is coupled to the coordinate converter 10. The incremental stable frame rotation signals indicated by a pulse of a waveform 25 may be calculated in a conventional manner and may represent the variation of a stable platform position from the horizontal at different latitudes and longitudes on the earths surface, for example. Each pulse from the gyro unit 14 or from the computer 22 on the lead 24 represents one quantum of rotation or 2" radians. The computer 22 also applies address signals on a composite lead 28 to the coordinate converter 10 as well as to the acceleration transformer 21. Any suitable type adders such as three DDA dual adders, for example, may be utilized in the acceleration transformer 21. Updated cosine signals are received by the transformer 21 from the converter 10 on a composite lead 37 and updated acceleration vector components A(S A(S and A(S are provided on a composite lead 36, which signals are applied to the computer 22. A clock and timing source 44 applies signals both to the coordinate converter 10 and to the transformer 21 for controlling the adding computations and the overall timing operation thereof with clock signals and B and S timing signals. The computer 22 applies control signals through composite leads such as 46 to servos such as 48 for controlling the aerodynamic surfaces such as 50. It is to be noted that the computer may also apply control signals to other units such as displays in manned aircraft systems.
The first operation of any inertial navigation guidance system is to measure vehicle acceleration which is a vector quantity and is resolved into three mutually perpendicular components directed along the axis of a computational reference frame. In a practical inertial system the orientation of this reference frame must be independent of the vehicle rotations. In conventional inertial systems, mutually perpendicular accelerometers are mounted on a platform which is isolated from the vehicle rotations by a set of mechanical gimbals. Gyroscopes capable of sensing platform axis rotations are mounted with the accelerometers. It is therefore possible to maintain the platform at a known orientation in space. 'Because the platform orientation is fixed in space, an inertial computation reference frame results. If the platform is rotated so as to keep one axis aligned with a local vertical, a local computational reference frame is obtained. In a strap-down inertial system the mechanical gimbals are eliminated and the accelerometer and gyro triads are mounted directly on the vehicle body. Acceleration is sensed on the body frame axis and a coordinate converter is used to provide signals to transform the acceleration signals from the body reference frame to the computational or stable reference frame and to account for undesired changes in orientation of the stable frame coordinates. It is to be noted that although the coordinate converter is illustrated in a strap-down guidance or navigation system, the concepts of the coordinate converter of the invention are applicable to other types of systems.
Referring now to the coordinate frame diagrams of FIGS. 2, 3 and 4, three accelerometers 50, 52 and 53 and three gyros 56, 58 and 60 are respectively aligned with the three orthogonal body frame axes B B 42 and B with each body frame axis forming an angle d; with the first reference or stable axis S, in FIG. 2. Angles between the body frame axes and the other two reference frame or stable axes S and S are shown in respective FIGS. 3 and 4 with the corresponding angles indicated between each body frame axis and the reference or stable frame axis. FIGS. 2, 3 and 4 show two orthogonal or cartesian coordinate systems with which the updating algorithm operates in accordance with the invention. The rotations around each body frame axis B B and H is respectively shown as A0,, A0 and A0,, and the rotations around each stable frame axis S S A2 and S is respectively shown as AI',, MP and N15. Abbreviating cosine d) where I is a row and J is a column of the cosine matrix, as C the following transformation equations may be written of the acceleration vector component along axis 8,, as A(S,,,), along the axis S as A(S,, and along axis S as A(S,, in a single matrix equation:
M M M which is the direction cosine matrix.
A [C] A, where A;
The spatial relationship between two orthogonal coordinate systems, referred to as the body frame and the stable frame, can be represented by a nine element direction cosine matrix. If one or both of the two coordinate frames is rotating with respect to inertial space, the cosine matrix will become a function of this rotation; The differential equation describing this situation is given below:
l ll l where u 1: 1: [C] C" C C The direction cosine matnx al C3! C33 l The DDA adders can be used in accordance'with the v invention to compute approximate solutions to this equation using the incremental rotation variables AQ. and AW.
Referring now to FIG. 5, a signal flow graph is shown of nodes and directive branches of the series-parallel reversal algorithm that is utilized in the system of the invention. The nodes of the graph represent system variables at specific times and the branches along which signals flow unilaterally represents transmittances. The nodes are direction cosines and the branch transmittances are either the incremental rotation variables AO, which is the body rotation, AI which is the reference axis rotation or unity. A signal at the origin of a branch is multiplied by the transmittance and delivered to the terminal node and at each node, all signals from incoming branches are summed algebraically to yield the total signal for that node. The sum is transmitted along each outgoing branch. For purposes of this description the following conventions will be observed:
l. Branches will always terminate to the right of the origins.
2. Nodes representing the values of the direction cosines at a particular point in time, that is, the start of a computation cycle, will be arrayed in a vertical column. Thus the left to right succession of vertical columns or of nodes will represent cosine values at the start of successive computation cycles.
3. Nodes representing values of the same direction cosine at successive points in time will array in a horizontal row with the cosine label at the left end of the row.
4. Branch transmittances are given above each branch.
The graph of FIG. 5 represents the forward and the reverse cycle of the series-parallel-reversal algorithm for updating the cosine matrix as a function of the body frame rotations. As can be seen in the timing diagram of FIG. 9, a forward cycle or iteration which is one body frame update is performed in three word times and the reverse cycle or iteration which also is one body frame update is performed in three subsequent word times. Thus, three computational cycles are required to process each set of body rotation angular increments A0, and the maximum body rotation rate that can be accommodated is q/3 radians per computation cycle where the range of both sets of variables A0, and MI, is confined to three values: 0, +q and q. It is to be noted that the reversing sequence of this algorithm is 13,, B 3,, B B 8,, 8,, B and B continuing in that order. The timing signals 8,, B and 3,, correspond to updating body axes B B and B Thus, three word times are required to update the direction cosine matrix with the series-parallel-reversal algorithm and the equations are executed in the order given for the first gyro pulse received and for each additional update the order is successively reversed, when input signals .are
.received from the gyros. The series-parallel-reversal algorithm executes the update equations in a given order for the first gyropulse received and for each additional update, the order issuccessively reversed.
i ikm i ikvs IkHS (DA where [C] is the direction cosine matrix and k is the word time.
A0, A0, o, 0 0 0 0 o 0 Q, 0 o 0 -A0.A0. o
It is to be noted that the above equations correlate during each successive word time with the diagram of FIG. 5.
Referring now to FIG. 6, a prior art algorithm is shown that time shares computations to accomplish updating of the cosine matrix in response to both body frame rotations and stable frame rotations. The common feature in this arrangement is that branch transmittances between any successive pair of node columns are all of the same variable type, either A0, or AI',. As a result, six computation cycles are required to process each set of A0 and AW signals and there is a 50% reduction in the maximum turning rate that can be accommodated relative to the amount available in the algorithm of FIG. responding only to body rotations.
Referring now to FIG. 7, a computational algorithm is shown in accordance with the principles of the invention, which includes simultaneous processing of both body frame rotation increments and stable frame rotation increments. Because the number of incoming branches to any node cannot exceed two if undue complexity of the computational units is to be avoided, the updating computer is implemented with arithmetic units capable of forming the sum of only two numbers at once. The interweaved sequence of branches in the graph is in accord with the series-parallel-reversal algorithm for both body frame (A0,, A0 A0 and stable frame (A I',, AI' and MP rotations. Referring also to FIGS. 9 and 10, three computational cycles are required to process one set of A0, variables so that the maximum body frame turning rate capability of FIG. 5 (q/3 radians per computation of cycle) is maintained. Nine cycles are required to process one set of A1, variables for a maximum stable frame turning rate q/9 radians per computation cycle. It is to be noted that in applications involving vehicle attitude determination, the stable frame rate rotation rates are typically hundreds times lower than the body frame rotation rates. Because for the body updating calculations, only six nodes or adders are required, two of the unused adders or nodes can be used by the stable update calculation requirements, with one adder being left idle during each word period time. In the first stable frame update cycle as shown in FIG. 10 having three body frame update cycles, a word time sequence 8,, B B B 8,, B,, B,, 8,, B, is provided for the stable frame updated periods 8,, S and 8,. Because FIG. 7 shows only a first stable frame update cycle, reference is now made to FIG. 8 which shows both a first stable frame update or forward iteration periods 8,, S, and 8, followed by the second stable frame update or reverse iteration periods 8,, S, and 8,. Thus the interweaved updating reversal algorithm continues with both the body frame and the stable frame updating being performed simultaneously with both computations following that algorithm.
The normal series-parallel-reversal algorithm sequence is that for all of the three rows of the matrix, the second and third cosines are first updated, the first and third cosines are next updated and the first and second cosines are thenupdated followed by a reversal starting with updating the first and second cosines. For the normal stable frame update, this series-parallel-reversal algorithm sequence is that a computation is applied sequentially to each column of the matrix so that the second and third cosines are updated for the first column, C and C followed by the second column and in turn followed by the third column. The first and third cosines are then updated for each of the three columns in a reverse sequence of third column, second column and first column sequentially followed by a reversal starting with updating the first and second consines in the first column. Thus the stable frame updating of three cosines of each column has a similar sequence but performed sequentially in time on each column. It is to be noted that the time delays between the steps does not affect the accuracy. The rows of the cosine matrix represent the cosines of the angles of each coordinate body axis relative to one stable axis and the columns of the cosine matrix represent the cosines of the angle of the same body axis relative to each of the,three stable coordinate axes. For the stable frame update when a A0 pulse is not received, the reversal may vary from that shown because the stable frame cosine column sequence is a function of the body frame reversals, only reversing when the body frame updates reverse. The body frame sequence of two rows each body frame update period is only reversed when a gyro update signal A0 is received.
The diagram of FIG. 1 1 shows the serial bit timing for each word for body frame and stable frame rotation updating as performed by the DDA adder units. One bit at the beginning of each word time is reserved for multiplex switching and the word is always followed by a sign bit timing signal of a waveform 97, thus utilizing a sixteen bit register for storage of the word as will be explained relative to FIG. 12. In the illustrated word length a gyro quantum size can be 2 radians, which in some arrangements provides sufficient resolution of the rotation angle. The sign bit timing signal of the waveform 97 and a scale bit timing signal of a waveform 99 are provided by a clock circuit (not shown) in the clock and timing unit 44 of FIG. 1. A multiplex switching timing signal of a waveform 101 is provided by a delay in the DDA unit.
Referring now to FIG. 12, which represents a typical one of the cosine matrix adder elements of the coordinate converter 10 of FIG. 1, a similar digital differential analyzer, except for the input and output connections, is provided for each adder element in accordance with the invention. Each of the nine elements of the cosine matrix includes a multiplexed R adder and a Y adder 102 with a typical cosine matrix adder element corresponding to the I" row and the 1" column of the matrix being illustrated in FIG. 12. The indexes I and J each have a range of 1, 2 and 3 in a ring to provide a modulo count of three. The input terms to the R adder 100 includes S S B and B which are respectively designated S S 8,, B in the DDA adder unit 100, and which are timing signals from the timing source 44 of FIGS. 1, 14 and 15. If, for example, I and J are respectively 2 and 3, S S B and B are respectively 8,, S,, B, and B Signals C C C m and C are the cosine matrix signals stored in the other adders and are respectively desig nated YAX,, YAX YAX and YAX in the DDA unit 100. If, for example, I and J are 2 and 3, C C mu) and u+2.n are respectively 21 22 as and 13- These above cosine values are the stored cosine angle terms from other adder units required to update this particular cosine matrix. Body rotation signal increments or pulses applied to the R adder 100 are 110 A -A0 and +A0 respectively indicated in the DDA unit as +AX AX -AX, and AX which for I and J of 2 and 3, for example, would be +A0 A0,, A0 and +130 The other signals into the R adder 100 are 'u+2h (l+l)1 'uni and uu) respectively indicated in the R adder as +AX +AX,,, AX and AX.,. Another input to the R adder 100 is the sign timing bit term of the waveform 97 (FIG. 11). The R adder 100 outputs the overflow terms as +AZ and AZ and the Y adder 102 receives these terms which are converted to the respective terms AY and -AY. Also, the Y adder 102 receives a sign bit, a scale bit and an address of C from the computer and develops the updated cosine value term C which may be transferred directly out or as the multiplex or MUX output signal. [fl and J are 2 and 3, then C is the cosine matrix term C All of the nine DDA adders are wired by following the above-described symbology. Referring now also to FIG. 13, the R adder cell 100 in cludes multiplex driver unit 108 having four output lines for applying timing signals to multiplex units 110, 112 and 114, each having four inputs. As will be explained relative to FIG. 16, the timing signals effectively connect an output lead 116 to one of the four cosine input terminals, depending on the step of the up date sequence. The units 112 and 114 have switching arrangements similar to the unit 110 and have respective output leads 118 and 120 which transfer the incremental rotation terms. An R adder 122 which may be a conventional binary full adder responsive to two input terms as is well known in the art, is coupled to input leads 116, 118 and 120 for receiving the signals AX and AX which command the adder to add or subtract the term YAX to the contents of an R shift register 132, which register may have flip flops. As the cosine term is either added or subtracted to the cosine value YAX utilizing a carry term from a carry flip flop 126, the limit of the word lengths causes either an overflow term to be applied to a lead 128 or an underflow signal to be applied to a lead 130. The sum provided by the adder 122 is stored in the R register shift register 132 and is utilized in the adder each serial arithmetic time which includes 16 clock times. An overflow store flip flop 140 is coupled to the lead 128 to apply the signal A2 to its output terminal in response to an adder overflow at sign bit time of waveform 97 (FIG. 11) and an underflow store flip flop 142 is coupled to the lead 130 to apply a signal -Az to its output lead in response to an adder underflow at sign bit time. As can be seen in FIGS. 9 and 10, the A0 pulses which may be expended in the gyro unit has a duration of 3 word times and the A? pulses which may be expanded in the computer 22 (FIG. 1) has a duration of 9 word times. The sign bit also provides timing in the R adder 122 to suppress the carry bit at sign bit time and at multiplex time as provided by the delay flip flop 119. Clock pulses are utilized as required in the adder and in the R register.
Referring now also to FIGS. 14 and 15 which respectively show the A0 or A? timing circuits, the timing unit 44 (FIG. 1) will be further explained. An OR gate 117 or 119 respectively responds to any A0 or A? input signals from the gyro or from the navigation computer to meet the condition of the series-parallel-reversal algorithm, that reversal only occurs when an input rotational pulse'is received from the gyros or the computer. The circuit of FIG. 14 develops the B B and B and BZ timingsignals and the circuit of FIG. 15 develops the S S and S timing signals, similar circuits being used for both. The OR gates 117 or 119 apply a signal to a flip flop 121 which changes to its opposite state to reverse the sequence of calculation by applying signals to forward NAND gates 123 and 125 or reverse NAND gates 127 and 129, also controlled by the output of a 3 flip flop circuit 131 responding to either the sign timing bit or a B2 timing signal of a waveform 133 of FIG. 10. The circuit 131 sequentially develops the states 100, 010 and 001, starting over in a ring counter fashion. Connecting the signals from the circuit 131 through the NAND gates provides the output timing signals B B and B or 8,, S and S each having either a forward or reverse sequence. For the unit of FIG. 15 developing the signals 8,, S and S the sign bit is replaced by BZ as shown by the waveform 133 of FIG. 10, so as to control the counter 131 and the NAND gates 123 and 125 so the counting is performed only once during each body frame update. NAND gates 137 and 139 are respectively provided at the outputs of gates 123 and 127 and gates 125 and 129.
Referring to the multiplex unit of FIG. 16, the signals 8,, and B energize respective FET gates coupled to receive the YAX, +AX, and AX and signals YAX +AX and AX so that for two thirds of the time each adder updates in response to body rotations. The signals S and S are applied through inverters 161 and 163 and through respective NOR gates and 157 along with the signal 3,, and B,, so that for two-ninths of the time, each adder performs updating in response to stable frame rotation. The NOR gates 155 and 157 respectively control FET gates to pass the signals YAX +AX and AX and signals YAX,, +AX and AX.,. A NOR gate 159 having a normally false output responds to the signals S,,, 8,, B and B all going false to provide a true output and inactivate all of the FET gates. The NOR gate 159 assures that each DDA adder is inactive one-ninth of the time. The NOR gates 155 and 157 have atrue output only when 3,, and B are false and S and S are true. For any specific adder, the S S B,, and B signals determine the specific adders that are operative for body and for stable frame updating during each frame and the order of row updating is determinedby the B B, and B signals that are wired to that specific adder, the sequence of these signals being determined by the circuit of FIG. 14. For example, if B, and B, are the B and B signals each specific adder is operative at a word time so that a first sequence of rows is provided for a selected sequence of the circuit of FIG. 14, and if B and B are the B and B signals, a second sequence of rows is provided in response to the selected sequence of the circuit of FIG. 14. For stable frame updating at the adders, the cosine column sequence within a body frame update period is reversible only in response to reverses of the body frame sequence of the other adders (reversal of B,, B B sequence). This reversing provides for use of idle adders to perform stable updating at maximum speed in accordance with the invention. The adders are each connected so that the adders representing cosines of unused columns from the body updating are operative in response to the timing signals at each word time to be used for the stable frame updating.
Referring now to FIGS. 17 and 18 as well as to FIG. 13, the R register 132 applies overflow signals +AY and AY to the Y adder cell 102, for storage after passing through a Y adder 148, in a Y register or shift register 154. The Y adder cell 148 which may be a conventional full binary adder as is well known in the art is responsive to the overflow terms +AY and AY for controlling the adding of a scale signal to the contents of the shift register 154. As can be seen in FIG. 11, a scale bit of the waveform 99 is generated in the clock and timing unit each word time and has a weight of 2*" which is the same as the gyro quantum size. The Y adder 148 includes a carry flip flop 150 and receives a sign timing bit on a lead 152 as well as the output of the shift register 154. The output from the Y adder, which is a serial two input term adder, is applied to a multiplex unit 156 controlled by an address decoder 158 which may receive addresses from the computer 22 (FIG. 1), and is applied through a multiplexing gate 160 to an output lead 162. The output signal after 16 bit times is the updated cosine term C and is on the output lead 163 as well as the lead 162. As is well known in the art, the cosine number in the shift register 154 accumulates the increments from the R adder and the sum is applied to the lead 162. As explained relative to FIG. 11, sixteen clock periods are required for each of the serial adder operations to form the entire 14 bit word. As can be seen in FIG. 17, the R register 132 overflow is accumulated in the Y register 154 with the accumulated sum being applied to the lead 159 and the switch 160 to the output lead 162. The address decoder 158 is controlled by the sign bit after a one bit delay to select addressed DDA adders. For initial loading of the 16 flip flop R register 154, a data bus 161 applies data from the computer to the multiplex unit 154. Clock pulsesare utilized in the Y adder 148 and in the registers to control the serial operation. The sign timing bit of the waveform 97 (FIG. 11) controls the Y adder to suppress the carry bit at sign bit time. The operation of the DDA adders will not be explained in further detail as their operation is well known in the art such as in a book, The Digital Differential Analyzer, edited by T. R. H. Sizer, published by Chapman and Hall Ltd., 11 New Fetter Lane, London EC 4, 1968.
Referring now to FIG. 19, the sequence reversals will be explained in further detail. An example of a typical body frame update sequence is shown in a first line 171 having a forward, reverse, reverse, forward, forward and reverse sequence as an illustrative example. It is to be noted that the sequence of FIG. 19 is different than the normal reversal sequence of FIGS. 7 and 8. The third and the fifth body frame update sequences are without an algorithm reversal because of the absence of any gyro input A pulses. The sequence for each body frame period updates in each row of the cosine matrix, cosines which are defined by columns 2 and 3, 1 and 3, and l and 2 of the cosine matrix for a forward direction and columns 1 and 2, 1 and 3 and 2 and 3 of the cosine matrix for a reverse direction. The stable frame updating sequence is shown by a line 173 in which during the S, period of the first stable frame update period, columns 1, 2 and 3 are updated for rows 2 and 3, during the S period columns 3, 2 and 1 are updated for rows 1 and 3, and during the 8;, period, columns 3, 2 and l are updated for rows 1 and 2. For the S period of the first stable frame update, the column sequence did not reverse because the body frame update sequence did not reverse. For the second stable frame update sequence, which is reversed in response to a P signal, the sequence of columns 1, 2 and 3 are updated, during the S period the columns 1, 2 and 3 are updated and during the S, period the columns 3, 2 and 1 are updated. Because the body frame sequence of the S period of the second stable frame was not reversed, the stable frame update column sequence was not reversed. The sequence continues in a similar manner with the stable frame column sequence being solely a function of the body frame reversal. The stable frame 8,, S and 8;, sequence is a function of only the AW signals representing axis rotation. The body frame sequence is a function of only the gyro A0input signals. The spare adders availability requires that this reversal of the columns in the stable frame update as a function of the body frame reversal, be performed. The adders representing an unused column of the cosine matrix being updated by the body update adders are timed to be used for the stable frame update. Only by reversing the order of the columns to be opposite and to remain opposite to that of the body updating rows, will unused adders be always available for computation. The timing inputs into the adders (FIG. 12) is such that the column sequence is opposite for the stable and body updates and the opposite state remains in response to the reversing timing signals of FIG. 14.
Referring now to FIG. 20, a computer simulation was run of the cosine matrix updating system in accordance with the invention for direction cosines C,,, C and C, with the body axis having limit cycling and the stable axes having monitonic turning. The limit cycled gyro inputs A0 are +1, l, +1, -1, +1, etc. and the stable frame inputs are +1, +1, +1, etc. A second computer simulation was also run similar to that of FIG. 20, except without a gyro input so that A0, A0, A0,, 0. The stable frame input signals were the same as those of FIG. 18. The difference between the two results was then plotted. The simulation was run with a gyro quantum of 2 radians per pulse. Curves 180, 182 and 184 were plotted at the computer output for the run with the gyro inputs and the stable frame inputs for the number of iterations shown.
Referring now to FIG. 21, a curve is shown for the three cosines C,,, C,,, and C,;, for limit cycling of the body frame plus stable frame rate of FIG. 20 minus the cosines for stable frame rotation alone (not shown) to give the difference due to body limit cycles. It was found as shown by the curves generally indicated as 188 that difference or error was a maximum of two quanta of a gyro pulse, thus indicating that the reversal algorithm with simultaneous updating provides a highly accurate system.
A cosine matrix is orthogonal, that is, the product of the matrix and its transpose (rows and columns interchanged) is equalto the identity matrix. When the matrix is partially updated, this orthogonality condition changes which leads to the possibility'of undesirable interactions between body frame and stable frame updates. However, any errors introduced in this way are apparently cancelled by the algorithm reversals as the