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Publication numberUS3783384 A
Publication typeGrant
Publication dateJan 1, 1974
Filing dateJan 31, 1972
Priority dateSep 29, 1969
Publication numberUS 3783384 A, US 3783384A, US-A-3783384, US3783384 A, US3783384A
InventorsK Wycoff
Original AssigneeK Wycoff
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
High speed selective calling communication system having low drain receiver
US 3783384 A
Abstract
The system includes a transmitter which sequentially transmits a multiplicity of code signals each having a cue tone and a predetermined number of control tones, the code signals being arranged into a plurality of signal groups for sequential transmission thereof, the number of signal groups corresponding to the number of cue tone frequencies, each signal group containing all those code signals which include the corresponding cue tone of that group. The system also comprises at least one receiver including a pulser circuit for producing a series of pulses intermittently to render a signal processing circuit operative, a decoder responsive to a predetermined cue tone for generating a first control signal and responsive to a predetermined code signal for generating a second control signal, the pulser circuit being responsive to the first control signal to furnish a continuous supply voltage to the processing circuit, a utilization circuit responsive to the second control signal to cause an annunciator to provide an alerting signal.
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United States Patent Wycoff Jan. 1, 1974 HIGH SPEED SELECTIVE CALLING COMMUNICATION SYSTEM HAVING LOW DRAIN RECEIVER Inventor: Keith H. Wycoff, PO. Box 308,

Lexington, Nebr. 68850 Filed: Jan. 31, 1972 Appl. No; 222,146

Related U.S. Application Data Primary Examiner-Albert J. Mayer AtlorneyDa"vid A. Vogel [5 7] ABSTRACT The system includes a transmitter which sequentially transmits a multiplicity of code signals each having a cue tone and a predetermined number of control tones, the code signals being arranged into a plurality of signal groups for sequential transmission thereof,

[63] Continuation-impart of Ser. No. 861,719, Sept. 29,

I969,Pm, No, 3,651 413, the number of signal groups corresponding to the number of cue tone frequencies, each signal group 52 us. Cl 325/55, 325/64, 325/492, containing all these ecde signals which include the 340/309 1 340/31 corresponding cue tone of that group. The system also [51] Int. Cl. H04b 1/00 comprises at least one receiver including a pulser r- [58] Field of Search 325/55. 64, 391, cuit for producing a Series of pulses intermittently 10 325/392, 395, 478, 492; 340/31 1, 309,1 render a signal processing circuit operative, a decoder responsive to a predetermined cue tone for generating [56] References Cit d a first control signal and responsive to a predeter- UNITED STATES PATENTS mined code signal for generating a second control sig- 3,140,468 7/1964 Blaisdell et al. 325/64 6 h pulser being rsponswe to the first 3 492 577 H1970 Reiter 325/55 trol signal to furnish a continuous supply voltage to 3,1972 the processing circuit, a utilization circuit responsive 3.55135 12/1970 Barman 325/64 to the second control signal to cause an annunciator 3,378,817 4/1968 vm 325 64 to Provide an alerting Signal- 3,5l(),777 5/1970 Gordon 325/64 3,648,174 3/|972 Fukata 325/64 30 Clalmsi 12 Drawl'lg Flgul'es 4o 4 SEQUENTIAL SWITCH CLOCK 42 46a 46bl 46 46d W in Hii RA\lDOM ACCESS MEfIEAIOERCYTCLJFIQHT 47b 49? 4115 4 5 4'": 47 47c 47d 57.; l 47 1 97 47d. (c r, :i): =3 .6

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Pmsmmm 14 u t T L Q HIGH SPEED SELECTIVE CALLING COMMUNICATION SYSTEM HAVING LOW DRAIN RECEIVER This application is a continuation in part of the copending application of Keith H. Wycoff, for COMMU- NICATION RECEIVER INCORPORATING TONE OPERATED PULSER CIRCUIT ANDELECTRONIC u.s. Pat. No. 3,651,413.

This invention relates to selective calling communications systems in general and more particularly to a system capable of high-speed code transmission utilizing low drain receivers.

It is an important object of the present invention to increase the number of code signals which can be transmitted and received in a selective calling communication system and at the same time increase the useful lives of batteries used in receivers in that system.

Another object is to provide a transmitter which is capable of sending a multiplicity of code signals such that all code signals having a first cue tone are sent sequentially followed by all those code signals havinga second cue tone, etc.

Still another object is to provide an improved selective calling communication receiver which is intermittently energized by voltage pulses.

In connection with the foregoing object, it is yet another object to increase the space between adjacent pulses so as to improve the life of the battery in that receiver.

A further-object is to provide in a selective calling communication system, a transmitter which is coupled to the telephone system and is operative to store calls as they are received and to transmit corresponding code signal seriatum.

A yet further object is to provide a transmitter capable of substituting a predetermined code signal fora predetermined number applied to the transmitter.

In summary, there is provided a selective calling communication system comprising a transmitter including means for sequentially transmitting a multiplicity of code signals each having acue tone and a predetermined number of control tones, and means for arranging the code signals into a plurality of signal groups for sequential transmission thereof the number of signal groups corresponding to the number of cue tone frequencies, each signal group containing all those code signals which include the corresponding cue tone of that group, a receiver including a processing circuit for processing the code signals, pulser circuit means coupled to the processing circuit for producing a series of pulses intermittently to render the processing circuit operative, decoding means coupled to the processing circuit and having first and second outputs, the decoding means being responsive to a predetermined cue tone for generating at the first output a first control signal and responsive to a predetermined 'code signal for generating at the second output a second control sig nal, the pulser circuit means having an input coupled to the first output and responsive to the application thereto of the first control signal to furnish a continuous supply voltage to the processing circuit, a utilization circuit having an input coupled to the second output and responsive to the second control signal to provide an output signal, and an annunciator coupled to the" utilization circuit for converting the output signal into usable form.

I SWITCH, Serial No. 861 ,7 I9, filed Sept. 29, 1969, now

In a preferred form, each code signal includes a cue tone followed by a sequence of a predetermined number of control tones.

With the foregoing and other objects in view, which will appear as the description proceeds, the invention consists of certain novel features and a combination of parts hereinafter fully described, illustrated in the accompanying drawings, and particularly pointed out in the appended claims, it being understood that various changesin the details of the circuitrymay be made without departing from the spirit or sacrificing any of the advantages of the invention.

For the purpose of facilitating an understanding of the invention, there is illustrated in the accompanying drawings a preferred embodiment thereof, from an inspection of which, when considered in connection with the following description, the invention, its mode of construction, assembly and operation, and many of its advantages should be readily understood and appreciated.

FIG. 1 illustrates a transmitter in block form, including therein an encoder which incorporates the features of the present invention;

FIG. 2A is a more detailed block diagram of a portion of the encoder of FIG. 1;

FIG. 2B is a detailed block diagram of the remainder of the encoder of FIG. 1;

FIG. 3 illustrates a circuit diagram of an oscillator which may be used in the encoder;

FIG. 4 illustrates the sequence of code signals derived from the encoder;

FIG. 5 is a block diagram of a receiver used in the selective calling communications system incorporating the features of the present invention;

' FIG. 6 is a detailed block diagram of the decoder circuit of FIG. 5;

FIGS. 7, 8 and 9 are detailed circuit diagrams of certain portions of the receiver of FIG. 5;

FIG. 10 is a graph depicting signals at various points in the circuitry shown in FIGS. 8 and 9;

FIG. 11 is a graph depicting certain additional details of operation of the receiver.

There is described herein a selective calling communication system comprising a transmitter and a number of receivers. Each receiver is responsive to the same carrier wave frequency but is responsive to a predetermined set of tones. A given receiver will emit an alerting signal such as light and/or sound in response to a carrier wave modulated with a particular set of tones. The possessor of such receiver will then perform some previously agreed action, such as, calling his office. A different set of tones modulated on that carrier wave will activate another receiver, etc.

The transmitter is coupled to the telephone system so that by picking up ones telephone and dialing a predetermined number, the caller can be connected into the transmitter. Thereafter, the caller dials the number corresponding to the receiver with which he wishes to get in touch. The transmitter will modulate the carrier wave with the selected set of tones which will then activate the receiver in question.

As different calls come in to the transmitter, the numbers are processed to transmit the associated code signals, each consisting of a cue tone and a set of control tones. The processing is so effected that the first group of code signals transmitted includes all those having a first cue tone, followed by all those having a second cue tone, etc., until all the stored code signals have been transmitted.

The receivers are intermittently energized so as to minimize battery consumption. Once the proper cue tone is received in any given receiver it is continuously energized until all the code signals having that cue tone have been transmitted. That receiver will be activated to alert the possessor thereof upon receipt of the proper control tones.

Turning now to the drawings, and more particularly to FIG. 1 thereof, there is shown a selective communication transmitter 20 which is part of a communication system also including selective calling receivers to be described hereinafter. The transmitter 20 includes an oscillator 21 which develops a relatively low frequency oscillatory signal for application to one input of the modulator 22. The modulator 22 also has a second input coupled to an encoder 30 which provides a code signal in the form of a tone sequence for modulation onto the oscillatory signal from the oscillator 21. A plurality of telephone trunks 31 is coupled to the inputs of the encoder 30. The modulated oscillatory signal is applied to a frequency multiplier 25 which increases the frequency of the modulated oscillatory signal. The relatively high frequency signal from the frequency multiplier 25 is applied to a power output amplifier 26 where the signal strength is increased to provide a high level, frequency modulated carrier wave which is radiated by an antenna 27.

Turning now to FIG. 2A, the details of the encoder 30 will be described. Coupled to each of the telephone trunks 31 is a number register 32. Each register 32 has one output conductor 33 and four sets of output conductors 34a, 34b, 34c and 34d, each set having four conductors. The output conductor 33 of each register 32 is coupled back to the associated telephone trunk 31 and also is coupled as a first input to an AND circuit 35. The input on each telephone trunk 31 will consist of a four digit number such as 8491 each digit corresponding to a predetermined tone which is to be sent.

Each register 32 converts each digit of the incoming number into binary information. Thus, on the set of conductors 34a a binary output will appear corresponding to the first digit, a similar binary output will appear on the set of conductors 34b to correspond to the second digit, etc. As is well known to those skilled in the art, four bits in each set will be required to provide a binary output in response to a decimal input. As soon as a complete number has been applied to a register 32, it will furnish on the associated output conductor 33 a signal which is sent back to the associated telephone trunk 31 to prevent further entry to that register 32. That signal also provides a first input to the associated AND circuit 35.

As is usual in telephone systems, when the first trunk is in use, the next incoming call automatically will be rerouted onto the second telephone trunk 31 so as to be applied to the second register 32. As soon as such number is completed, a signal will be developed on the output conductor 33 of the second register 32 to prevent further access thereto. if two trunks are in use, the next) call will automatically be rerouted to the third trunk 31 and to the third register 32, which would cause a signal to be developed on the associated output conductor 33 to prevent further access to the third register 32. If only three trunks are coupled to the encoder 30, then the next caller would receive a busy signal,

until one of the registers 32 again becomes available. Any number of additional telephone trunks may be provided depending upon the amount of use the encoder 30 will be put to.

Each register 32 is coupled to an associated readout circuit 36 by way of the conductor sets 34a-d. The readout circuits 36 respectively have further inputs on conductors 37 respectively derived from the AND circuits 35. Each readout circuit 36 also has four sets of output conductors 38a, 38b, 38c and 38d which sets of output conductors are shown schematically to merge into a cable 38.

The encoder 30 also includes a sequential switch 40 driven by a clock 41. The clock 41 generates pulses at a predetermined ratesuch as for example a pulse being produced at a one millisecond rate. The sequential switch 40 has three output conductors 42 respectively coupled as second inputs to the AND circuits 35. It should be understood that although three such conductors are shown, the number will correspond to the number of telephone trunks 31 coupled to the encoder 30. The sequential switch 40, generates on the conductors 42, one after another, pulses respectively initiated from the pulses of the clock 41. Thus, when a complete number has been furnished to the first register 32 so that one input along the conductor 33 is applied to the first AND circuit 35 and a pulse from the sequential switch 40 provides a second input to the first AND circuit 35, a signal will be coupled to the first readout circuit 36 which causes the four binary codes from the first register 32 to be coupled to the conductors 38a-d. Thus if the number 8491 is applied to the first register, the binary code representing the digit 8 will be read out on the conductors 38a, the binarycode representing the digit 4 being read out on the conductors 38b, etc. As soon as the signal in the first register has been read out, the signal on the conductor 33 is terminated, whereupon the first telephone truck 31 is available to receive another number. The sequential switch 40 then provides a signal on a conductor 42 to the second AND circuit 35. If at this time, the second register 32 has a number stored therein so as to provide a signal on the conductor 33 to the second AND circuit, a signal on the conductor 37 will be generated to cause the second readout circuit 36 to read out onto the conductors 38a-d, the signals stored in the second register. 32. Thereupon, the signal on the associated conductor 33 will terminate to permit access to the second register 32. The sequential switch 40 will then provide a signal on a conductor 42 to cause the third register 32 to read out the associated signals stored therein.

The encoder 30 is provided with a random access memory unit 45 which has four sets of input conductors 46a, 46b, 46c and 46d, each of which sets has four conductors. The corresponding conductors 38a-d from the readout circuits 36 are connected together and to the corresponding one of the conductors 46a-d. For example, the first conductor in the set 46a is coupled to the first conductor of each of the sets 38a. The memory unit 45 has 10 groups of output conductor sets 47a, 47b, 47c and 47d, there being four sets of four conductors each in each group.

The random access memory unit 45 uses any type of alterable memory element, which preferably is nonvolatile. The four parallel BCD (binary code decimal) inputs select a location in the memory which is then read out to one of ten digital storage buffers (silo stores) as is subsequently described.

The encoder also includes ten silo stores 48, each being the same in construction and being capable of storing codes applied thereto. These stores may be made of devices supplied by Texas Instruments, Incorporated of Dallas, Texas, which it calls a Digital Storage Buffer under the identification TNS 4006 JC, NC. The first silo store 48 is coupled, by way of one of the groups of output conductor sets 47a-d, to the memory unit 45; the second silo store 48 is coupled, by way of the second group of output conductor sets 47a-d, to the memory unit 45, and so forth, the tenth silo store 48 being similarly coupled to the memory unit 45. A silo store is a memory device wherein the first word stored in the buffer is the first word released. Thus, if ten words are sequentially entered into storage, readout signals coupled to the silo store read out these words in the same order.

The four BCD inputs to the memory unit 45 select a locationin the memory and cause read out of the four digit number stored therein. Those numbers in storage having a predetermined first digit are routed to the first silo store 48; all those numbers having their first digit as a predetermined second number being routed to the second silo store 48, and so on, those numbers having their first digit as a predetermined tenth number being routed to the tenth silo store 48. For example, all numbers having a common'first digit of 2 (the digits applied to the memory unit 45 are not in decimal form so that, the digit 2 would be represented by a binary code on the conductors 46a) would-be coupled to the second silo store 48. Presumably, when a system is first shipped, all numbers in memory locations would be the same numbers by which the locations are identified.

There is provided a manual entry console 50 having a plurality of entry buttons 51 and being coupled via a conductor 52 to an input of the memory unit 45. The console 50 is operative selectively to modify the individual elements of the memory unit 45 so that a number out of the memory unit 45 does not necessarily match the input number thereto. For example, the console 50 can modify the memory unit 45 so that an input number of 8765" selecting location 8765 in the memory will read out an output number of 9413, for example.This enables complete substitution of receivers. If a receiver assigned the number 8765" becomes damaged, the user may obtain any replacement receiver which happens to be available such as the receiver responsive to the number 9413. The console 50 is then manipulated to modify the memory unit 48 to cause an input number of 8765 to yield an output number of 9413. Thus, would-be callers need never know of the substitution and can simply call the same number 8765 and still alert the user in question. In changing the number for 8765 to 9413, a different silo store will be selected for transmission of the paging codes.

Each silo store 48 has an output conductor 55 coupled thereto, which conductors are schematically shown to merge into a cable 55. Input conductors 56 (schematically shown-to merge into a cable 56) are respectively coupled to the silo stores 48 and cause the codes stored therein to be released upon receipt of a suitable signal. Each silo store 48 has four output conductor sets 57a, 57b, 57c and 57d, there being four conductors in each set, thus providing for parallel outputs of four BCD'digits.

Turning now to FIG. 2B, there is provided a set of four binary-to-decimal converters 60, respectively having sets of input conductors 61a, 61b, 61c, and 61d coupled thereto. The first conductors respectively in the conductor sets 57a from the silo stores 48 are OR coupled together and to the first conductor in the conductor set 61a; the second conductors in the conductor sets 57a are similarly connected together and to the second conductor in the conductor set 61a, and so forth, the first conductors in the conductor sets 57c being connected together and to the first conductor in the conductor set 61c, and so on, the last conductors in the conductor sets 57d being connected together and to the last conductor in the conductor set 61d.

The converters 60 respectively have sets of output conductors 62a, 63b, 62c and 62d, each set containing 10 conductors. Each of the converters 68 is capable of responding to a binary number applied thereto and coupling a voltage to the corresponding one of the output conductors 62a. Thus, for example, if the binary digits 01 10 appeared respectively on the conductors in the conductor set 61a, the first converter 60a would provide a voltage on, for example, the sixth conductor of the conductor set 62a.

There is provided a first oscillator 65 having a set of ten input conductors 64 connected respectively to the corresponding conductorsin the conductor sets 62a and 620. A second oscillator has a set of input conductors 69 connected respectively to the corresponding conductors in the conductor sets 62b and 62d. The conductor sets 64 and 69 are respectively coupled to different frequency determining elements in the oscillators 65 and 68. Thus, a voltage on the first conductor in the conductor'set 64 causes the first oscillator 65 to produce a first predetermined tone, a voltage on the second conductor in the conductor set 64 will cause the first oscillator 65 to produce a second predetermined tone, etc. Similarly, voltages on different ones of the conductors in the conductor set 69 cause the second oscillator 68 to produce corresponding tones.

FIG. 3 illustrates the details of an exemplary oscillator 70 (the oscillator 65 may be similarly constructed) which includes an oscillatory portion 71, the oscillatory circuit 7! being of standard construction and including an NPN transistor 72 having its base coupled to a resistor 73 to ground reference potential and its emitter coupled through a resistor 74 to ground reference potential. A resistor 75 coupled from the 13+ operating voltage to the base of the transistor 72 provides a biasing voltage thereon. A pair of capacitors 76 and 77 is coupled in series between the collector of the transistor 72 and the B+ operating voltage. There is provided a connection between the emitter of the transistor 72 and the junction of the capacitors 76 and 77. A coil 78 coupled to the collector of the transistor 72 has 10 taps thereon. The oscillator 70 also includes an amplifier 80 having an NPN transistor 81 with its base coupled, by way of a capacitor 82, to the emitter of the transistor 72, the emitter of the transistor 81 being coupled through a resistor 83 to ground reference potential. A resistor 84 is coupled between the collector and the base of the transistor 81.

In operation, the oscillatory portion 71 produces a tone the frequency of which is determined by the values of the capacitors 76 and 77 and the portion of the coil 78 in circuit in the oscillatory portion 71. Thus, if a voltage is applied to the third conductor (by connecting it to B+) in the conductor set 69, approximately 30 percent of the coil 78 will be coupled in the oscillatory portion 71, thereby causing a given tone to be produced thereby. Accordingly, the tone produced by the oscillators 65 and 70 will be dependent upon which of the input conductors thereto receives an energizing voltage.

The first oscillator 65 is coupled to a first gated amplifier 90 and the second oscillator 70 has its output coupled to a second gated amplifier 91, the outputs of the amplifiers 90 and 91 being coupled to a conductor 95. The conductor 95 is coupled to the input of the modulator 22 (FIG. 1).

The encoder 30 also includes a sequential switch 100 driven by a clock 101. The sequential switch 100 has four output conductors, 102a, 102b, 102a and 102d respectively coupled to further inputs of the converters- 60. The sequential switch 100 has a fifth output conductor 102e. The sequential switch 100 generates a pulse on the conductor 102a which pulse is initiated by the first pulse from the clock 101. The sequential switch 100 then produces a pulse on the conductor 102b; followed by a pulse on the conductor 102e and then a pulse on the conductor 102d and finally, a pulse on the conductor 102e. Such a sequence of pulses on the conductors l02a-e is continuously repeated. The parameters of the sequential switch 100 may be adjusted to cause the pulses on the conductors 102a-e to have any desired duration. The conductors 102a and 102C are also coupled to an OR circuit 105 and the conductors l02b and 102d are coupled to an OR circuit 106. The output of the OR circuit 105 is coupled to the gate of the first gated amplifier 90, and the second OR circuit 106 is coupled to the gate of the second gated amplifier 91. Thus, the first gated amplifier 90 is gated on for the duration of the first and third pulses from the sequential switch 100 and is gated off for the duration of the second, fourth and fifth pulses from the sequential switch 100. On the other hand, the gated amplifier '91 is gated on for the duration of the second and fourth pulses on the conductors 102a and 102d from the sequential switch 100 and is gated off for the duration of the first, third and fifth pulses from the sequential switch 100.

In order sequentially to activate the silo stores 48, there is provided a silo store scanner 110 driven by a clock 111 and having 10 output conductors 112. The output conductors 112 are coupled respectively to ten AND circuits 1 13. A second input for each of the AND circuits 113 is provided by the fifth output from the sequential switch 100 on the conductor 102e via an inverter 122. The outputs of the AND circuits 1 13 are respectively coupled along the conductors 56 to the silo stores 48.

The clock 111 generates pulses at a predetermined rate such as, for example, one every ten seconds. The sequential switch 110 produces sequentially on the conductors 112, pulses of substantial duration, for example, 10 seconds. An AND circuit 113 will produce an output on its associated conductor 56 whenever there is no output from the conductor 102e and a pulse is present on the associated conductor 112. Thus, there will appear on the first conductor 56 (from left to right) a sequence of pulses, each having a duration equal to i the combined duration of the pulses on the four conductors 102a-d and will be spaced by an amount equal to the duration of the pulse on the conductor 102e. Such pulses on the conductor 56 will continuously repeat as long as the pulse on the first conductor 112 is present. Thus, if each pulse from the scanner 110 is 10 seconds, and each of the pulses on the conductors 102a-e is 25 milliseconds, the sequence of pulses on the first conductor 56 will last for 10 seconds, each pulse being milliseconds in duration and spaced from an adjacent pulse by 25 milliseconds. Following termination of the first pulse by the scanner 100, a second pulse is produced on the second conductor 112, and so forth, until a pulse is produced on the last conductor 112, whereupon the scanner again begins the cycle producing a pulse on the first conductor 112. Thus there will appear on the second conductor 56 a sequence of pulses similar to the sequence on the first conductor 56. Similarly such sequences will appear successively on the conductors 56.

A silo store 48 is operative to read out or release information stored therein only upon application of a pulse thereto along the associated conductor 56. Thus, the first group of pulses on the first conductor 56 will permit the first silo store 48 to release the codes stored therein but because none of the other silo stores 48 have signals on their associated conductors 56, none of the codes stored in the latter stores will be released. The first pulse from the first AND circuit 1 13 will cause the first silo store 48 to release the codes corresponding to the four digits respectively on the conductor sets 57a, 57b, 57c and 57d. corresponding to the last digit. The four codes thus released are applied to the converters 60. At the end of the first pulse from the scanner- 110, a' pulse will appear on the conductor 102e so that for the duration thereof no output is furnished by the first AND circuit 113 and thus no information is released from the first silo store 48. The next pulse from the first AND circuit 113 will cause the first silo store 48 sequentially to release the next four-digit code in storage, which code is coupled to the converters 60. The first silo store 48 will sequentially release the codes in this fashion, only so long as the first AND circuit 113 receives an input from the scanner 110. If the input is 10 seconds long, then the first silo store 48 will continue to release stored codes for 10 seconds or until empty. If after that interval there is still information stored in the first silo store 48, such information will be stored until the scanner 110 completes a cycle. The clock 111 is synchronized with the clock 101 so that the scanner 110 will not stop during the middle of a readout cycle. That is, the' sequential scanner 110 should stop only when there is an output pulse on the connector 102e.

The scanner 1 10 then produces a voltage for the second AND circuit 113, whereby in a similar fashion, a sequence of pulses is produced on the output conductor 56 of the second AND circuit 113, each of which pulses has a duration equal to the combined duration of the pulses produced by the sequential switch 100 on the conductors 102a-d and are spaced by an amount equal to the duration of the pulse on the conductor 102:. The sequence of pulses produced by the second AND circuit 113 will cause the second silo store 48 sequentially to release the codes stored therein to the converters 60 in the same manner as that described in respect to the first silo store 48. The scanner 110 produces voltages in succession for the AND circuits 113 to cause the silo stores 48 to release in succession the codes stored therein. After the scanner 110 has produced an operating voltage for the-tenth AND circuit 113 to cause the tenth silo store 48sequentially to release the codes stored therein, the scanner 1'10 cornmences a new cycle to release codes from the first silo store either not released the first time or subsequently applied thereto by additional calls on the trunks 31.

It will be noted that each silo store 48 has an output conductor 55 coupled back to the scanner 110. When a silo store 48 is empty, it will'couple back a signal along the associatedconductor 55'to instruct the scanner 110 immediately to terminate the voltage for the associated AND- circuit 113 and to provide a voltage for the next AND circuit. For example, if the scanner 110 is set to provide voltages for each AND circuit 113 for 10 seconds and the first AND circuit 113 has only five seconds of codes stored therein, the first silo store 48 will have been emptied after 5 seconds, which causes a signal to be applied along the associated conductor 55 to the scanner 1'10 a'nd'instruct it to step to the second AND circuit 113 and commence providing a voltage therefor.

The encoder 30 includes a first OR circuit 115 having five inputs respectively coupled to the first, third, fifth, seventh and ninth output conductors 112 of the silo store scanner 110; and-a second 0R circuit 116 having five inputs respectively coupled to the second, fourth, sixth, eighth and tenth output conductors 112 of the scanner 110. The outputs of the OR circuits 115 and 116 are respectively coupled to a pair of 'monostable multivibrators 117 and 118, the outputs of the latter being coupled to an OR circuit 119. There is also provided an AND circuit 120 having its first input coupled to the output of the OR circuit 119 and having its second input coupled to the output conductor 102a of the sequential switch 100. The output of the AND circuit 120 is coupled to a pulse extender 121, the output of which is coupled to the clock 101.

The pulse extender 121 causes the first pulse on the conductor 1020 to be substantially longer than the ensuing pulses on the conductors 102b-e. Since the pulse extender 121 will not be operative for the rest of the duration of the voltage produced by the scanner 110 on the first conductor 112, subsequent pulses on the conductors 102a-e have equal durations. However, the pulse extender 121 will again be operative for the first pulse produced by the sequential switch 100 on the conductor 102a during the time that the scanner 110 is applying a voltage to the second AND circuit 113. Thus, the pulse first produced by the sequential switch 100 on the conductor 102a after the sequential switch 110 steps to the second AND circuit 113 will have a long duration, whereas all of the other pulses produced by the sequential switch 100 while voltage is applied to the second AND circuit 113 are equal, but shorter, in duration. Thus, the output of the sequential switch 100 will consist of a long first pulse on the conductor 102a followed sequentially by four short pulses successively on the conductors 102be, followed by a sequence of five short pulses sequentially on the conductors 102a-e, etc., until the scanner 110 steps to the next AND circuit 113, whereupon the first pulse on the conductor 102a will again have an extended duration, followed sequentially by four short pulses successively on the conductors 102b-e, followed by a sequence of five short pulses sequentially on the conductors 102a-e,

followed one after the other by such sequences of five short pulses, etc. The scanner 1 10 will successively step to the AND circuits 113 one after the other, performing the above operation until voltage is provided to the tenth AND circuit 1 13 whereupon the first pulse on the conductor 102a will again have an extended duration, followed sequentially by four short pulses successively on the conductors 102b-e. The last set of five pulses produced on the conductors l02a awhile the scanner 110 is providing voltage to the tenth AND circuit 113, will be equal, but shorter, in duration. Following the last pulse, the scanner 110 will again step back to the first AND circuit 113 and the sequential switch 100 will commence the cycle again.

The first long pulse on the conductor 102a gates the first converter to enable the first binary code from the first silo store 48 to couple the associated portion of the coil in the oscillator in circuit therein and thereby produce a first tone or cue tone lasting for a duration determined by the duration of the pulse on the conductor 102a. The OR circuit 105 also responds to the pulse on the conductor 102a to gate on the first amplifier 90 for the duration of the cue tone to enable it to be coupled to the conductor 95.

The next pulse, which is present on the second conductor 102b, gates on the second converter 60 so that the second'binary code from the first silo store 48 will cause the corresponding portion of the coil in the second oscillator to be coupled in circuit therein and thereby produce a second tone persisting for the duration of the pulse on the conductor 102b. The OR circuit 106 also responds to the pulse appearing on the conductor 102b to gate on the second amplifier 91, so as to couple to the conductor 95 the second tone. The third pulse, which appears on the conductor 102e, gates on the third converter 60 to enable the third binary code to couple the associated portion of the coil in circuit in the oscillator 65 to produce a third tone. Since the gated amplifier is gated on by the pulse on the conductor 1020, the third tone will similarly be coupled to the conductor 95. The next pulse appears on the conductor 10211 and. is operative to gate on the fourth converter 60 to enable the binary code on the input thereof to couple the associated portion of the coil in the oscillator 70 in circuit therein, thereby producing a fourth tone having a duration equal to the duration of the pulse on the conductor 102d. The second amplifier 91 being gated at this time by virtue of the pulse on the'conductor 102d, couples the fourth tone to the conductor 95. During the occurrence of the fifth pulse on the conductor 102e, none of the converters 60 is operative, whereby no tone is produced on the conductor 95 for the duration of that pulse. If the first pulse on the conductor 102a has a duration of 1.5 seconds, for example, and each of the pulses on the conductor 102b-e has a duration of 25 milliseconds, then the code signal produced on the conductor 95 will consist of a first tone or cue tone 1.5 seconds in duration followed by a sequence of three control tones each 25 milliseconds in duration, with no time between successive tones, followed by a gap of 25 milliseconds.

After the termination of the pulse 102e, the sequential switch again produces a pulse on the conductor 102a followed sequentially by pulses on the conductors 102b-e. As previously described, the pulse extender 121 is not operative for the remainder of the time that a voltage is coupled to the first AND circuit 113, and,

therefor, all five pulses have the same duration. of, for example, 25 milliseconds. Thus, after the gap following the first code signal, the first of these five pulses will gate the first converter 60 and the first amplifier 90 to provide a first tone of a second code sequence. The second of the five pulses gates the second converter 60 and the second amplifier 91 to provide a second tone on the conductor 95. The third pulse gates the third converter 60 and the first amplifier 90 to provide a third tone on the conductor 95. The fourth of these five pulses gates the fourth converter the second amplifier 91 to provide a fourth tone on the conductor 95. During the occurrence of the fifth of these five pulses on the conductor 1022, none of the converters 60 is operative. Accordingly, no tone is produced on the conductor 95 for the duration of that fifth pulse. If each of the pulses on the conductors 102a-e has a duration of 25 milliseconds, then the second code signal produced on the conductor 95 will consist of a first tone or cue tone, 25 milliseconds in duration, followed by a sequence of three controlled tones, each 25 milliseconds in duration, followed by a gap of 25 milliseconds. Because the code signals are derived from codes stored in the first silo store 48, the cue tone (first tone) of each will be the same in frequency but not in duration.

In similar fashion, additional code signals, each having a common cue tone, will be provided on the conductor 95 until the scanner 110 steps to the second AND circuit 113. Thereafter, the first pulse produced on the conductor 102a will again have an extended duration which gates the first converter 60 to enable the first binary code from the second silo store 48 to couple the associate proportion from the coil in the oscillator 65 in circuit therein and thereby produce a first long tone. The OR circut 105 gates the first amplifier 90 to enable the cue tone to be coupled to the conductor 95. The succeeding pulses appearing on the conductors 102a-d respectively enable subsequent binary codes from the second silo store 48 to cause the oscillators 65 and 70 to produce the second, third and fourth tones. The fifth pulse on the conductor 102e produces a gap following the fourth tone.

The next set of pulses on the conductors 102a-e will all be equal in duration and will respectively operate the converter 60, the oscillators 65 and 70, and the amplifiers 90 and 91 to produce a second code signal including a sequence of four tones equal in duration. Again, the cue tone in the first code signal is many times longer than the cue tone in the second code signal but the frequencies are the same.

Similarly, additional code signals, each having a common cue tone will be provided on the conductor 95, until the scanner 110 steps to the third AND circuit 113. Then appearing on the conductor 95 will be the third group of code signals each having the common cee tone, the cue tone for the first code signal being substantially longer than the cue tone for succeeding code signals. In this manner, the groups of code signals will be successively transmitted until the tenth silo store 48 is emptied, whereupon those code signals having the common first cue tone will again be transmitted.

Although not necessary, the oscillators 65 and 70 may continuously oscillate, with the frequency of the tones therefrom being shifted as the subsequent code is applied to the next converter 60. Thus, for example, the oscillator 65 is continuously producing a tone but because the gated amplifier 90 is gated on only during the first and third tones, only these tones will appear on the output conductor 95.

FIG. 4 schematically illustrates the output on the conductor 95. In this example, it will be assumed that the first cue tone in a group has a duration of 1.5 seconds and the duration of each of the rest of the cue tones, each of the control tones, and each of the gaps between code signals is 25 milliseconds. In that case, 67 code signals could be transmitted in a 10 second period. There will be provided ten signal groups, although only the first signal group 130, the second signal group and the tenth signal group are shown. Further, it will be assumed that each group includes 67 code signals. The first signal group 130, includes a first code signal 131, a second code signal 132, a third code signal 133, and so forth and a 67th code signal 134. The first code signal 141 and a second-code signal 142 and the 67th code signal 143 of the signal group 140 are illustrated. The tenth signal group 150 includes 67 code signals, there being illustrated the first code signal 151, the second code signal 152, and the 67th code signal 153. The tones in each of the code signals are represented respectively by the letters a, b, c and d, following the number of the associated code signal. The first cue tones 131a, 141a, and 1510, respectively of the signal groups 130, 140, and 150, each having a duration of about 1.5 seconds. All the rest of the cue tones 132a, 133a, 134a, 142a, 143a, 152a and 153a, each have a duration of about 25 milliseconds. The three control tones l31b-d which follow in sequence after the cue tone 131a, each have a duration of about 25 milliseconds as does the gap l3le. The rest of the control tones l32b-a', 133M, and l34b-d, each have a duration of 25 milliseconds, in the code signals in the first signal group 130. The rest of the code signals have a similar composition.

It should be understood that although each signal group is shown to have 67 code signals, a lesser number would be provided if the associated silo store 48 had less than 67 binary code sets stored therein.

Although FIGS. 2A and 2B illustrate a particular form of the encoder 30, it is to be understood that any number of different constructions may be utilized to provide a multipliicty of code signals each having a cue tone followed by a sequence of three control tones, and arrange the code signals into a plurality of signal groups for sequential transmission thereof, the number of signal groups corresponding to the number of cue tone frequencies, with each signal group containing all those code signals which include corresponding cue tone of that group. It is further to be understood that although the system described is one capable of delivering the cue tone followed by three control tones in sequence, additional or fewer control tones may be provided. Also, the control tones may be sent either simultaneously or sequentially. The cue tone in each code signal may be sent the same time as the control tones or prior thereto.

There is illustrated in FIG. 5 of the drawings, a diagram of a communication receiver 220 having a processing circuit 229. The carrier signal is picked up by an antenna 230 and is conveyed to the input of a radio frequency amplifier 231. The output of the radio frequency amplifier 231 is applied as one of the inputs to a mixer 232, the usual focal oscillator 233 being provided and having the output thereof connected as a sec ond input to the mixer 232. The intermediate frequency (IF) signal which is the output of the mixer 232 is applied as the input to an [F amplifier 234, the output of which is transmitted to the input of a limiter 235. The output of the limiter 235 is coupled to a discriminator 236, which provides a demodulated signal on the conductor 237. The processing circuit 229 includes the elements 231-236.

It is to be assumed that the receiver 220 is responsive to a code signal including a predetermined sequence of four tones. The demodulated signal on the conductor 237 includes a code signal in the form of a cue tone followed by sequence of three control tones. There is provided a pulser circuit 500 which produces a series of pulses which are coupled back to the processing circuit 229 to provide the supply voltage therefor. During the presence of the pulses, the processing circuit 229 is operative to process and detect RF signals impressed on the antenna 230; whereas between successive pulses, the processing circuit 229 is inoperative and any signals on the antenna 230 will not pass to the conductor 237.

A decoder 240 is coupled to the discriminator 236. If the first tone of the code signal on the conductor 237 corresponds to the first tone to which the decoder 240 is tuned, a first control signal will be developed on the conductor 285 for application to a timing circuit 470. The first control signal on the conductor 285 cornmences in the presence of both the first control tone in the code control and a pulse from the pulser circuit 500. The timing circuit 470 extends the controlsignal, which extended control signal causes the pulser circuit 500 to furnish on the conductor 516 a continuous supply voltage for a predetermined interval. Such supply voltage renders the processing circuit 229 continuously operative for that interval to process and detect RF signals on the antenna 230. Upon termination of the last control tone in the code signal, the control signal on the conductor 285 is removed and after a period of at lesat 50 milliseconds during which no cue tone is received, the pulser circuit 500 again produces a series of pulses for intermittent operation of the processing circuit 229. A second control signal from the decoder 240 appears on the conductor 465, which control signal commences essentially with the reception of the last control tone in the code signal, assuming the previous tones have been received in the proper order. The control signal on the conductor 465 terminates with the termination of the last control tone.

The control signal on the conductor 465 is applied to a timer switch circuit 370 which, in turn, energizes a utilization circuit such as the oscillator 540. The series of pulses from the pulser circuit 500 is also applied to the oscillator 540, and, in the presence of both signals, a pulsating oscillatory signal is applied to an annunciator such as a speaker 545' which generates a series of bursts of alerting tones.

The control signal on the conductor 465 is also applied to a latching switch circuit 570 which, in turn, energizes a utilization circuit such as the lamp control circuit 590. Also applied to the lamp control circuit 590 is the series of pulses on the conductor 516. In the presence of both the series of pulses and the enabling signal from the latching switch circuit 570, an annunciator such as the lamp 600 blinks on and off at a rate determined by the series of pulses. Another output from the latch switching circuit on the conductor 582 is applied to a pulse extender circuit 610 which, upon termination of the last control tone, lengthens the pulses developed by the pulser circuit 500 to increase the duration of the bursts from the speaker 545 and to increase the ontime of the lamp 600. After expiration of a predetermined time, the timer switch circuit 370 ceases to provide the enabling signal on the conductor 530 and the bursts of audio cease. When the user operates a manual switch in the latching switch circuit 570, the lamp 600 becomes extinguished and the pulser circuit 500 reverts to producing pulses of shorter duration.

The output from the discriminator 236 is applied to the deocder 240 which is shown in block form in FIG. 6. The decoder 240 is adapted to respond to a code signal including a cue tone followed by a sequence of three control tones in predetermined order. Alternatively, the code signal may be received as a sequence of four tones. The code signal from the discriminator 236 is applied to a pair of tone control channels, the lower tone control channel including a special tapped filter 241 of a construction to be described hereinafter. If the filter 241 is tuned to the frequency of the first tone (cue tone) from the discriminator 236 it will pass to the conductor 246 and be applied to a rectifier 260. The tones and any noise on the conductor 237 are also applied to a reference circuit 270 which provides a reference voltage on the conductor 275. If the first tone on the conductor 246 exceeds the reference voltage on the conductor 275, the rectifier 260 will operate to rectify the tone and provide a filtered DC voltage on the conductor 266. The DC voltage is applied to an electronic switch 280 so as to power amplify the voltage and apply it on a conductor 285 as one input to an AND circuit 290. A second input for the AND circuit, on a conductor 426, is derived from an inverter 420. If both inputs are present, an output voltage on the conductor 294 will result, which voltage is applied to a timer 300. Upon termination of the first tone, a DC voltage appears on the conductor 303 and persists for a duration dependent on the setting of the timer 300. The voltage on the conductor 303 is coupled to an electronic switch 310 which provides a DC voltage pulse on its output conductor 314. The voltage on the conductor 314 is coupled to a filter 341 in the second tone channel and tunes the same to receive the second tone (first control tone) present on the conductor 237. If the sec ond tone on the conductor 231 appears immediately and is at the frequency to which the filter 341 is now briefly tuned, it will pass to the conductor 34.6 and will be applied to a rectifier 360. If the second tone on the conductor 346 exceeds the reference voltage on the conductor 275, the rectifier 360 will operate to rectify the tone and provide a filtered DC voltage on the conductor 366. The DC voltage is applied to an electronic switch 380 so as to power amplify the voltage and apply it on a conductor 385 as one input to an AND circuit 390. The second input for the AND circuit 390 is the voltage on the conductor 314. Thus, if the first tone (cue tone) was received and has terminated so as to provide a voltage pulse on the conductor 314, and the second tone is being received while that pulse is present to provide a DC voltage on the conductor 385, the AND circuit 390 will operate to produce a DC output voltage on the conductor 394. This voltage is applied to a timer 400 which provides a DC voltage on the conductor 403 upon termination of the first tone, persisting for a duration dependent on the setting of the timer 400. This voltage is applied to an electronic switch 410 which produces a DC voltage on the conductor 414 for application to the inverter 420 so as to place the same in its other stable condition. The resulting output from the inverter 420 on the conductor 426 is coupled back to one input of the filter 241 which causes the filter 241 no longer to be tuned to the first tone. Simultaneously, the voltage on the conductor 4l4 is applied to another input of the filter 241 to retune the same to respond to the third tone (second control tone). Finally, the voltage on the conductor 414 is applied as a first'input to an AND circuit 430.

If the proper third tone is received on the conductor 237, the filter 241 will pass the tone to the rectifier 260. If the third tone exceeds the reference voltage on the conductor 275, it actuates the electronic switch 280 to provide one input to the AND circuit 290. However, the inverter is in its second stable condition so that a second input to energize the AND circuit 290 is lacking. The third tone, in addition, provides a second input to the AND circuit 430. With both inputs to the AND circuit 430, a potential is developed on the conductor 438 which is applied back to the input of the electronic switch 410 to hold it in the active condition as long as the third tone is received. A second output of the AND circuit 430 on the conductor 437 is applied to a timer 440. Upon termination of the third tone, a DC voltage appears on the conductor 443 and persists for a duration dependent on the setting of the timer 440. This voltage is applied to an electronic switch 450 which produces a DC voltage on the conductor 454. This output voltage is fed back to the filter 341 to retune the same so as to be operative to receive the fourth tone (third control tone). The signal on the conductor 454 is also applied as one of the inputs to an AND circuit 460.

Assuming that the proper fourth tone in the sequence of tones is now received, there will be an output from the filter 341 which will be rectified in the rectifier 360 to provide a DC voltage. This voltage operates the electronic switch 380 and provides a second input, on the conductor 385, to the AND circuit 460. In the presence of both inputs, the AND circuit 460 provides a control signal on the conductor 465. A hold-on potential is applied from the AND circuit 460 on the conductor 466 to the input of the electronic switch 450 to hold the latter in its active condition as long as the fourth tone is being received.

Coupled to the conductor 285 of the decoder 240 is a timing circuit 470. The timing circuit 470 is operative to provide on its output conductor 473 a control signal commencing with the concurrence of the first control tone and a pulse from the pulser circuit 500, it being pointed out that a voltage appears on the conductor 285 throughout the third tone also. The timing circuit 470 serves to extend the duration of the control signal beyond termination of the first tone for a predetermined time interval determined as explained hereinafter.

Referring now to FIGS. 7 and 8 of the drawings, there are illustrated further details of the decoder 240. The filter 241 includes an inductor 242 having associated therewith a magnetic core 243, at least a portion of the core 243 being movable and adjustable, whereby the inductor 242 can be slug tuned. The inductor 242 is connected through a capacitor 245 to the conductor 237, and a capacitor 244 is coupled from the top of the inductor 242 to ground. The output from the filter 241 appears on a conductor 246. The inductor 242 has a plurality of taps thereon, two of which are identified by the numerals 247 and 248. Associated with selected ones of the taps are two NPN transistors 250 and 253. A resistor 249 is coupled between the base of the transistor 250 and the conductor 426. The transistor 250 has a collector connected to the tap 248 on the inductor 242, while the emitter is connected to ground potential. A resistor 254 is coupled between the base of the transistor 253 and the conductor 414. The transistor 253 has a collector connected to the tap 247 on the inductor 242, while the emitter is connected to ground potential.

The decoder 240 also includes an inverter 420 including a PNP transistor 421, the base of which is coupled through a resistor 422 to ground and through a diode 423 and a resistor 424 to the conductor 414. A source of 8* supply voltage is coupled to the emitter of the transistor 421 through a diode 425. In its quiescent condition, the transistor 421 is heavily conductive so that the supply voltage appears on the conductor 426 to render the transistor 250 in the filter 241 heavily conductive, thereby effectively to ground the tap 248 on the inductor 242. In this condition, there is defined a parallel resonant circuit in the filter 241, composed of the capacitor 244 coupled across the top half of the inductor 242. If the first tone (cue tone) on the conductor 237 is at the frequency to which the filter 241 is now tuned, the control tone, at an increased amplitude, will appear on the conductor 246. It should be noted that, at this time, the transistor 253 is nonconductive.

The first tone, together with the noise on the conductor 237, is applied to a reference circuit 270 which provides a reference voltage on the conductor 275 proportional in amplitude to the tones and the noise on the conductor 237. The first tone on the conductor 246 is applied to a rectifier 260 which provides a DC voltage on the conductor 266 if the tone on the conductor 246 exceeds the reference voltage on the conductor 275.

The next stage is an electronic switch 280 consisting of a pair of cascaded NPN transistors 281 and 283, having their collectors coupled to a DC voltage supply respectively via resistors 282 and 284. The DC voltage on the conductor 266 will cause the transistors 281 and 283 to conduct heavily, so as effectively to ground the collector of the transistor 283.

The next stage is an AND circuit 290 including a PNP transistor 292 having a base coupled by way of a resistor 291 to the conductor 285. The emitter of the transistor 292 is coupled by way of a diode 293 to the conductor 426, and the collector is coupled to ground through a resistor 301. There are two inputs to the AND circuit 290 from the conductors 285 and 426. lf the conductor 285 is effectively grounded, which occurs through the transistor 283 when the first tone is present, and if the positive voltage appears on the conductor 426, which occurs when the inverter 420 is in its quiescent condition, the transistor 292 becomes heavily conductive to place a positive voltage on the conductor 294. A timer 300, consisting of the resistor 301 and a capacitor 302 produces a negative DC voltage on the conductor 303 upon termination of the positive voltage on the conductor 294 which occurs upon termination of the first control tone. The next stage is an electronic switch 310 which includes a PNP transistor 311 having its emitter coupled to the source of supply voltage, having its base coupled thereto through a resistor 312 and a diode 313, and having its collector coupled to the conductor 314. While the first tone is being received, the capacitor 302- is being charged through the diode313 and the transistor 31 l is not conductive. However, upon termination of the first tone, the capacitor 302 discharges through the resistor 301 to render the transistor 311 heavily conductive to place the supply voltage on the conductor 314. This voltage persists for a duration determined by the RC time constant of the timer 300. The positive voltage on the conductor 314 is applied as one input to the AND circuit 390 and an input to the second filter 341:. v

The filter 341 includes an inductor 342 having associated therewith a magnetic core 343, at least a portion of the core 343 being movable and adjustable, whereby the inductor 342 can be slug tuned. The inductor 342 is connected through a capacitor 345 to the conductor 237, and a capacitor 344 is coupledfrom the bottom of the inductor 342 to ground. The output from the filter 341 appears on a conductor 346. The inductor 342 has a plurality of taps thereon, two of which are identified by the numerals 347 and 348. Associated with selected ones of the taps are two NPN transistors 350 and 353. A resistor 349 is coupled between the base of the transistor 350 and the conductor 314. The transistor 350 has a collector connected to the tap 348 on the inductor 342, while the emitter is connected to ground potential. A resistor 354 is coupled between the base of the transistor 353-a nd the conductor 454. The transistor 353 has a collector connected to the tap 347 on the inductor 342. while the emitter is connected to ground potential.

The positive supply voltage on the conductor 314-developed during the presence of the first tone renders the transistor 350 in the filter 341 heavily conductive thereby effectively to ground the tap 348 on the inductor 342. in this condition, there is defined a parallel resonant circuit composed of the capacitor 344 coupled across the bottom portion of the inductor 342. If the second tone (first control tone) in the series of tones on the conductor 231 is at the frequency to which the filter 341 is then tuned, the second tone, at an increased amplitude, will appear on the conductor 346. it should be noted that at this time the transistor 353 is nonconductive.

The second tone on the conductor 346 is applied to a rectifier 360 which is constructed like the rectifier 260. A rectified DC voltage will appear on the conductor 366 if the second tone exceeds the reference voltage on the conductor 275.

The next stage is an electronic switch 380 consisting of a pair of NPN transistors 381 and 383 coupled in cascade, and respectively having their collectors coupled to the source of supply voltage by way of resistors 382 and 384. The rectified DC voltage on the conductor 366 causes the transistors 381 and 383 to conduct heavily, thereby effectively grounding the collector of the transistor 383.

The next stage is an AND circuit 390 comprised of an PNP transistor 391 having its base coupled to the conductor 385 by the resistor 392. The collector of the transistor 391 is coupled to ground through a resistor 402. There is further provided an NPN transistor 393 having its base coupled to the emitter of the transistor 391, and its emitter coupled to the conductor 385 by a resistor 396. The junction of the base of the transistor 393 and the emitter of the transistor 391 is coupled to the conductor 314. The two inputs for the AND circuit 390 are on the conductors 385 and 314. It will be remembered, that a positive voltage appeared on the conductor 314 after termination of the first tone, which positive voltage, in conjunction with the grounding of the conductor 385, by immediate reception of the second tone causes both transistors 391 and 393 to con: duct heavilyv The collector of the transistor 393 is coupled by way of a conductor 395 back to the conductor 303. The heavy conduction of the transistor 393 permits current to flow from B through the base-emitter junction of the transistor 311, through the transistor 393 from collector to emitter, the transistor 383 from collector to emitter, to maintain the transistor 311 conductive for the duration of the second control tone. As long as the transistor 311 is conductive, one input to the AND circuit 390 is provided and, as long as the second control tone is present, the second input to the AND circuit 390 is provided. Thus a DC voltage will be present on the conductor 385 for the duration of the second control tone. A second output from the AND circuit 390 on the conductor 394 is derived from the collector of the transistor 391. A timer 400, consisting of the resistor 402 and a capacitor 401 produces a negative DC voltage on the conductor 403 upon termination of the positive voltage on the conductor 394 which occurs upon termination of the second control tone. The next stage is an electronic switch 410, which includes a PNP transistor 411 having its emitter coupled to the source of supply voltage and having its base coupled to said source by way of a resistor 412 and a diode 413. While the second tone is being received, the capacitor 401 is being rapidly charged through the diode 413 and the transistor 411 is not conductive. However, upon termination of the second control tone, the capacitor 401 discharges through the resistor 402 to render the transistor 411 heavily conductive to place the supply voltage on the conductor 414. This voltage persists for a duration determined by the RC time constant of the timer 400.

The positive voltage on the conductor 414 is coupled to the inverter circuit 420 to render the transistor 421 nonconductive, which in turn renders nonconductive the transistor 250 of the filter 241. Also, the conductor 414 applies a positive voltage to the base of the transistor 253 to render it heavily conductive, thereby effectively placing the capacitor 244 across the top portion of the coil 242. If the third tone (second control tone) on the conductor 237 has a frequency to which that resonant circuit is tuned, the resonant circuit will develop a voltage on the conductor 246 which will be rectified by the rectifier 260 to provide a DC voltage to operate the switch 280, the output of which is applied as one input to the AND circuit 290. Since the voltage on the conductor 426 is no longer positive, the AND circuit 290 will not operate in spite of the presence of the voltage on the conductor 285. The DC voltage is also applied to an AND circuit 430, the AND circuit tone, and the plus voltage on the conductor 414, resulting from the cessation'of the second tone, cause the transistors 431 and 432 to conduct heavily. The collector of the transistor 431 is effectively grounded which provides a path for current flow through the baseemitter junction of the transistor 41] to cause the transistor to continue to conduct heavily despite interruption of the second tone. Thus, the conductor 438 is a feedback path to maintain conductive the transistor 411 for the duration of the third tone. The heavy conduction of the transistor 432 effectively places a positive voltage on the conductor 437 which is applied to a timer 440 consisting of a resistor 441 to ground and a series capacitor 442. The timer 440 produces a negative DC voltage on the conductor 443 upon termination of the positive voltage on the conductor 437 which occurs upon termination of the third tone. The next stage is the electronic switch 450 comprised of a PNP transistor 451 having its base coupled to the conductor 443, and its emitter coupled to 8*. There is also provided a resistor 452 and a diode 453 coupled in parallel between the base of the transistor 451 and the voltage supply source. While the third tone is being received, the capacitor 442 is being rapidly charged through the diode 453 and the transistor 451 is not conductive. However, upon termination of the third tone, the capacitor 442 discharges through the resistor 441 to render the transistor 451 heavily conductive to place the supply voltage on the conductor 454. This voltage persists for a duration determined by the RC time constant of the timer 440. The next stage is an AND circuit 460 including an NPN transistor 462 having its base coupled to the emitter of a PNP transistor 467. The base of the transistor 467 is coupled by way of a resistor 463 to the conductor 385. The base of the transistor 462 and the emitter of the transistor 467 are connected together and to the conductor 454.

When the transistor 451 conducts heavily in response to the termination of the third tone, the supply voltage is effectively on the conductor 454 which is coupled back to the filter 341 to cause heavy conduction of the transistor 353 thus effectively to place the capacitor 344 across a different, greater portion of the inductor 342. It should be noted that the transistor 350 is now nonconductive since the transistor 311 became nonconductive upon termination of the third tone. If the fourth tone (third control tone) on the conductor 237 has a frequency corresponding to the resonant frequency of that resonant circuit, it will be rectified by the rectifier 360 and switch the electronic switch 380, thereby grounding the conductor 385 which results in the grounding of the junction between the resistors 463 and 464 in the AND circuit 460. The concurrent grounding of the conductor 385 and the presence of the supply voltage on the conductor 454 cause the transistor 467 to conduct heavily and provide on its collector and thus the conductor 465, a positive control voltage substantially equal to the B supply voltage. Also, the heavy conduction of the transistor 462 effectively grounds its collector, and thus the conductor 466, so that the transistor 451 remains conductive until the fourth tone terminates thereby removing the ground from 385.

Accordingly, the decoder 240 provides two control signals: a control signal on the conductor 465 that does not appear until the occurrence of the fourth tone in the code signal to which the decoder 240 is set; and a control signal, equal to the supply voltage, which is derived on the conductor 285, but appears upon the appearance of the cue tone or first tone.

The output of the decoder 240 on the conductor 285 is applied to a timing circuit 470 which includes a PNP transistor 474 having its emitter coupled to the supply voltage and its base coupled to the input conductor 285 by a resistor 475. The collector of the transistor 474 is coupled through a resistor 477 and a diode 478 to the conductor 473. There is also provided an integrating network 479 connected to the collector of the transistor 474 and including a parallel resistor and capacitor arrangement. It will be remembered that the conductor 285 is effectively grounded upon concurrence of the first tone (cue tone) and a pulse from the pulser circuit 500 and stays grounded until termination of the first tone and also throughout the third tone (second control tone). Accordingly, the transistor 474 is biased on during the first and third tones and is effectively saturated so as to provide on the conductor 473 a second control signal equal to the supply voltage. The integrating circuit 479 serves to extend the duration of the control signal, so that it persists for a time beyond termination of the first tone. Specifically, the values of the resistor and the capacitor in the circuit 479 and the resistor 477 are so selected that the extended control signal will extend beyond termination of the first tone and beyond termination of the gap which occurs between the code signal containing that first tone and the very next code signal transmitted by the transmitter. For example, if each control tone and the gap between code signals has a duration of 25 milliseconds then the values of components of the timing circuit 470 would be such as to extend the termination of the control signal at least milliseconds so as to terminate after the commencement of the next code signal.

Referring now to FIG. 9, the signal on the conductor 473 is applied to a pulser circuit 500 which includes an astable multivibrator 501 in which there is an NPN transistor 502 having its emitter on ground its collector coupled through a resistor 503 to a supply voltage, and its base coupled to the cathode of a diode 504, the anode of which is on ground. The multivibrator 501 also has a second NPN transistor 505 with its emitter grounded and having its base coupled through a capacitor 506 to the collector of the transistor 502. The collector of the transistor 505 is coupled to the source of supply voltage by way of the resistor 507. There is also provided a diode 508 coupled from ground to the base of the transistor 505. Lastly, the multivibrator 501 includes a feedback capacitor 509 coupled from the collector of the transistor 505 back to the base of the transistor 502.

The pulser circuit 500 also includes an electronic switch 510 having an NPN transistor 511 with its emitter grounded and its base coupled to the resistor 512 and its collector coupled by way of a resistor 513 to the source of supply voltage. The switch 510 also includes a PNP transistor 516 having its emitter coupled to the source of supply voltage, its base coupled to the collector of the transistor 511 by way of a resistor 515 and its collector coupled to the conductor 516. Also coupled to the base of the transistor 511 is the conductor 473.

In operation, the multivibrator 501 serves to produce a series of pulses having a peak-to-peak value equal to the value of the supply voltage. The duration of the

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USRE37618 *Apr 11, 1997Apr 2, 2002Richard J. HelferichAnalog/digital data storage system
Classifications
U.S. Classification340/7.28, 340/309.16, 340/7.49
International ClassificationH04W88/18, H04W88/02, H04W52/02
Cooperative ClassificationH04W88/188, H04W88/027
European ClassificationH04W88/18S4
Legal Events
DateCodeEventDescription
Apr 13, 1992ASAssignment
Owner name: BBL INDUSTRIES, INC. A CORP. OF DELAWARE, GEORG
Free format text: SECURITY INTEREST;ASSIGNOR:TEXAS COMMERCE BANK DALLAS, N.A. A NATIONAL BANKING ASSOCIATION;REEL/FRAME:006100/0137
Effective date: 19910507
Owner name: GLENAYRE ELECTRONICS, INC.
Free format text: MERGER;ASSIGNORS:BBL INDUSTRIES, INC., (MERGED INTO);GLENCOM II, INC., (CHANGED INTO);GLENAYRE ELECTRONICS, INC.;AND OTHERS;REEL/FRAME:006083/0797
Effective date: 19910228
Apr 13, 1992AS06Security interest
Owner name: BBL INDUSTRIES, INC. A CORP. OF DELAWARE 2935 NORT
Owner name: TEXAS COMMERCE BANK DALLAS, N.A. A NATIONAL BANKIN
Effective date: 19910507
Apr 13, 1992AS03Merger
Owner name: BBL INDUSTRIES, INC., (MERGED INTO)
Owner name: GLENAYR
Owner name: GLENAYRE ELECTRONICS, INC.
Effective date: 19910228
Owner name: GLENCOM II, INC., (CHANGED INTO)
Aug 23, 1988ASAssignment
Owner name: TEXAS COMMERCE BANK DALLAS, N.A., TEXAS
Free format text: SECURITY INTEREST;ASSIGNOR:BBL INDUSTRIES, INC.;REEL/FRAME:005043/0008
Effective date: 19880701
Aug 23, 1988AS06Security interest
Owner name: BBL INDUSTRIES, INC.
Owner name: TEXAS COMMERCE BANK DALLAS, N.A., TEXAS COMMERCE B
Effective date: 19880701