US 3795098 A
A digital indication electronic wristwatch having a liquid crystal display panel driven by the output of a standard oscillator through frequency divider circuitry. Time regulation is provided by means of a first switch for resetting the entire frequency dividing circuit and a second switch for individually resetting that portion of the frequency divider circuit whose output corresponds to a 1-second or 1-minute signal. If desired, further swiches may be provided for individually resetting those portions of the frequency divider circuit whose output corresponds respectively to the 10-second, 10-minute or 1-hour signal.
Claims available in
Description (OCR text may contain errors)
United States Patent 1 Fujita Mar. 5, 1974  TIME CORRECTION DEVICE FOR DIGITAL 3,672,155 6/1972 Bergey et a1 58/85.5 X INDICATION ELECTRONIC WATCH 3,668,859 6/1972 Polin 58/23 R Inventor: Kinji Fujita, 10616, Takagi,
Shimosuwa-machi, Suwa-gun, Nagano-ken, Shimosuwa, Japan Filed: Dec. 2, 1971 Appl. No.: 204,064
Foreign Application Priority Data Dec. 3, 1970 Japan 45/106454 US. Cl 58/85.5, 58/50 R, 58/33 Int. Cl. G04b 27/00 Field of Search. 58/23 R, 33, 50 R, 23 A, 85.5
References Cited UNITED STATES PATENTS Primary ExaminerRichard B. Wilkinson Assistant Examiner.U. Weldon Attorney, Agent, or Firm-Blum, Noscovitz, Friedman & Kaplan  ABSTRACT A digital indication electronic wristwatch having a liquid crystal display panel driven by the output of a standard oscillator through frequency divider circuitry. Time regulation is provided by means of a first switch for resetting the entire frequency dividing circuit and a second switch for individually resetting that portion of the frequency divider circuit whose output corresponds to a l-second or l-minute signal. 1f desired, further swiches may be provided for individually resetting those portions of the frequency divider circuit whose output corresponds respectively to the 10- second, 10-minute or l-hour signal. I
3 Claims, 3 Drawing Figures Fa F SEGMENT DECODER SEGMENT DECODER fir H1 R TIME CORRECTION DEVICE FOR DIGITAL INDICATION ELECTRONIC WATCH BACKGROUND OF THE INVENTION This application relates to a device for effecting time correction and regulation in digital indication electronic Wristwatches utilizing liquid crystal displays. In the art, such watches have generally been provided with correction devices which are far inferior to the correction devices incorporated in mechanical watches, when the ease of time correction is consid ered, or not provided with such time correction devices at all. Regulation was generally performed by providing a device which permitted only the resetting of thedisplay of the watch as a unit, in other words, the resetting of the display back to the zero second, zero minute, zero hour position.
SUMMARY OF THE INVENTION Generally speaking, in accordance with the invention, a digital indication electronic wristwatch is provided having standard high frequency oscillator means, frequency divider circuit means coupled to saidoscillator means for dividing the frequency output thereof into time indication signals, liquid crystal display means, means for applying said time indication signals to said liquid crystal display means for the digital display of time, and time regulation means including first switch means for resetting said'frequency divider circuit means as a unit, and second switch means coupled to the portion of said frequency divider circuits producing a l-second or l-minute signal for resetting said individual portion. Further switch means may be provided for individually correcting each of the portions of said frequency divider circuit means producing the second, lO-minute and l-hour signals.
Accordingly, it is an object of this invention to pro-' vide a time correction and regulation device for digital indication electronic Wristwatches which permits time correction and-regulation to be easily and accurately performed by anyone, without the need for special skills.
Still other objects and advantages of the invention will in part be obvious and will. in part be apparent from the specifications and drawings.
The invention accordingly comprises the features of construction, combinations of elements, and arrangement of parts which will be exemplified in the construc tions hereinafter set forth, and the scope of the invention will be indicated in the claims.
BRIEF DESCRIPTION OF THE DRAWINGS For a fuller understanding of the invention, reference is had to the following description taken in connection with the accompanying drawings, in which:
FIG. 1 is a block diagram of the digital indication electronic timepiece incorporating a time correction device according to the invention;
FIG. 2 is a circuit diagram of a COS/MOS inverter according to the invention; and
FIG. 3 is a COS/MOS ripple carry counter according to the invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to FIG. 1, a block diagram of one embodiment of a digital indication electronic watch provided with a time correction and regulation device is depicted; In said block diagram, X refers to a time standard crystal oscillator, the frequency of which is generally selected at 2 so as to permit efficient frequency division. The output signal of said crystal oscillator is amplified and reversed in phase by an inverter and applied to a ripple carry counter 1 formed from metal oxide semi-conductor transistors arranged in complimentary-symmetry configurations, and hereinafter referred to as COS/MOS transistors.
A circuit diagram of an inverter formed of COS/MOS transistors and the input and output wave forms thereof is depicted in FIG. 2. Said inverter circuit is formed of a pair of MOS transistors aligned in the complimentarysymmetry configuration.
Referring now to FIG. 3, a circuit diagram and input and output wave forms of one step of the ripple carry binary counter 1 are depicted. Said counter begins counting when the voltage on the reset terminal R is low and is reset when the voltage on reset terminal R is high. The input signals, taken from the crystal oscillator and inverters are applied to terminals 4) and zb while the outputs at each step are taken at terminals Q and Referring again to FIG. 1, ripple carry counter 1 has n steps and produces a l-second signal at output terminal O which is applied to the nextfrequency dividing step. Circuit network 2 includes a decade counter and a segment decoder, and is adapted to produce a 10- second signal from the l-second signal, while at the same time, producing the l-second timing signals which are applied to a segment decoder 8 to operate the seconds units digit of the liquid crystal display panel 7. Said seconds units digit, as well as the other digits of the liquid crystal display panel each consist of a 7 bar display, said segment decoder serving to excite the appropriate segments for display of the required number ramzqrql 9-..Saids9sms 2ts12s9sls p s in the same manner as the decoder drivers de ibed in United States Pat. No. 3,672,155, which issued to John M. Bergey et al. on June 27, 1972, and may be formed of like circuitry.
Circuit networks 3 and 5 each consist of a U6 fre- Circuit networks I, 2, 3, 4, 5 and 6 are connected in,
series, a capacitor and a pair of inverters being connected in series between each adjacent network pairs.
Regulation of the circuit of FIG. 1 is effected, in the first instance, by a switch S which, when closed, resets all of the circuit networks 1, 2, 3, 4, 5 and 6. The resetting voltage is applied through the diode and inverters. Thus, in effect, the opening and closing of switch S permits the use of the watch as a stopwatch. However, where the watch is to be utilized for ordinary purposes, the switch S would permit the setting of the watch only once a day at 24 oclock, an arrangement which is completely inconvenient.
' hours and minutes display, resetting at the correct time means for resetting said frequency dividerrneans to once a minute is made possible by positioning switch S so that it is capable of simultaneously resetting circuit networks 1, 2 and 3.
Complete time correction is achieved by means of switches S S S S and S Taking switch 5;, as an example, the operation of each of said switches is explained as follows. Since the DCportion of the output signal is cut by capacitor C the input of the inverter which drives circuit network 2 is maintained at low" (voltage=V,,) by the resistance R, except during the transition period when'the output signal is reversed. For this reason, when the switch S is turned on, a high voltage (V is applied at the input signal. of the inverter which in turn applies a suitable input signal to circuit network 2. Thus, for each close-open cycle of switch 8,, a signal is applied to circuit network 2, by means of which the indication at the corresponding seconds units digit may be corrected.
By the same principal, each unit of indication may be individually corrected by meansof the switches S S S and 8,. Such correction can be effected rapidly and precisely both when the electric power source is first applied, and during normal use, when the time indication of the watch is incorrect.
' it will thus be secn that the objects set forth ab ove;
and those made apparent from the preceding description, are efficiently attained and; since certain changes may be made in the above constructions without departing from the spirit and scope of the invention, it is intended that all matter contained in the above description or shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.
It is-also to be understood that the following claims are intended to cover all of the generic and specific features of the invention herein described, and all statements of the scope of the invention which, as a matter of language, might be said to fall therebetween.
"whariseisatd is? 1. A digital indication electronic wristwatch comprising standard high frequency oscillator means; multi-stepped frequency divider cirucit means coupled to said oscillator means for dividing the frequency output thereof'into time indication signals, including l-second, 10-second, l-minute, 10-minute,
and l-hour signals; liquid crystal display means .adapted for the digital display of time; means for applying said time indication signals to said liquid crystal display means for driving said display means; and time regulation means including resetting switch ifiiQoh' Sid to said frequency divider circuit;
' points in said series connection.
a zero condition as a unit; and a plurality of singleswitch means each including a single ma'nually'operable switch, oneof said :single switch means being coupled to each of the steps of said frequency divider circuit means producing said l-second, lO-second, l-minute, IO-minute, and l-hour signals for individually correcting each of said steps Without affecting the higher frequency. steps by increasing the count in each of said dividercircuit steps by one unit upon each manual operation of the respective single switches.
2. A digital indication electronic wristwatch as recited in claim 1, wherein said steps of said frequency divider circuit means are connected in series, and including capacitor means connected to the output of the step in advance of each step to be individually. reset, each of said single switches being connected between a high potential and a point in said series 7 connection intermediate said capacitor means and each step to be corrected; and resistor means connected between a low potential and each 'of said 3. A digital indication electronic wristwatch com: prising standard high frequency oscillator means; multi-stepped frequency divider circuit means coupled to said oscillator means for dividing the frequency output thereof into time indication signals, including l-minute, l0-minute, and lhour signals;' liquid crystal display means adapted for the digitaldisplay of time; means for applying said time indication signals 'to'said liquidcrystal display means. for .driving said displayimeans; and time regulation .means including resetting switch means coupledto creasing the count in each of said divider circuits steps by one unit upon each manual operation of the respective single switches, said steps of said frequency divider circuit means being connected in. series, capacitor means connected to the output of the steps in advance of each step to be individually reset, each said single switch being connected between a high potential and a point in said series connection intermediate said capacitor means and each step to be corrected; and resistor means con- ,nected between a low potential and each of said points in said series connection.