US 3808347 A Abstract An electronic music tone generator for an electronic organ that reduces the jitter (phase modulation) of the tones produced with respect to the jitter present in the tones produced by known prior art arrangements. The generator from which the various tones of the highest octave are generated includes a pulse generator and three groups of four digital frequency dividers, each digital divider having a dividing factor equal to a rational fraction closely approximating the irrational number (12 2ROOT 2)3 (three half-tones (minor third)). The four digital dividers of each group are connected in series and the three groups are connected in parallel with respect to the pulse generator. One group is fed directly from the pulse generator. The second group is fed from the pulse generator by a digital frequency divider having a dividing factor equal to a rational fraction closely approximating the irrational number (12 2ROOT 2) (one half-tone). The third group is fed from the pulse generator by a digital frequency divider having a dividing factor equal to a rational fraction closely approximating the irrational number ( 2ROOT )2 (one full-tone). Each digital divider stage includes two digital counters, a control circuit and a suppressor circuit. One of the counters coupled to the group input or the output of the previous stage of a group controls the other counter and the suppressor circuit which is also coupled to the group input or the output of the previous stage of a group. The other counter and the control stage controls said one of the counters.
Description (OCR text may contain errors) United States Patent Gehrig Apr. 30, 1974 ELECTRONIC MUSIC TONE GENERATOR Primary Examiner-Richard B. Wilkinson WlTl-l PULSE GENERATOR AND Assistant ExaminerStanley .l. Witkowski FREQUENCY DIVIDERS Attorney, Agent, or Firm-John T. OHalloran; Me- Inventor: Wim'ied w. g, Freiburg nott1 J. Lombard1, Jr., Alfred C. Hill Germany 73 Assignee: n'r Industries, Inc., New York, ABSTRACT An electronic music tone generator for an electronic [22] Filed: June 5, 1973 organ that reduces the jitter (phase modulation) of the tones produced with respect to the jitter present in the [21] Appl' 367309 tones produced by known prior art arrangements. The Related US. Application Data generator from which the various tones of the highest 3 Cominuatiomimpan f No 250,439, May 4, octave are generated includes a pulse generator and 1972 abandone three groups of four digital frequency dividers, each digital divider having a dividing factor equal to a ratio- [30] F i A li ti P i it D t rial fraction closely approximating the irrational num- June 1, 1971 Germany 2127006 her (12%? (three half'tones (minor third The four digital dividers of each group are connected in 52 U.S. c1. s4/1.01, 84/DIG. 11 Series and the three groups are eehheeted Perellel [51] Int. Cl. Glh 5/06 with respect to the Pulse generatorone group is fed 58 Field of Search 84/1.01, 1.03, 1.11, 1.19, directly from the Puhegeherater- The seeehd greuP is 84/DIG 11; 307/220 R, 221 R, 225 R; fed from the pulse generator by a digital frequency di- 32s/14-17, 34, 37-39,- 41, 4s r er er ta e ivi fa tqr ,eaualiqara qn l fraction closely approximating the irrational number [56] References Cited (12 V5) (one half-tone). The third group is fed from the UNITED STATES PATENTS pulse generator by a digital frequency divider having a dividing factor equal to a rational fraction closely ap- 3,499,090 3/1970 Meyer 84/l.01 d 'ifi e 'n qg mg (one $2 27; 2 42 tone). Each digital divider stage includes two digital 3'6OI'SI8 8/1971 m counters, a control circuit and a suppressor circuit. 3:6l7:90] I M97 I Franssenm 328/17 One of the counters coupled to the group mput or the 3,639,853 2/1972 Sakai 84/l.0l x Output of the Previous Stage of a group controls the 3 9 .20 1972 Arum i 34 131 other counter and the suppressor circuit which is also 3,702,370 1 H1972 Hallman 84/ 1.01 coupled to the group input or the output of the previ- 3,743,756 1973 Franssenet al 84/ 1.01 ous stage of a group. The other counter and the control stage controls said one of the counters. 10 Claims, 3 Drawing Figures PULSE GENERATOR fg 01 0 (5 0m fg /49 f 796/ 796/785 49 1 e [7627 M DFD\ 55 DFD 01 0 fg DFD DFD 796 01 17 ii DFD. 1551491/44/37/ DFD 44/37 DFD 171- 0 9511115 4 4137 DFD 7 4 01- 13. 4 i 4 DFD DFD DFD\ DFD DFD DFD "f 37 4 f7 /37 f8 DFD\ DFU DFD DFD DFD DFD DFD :D/G/TAL FREQUENCY DIV/DER PATENIHI ll'lj 30 BM SHEET 2 0F 3 (wk 2300 Q qR B5 mm E W QOWK ZOU k Sums QOWWMQQQDW PATENTEnmsomn SHEET 3 Fig. DIG/7A1. COUNTER OECODER DIGITAL COUNTER own-AL cowvrea SUPPR$5I ON c R c u/ r (/NH/B/ r qA re) ELECTRONIC MUSIC TONE GENERATOR WITH PULSE GENERATOR AND FREQUENCY DIVIDERS CROSS-REFERENCE TO RELATED APPLICATION This is a continuation-in-part application of copending application Ser. No. 250,439, filed May 4, 1972 now abandoned. BACKGROUND OF THE INVENTION The present invention relates to a frequency generator for electronically deriving the 12 well-tempered halftones of the highest octave of a musical instrument from the constant frequency of a pulse generator by means of a frequency divider for each halftone. From the journal Elektor," July/August I970, pp. 136 to I40, a digital tuning device for the exact tuning of electronic musical instruments is disclosed in which, by means of a digital frequency divider switchable between two integral dividing factors, the frequencies of two neighboring half-tones can be derived from the frequency of a continuously tunable oscillator. In this case, use is made of the well-known fact that the frequencies of the half-tones of the well-tampered scale, which is also referred to as equal-tempered scale," differ from each other by the constant factor 12 V7, this irrational number being approximated with sufficient accuracy by a rational number. For this approximation, the above-mentioned journal gives the rational fraction or numerical ratio 196:185. Thus, the abovementioned switchable digital frequency divider can be switched between the dividing factors 196 and 185. If, therefore, the oscillator frequency is first divided by 196 and the same oscillatorfrequency is then divided by 185 then two neighboring half-tones have been 15ft?- duced. The error resulting in relation tothe irrational dividing factor 12 V7 is X 10' and is not perceived by the human hearing. The above tuning principle is also known from the German Printed application No. l,2l 3,210. In this prior art reference, however, it is also stated that this principle may be used to build homophonic or polyphonic instruments. In the homophonic version, a switchable frequency divider must be provided having twelve different dividing factors that can be selected, while in the polyphonic version a maximum of 12 dividers are provided, each of which are adjustable to at least two differentdividing factors. For the last-mentioned polyphonic version of an electronic musical instrument, it is also known from the journal Elektor," May 1971, pp. 540 and 541, to associate each half-tone with a frequency divider of its own having a single dividing factor, each divider being controlled by the oscillator and all dividers being connected in series. The principal disadvantage of an electronic musical instrument built on the principle of the-known tuning devices is that the individual half-tones of the welltempered scale can only be obtained by switching a frequency divider. For electronic musical instruments it is necessary, however, that the frequencies of the individ-. ual half-tones be formed not only after a switch has been actuated from outside, but that they be always electrically available within the instrument also without actuation of a keyboard, or the like. This is necessary particularly because conventional electronic musical instruments are designed so that, from the 12 half-tones of the highest playable octave, the 12 half-tones of the lower octaves are produced by'integral frequency dividers based on the factor two. Although this object may be regarded as having been attained by the arrangement described in the last-mentioned reference, this approach has the decisive disadvantage that the individual frequency dividers have different dividing factors, so that 12 frequency dividers must be provided which are designed differently from the point of view of the circuit engineering. SUMMARY OF THE INVENTION An object of the present invention toattain the above-mentioned object by a different course and eliminates the disadvantages of the known prior art. A feature of the present invention is to provide an electronic music tone generator for producing twelve well-tempered half-tones of the highest octave of a musical instrument comprising: a pulse generator having a given stabilized frequency; a first group of four digital frequency dividers connected in series; a second group of four digital frequency dividers connected in series; a third group of four digital frequency dividers connected in series; the first group being directly connected to the generator; a first intermediate digital frequehcy divider connecting the second group to the generator; and a second intermediate digital frequency divider connecting the third group to the generator; each i of the dividers of the first, second and third groups having a dividing factor equal to a first rational fraction closely approximating a first irrational number equal to (12 V7); the first intermediate divider having a dividing factor equal to a second rational fraction closely approximating a second irrational number equal to (12 V5); and the second intermediate divider havinga dividing factor equal to a third rational fraction closely approximating a third irrational number equal to (12 Another feature of the present invention is that it is possible to closely approximate the first irrational number by the first rational fraction being equal to 44/37, ' the second irrational number by the second rational fraction being equal to 196/ l 85, and the third irrational number by the third rational fraction being equal to /49. A Still another feature of the present invention is characterized in that the pulses of the pulse generator are applied to both the first frequency divider of the first group and the intermediate frequency dividers preceding the two remaining groups, that the output pulses of the suppressor circuit of the respective frequency divider are applied to the input of the next succeeding frequency divider, and that the 12 half-tones are produced from the frequency of the pulses produced by a second digital counter of each of the four frequency dividers of the three groups when it is reset to zero. In this connection, it is particularly advantageous if the frequencies of the pulses of the frequency dividers of the three groups are each coupled to a difi'erent additional frequency divider having an integral dividing factor to produce the ,12 half-tones. In this case said integral dividing factor may have the values of four or eight, for example. Still a further feature of the present invnetion is to provide a digital frequency divider to provide an output signal whose frequency equals the frequency of an 3 input signal divided by a rational fraction comprising: an input; a first digital counter coupled to the input; a suppressor circuit coupled to the input and the first counter; a second digital counter coupled to the first counter; and a control stage coupled between the first and second counters; the first counter selectively counting to those two integers between which is lo-. cated the quotient (Z/Z-N) and is subsequently reset to zero, where Z is the numerator and N is the denominator of the rational fraction; the second counter counting to the difference between Z and N and then is reset to zero; the first and second counters, the suppressor circuit and the control stage cooperating so that when the first counter is reset to zero a counting pulse is coupled to the second counter and the suppressor circuit, that the control stage switches the first counter between the two integers as a function of the count of the second counter, and that when the suppressor circuit receives the counting pulse the suppressor circuit suppresses one pulse of the pulses coupled to the input tov provide the output. In this connection, it is particularly appropriate if the pulses to be suppressed are evenly distributed among the number of pulses corresponding to the numerator of the dividing factor. BRIEF DESCRIPTION OF THE DRAWING Above-mentioned and other features and objects of this invention will become more apparent by reference to the following description taken in conjunction with the accompanying drawing, in which: FIG. 1 illustrates in block diagram form a circuit arrangement in accordance with the principles of the present invnetion; FIG. 2 illustrates in block diagram form a frequency divider that may be employed for the digital frequency dividers having a division factor equal to a rational number; and FIG. 3 illustrates a logic diagram of one embodiment of the frequency divider stage of FIG. 2. DESCRIPTION OF THE PREFERRED EMBODIMENT The block diagram of FIG. 1 illustrates an electronic music tone generator in accordance with the principles of the present invention including a pulse generator G whose frequency 1', may be variable within certain limits for fixing the pitch, while remaining constant when the musical instrument is being played. Furthermore, FIG. 1 illustrates three groups of four series-connected digital frequency dividers each having a dividing factor equal to a rational fraction, which rational fraction is 44/37. Thus, the frequencies of two neighboring stages of a group differ by three half-tones, i.e., by a minor third, because the rational fraction 44/37 closely approximates the irrational number (12 V) with sufficient accuracy, i.e., with a no audible inaccuracy. The middle one of the three groups of digital frequency dividers of FIG. 1 is driven directly by pulse generator G, while the group of digital frequency dividers on the right side of FIG. 1 is driven by pulse generator G via a first intermediate digital frequency divider which divides the pulse generator frequency f, by a dividing factor equal to the rational fraction 196/185. Thus, the input frequencies of the first stage of the middle and right groups digital frequency dividers differ by one half-tone because the rational fraction 196/185 closely approximates the irrational number 12 \/'2 with sufficient accuracy. The group of digital frequency dividers on the left side of FIG. 1 is connected to generator G via a second intermediate digital frequency divider by a dividing factor equal to the rational fraction 55/49, so that the input frequencies of the first stage of the middle and the left groups of digital frequency dividers of FIG. 1 differ by one whole tone because the rational fraction 55/49 closely approximates the irrational number (12 V3 with sufficient accuracy. Thus, the first stages of the three groups of digital frequency dividers are driven with frequencies which are shifted in relation to each other by one half-tone. The output frequencies of the three groups of vfour digital frequency divider stages each of which divide by the rational fraction 44/37 are used to produce the twelve half-tones of an octave In FIG. 1, it is also illustrated that the 12 stages dividing by the rational number 44/37 have, in addition to the output controlling the next stage, a further output, which is followed by a stage dividing by the integer four. At the output of this stage, the 12 half-tones of the highest octave are available. A subsequent integral division by eight is also possible. From the thusly produced tones of the highest octave, any tone of a lower octave can then be produced, in a known manner, by means of successive division by the factor two. The just explained facts concerning the dividing factors and spacings between the individual frequencies produced in the block diagram of FIG. 1 is entered in FIG. 1 for some of the digital frequency divider stages. For example, the output frequency of the first stage of the middle group driving the next succeeding stage of the middle group is while the frequency driving the stage dividing by the factor four is j',/44, i.e., at the output of the frequency divider stage, the input frequency is divided by the numerator Z of the rational fraction. Assuming that the frequency f, of the pulse generator G is chosen to be 1,473,472 Hz (hertz) and using the numerical ratios stated, the tones of the fifth line octave are available at the outputs of the 12 stages after being divided by a factor of four. The frequencies are designated f, to f,,, with the frequency f, corresponding to the sixth-line C or fifth-line B-sharp, and the frequency f corresponding to the fifth-line D-flat or fifthline C-sharp. Taking a concert pitch for the first-line A of 440 Hz as a basis, the fifth-line A must have a frequency of 7,040 Hz. Proceeding from the abovementioned frequency f}, 1,473,472 Hz, a frequency of 7,040.0907 Hz is obtained with the arrangement of the present invention, which, with eference to the exact frequency of 7,040 Hz of the fifth-line A, corresponds to a relative deviation of 1.3 X 10*. The following is a TABLE relating each of the output frequencies to its corresponding musical note or notes of the fifth-line octave. TABLE Frequency Output Musical Note f, sixth-line C or fifth line B-sharp f, fifth-line C-flat or fifth line B I, fifth-line B-flat or fifth line A-sharp f fifth-line A f, fifth-line G-sharp or fifth-line A-flat f fifth-line G J, fifth-line G-flat or fifth-line F-sharp f fifth-line E-sharp or fifth-line F f fifth-line F-flat or fifth-line E fit fifthline E-t'lat or fifth-line D-sharp f fifth-line D f fifth-line D-flat or fifth-line C-sharp FIG. 2 illustrates the block diagram of a digital frequency divider stage having a dividing factor equal to a rational fraction. To achieve a rational dividing factor which may be written as a fraction in the form numerator Z divided by denominator N, e.g. 44/37, the two digital counters DZl and DZ2, the control stage St and the suppressor circuit A are provided. The counting capacities of the two digital counters DZl and DZ2, i.e., that number of pulses which the digital counter counts and whereupon it is reset to zero, are different from each other. The second digital counter DZ2 counts to the difference (Z-N), i.e., in the above example to seven, while the first digital counter DZl selectively counts to the two integers between the quotient (Z/(ZN)) lies, i.e., in the above example to six or 7 seven. In doing so, the first digital counter DZl is controlled by the pulses of the generator frequency f,, or the output frequency of the preceding digital frequency divider stage. After each counting cycle of the first digital counter DZl, a pulse is transmitted to the second digital counter DZ2, which counts these pulses. Furthermore, this pulse, which might also be regarded as the reset pulse of the first digital counter DZl, is fed to suppressor circuit A, which also receives the pulses having the generator frequency f,,, or the output frequency of the preceding digital frequency divider stage. Suppressor circuit A passes the pulses of the input frequency, such as frequency f}, unchanged unless the reset pulses of the first digital counter DZl arrives, in which case a pulse of the pulse train of the input frequency is suppressed. Thus, in the above example, every sixth or seventhpulse of the frequency f, is suppressed. Control stage St, depending on the count of the second digital counter DZ2, controls the counting capacity of the digital counter DZl in such a manner that the number of pulses to be suppressed out of Z and corresponding to the difference (Z-N) are as evenly as possible distributed among the Z pulses. In the example given, the counting capacity of the first digital counter DZl is so controlled between six and seven that of every 44 input pulses the 7th, 13th, 19th, 26th, 32nd, 38th and 44th pulse is suppressed. For the rational dividing factor 55/49, the switching of the counting capacity of the first digital counter DZl between the values nine and ten is effected in such a manner that of every 55 input pulses the 9th, 18th, 27th, 36th, 45th and 55th pulse is suppressed, while for the frequency divider with the rational dividing factor 196/185 the counting capacity of the first digital counter DZl is switched between the values seventeen and eighteen in such a manner that of every 196 pulses the 17th, 35th, 53rd, 71st, 89th, 106th, 124th, I42nd, 160th, 178th and 196th pulse is suppressed. According to the above explanations, the reset pulse of the second digital counter DZ2 is always transmitted after the number of pulses corresponding to the numerator Z of the rational dividing factor. The frequency of these reset pulses therefore corresponds to the frequencyjL/Z. This frequency, as already stated above, is used to produce the 12 half-tones. The method of frequency division employed in the pulse tone generator of the present invention is based on the principle of suppressing (inhibiting) several pulses of a continuous pulse train. This is more fully xplained by the following example. When suppressing every tenth pulse of a continuous pulse train having a pulse repetition frequency f, the remaining continuous pulse train has an average pulse repetition frequency of (9/l0)f. The resulting pulse train now contains eight pulses having a distance T from each other and one pulse having a distance of 2T from the next pulse. To compensate for these great differences of the periodic times T and 2T, the pulse repetition frequency of the continuous pulse train must be high and the resulting pulse train is counted by a binary counter, for instance, by a 2 counter. The rectangular output of such a counter will have a pulse repetition frequency of (9/10X2) f= (9/lOX128)f and a pulse duty factor of 0.5. The output pulse train of the counter contains two periodic times 142T and 143T which exist with two predetermined distributions so that the average periodic time is 142.22T. The music tone generator of the present invention includes divider stages which divide by the above indicated irrational numbers which are approximated by the rational fractions 44/37, 55/49 and 196/185. To provide frequency division by these ational fractions according to the suppression method there must be suppressed seven pulses of the 44 pulses, six pulses of 55 pulses and 1 1 pulses of 196 pulses, respectively. The resulting 37, 49 and pulses are fed to the next identical frequency dividing stage which also suppresses the above indicated number of pulses for each of the 44, 55 and .196 pulses at the suppressing circuit output. In addition, the suppressed pulses must be distributed in the continuous pulse train as equally as possible. This is achieved by suppressing those pulses for each of the 44, 55 and 196 pulses indicated hereinabove. Referring to FIG. 3 there is illustrated therein the logic diagram of one embodiment the frequency division arrangement of FIG. 2 for a dividing by a rational number 44/37 when switch S1 is in its open position and switch S2 is in its closed position as illustrated. The digital counter DZl is preferably a four stage feedback shift register as described in the article by A. C. Davies, The Design of Feedback Shift Registers and Other Synchronous Counters, The Radio and Electronic Engineer, April 1969, pages 213-223 and in particular page 216 wherein the preferred feedback shift register is referred to as a twisted ring counter." These counters consist of n stages and have a counting capacity of Zn since the code produced by the counting has 2n positions different from each other. Therefore, counter DZl has a counting capacity of eight. Decoder 1 included in the control stage St monitors count positions 6 and 7 of counter DZl and generates an output pulse when this counter reaches one or the other of these positions. The output pulse from decoder 1 resets counter D21 and advances counter DZ2 into the next counting position. Counter DZ2 is of the same type described in the above-identified article and also includes four stages and a counting capacity of eight. Decoder 2, which forms another portion of control stage St, monitors the counting positions 3 and 6 of counter DZ2. Decoder 2 produces a control signal at each of these counting positions which controls decoder 1 in such a way that if counter DZ2 is in the positions, 1, 2, 4, 5 and 7, counter DZl produces a reset output through an AND gate included in decoder 1 when this counter is in position 6 and if counter DZ2 is in the positions 3 and 6, counter DZl counts until position 7 is reached at which time another AND gate will produce the reset output of decoder 1. In addition, decoder 2. controls the resetting of counter DZ2 after seven counting steps. This reset pulse of decoder 2 is, therefore, generated once for every 44 input pulses. The frequency of the reset pulse is, therefore, fg/44. In addition, the reset pulses produced by decoder l suppresses seven pulses which are equally distributed throughout each group of 44 pulses coupled to the input of counter DZl and also to the input of the suppression circuit A. Circuit A includes therein at least one inhibit gate which produces the desired suppression having the distribution of suppressed pulses as mentioned hereinabove. As a result, the output of the inhibit gate of suppression circuit A is fg/(37/44). Therefore, each of the 44/37 divider stages, as described with reference to FIG. 3 has a two fold function, namely, it divides the input pulses by 44 and suppresses seven of these 44 pulses. One stage of a 55/49 divider is built in a manner similar to a 44/37 divider stage with the following exceptions. Counter DZ] has five stages and, therefore, a counting capacity of ten. Decoder 1 monitors the counting positions 9 and 10. Counter DZ2 has three stages and, therefore, a counting capacity of six. Decoder 2 monitors the counting position 6 and controls decoder 1 in such a way that as the result of the cooperation of counter DZ] and decoder 1 counter DZl counts five times to 9 and one time to 10 to provide the desired pulse distribution as set forth hereinabove. The reset signal of decoder l suppresses six of 55 input pulses in suppressing circuit A. A stage of a 196/185 divider is substantially the same as illustrated in FIG. 3 with the addition of a digital counter D23 which is placed in operation by closing switch S1 and opening switch S2. Counter DZl has five stages and a counting capacity of 10. Decoder 1 monitors the counting positions 8 and 9 of counter DZl. Counter DZ2 has six stages and a counting capacity of 12. Decoder 2 monitors the counting position 11 of counter DZ2 and resets this counter if it reaches counting position 11. Further, decoder 2 controls decoder l in such a way that counter DZl counts to 9 ten times and to 8 one time. Therefore, the suppressing circuit A would supress 22 pulses of 196 pulses. But since only 11 pulses are to be suppressed each second suppressing pulse must be rendered inactive. This is accomplished by counter D23 which is a one stage twisted ring counter having a division factor of two. Through the suppression of the (Z-N) pulses out of every Z pulses and the above-explained passing of the frequency f, divided by the rational dividing factor Z/N on to the next frequency divider stage, a phase modulation (jitter) is obtained which increases from stage to stage. This results in a possibly audible frequency spectrum which is not in a musical relation to the halftone produced and, therefore, has a disturbing effect. The principal advantage of the inventive arrangement of dividing the 12 frequency dividers among three groups each consisting of four frequency dividers is that, thanks to the small number of series-connected stages, this jitter error cannot sum up to interfering values. The inventive driving of the integral frequency divider stages by means of the reset pulses of the second digital counter of the respective frequency divider of the groups of frequency dividers has the additional advantage that the phase modulation obtained in the frequency divider stage of a group does not contribute to the half-tone produced by means of this integral frequency divider stage, but becomes effective only in the next stage. These advantages must be emphasized particularly in relation to the arrangement known from the above-mentioned journal Elektor, May 1971, pp. 540-541, in which 12 divider stages are connected in series and in which, consequently, the phase modulation resulting from the rational fraction approximation of an irrational number (jitter) sums up to a much more considerable extent than in the arrangement according to the present invention. In addition, the dividing factor (12 2) can be approximated by a fraction whose numerator and denominator have considerably smaller numbers than the approximation for the dividing factor 12 V2, resulting in a much smaller investment in circuitry for each frequency divider stage. The electronic music tone generator of the present invention can be realized in a very simple and spacesaving manner by means of monolithic integrated circuits. Possible solutions are using both bipolar integrated circuits and metal oxide semiconductor field effect transistors, the most favorable solution being a total integration of the circuit with the last-named technique. While 1 have described above the principles of my invention in connection with specific apparatus it is to be clearly understood that this description is made only by way of example and not as a limitation to the scope of my invention as set forth in the objects thereof and in the accompanying claims. I claim: 1. An electronic music tone generator for producing twelve well-tempered half-tones of the highest octave of a musical instrument comprising: a pulse generator having a given stabilized frequency; a first group of four digital frequency dividers connected in series; a second group of four digital frequency dividers connected in series; a third group of four digital frequency dividers connected in series; said first group being directly connected to said generator; a first intermediate digital frequency divider connecting said second group to said generator; and a second intermediate digital frequency divider connecting said third group to said generator; each of said dividers 'of said first, second and third groups having a dividing factor equal to a first rational fraction closely approximating a first irrational number equal to (12 V3); said first intermediate divider having a dividing factor equal to a second rational fraction closely approxiing mating a second irrational'number equal to (12 V7); and said second intermediate divider having a dividing factor equal to a third rational fraction closely approximating a third irrational number equal to (12 7 2. A generator according to claim 1, wherein each of said dividers of said first, second and third groups have two outputs, the first of said two outputs providing a first signal having a frequency equal to the input frequency thereof divided by the numerator of said first rational fraction and the second of said two outputs providing a second signal having a frequency equal to the input frequency thereof divided by said first rational function, said second signal being coupled to the input of the next succeeding one of said dividers in the associated one of said first, second and third groups. 3. A generator according to claim 2, further includ- 12 additional digital frequency dividers having a selected integral dividing factor, each of said additional dividers being coupled to a different one of said dividers of said first, second and third groups responsive to said first signal to produce one of said 12 half-tones. 4. A generator according to claim 3, wherein said integral dividing factor equals four. 5. A generator according to claim 1, herein said first rational fraction equals 44/37; said second rational fraction equals 196/185; and said third rational fraction equals 55/49. 6. A generator according to claim 5, wherein each of said dividers of said first, second and third groups have two outputs, the first of said two outputs providing a first signal having a frequency equal to the input frequency thereof divided by the numerator of said first rational fraction and the second of said two outputs providing a second signal having a frequency equal to the input frequency thereof divided by said first rational fraction, said second signal being coupled to the input of the next succeeding one of said dividers inthe associated one of said first, second and third groups. 7. A generator according to claim 6, further including 12 additional digital frequency dividers having aselected integral dividing factor, each of said additional dividers being coupled to a different one of said dividers of said first, second and'third groups responsive to said first signal to produce one of said 12 half-tones. 8. A generator according to claim 7, wherein said integral dividing factor equals four. 9. A generator according to claim 1, wherein each of said dividers of said first, second and third group and said first and second intermediate dividers include an input, a first digital counter coupled to said input, a suppressor circuit coupled to said input and said first counter, a second digital counter coupled to said first counter, and a control stage coupled between said first and second counters, said first counter selectively counting to those two integers between which is located the quotient (Z/Z-N) and is subsequently reset to zero, where Z is the numerator and N is the denominator of the associated one of said first, second and third rational fractions, said second counter counting to the difference betweenZ and N and then is reset to zero, said first and second counters, said suppressor circuit and said control stage cooperating so that when said first counter is reset to zero a counting pulse is coupled to said second counter and said suppressor circuit, that said control stage switches said first counter between said two integers as a function of the count of said second counter, that when said suppressor circuit receives said counting pulse said suppressor circuit suppresses one pulse of the pulses coupled to said input to provide an input signal for the next succeeding one of said dividers, and that said second counter provides an output signal from which the associated one of said twelve half-tones are generated. 10. A generator according to claim 9, wherein said first rational fraction equals 44/37 and said suppressor circuit suppresses the 7th, 13th, 19th, 26th, 32nd, 38th and 44th of every 44 input pulses; said second rational fraction equals 196/185 and said suppressor circuit suppresses the 17th, 35th, 53rd, 71st, 89th, 106th, 124th, l42nd, th, 178th and 196th of every 196 input pulses; and said third rationalfraction equals 55/49 and said suppressor circuit suppresses the 9th, 18th, 27th, 36th, 45th and 55th pulse. of every 55 input pulses. Patent Citations
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