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Publication numberUS3811113 A
Publication typeGrant
Publication dateMay 14, 1974
Filing dateDec 19, 1972
Priority dateJun 21, 1969
Publication numberUS 3811113 A, US 3811113A, US-A-3811113, US3811113 A, US3811113A
InventorsIchida T, Saito T, Yoshino T
Original AssigneeMatsushita Electric Ind Co Ltd
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Keyboard operated pattern generating device
US 3811113 A
Abstract
A pattern generating device for displaying figures such as letters, pictures and the like on a display means such as a cathode ray tube (CRT) and the like by arranging picture elements in a mosaic. The device is adapted to decompose a figure to be displayed into picture elements of red, green and blue colors by an equal number of switches respectively corresponding to the picture elements so that the resulting component figures may be stored in respectively corresponding memory means, and to scan the stored figures with a scanning circuit to reproduce them on a color CRT for monitoring so that the figures may be recorded in a recording means after errors have been corrected. By employing this device, figures consisting of a large number of picture elements can be obtained in a short time, and a moving picture of a mosaic pattern can be easily made.
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Description  (OCR text may contain errors)

United States Patent 11 1 Saito et al.

[54] KEYBOARD OPERATED PATTERN 3,624,634 ll/l97l Clark 340/324 A GENERATNG DEVICE 3,670,322 6/1972 Mallebrein 1. 340/365 x [75] Inventors: i i fi z g ggz g g gl tz Primary ExaminerPaul J. Henon es g V Assistant Examiner-Melvin B. Chapnick dpan Attorney, Agent, or Firm-Stevens, Davis, Miller & [73] Assignee: Matsushita Electric Industrial Co. Mosher Ltd., Osaka. Japan 122] Filed; Dec. 19, 1972 57 ABSTRACT [2i Appl. No.1 316,537 A pattern generating device for displaying figures such as letters, pictures and the like on a display means i Application Data such as a cathode ray tube (CRT) and the like by ar- [63] Continuation-impart of Ser, No 46,041, June 15, ranging picture elements in a mosaic The dew-Ce is 1970 ahanduned' adapted to decompose a figure to be displayed into picture elements of red, green and blue colors by an [30] Foreign Application Prlonty Dam equal number of switches respectively corresponding June 21, 1969 Japan 1, 44 49169 to the picture elements so h the resulting compo nent figures may be stored in respectively correspondl52l 340/1725 340/324 340/324 AD ing memory means, and to scan the stored figures with [5 ll 'f 3/14 3/06 3/02 a scanning circuit to reproduce them on a color CRT new of Search 340/1725 324 324 for monitoring so that the figures may be recorded in 340/365 R? 35/5; 40/52 52 A a recording means after errors have been corrected, v By employing this device, figures consisting of a large [56] Rekrences number of picture elements can be obtained in a short UNITED STATES PATENTS time, and a moving picture of a mosaic pattern can be 2,'-J3|,|U8 4/l960 Brown 35/5 easily made- 3 5H8,838 6/197] Felcheck.,,. 340M725 3,603,962 9/1971 Lechner 340/1725 x 9 Clam, 26 Drawmg figures 3) RESET i COLOR 4 .SW/TCH/NG C/PCU/T PORT/ON i 1 9 i 5 l J 6 /0 in Q 6 s J m MEMORY 55 I 5/9611 REHMQ/CT/OV x E a. .i

I i i is sHiFi I AX/ OUTPUT REG/575R CIRCUIT 5/6 /l L/NG S 7 HEMP REF FENCE .S'Y/VCHRO/V/Z/NG $76M GENERdfl/lfi C/fiCU/T 1451 May 14, 1974 mmngmm 14 1914 3811.1 13

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FIG .5d FL bswlrcH H6 To 9 A IN FIGS. 90 AND 9b FIG. 6 71 i (My v m g OSCILLATOR L 1 T FOR TV I LINE OSCILLATOR COUNTER F0? RECORD ;TO,0

AND 11 FIG 7a HlllIIHIHHIIIHIIHHIIIHIIIHHIllllllllll FIG. 7b FL Fl FIG. 70 FL IL mEmEmm 14 mm 1181 1; 1 13 SHEEHHIFG FIG.8a/

FIG.8b

FIG.8c llllllllllllllll FIG.8d FL FIG.8e HI! Ill III IIIIJIUJHII FIG.8f III! I lllll lllllll lllll Ill FIG.8g llll lllllJlIlll llllll KEYBOARD OPERATED PATTERN GENERATING DEVICE CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation-in-part of application Ser. No. 46,04l, filed June 15, 1970, now abandoned.

BACKGROUND OF THE INVENTION This invention relates to a mosaic pattern generating device for generating colored mosaic patterns.

The system of this invention is adapted for making a recorded tape for a large display system, such as the system which is described in U. S. Pat. application Ser. No. 842,50l now U. S. Pat. No. 3,6l 1,024, issued Oct. 5, 1971.

SUMMARY OF THE INVENTION According to this invention, a pattern is formed elec' trically by pushing switching buttons rather than by picking out with an image pickup tube a painted picture, for example, and the electrically formed pattern is turned into and extracted as electrical signals. Further, when another pattern similar to an original one is required to be formed, the new pattern can be made by modifying only a part of the original pattern.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows a perspective view of a device according to this invention.

FIG. 2 shows the block diagram of the device shown in FIG. I.

FIG. 3 shows the circuit diagram of an example of the device utilizing this invention.

FIGS. 4a to 4e show the waveforms of the output signals employed in this invention.

FIGS. 5a to 5d show the waveforms of the output signals of the shift registers and the memory circuit.

FIG. 6 shows the structure of a reference synchronizing signal generating circuit.

FIGS. 7a to 70 show the waveforms of the output signals of the reference synchronizing signal generating circuit.

FIGS. 8a to 8)! show the waveforms of the output signals of the output signal controlling circuit.

FIG. 9a schematically shows the construction of the output signal controlling circuit in FIG. 2.

FIG. 9b shows a modification of the construction of the output signal controlling circuit shown in FIG. 9a.

In the drawings, like reference numerals refer to like parts.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Now, referring to FIG. I, l is a keyboard comprising a large number of switching buttons which are arranged to correspond to the picture elements ofa pattern to be formed and are adapted to cause the pattern to be formed by depressing them. The buttons are normally opened and are closed only when they are depressed. Numeral 2 is a monitoring panel for displaying the pattern thus formed, which comprises the face of a color CRT. When a pattern is desired to be formed, the switching buttons on the keyboard 1 may be depressed by an operator watching the monitoring panel 2. A color switching portion 3 consists of red, green and blue switches which can produce eight colors as a result of the combined operation of the three switches. A clearing button 4 clears the pattern formed on the monitoring panel 2. By depressing an image transcription button 5 output signals are transmitted to a recording device 12, as shown in FIG. 2.

FIG. 2 illustrates the whole block diagram of the device shown in FIG. 1, in which the parts identical to those in FIG. I are indicated with identical numerals.

The keyboard and the color switching portion 3 have been described above. A memory circuit 6 comprises memory elements, such as flip-flops or core-memories, each thereof corresponding to each of the switches on the keyboard 1, and the memory circuit 6 stores the signals from the respective switches. Further, the memory circuit 6 comprises three circuits of identical construc tion each of which stores signals each thereof representing one of red, green and blue colors.

A reference synchronizing signal generating circuit 7 is composed of two oscillators, a line counter and the image transcription button 5. The two oscillators are for TV display and for recording, respectively. The line counter of the circuit 7 reads out signals on the same horizontal line repeatedly in order to display figures on the CRT panel in a mosaic pattern. This line counter of the circuit 7 is not used during recording (because it is wasteful to record repeatedly the signals on the same horizontal line). The arrangement of the line counter is shown in FIG. 6. The button 5 is normally placed on theTV position, but switched to the REC" position when it is depressed, and is automatically restored to the TV position when the termination of display of one complete figure is sensed by the line counter. By such a switching operation, the frequency of the reference clock signal is changed and the operating condition is concurrently changed from the case where the signals pass through the line counter to the case where the same do not pass through the line counter, or vice versa. X-axis and Y-axis shift register circuits 8 and 9 actuate the memory circuit 6 with reference synchronizing signals generated by the reference synchronizing signal generating circuit 7, where the X-axis refers to a horizontal scanning direction in the memory circuit 6 having a two-dimensional arrangement, while the Y- axis refers to a vertical scanning direction. Shift registers 8 and 9 act as line selectors. Their output lines sequentially become high in level one at a time without fail upon application of an input clock pulse. A pulse is generated at every one cycle of the register 8 and is supplied to the line counter of the circuit 7. The point where the signals from registers 8 and 9 occur concurrently is a single point on the memory plane, which point reads out the memory sequentially.

A reset circuit 4' including the clearing button 4 shown in FIG. 1 is a circuit for clearing all the memories stored in the memory circuit 6. A monitoring por tion 10 comprises a color CRT. The monitor 10 employs an ordinary scanning system of a color television. However, the color signals of R, G and B are supplied as input signals independently of each other. Further, the synchronizing signal is also supplied independently. This is a so-called monitoring television.

One form of the arrangement of an output signal controlling circuit 11 is shown in FIG. 9a. This circuit 11 comprises two shift register circuits 1]] and 112, a monostable circuit 115, R-S flip-flop circuit 117, five AND gates 113, 114, 118, 119 and 120, and a recording switch 116. The recording switch 116 is opened and closed in interlinkage with the image transcription button 5 shown in FIGS. 1 and 6. The shift register circuits 111 and 112 are respectively identical in construction with the shift register circuits 8 and 9 shown in FIGS. 2 and 3. Their first stage output signals are supplied to the AND gate circuit 113 and their last stage output signals are supplied to the AND gate circuit 114. The output signal from the monostable multivibrator circuit 115 is also applied to the input terminal of the AND gate 113. When the recording switch 116 is closed, the monostable multivibrator circuit 115 produces an out put and maintains it during a period of time in which the memory circuit 6 scanned for a single frame. The R-S flip-flop circuit 117 receives the output signal of the AND gate circuit 113 at its set terminal and the out put signal of the AND gate circuit 114 at its reset termi' nal. The output signal of the R-S flip-flop circuit 117 is applied to one of the two input terminals of each of the AND gate circuits 118, 119 and 120 so that it is used by the gate circuits 118, 119 and 120 to control the gating of the color signals from the memory circuit 6, and also it is used to control the recording operation of the recording device 12.

The output signal controlling circuit 11 operates as follows. After the pattern stored in the memory circuit 6 is checked with the monitoring portion including a color CRT and it is assured that there is contained no error in the pattern, the recording switch 116 is closed. This triggers the monostable multivibrator circuit 115 causing it to produce an output signal. If, at that time. the scanning of the memory circuit 6 by the shift register circuits 8 and 9 is under way, no set pulse is supplied from the AND gate circuit 113 to the R-S flip-flop circuit 117. When the memory circuit 6 is read out starting at the first memory position for a frame, the AND gate circuit 113 receives input signals to all of the input terminals thereof and consequently the AND gate circuit 113 applies a set pulse to the R-S flip-flop circuit 117 to put it in its set" state. Upon receiving an output signal from the R-S flip-flop circuit 117, the AND gate circuits 118, 119 and 120 supply three color signals read from the memory circuit 6 to the recorder 12. Simultaneously, by the output signal of the R-S flip-flop circuit 117 the recorder 12 is caused to store the three color signals supplied from the AND gate circuits 118, 119 and 120. When the reading-out operation of the memory circuit 6 is performed successively and eventually comes to the final memory position for a frame, the output signals of the shift register circuits 111 and 112 are simultaneously applied to the input terminals of the AND gate circuit 114, thereby supplying a reset pulse to the R-S flip flop circuit 117. When this occurs, the AND gate circuits 118, 119 and 120 are closed to block the passage of color signals, and the recording operation of the recorder 12 is simultaneously stopped, In this manner, one frame of the pattern stored in the memory circuit 6 is recorded.

FIG. 9b shows a modified form of the output signal controlling circuit 11 shown in FIG. 9a, in which the X-axis shift register circuit 8 and the Y-axis shift register circuit 9 are used in common in place of the shift register circuits 111 and 112. The modified circuit in FlG. 9b operates in the following manner. When the recording switch 116 is closed, the shift register circuits 8 and 9 are reset and the R-S flip-flop circuit 117 is also set. Consequently, the memory circuit 6 is scanned by the shift register circuits 8 and 9 starting from the beginning ofa frame. In response to this, the recorder 12 starts its recording operation and successively records three color signals from the AND gate circuits 118, 119 and 120. When the scanning of the memory circuit 6 reaches the end ofa frame, the output signals of the Y- axis shift register circuit 9 causes a reset pulse to be produced by an AND gate circuit 121 to thereby reset the R-S flip-flop circuit 117. This resetting of the RS flip-flop circuit 117 causes the recorder 12 to stop its recording operation and closes the AND gate circuits 118, 119 and 120.

When this circuit construction is employed, the reproduced picture in the monitoring portion 10 is sub jected to disturbance only when the recording switch 116 is operated. Thus, according to the occurrence of such disturbance," it is possible to decide whether a recording operation has been started normally. Thus, while the memory circuit 6 is repeatedly scanned for display on the CRT 10, the control circuit 11 takes out one frame from the repetitive signals for magnetic tape recording, and produces at the output one of the repetitive signals, corresponding to an interval from one vertical synchronizing signal to the succeeding vertical synchronizing signal. The outside recording device 12 records video signals representing every pattern in synchronized relation to its feeding rate so that every pattern may be recorded continuously. A magnetic recording and reproducing device or a tape punch device may be employed as the recorder.

A data recorder employing a multichannel head is suitable for this recorder. The above-mentioned signals are recorded per one figure in parallel with one another on this recorder. The tape thus prepared is reproduced by a tape player for use in a separate large-sized display system. The details of the separate large display system are described in U. S. Pat. No 3,611,024.

The details of the color switching portion 3 and the memory circuit 6 are described with reference to FIG. 3. Memory circuit 6 is composed of AND gates 13, flip flop circuits 14, AND gates 15 and OR gates 16. The AND gates 13 are gages for selecting a color. By the AND operation on the outputs of 1 and 3, the output pulse of 1 is supplied only to the trigger terminal of the flip-flop circuit for a color selected by 3, and therefore, only the selected color is stored at the selected position. Numeral 15 designates AND gate circuits for reading out the stored signals. The outputs of the shift registers 8 and 9 sequentially scan the memory circuit 6.to read out stored color information.

FIG. 3 shows the state where red is selected by the switch R of the color switching portion 3. When SW, on the keyboard 1 is depressed, for example, the pulses pass through only the AND gate 13 R, and are applied to the trigger input of the flip-flop circuit 14 R,. Namely, the output Q of 14 R, becomes high, but the AND gates 13 G,, 13 B, are shut, so that the pulse output of SW, does not reach flip-flop circuits 14 G, and 14 B,. Namely, the outputs Q of 14 G, and 14 B, are low at this time. The high output signal of 14 R, passes through a specified AND gate 15 R, corresponding to SW, and gives an output signal of the memory circuit 6 via the OR gate 16 R. Conversely, if G and B of the color switching portion 3 become high and R is low, the

output of SW, is supplied to the trigger terminals of the flip-flops 14 G I and 14 8,. In this case, scanning is effected in the similar way to produce output signals of the memory circuit6 via the OR gates 16 G and 16 B, respectively and cyan is displayed on the CRT I0.

The details of the clearing button 4 are also shown in FIG. 3. The output of the reset circuit 4' is connected commonly with the reset terminals of the flip-flop circuits 14. Therefore, upon switching the circuit 4' on, all of the flip-flop circuits I4 are reset and their outputs become low, so that no output signal is generated from the memory circuit 6 and the monitoring panel be comes black.

The waveforms of signals to and from the AND gates 15 are shown in FIGS. 5a to 5d. FIG. 5a shows the output waveform of the flip-flop 14 R, when the output level is high FIG. 5b shows the output waveform of the register 8', FIG. 5c shows the output waveform of the register 9; and FIG. 5d shows the output waveform of the AND gate 15 R,.

The outputs of the memory circuit can be sequentially read out by scanning with the signals shown in FIGS. 5b and 5c. Such a scanning method is already known as disclosed in U. S. Pat. No. 3,02l,387.

The waveforms at the time of TV displaying are shown in FIGS. 70 to 7c. FIG. 7a shows the pulses to be supplied from the line counter of the circuit 7 to the shift register 8 as indicated by (a) in FIG. 6; FIG. 7b shows the pulses to be supplied from the shift register 8 to 10 and II as indicated by (b) in FIG. 6; and FIG. 7c shows the pulses to be supplied from the line counter ofthe circuit 7 to the shift resister 9 as incidated by (c) in FIG. 6.

In FIG. 7c, it will be seen that the pulses are generated for every three pulses in FIG. 7b. This is an example in which the line counter of the circuit 7 counts the pulses in three stages to display one mosaic pattern by three horizontal scanning operations.

When the button 5 in FIG. 6 is switched to the recording position, the control circuit 11 reads out the signals for only one figure from the memory circuit 6, converts them to have a frequency adapted for record ing, and records them in a recorder 12. It also generates a control signal to start or stop the operation ofthe re corder I2 and supplies the same thereto.

The waveforms of the output signals of the control circuit 11 are shown in FIGS. 80 to 8h. FIG. 8a shows a command signal for recording, and recording is effected while the signal is high; FIG. 8b shows a signal to start or stop the recorder 12, and the recorder is running while the signal is high; FIG. 8c shows a horizontal synchronizing signal; FIG. 8d shows a vertical synchro' nizing signal; FIG. 8e shows a red color signal; FIG. 8f shows a green color signal; and FIG. 8g shows a blue color signal. The signal shown in FIGS. 8c to 8g are to be recorded on a magnetic tape, and these five signals are recorded side by side in parallel with one another on the magnetic tape. FIG. 8h shows a clock signal, illustrating switching between the cases of TV displaying and recording.

In the operation, firstly, a desired color is selected by an operator depressing the buttons of the color switching portion 3, and then, a pattern is formed by his watching the monitoring panel 2 and depressing the switching buttons on the keyboard I which correspond to desirable buttons on the monitoring panel 2. As each switching button on the keyboard 1 corresponds to its respective element in the memory circuit 6, when a switching button on the keyboard I is depressed, the selected color is stored in the element in the memory circuit 6 corresponding to the switching button.

On the other hand, the memory circuit 6 is scanned with the reference synchronizing signals generated by the reference synchronizing signal generating circuit 7 so that output signals may be obtained. A frame of the pattern is extracted from these repetitive signals by the output signal controlling circuit II; this function is accomplished by depressing the button 5, whereby the pattern is converted into a signal suitable for magnetic tape recording.

When the pattern thus produced is not needed, it is cleared by the reset circuit 4.

When a part of the pattern is desired to be amended, in the case where flip-flops are used as a memory cir cuit, the part can be cleared by depressing again the switching buttons on the keyboard 1 corresponding to the part to be amended, and after selecting the color switch corresponding to the desired color, the identical switching buttons on the keyboard are depressed again. On the other hand, in the case where memory cells are used as a memory circuit, after selecting the color switch corresponding to a desired color, the identical switching buttons on the keyboard are depressed again, whereby any picture element on the CRT can be cor rected to have a desired color without the necessity of being once cleared off as in the former case. FIG. 3 illustrates an embodiment to perform the amendment, in which the parts identical to those in FIG. 2 are indicated by identical numerals.

Firstly. suppose that a red color is displayed at the position of SW When it is desired to change the color to black, the color selection switch in the color switching portion 3 is turned to red and SW, is closed once again, where the flip-flop circuit 14 R, is inverted and the output Q becomes low; thus the color is changed to black.

When it is desired to change the red color to another color, the color selection switch is selected for the desired color and thereafter SW is depressed, whereby the other desired color can be displayed. In this way it is possible to change the color at each one point. By repeating this operation it is possible to change the colors of a portion of the figure in a simple manner and then to proceed to processing of the next figure.

When a switching button SW on the keyboard 1 is depressed, a pulse is generated, and the outputs of the switch SW, and the color switching portion 3 are connected to an AND gate 13 to control the input to a flip flop circuit 14 depending upon the state'of the color switching portion 3. The flip-flop circuits 14 are all uniderectionally reset by the reset circuit 4', and each of them is inverted by a pulse from one of the AND gates 13 thereby to store the information of the relevant picture element and its color. Further, when the switching buttons once depressed are again depressed, the corresponding flip-flop circuits 14 are also again inverted so that the former colors of the picture elements re-appear.

In addition, the AND gates 15 shown in FIG. 3 are adapted to pass the outputs of the flip-flop circuits 14 only upon the simultaneous application of both scanning pulses from the X-axis shift register circuit 8 and the Y-axis shift register circuit 9. The OR gates 16 sum up all the outputs of red, green and blue colors, respectively, to produce outputs.

FIGS. 40 to 4e illustrates the output waveforms. FIGS. 4a, 4b and 40 show the signals of red, green and blue colors, respectively, FIG. 4d shows the synchronizing signal and FIG. 42 shows the synchronizing signal shown in FIG. 4d with the time-axis compressed so as to show the interval from one vertical synchronizing signal to the following one.

It is always possible to display any pattern which is formed by applying such signals as shown in FIG. 4 to the monitoring portion 10.

As described above, in order to from a colored mosaic pattern by this invention, switches equal in number and respectively corresponding to the picture elements of the pattern to be formed are provided for storing and clearing in the memory element. By means of the switches, the memory composes an electrical pattern, and by scanning the memory, the pattern signal can be displayed on a monitoring CRT. Therefore, it is possible to form a pattern electrically by depressing switch ing buttons rather than by picking up, with an image pickup tube, a painted picture as done in the prior art, for example, and the pattern is easily taken out as the picture signals. Further, when another pattern similar to an original one is desired to be easily formed, the new pattern can be made by modifying only a part of the original one and it is not necessary to paint again every similar picture. This feature will be explained further in detail. The content of the memory circuit is not cleared unless the memory circuit is reset, and therefore, after the recording of a frame of the stored pattern is finished, the frame is still retained in the memory circuit. Thus, the monitoring portion can monitor it repeatedly. When another new frame is desired to be formed, it is scarce that the previously formed frame has to be wholly changed to form a new frame. Whereas, in most instances, such a new frame is one similar to the previous frame which may be formed by partially modifying the previously formed frame. Accordingly, it would be very inefficient to once reset the storage of the previous frame and then store another new frame. In the device ofthe present invention, partial modification of the stored information ofa picture can be accomplished by the alteration of the contents of only those memory elements corresponding to the picture elements to be altered, which alteration may be effected by the selective operation of any corresponding keyboard switch and any corresponding switch of the color switching portion 3 for selecting any of red, green and blue colors. Accordingly, once a picture is formed, another similar picture may be formed by simply altering a part of the original picture to be modified. Thus, by successively recording modified pictures as such modification is effected, it is possible to obtain a series of picture signals for forming pictures of animation.

We claim:

1. A pattern generating device comprising: a keyboard including an equal number of switches respectively corresponding to picture elements which form output signals of colored mosaic patterns; and including a color switching portion for selecting any of red, green and blue colors to compose a color in said picture elements, the output signals ofsaid keyboard being fed to a memory circuit having memory elements each corresponding to a picture element, said memory circuit storing each of the output signals from said keyboard supplied through said color switching portion in an element corresponding to the keyboard switch which has given rise to said output signals; a scanning circuit for scanning said memory circuit at a speed determined independently of the speed of writing in said memory circuit; and a display means for displaying patterns in synchronized relation to an output of said memory circuit scanned by said scanning circuit.

2. A pattern generating device as claimed in claim 1, in which the memory circuit comprises three memory portions for storing red, green and blue color signals, each of said portions having memory elements equal to in number and respectively corresponding to the picture elements for forming colored mosaic patterns.

3. A pattern generating device as claimed in claim 2, each of said memory portions further having gate circuits equal in number and respectively corresponding to the picture elements for forming colored mosaic pat terns, said color switching portion connected to the inputs of said gate circuits.

4. A pattern generating device as claimed in claim 2, further comprising, reset circuit means connected to said memory elements for clearing said memory circuit.

5. A pattern generating device as claimed in claim 1, in which the memory circuit comprises as memory elements flip-flop circuits equal to in number and respectively corresponding to the picture elements for forming mosaic patterns and means connecting the inputs of said flip-flop circuits to said switches.

6. A pattern generating device as claimed in claim 1, further comprising gate circuits connected to said memory circuit, said gate circuits being equal to in number and respectively corresponding to the picture elements for forming mosaic patterns, and means for switching the outputs of said memory circuit in sequence through said gate circuits, wherein said outputs of said memory circuit are successively read out for display on a CRT synchronized with the output of said scanning circuit.

7. A pattern generating device as claimed in claim 1, wherein said display means comprises a color CRT synchronized with the output of said scanning circuit.

8. A pattern generating device as claimed in claim I, further comprising a recorder and means connecting said recorder to the memory circuit for recording signals read out of said memory circuit by the scanning circuit in synchronized relation to the scanning rate of said scanning circuit.

9. A pattern generating device comprising: a keyboard including an equal number of switches respectively corresponding to picture elements which form output signals of colored mosaic patterns; and including a color switching portion for selecting any of red, green and blue colors to compose a color in said picture elements, the output signals of said keyboard being fed to a memory circuit including three memory portions of identical structure each having memory elements equal in number and respectively corresponding to a picture element, said memory circuit storing each of the output signals from said keyboard supplied through said color switching portion in an element corresponding to the keyboard switch which has given rise to a corresponding output signal; a reset circuit for resetting the elements of said memory circuit so as to chronized relation to the output of said memory circuit scanned by said scanning circuit; and a recorder for recording said output signals.

II I

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Classifications
U.S. Classification345/22, 348/E11.1, 345/168
International ClassificationG09G5/02, H04N11/00
Cooperative ClassificationG09G5/022, H04N11/00
European ClassificationG09G5/02A, H04N11/00