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Publication numberUS3812489 A
Publication typeGrant
Publication dateMay 21, 1974
Filing dateSep 11, 1972
Priority dateSep 17, 1971
Also published asDE2245470A1, DE2245470B2, DE2245470C3, DE2264769A1, DE2264769B2, DE2264769C3
Publication numberUS 3812489 A, US 3812489A, US-A-3812489, US3812489 A, US3812489A
InventorsR Hirano, J Ishiwata, M Ito
Original AssigneeCanon Kk
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Display device for use in a desk top calculator
US 3812489 A
Abstract  available in
Images(6)
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Claims  available in
Description  (OCR text may contain errors)

United States Patent Hirano et al.

[451v May 21, 1974 DISPLAY DEVICE FOR USE 1N A DESK TOP 3,676,656 7/1972 Schmidt 235/156 CALCULATOR 3,581,068 5/1971 Wyatt 235/92 PL 3,560.954 2/l97i Yanagisawa et al. 340/324 R [75] In entors: Ren o, Yokohama; 3,626,367 12/1971 Howard et al 340/52 F Matsutoshi Ito, Narashino; Junichi $678,499 7/1972 McCarty 340/336 lshiwata, Yokohama. all of Japan [73] Assignee: Canon Kabushiki Kaisha. Tokyo, Primary Examiner-Dawn -T q Japan Attorney, Agent. or Fn'mF1tzpatr1ck. Cella. Harper & Scinto [22] F1led: Sept. 11, 1972 [21] Appi. No.: 287,846 [57] ABSTRACT A desk top calculator includes a display device which [30] Foreign Application Priority Data displays the numerical information. This display de- Sept. 17. 1971 Japan 46-84508 vice Consumes considerable POWER In Order to minimize the power consumption by the display device, 5 CL 340 324 R, 235 92 EA, 340 33 display of the numerical information is ceased with the 51 1 1111. C1. G08b 5/36 lapse of a predetermined period after once the numer- 5 Field f Search 340 324 R, 33 235/92 EA, ical information is displayed. Instead, a pattern or pat- 235/92 PL terns other than the numerical information is displayed on the display device to indicate that the nu- 5 Referencesv Cited merical information is held in the register without dis- UNITED STATES PATENTS playmg' 355L653 l2/l970 Yawagisawa et al. 235/92 EA 15 Claims, 11 Drawing Figures CATHODE DRIVE UNIT KEYBOARD 3 (5 KNo TDo TDo KN| T01 T01 ARITHMETIC Ton TDn KN9 UNIT B l8 1 l l G l G I KFn I p KST NooE DRIVER UNIT 7 DISPLAY DEVICE lTJH CP l i TIMER CIRCUIT 6 7- SWITCHING CIRCUIT 8 \CLOCK PULSE GENERATOR MENTEHMAY '21 I97 SHEEI3BF6 FIG. 5

FIG. ll

MTENTEDMAYZ] I974 SHEETHIFG E W J mN it it it at St at 5% DISPLAY DEVICE FOR USE IN A DESK TOP CALCULATOR BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates generally to a display device, and more particularly a device for use in a dark top calculator whose power consumption may be made minimum.

In general one of the main features of the desk top calculator is portability so that they are very often used out of doors with dry cellsor storage batteries. The service life of a dry cell or storage battery is limited so that it is a very important factor in design for the desk top calculator to minimize the power consumption. In the calculator, a substantially large portion of the power is consumed by a display device so that the most effective method for attaining the economy of power consumption is to reduce the power consumption by the display device.

2. Description of the Prior Art The display device for a desk top calculator generally displays the numerical information entered by a keyboard or the result of arithmetic operation. In the conventional display devices, the numerical information entered or the result of arithmetic operation is kept to be displayed unless an operator depresses a clear key or a next numerical information or result of arithmetic operation is displayed. The most important role of the display of the numerical information or the like is to permit the operator to read the number entered into the desk top calculator or the result of arithmetic operation, and the operator may read the displayed numerical information or the like within a very short time. Therefore, the continued display means the waste of power, and it naturally follows that the most effective method for minimizing the power consumption is to display the numerical information or'the like only when the operator desires to read it and to suppress the display when not required.

SUMMARY OF THE INVENTION Therefore the primary object of the present invention is to provide a display device which may display the numerical information or the like when an operator wants to read it, thereby attaining the economy of the power. To attain this object, there may be proposed 'a method in which a power source is disconnected from a display device after the numerical information has been entered and displayed or the result of arthmetic operation has displayed for a predetermined time. However this method has a fatal defect that the content held in a register is completely destroyed in some of the desk top calculators. Even when the content in the register may be held in case the power source is disconnected, the display device displays nothing so that the operator cannot see immediately whether the arithmetic operation has been completed or not or whether the numerical information he entered is held in the computer or not. Therefore the content in the register may be completely destroyed by the erratic operation by the operator. To overcome this defect there may be proposed a method for providing an additional display device in order to display the condition of the calculator when the numerical information or the like is not displayed,

but the additional display devices results in a high cost.

arithmetic Another, object of the present invention is therefore to provide a novel display device which is especially adapted for use with a desk top calculator and which may not only overcome the above and other defects and problems but also attain the economy of the power.

Another object of the present invention is to provide a novel display device which may stop the display or ordinary numerical information a predetermined time after a key signal is applied to a control unit, thereby minimizing the power consumtpion.

Another object of the present invention is to provide a novel display device which may display a specified pattern representing that the numerical information entered is still held or the arithmetic operation is still con tinued as soon as the display of the numerical information or the like has been stopped.

Another object of the present invention is to provide a novel display device which may display a specified pattern H which means that the numerical information entered or the result of arithmetic operation is held in the calculator as soon as the display of the numerical information or the like is stopped.

Another object of the present invention is to provide a novel display device which may display the 'dots, that is, decimal points in the digit or digits in which the decimal points are as many as the numerical information if any were displayed and are to be displayed again as soon as the display of the numerical information has been topped so that it may be displayed for some useful purposes.

Another object of the present invention is to provide a novel display device which may display the pattern F representing the overflow in a display register when the overflow should occur, thereby preventing the meaningless display of overflown numerical infor- BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will become more apparent from the following description of some preferred embodiments thereof taken in conjunction with the accompanying drawings in which:

FIG. 1 is a block diagram of a first embodiment of a display device in accordance with the present inven- FIG. 2 is a detailed circuit diagram of the first embodiment shown in FIG. 1;

FIG. 3 shows the waveforms of the signals used in the first embodiment;

FIG. 4 is a view used for the explanation of the socalled 8 pattern or seven bar format used in the display device of the present invention for displaying the numerals and other patterns;

FIG. 5 illustrates the pattern H" displayed by the first embodiment;

FIG. 6 is a circuit diagram of a second embodiment in accordance with the present invention;

FIG. 7 illustrates four points or decimal points displayed by the second embodiment;

FIG. 8 is a circuit diagram of a third embodiment in accordance with the present invention;

FIG. 9 illustrates the points or decimal points dis played by the third embodiment;

FIG. 10 is a circuit diagram of a fourth embodiment, in accordance with the'present invention; and

FIG. 11 illustrates the pattern F displayed by the fourth embodiment.

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIRST- EMBODIMENTSI, FIGS. 1-s

Referring to FIG. 1 illustrating in block diagram the 10 first embodiment of the present invention, reference numeral 1 denotes a keyboard with entry keys and function keys which give the numerical entry signals l(l l,,-KN and the arithmetic operation command signals KF -KF 2 denotes an arithmetic unit in which the arithmetic operations, the arithmetic operation control and the input-output control are effected and which gives the output key signal KST in response to the numerical and command signals KN and KP. 3 denotes a cathode drive .unit which gives the digit signals TDTDn in order to drive the cathodes to select the digits in the dynamic display operation. 4 denotes an anode driver unit which gives the output signals A,B, and G for driving the anodes to display the numerals ,or characters by the selective combinations of optelectronicelements such as photo-diodes constituting the segments of the seven bar format, the signal P being delivered to display the decimal point. 5 denotes a display device comprising a plurality of display elements each consisting of seven photo-diodes constituting the segment of the seven bar format and one photo-diode constituting the decimal point. 6 denotes a timer circuit for measuring a predetermined time after the key signal KST disappears. 7 denotes a switching circuit which controls the operation of the display device 5 in response to the output signal from the timer circuit 6, the signal lNI-I inhibiting the display of the numerals and signs entered or the result of arithmetic operation and causing the display device 5 to display a specified pattern H. And 8 denotes a clock pulse generator for generating the clock pulses in order to synchronize the various operations in the arithmetic unit 2.

The cathode and anode driver untis 3 and 4, the display device 5, timer circuit 6 and the switching circuit 7 are illustrated in detail in FIG. 2. Reference numeral 9 denotes a display register. 10 denotes a buffer register, and 11 denotes a decoder which not only decodes the binary coded signals into the decimal codes but also serves to select the minus sign and H pattern representing that the numerals entered or the result of arithmetic operation are held. It is seen that each of the cross-points of the row lines 0-9, and H and column lines constitutes an AND gate and gives the output signal only when the input signals are applied to all the cross-points in a row. A segment converter 12 selects the segments of the seven bar format required to display a disired numeral. In response to the output signals from the decoder 11, for example, the output signal from the row line 0, the output signals appear at the cross-points, for example from the lines A,B,C,D,E and F. A switching circuit connected to a time-constant cir-, cuit 13 includes a timer circuit TC. Anodes 14 includes. switching transistor Tra -Trg which are turned on in response to the output signals of the segment converter 12 and a switching transistor Trp which is turned on in response to the decimal point signal P.

Cathodes 15 comprises switching transistors Trl-Tr8 which are turned on in response to the digit selection pulses TD -TD7 for selecting a desired digit. Each of the group 'so of elements 16 comprises photo-diodes DA -D6 and Da -DG and photo-diodes DP -DP for displaying the decimal points. The photodiodes DA-DG constitute the segments of the seven bar format each digit.

The decimal point signal is applied from the input terminal P whereas the minus-sign signal is applied at the input terrninals. 7

Reference numeral 17 denotes a plurality of inverters; 18, a capacitor; 19, a diode for preventing the reverse current when the capacitor 18 is discharged; 20, a resistor; 21, a switching transistor; 22 and 23, switching MOS transistors; and V AND V the terminals connected to a power source.

The waveforms of some signals are illustrated in FIG. 3. KST shows the waveform of the key signal; S, the waveform of the signal at the point S in the timer circuit shown in FIG. 2; ST the waveform of the output signal of the switching transistor 21; and MOST and MOST the waveforms of the output signals of the MOS transistors 22 and 23 respectively.

The seven bar format used in the present invention Y for displaying the numerals and numeric signs is shown MODE OF OPERATION The desired entry and function keys on the keyboard 1 (See FIG. 1) are depressed to input the desired numerical and arithmetic command information. The numerical information is displayed in the display device 5 by the conventional dynamic drive system comprising the cathode and anode driving units 3 and 4. It should be noted that the numerical information is displayed only when the display signal is delivered from the switching circuit 7 in response to the output signal of the timer circuit 6 which in turns is actuated in response to the key signal KST delivered when the entry and function keys in the keyboard are depressed. Unless the next key signal arrives at the timer circuit 6, the latter gives the output signal to the switching circuit 7 to interrupt or disappear the display signal so that the numerical information entered is not displayed and longer. In this case, the special pattern H is displayed in the instant embodiment. More particularly, the numerical information is not displayed with the lapse of a predetermined interval after the last entry or function key is depressed or after the completion of arithmetic operation, and the pattern H is displayed representing that the computer is in operation. The H pattern I may be displayed in any digit, but preferably in the least other words, the MOS transistor gives the signal 0. The input voltage to the MOS transistor 23 becomes negative so that the latter is turned on to give the signal 1.

The numerical information is fed into the decoder l 1 through the display register 9 and the buffer register 10 and is converted into the signal required for displaying the same. In response to the output signal l from the MOS transistor 23, the selected AND gate in the decoder 11 is opened to deliver the converted signal into the segment converter 12 so that the segments required for displaying the numerical information may be selected. In response to the selected segment signals, the corresponding switching transistors Tra-Trg in the anodes 14 are turned on. The digit pulses TD -TD-, turns on the switching transistors Trl and Tr8 in the cathodes 15 in the order named and repeat the same operation. When both the selected transistors in the anodes 14 and in the cathodes 15 are turned on simultaneously, the selected diodes in the selected digit 16 are turned on to display the numerical information. In like manner, the decimal point may be displayed when the switching transistor Trp is tumed on in response to the decimal point signal P. The dynamic drive system used in the instant embodiment is of course controlled by the conventional method by a control unit (not shown).

When the key signal KST disappears, the capacitor 18 starts to discharge for a predetermined time which is dependent upon the time constant of the capacitor 18 and the resistance of the resistor 20. When the input voltage to the switching transistor 21 becomes lower than its threshold level, the latter is turned off so that the MOS transistor 22 is turned on to give the signal l whereas the MOS transistor 23 is turned off to give the signal 0. As the result the AND gates in the de coder are closed so that all of the photo-diodes are turned off. The numerical information is now not displayed. But the H gate in the decorder 11 is opened in response to the signal 1 from the MOS transistor 22 so that the H output signal is fed into the segment conveter 12. In a manner similar to that described above, the photo-diodes corresponding to the segments B,C,E,F, and G in the least significant digit are turned on when the switching transistor Trl is turned on in response to the digit pulse TDo. Thus the pattern H is displayed. However, the content in the display register 9 is not cleared, the key signal KST is generated upon depression of a function key and is applied to the capacitor 18 so that the switching transistor 21 is turned on again. Therefore, the photo-diodes are turned on again in the manner described above to display the numerical information again.

SECOND EMBODIMENT, FIGS. 6 and 7 In the second embodiment, the timer circuit is used in such a manner that when the number or numerial information is not displayed, the decimal point or points are displayed in the digit or digits at whichthe number or numbers have been displayed. For example when the display of the number XXXX1234 by the display device capable of displaying eight digits disappears, the decimal points are displayed in the four digits from the right, that is XXXX The second embodidment is substantially similar in construction to the first embodiment except that instead of the H in the decoder two matrix row lines DP and DP are provided. The matrix row line DP, is used in conjuction with the display of the numerical information whereas the row line DP in conjunction with the display of a special pattern. Only one common line may be used instead of the row lines DP, and DP but the circuitry becomes complex so that the two individual lines are used in the second embodiment.

The second embodiment further comprises'a zero supressor circuit 24 which may be of the conventional type so that no detailed description thereof will be made in this specification. 'llie zero suppressor circuit 24 gives the output signal ZS to the decoder 11 only when the latter gives the output signal of the number to be displayed.

MODE OF OPERATION The mode of operation of the second embodiment is substantially smilar to that of the first embodiment so that the operations different from those of the first embodiment will be described.

After the photo-diodes selected to display the numbers in the manner described in the first embodiment have turned off, the matrix line 26 is selected in response to the output l of the MOS transistor 22 so that the output signal of the MOS transistor 22 may be delivered into t he segment converter 12 only when the output signal ZS of the zero suppressor circuit 24 is also applied to the matrix line 26. As the matrix line 26 is connected to the P line for displaying the decimal points in the segment converter 12, the decimal points are displayed.

However, the output signal ZS of the zero suppressor circuit 24 is delivered to the matrix line 26 so that the decimal points are displayed not in the all digits but only in the digits in which the numbers are displayed. Therefore when the display by the display device capable of displaying 8 digits was XXXX1234, the decimal points are displayed in the four digits from the right position as shown by XXX in FIG. 7 as soon as the display of the numerical information has been suspended after a predetermined time sufficient to permit an operator to read the displayed number which time is determined by the timer circuit TC.

THIRD EMBODIMENT, FIGS. 8 AND 9 In the third -embodiment, the radix points are displayed every two digits as shown by XXXXXX.XX. in FIG. 9.

The third embodiment is substantially similar in con struction and operation to the second embodiment described with reference to FIG. 6 except that an AND gate and its terminal are added in the decoder 11 in order to feed the digit selection pulses TDo, TD TD.,, and TD When the switching transistor 21 is turned on in response to the key signal KST so that the MOS transistor 21 gives the signal 0, the AND gates generally indicated by 25 in FIG. 8 are all opened so that the numerical information is displayed in the same manner described above. The, timer circuit TC turns off the switching transistor 21 after the numerical information has been displayed for a predetermined time so that the MOS transistors 21 and 22 give the signals l and 0 respectively, the gates 25 are closed, but the matrix line 26 is opened whenever the digit selection pulses TDo, TD TD, and TD are repetitively applied so that the decimal points are displayed every two digits. that is in the digits corresponding to the digit selection pulses TDo, TD TD, and TD as shown by XXXXXX.XX. in FIG. 8 when the number XXXX1234' was displayed.

FOURTH EMBODIMENT, FIGS. 10 AND 11 In the fourth embodiment, when the display register 9 overflows, thedisplay of the numerical information is suspended, and the overflow pattern F is displayed as shown in FIG. 11. The fourth embodiment is similar in construction to the first embodiment except that the F matrix line is added in the decoder 11 and a flipflop FF and two AND gates 27 and 28 are added. In response to the overflow signal OF and the clear signal C, the output signals are delivered from the set and reset elements S and R of the flip-flop FF. When the register does not overflow, no over signal is applied to the flipflop FF so that the reset signal 1 is applied to the AND gates 27 and 28. As a result both AND gates 27 and 28 are opened so that the fourth embodiment functions in the same manner described with reference to the first embodiment. When the register overflows, the overflow signal OF is generated and applied to the flipflop FF so that the latter is set to give the reset signal As a result, the AND gates 27 and 28 are closed so that the display of the numerical information and the pattern H" are stopped. However, the set output signal of the flip-flop FF is applied to the segment eonverter 12 through the F matrix line in the decoder 11 so that the segments A,E,F, and G are selected. Thus the pattern F indicating the overflow may be displayed in the most significant digit in the display device.

In the above embodiments of the present invention the special patterns such as H, F and the decimal points every two digit are displayed, but it is understood that the present invention is not limited to the above three special patterns, but any pattern formed by the segments of the seven bar format may be displayed.

In the first and fourth embodiments, no zero suppressor circuit is added, but it may be added as shown in the secondand third embodiments. The foregoing description is merely an illustration of the embodiments of the present invention and is not intended to limit the present invention to these illustrative embodiments.

As described hereinbefore, the display device for use with a desk top calculator the display of the entered numerical information or the result of the arithmetic operation is stopped after a predetermined time sufficient enough to permit an operator to read the display so that the power consumption is minimized. Moreover a specified pattern such as H, the display of which consumes less power than that of the full numerical information, is displayed indicating that the entered information or the result of arithmetic operation'is held so that the operator may not erroneously depress the entery or command keys.

The pattern H displayed in the first embodiment means HOLD so that the operator may immediately see that the calculator holds the entered numerical information or the result of arithmetic operation. In the second embodiment the decimal points are displayed only in the significant digits so that the number of digits displayed may be immediately seen and that the number of digits of the result of the next arithmetic operation such as multiplication or an operator such as a multiplier to be used may be judged. In the third embodiment, the number of the decimal points displayed is reduced so that the power consumption may be further minimized. The fourth embodiment displays the F pattern in the most significant digit opposed to the H pattern in the least significant digit so that the power consumption may be minimized because the overflown number will not be displayed for no purpose and that the overflow pattern F may be distinctively distinguished from the hold pattern H.

We claim:

1. A display device for use in a desk top calculator including a. display means capable of displaying the numerical information and other patterns in a plurality of digits;

b. power supply means for supplying the power to only said display means;

e. switching means comprising a plurality of switching elements through which said power supply means is connected to said display means;

d. means for generating a specified signal which indicates to minimize the power consumption; and

. e. means for interrupting the operation of said switching means in response to saidspeeified signal.

2. A display device as defined in claim I further ineluding means for causing some specified switching elements of said switching means to close for displaying at least one specified pattern other than the numerical information in response to said specified signal.

3. A display device for use in a desk top calculator including i a. display means capable of displaying the numerical information and other patterns in a plurality of digits;

bv power supply means for supplying means for supplying the power to only said display means;

e. switehing means comprising a plurality of switching elements through which said power supply means is connected to said display means;

d. means for measuring a predetermined time after a key signal is applied and giving an output signal;

and

e. means for interrupting the operation of said switching means in response to said output signal from said predetermined time measuring means.

4. A display device as defined in claim 3 further ineluding means for causing some specified switching elements of said switching means to close for displaying at least one specified pattern other than the numerical information in response to said output signal from said predetermined time measuring means.

5. A display device as defined in claim 4 further ineluding means for selecting at least one specified digit, whereby to display at least one specified pattern in said specified digit.

6. A display device as defined in claim 4 further ineluding means for selecting a least significant digit, whereby to display pattern H in said digit.

7. A display device as defined in claim 4 further ineluding means for selecting at least one digit in which numerical information was displayed whereby to display at least one specified pattern in said digit.

8. A display device as defined in claim 4 further including means for selecting at least one digit in which numerical information was displayed, whereby to display at least one decimal point in said digit.

9. A display device for use in a desk top calculator including a. display means capable of displaying the numerical information and other specified patterns in a plurality of digits;

b. power supply means for supplying the power to only said display means;

c. switching means comprising a plurality of switching elements through which said power supply means is connected to said display means;

(1. means for detecting the overflow of a register for holding the numerical information to be displayed and giving an output signal; and

e. means for interrupting the operation of said switching means in response to said output signal from said overflow detecting means.

10. A display device as defined in claim 9 further inv cluding 12. A display device as defined in claim 10 further including means for selecting a most significant digit, whereby to display pattern F in said digit.

13. A display device for use in a desk top calculator including a. display means capable of displaying the numerical information and other specified patterns in a plurality of digits;

b. power supply means for supplying the power to only said display means;

0. switching means comprising a plurality of switch ing elements through which said power supply means is connected to said display means;

(1. means for measuring a predetermined time after a key signal is applied and giving an measuring output signal;

e. means for detecting the overflow of a register for holding the numerical information to be displayed and giving an detecting output signal; and

f. means for interrupting the operation of said switching means in response in said output signals.

14. A display device as defined in claim 13 further including means for causing some specified switching elements of said switching means to close for displaying specified patterns other than the numerical information respectively in response to said output signals.

15. A display device as defined in claim 14 further including means for selecting different digits, whereby to display said patterns in said different digits respectively in response to said output signals.

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent NO. ,812 48 Dated y 21, 974

v R'EIJI HIRANO, ET AL.

It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

Column 1, line 8, "dark" to read desk;

Column 2, line 32, "topped" to read --stopped Column 4, line 9 "terminals" to read --terminal-;

Column 8, line 39, delete "means for", second instance.

Signed and sealed this 17th day of September 1974,

(SEAL) Attest:

McCOY M. GIBSON, JR. C. MARSHALL DANN Attesting Officer Commissioner of Patents USCOMM'DC 6037 6-P69 a US. GOVERNMENT PRINTING OFFICE: 1969 0-366-334,

FORM PO-105O (10-69)

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3941989 *Dec 13, 1974Mar 2, 1976Mos Technology, Inc.Reducing power consumption in calculators
US3953719 *Nov 26, 1974Apr 27, 1976Texas Instruments IncorporatedLatched decoder for digit outputs to an electronic digital calculator display
US3956744 *Jan 3, 1974May 11, 1976Canon Kabushiki KaishaNumeral output system for circulating register
US3962571 *Nov 26, 1974Jun 8, 1976Texas Instruments IncorporatedLow power digit blanking circuit
US4086473 *Feb 9, 1977Apr 25, 1978Tokyo Shibaura Electric Co., Ltd.Display device for electronic apparatus
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US4291412 *Jun 25, 1980Sep 22, 1981General Research Of Electronics, Inc.Portable radio frequency/channel display system
US5065357 *Aug 9, 1990Nov 12, 1991Sharp Kabushiki KaishaData processing machine with liquid crystal display and control means for regulating backlighting to the display
US7030838 *Dec 10, 1997Apr 18, 2006Minolta Co., Ltd.Image observation apparatus
EP0236899A1 *Mar 2, 1987Sep 16, 1987Honeywell Regelsysteme GmbHProjectile head provided with a timing fuse
Classifications
U.S. Classification345/211, 377/112
International ClassificationG06F15/02, G09G3/04, G06F3/147, G06F3/14, G09G3/14
Cooperative ClassificationG09G3/14, G06F3/1407, G06F15/02
European ClassificationG06F15/02, G09G3/14, G06F3/14A