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Publication numberUS3824580 A
Publication typeGrant
Publication dateJul 16, 1974
Filing dateOct 10, 1972
Priority dateOct 10, 1972
Publication numberUS 3824580 A, US 3824580A, US-A-3824580, US3824580 A, US3824580A
InventorsC Bringol
Original AssigneeIbm
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Gas panel matrix driver
US 3824580 A
Abstract
A method and system for driving a gas panel, which employs a resistor matrix, between the panel drivers and the panel. The resistor matrix is operated in approximately a half-select mode in a manner such that two horizontal control lines must be driven and two vertical drive lines must be driven to write a cell. The algebraic summation of the potential on the drive lines from the matrix causes selected cells to fire or emit light pulses, or in the event that they have already been fired, continue to fire. Through use of the matrix, the number of drivers required is greatly reduced in that no longer is there a requirement of one driver for each horizontal and vertical line, and thus the logic for selection of the drivers is greatly simplified. In addition, since the matrix is operated in a half-select mode, single horizontal and vertical drivers can be utilized to erase an entire character position without need, as is in the conventional case, of a cell-by-cell erasure under control of the logical character generator.
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Description  (OCR text may contain errors)

United States Patent [191 Bringol [451 July 16, 1974 GAS PANEL MATRIX DRIVER [75] Inventor: Charles Ronald Bringol, Austin,

Tex.

[73] Assignee: International Business Machines Corporation, Armonk, N.Y.

[22] Filed: Oct. 10, 1972 [21] Appl. No.: 296,355

[52] US. Cl.. 340/324 M, 315/169 TV, 340/166 EL [51] Int. Cl. H01j 11/00 [58] Field of Search 340/324 R, 324 M, 166 R, 340/166 EL, 149 R; 315/169 TV [56] References Cited UNITED STATES PATENTS 3,496,544 2/1970 Richmond et al 340/149 3,526,711 9/l970 De Boer 340/166 EL 3,573,542 4/1971 Mayer et a 340/166 EL 3,597,758 340/166 EL 7 8/1971 Greeson, .lr. e

Primary Examiner-John W. Caldwell Assistant Examiner-Marshall M. Curtis Attorney, Agent, or Firm-John L. Jackson A method and system for driving a gas panel, which employs a resistor matrix, between the panel drivers and the panel. The resistor matrix is operated in approximately a half-select mode in a manner such that two horizontal control lines must be driven and two vertical drive lines must be driven to write a cell. The algebraic summation of the potential on the drive lines from the matrix causes selected cells to fire or emit light pulses, or in the event that they have already been fired, continue to fire. Through use of the matrix, the number of drivers required is greatly reduced in that no longer is there a requirement of one driver for each horizontal and vertical line, and thus the logic for selection of the drivers is greatly simplified. In addition, since the matrix is operated in a half-select mode, single horizontal and vertical drivers can be utilized to erase an entire character position without need, as is in the conventional case, of a cell-by-cell erasure under control of the logical character generator.

ABSTRACT 9 Claims, 10 Drawing Figures e lO u 12 PATENTEDJUU61974 3.824.580

SHEET 1 OF 5 GAS PANEL DRIVERS LOGIC FlG.l

VERT LINES ALTERNATE EXTERNAL CONNECTIONS MADE AT EACH SIDE OF PANEL FIG. 2

, +250 VOLTS VERTICAL SUSTAIN VOLTAGE '2 Too VOLTS 250 VOLTS HORZ SUSTAIN VOLTAGE I3 I00 VOLTS I50 VOLTS l4 F o VOLTS RESULTANT SUSTAIN VOLTAGE ACROSS A CELL A I50 VOLTS l5 A LIGHT PULSES M A A A A FIG. 3

l6 v I H E i DRIVER WRITE PULSE (VERT) l v2 4 1F Y L w I DRIVER NOT-WRITE PULSE (VERT) J '8 I I V5 I s L 19 v HI n DRIVER WRITE PULSE (HCRZ) VOLTAGE ACROSS NON SELECTED CELLS I, 2), m (2,5), (5,2)

CELL WRVITE PULSE r VOLTAGE ACROSS SELECTED CELL (2,2)

VOLTAGE ACROSS NON- SELECTED CELLS (|,l),

FIG, '5'

'mzmimwlm C l sum aor s (A.) CELLS SELECTED FOR ERASURE/ (B.) CELLS RECEIVING CANCELLED PULSE (c) CELLS RECEIVING OVERCANCELLED PULSE Pmmm wm 'sumuurs 'HORZ SUSTAIN I INPUI FIG. 8

VERTICAL DRIVER WRITE'PULSE l OE S I. U AP m E I ER Vw TW v E M U n 0 V 2 NW 9 5 s WA 0:

(A.) VERTICAL SUSTAIN Bu DRIVER RESULTANT CELL VOLTAGE OFFSET VOLTAGE =AV/2 I (8.) HORZ SUSTAIN a DRIVER 0VERCANCELLAT|0N v CELL WRITE PULSE w EILOGICLEIVEL FIG. 9

2 d3 d4 d5 FIG.

sum 5 or 5 GAS PANEL 1 GAS PANEL MATRIX DRIVER BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a system and technique of driving a gas panel and more particularly to a technique in which a resistor matrix is utilized and the matrix organized in such a manner that two drive lines for each horizontal and vertical cell are utilized which results in an overall reduction of the number of drivers for the gas panel and logic simplification.

2. Description of the Prior Art Gas panels are a relatively new type of display in which there are horizontal and. vertical drive lines and when a proper potential is placed on a horizontal and vertical drive line the gas in the panel at the apparent intersection of selected lines will be caused to ionize and emit a light pulse. There are essentially three potentials employed in the control of a gas panel. First, there is the set potential which initially sets or writes a selected cell to cause initial ionization of the gas; a sustain voltage which is lower than the required set voltage which is continually applied to all of the drive lines to cause those which have been previously written to continue to emit light pulses; and an erase voltage which results in the cancellation or unsetting of selected cells.

All known prior art devices, as best known, which have been used to drive and control gas panels have utilized one driver per horizontal drive line and one driver per vertical drive line or have utilized costly'transistor diode matrices. This one driver per line technique is relatively expensive and it is thus desirable to provide a system and technique wherein the number of drivers required to drive a gas panel is greatly reduced. In addition, when a system is employed in which there is a driver connected to each of the drive lines, the logic is by necessity required to be relatively complex. Thus, in addition to reducing the number of drivers required, it is desirable to have a system in which the logic required to control the gas panel can be greatly simplified.

Finally, in the prior art, when erasure of a character is to be accomplished, each of the cells which had been written had to be logically addressed and selectively erased. Therefore, it is highly desirable to provide a' technique in which the gas panel can be configured and controlled in such a manner that a complete character position can be erased by application of a single erase pulse to all of the cell positions within the character position.

SUMMARY OF THE INVENTION Briefly, there is provided a system and technique of driving a gas panel in which a summing resistor matrix is employed between the drivers for the gas panel and the gas panel. The resistor matrix receives outputs from the drivers and through utilization of cross coupling by means of resistors, applies the potential from the drivers to the gas panel. The resistor matrix is made up in such a way such that for each horizontal line two driver inputs are employed and, likewise, for each vertical line two driver inputs are employed. While it might seem that this would greatly increase the number of drivers required, this in fact is not the case.

Each of the horizontal drive lines into the gas panel and each of the vertical drive lines into the gas panel receives a single input which comprises the output from the two drivers associated with the single drive line since the two lines are cross coupled by means of a resistor. Through utilization of this cross-coupled resistor matrix, the number of drivers is greatly reduced since a single vertical and single horizontal driver in fact drives all of the lines in a character position. That is, one of the lines coming into the resistor matrix from the horizontal drivers, and one of the lines coming into the resistor matrix from the vertical drivers, selects a character position and the other horizontal and vertical lines then select the particular cell positions which are to be written.

Through use of this technique, the control logic is greatly simplified and entire characters can be erased by application of a single erase pulse from the drivers which select the character positions.

BRIEF DESCRIPTION OF THE DRAWINGS In FIG. 1 is shown an overall block diagram illustrating the subject invention wherein logic is shown con trolling gas panel drivers and a matrix is interconnected between the drivers and the gas panel;

FIG. 2 is an illustration of a section of a gas panel to illustrate its mode of operation;

FIG. 3 is a diagram illustrating the timing of pulses which are applied to the gas panel of FIG. 2 to cause selected cells to continue to fire and the time that the light pulses are emitted from the cells;

FIG. 4 is again an illustration of a section of a gas panel with apparent intersections numbered;

FIG. 5 illustrates wave forms which are referenced back to the numbered partial gas panel of FIG. 4 to illustrate the conventional operation and control of a gas panel;

FIG. 6 illustrates-the wave forms which are utilized to erase selected cells and wave forms which result or occur at non-selected cells;

FIG. 7 illustrates one means of implementing a vertical driver to obtain the pulses or wave forms illustrated in FIG. 5;

FIG. 8 illustrates one implementation of a horizontal driver for obtaining the horizontal drive pulses illustrated in FIG. 5;

FIG. 9 are wave forms illustrating how the wave forms of FIG. 5 are obtained from the drivers of FIGS. 7 and 8; and

FIG. 10 is a drawing showing the particular matrix configuration which comprises the heart of the subject invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT For a more detailed description of the subject invention, refer first toFIG. 1 wherein there is shown a gas panel 1 driven by means of horizontal drive lines 2 and vertical drive lines 4 coming from a matrix 5. The matrix 5 in turn receives inputs along line 6 from driver 7 which is in turn controlled along line 8 by logic 9. While four horizontal drive lines from the matrix and five vertical drive lines from the matrix are shown, it will be appreciated by those skilled in the art that the number of lines will depend on the size of the gas panel. Likewise, the number of lines 6 from the drivers will vary in accordance with the size of the panel. Additionally, while only a single line is shown connecting the logic 9 to the drivers, it will be appreciated by those skilled in the art that there will in fact be more than one line.

At the outset, it should be understood that the gas panel which is to be driven, while it will be described in some detail, can be any commercially available gas panel. Likewise, while one particular configuration of horizontal and vertical drivers are shown, it will be appreciated by those skilled in the art that these drivers can be implemented in various and different ways. Finally, the logical character generator depicted in FIG. 1 as the control logic which controls the selection of the drivers will not be described since, again, this logic is quite conventional and does not comprise part of the subject invention.

In FIG. 2, for purposes of illustration of a gas panel, there is shown a gas panel 1 with horizontal drive lines through n and vertical drive lines 11 through n. Further, as illustrated the connections to the drivers are conventionally alternately made at each side of the panel. When a particular cell is selected to be written, a write potential is applied to the appropriate horizontal drive line, and the appropriate vertical drive line to cause ionization of the gas in the gas panel at the apparent intersection of the vertical and horizontal lines. In FIG. 2 each of the cells are represented by a small cirle at the apparent intersection of the vertical and horizontal drive lines.

In FIG. 3 there are illustrated voltage wave forms which are applied to the horizontal and vertical drive lines after a particular cell has been selected or written to cause it to continue to emit light pulses. As will here inafter be described, the selection of a particular cell requires a higher potential to be applied to the vertical and horizontal drive lines than is required to sustain the firing of the cell once it has been initially caused to ionize. The voltage wave form 12 illustrates the timing and magnitude of the vertical sustain voltage, while wave form 13 illustrates the magnitude and timing of the horizontal sustain voltage. These wave forms 12 and 13 are algebraically combined to produce, as illustrated by wave form 14, the resultant sustain voltage across the cell once it has been written. At 15 is illustrated the firing of the cells which results from the wave form 14. Thus, it can be seen that the light pulses occur at the maximum excursions of the wave form 14, both in the positive and negative directions. Again, it should be stressed that the heretofore descriptions describe the state of the art and the techniques of writing the cells and erasing the cells which will be'discussed in connection with FIGS. 4, 5 and 6 is quite conventional.

In FIG. 4 there are shown horizontal write lines, H1, H2 and H3 and vertical drive lines, V1 and V2 and V3. The apparent intersections of the horizontal and vertical drive lines are numbered for referencing to the wave forms at the lower portion of FIG. 5, 22, 23 and 24. As illustrated, assume that the cell 2,2 which is the apparent intersection of horizontal line H2 and vertical line V2, is the cell which is to be written. The wave form 23 which is required to accomplish this is shown in FIG. 5. Further from a consideration of the wave forms 16 and 18 of FIG. 5, it can be seen that the vertical driver, at the time that the cell 2,2 is to be written will apply a driver not write pulse to all of the vertical lines which are not selected. That is, the trailing edge of the center pulse of wave forms 16 and 18 has a negative transition. On the other hand, to write the cell, vertical line V2 numbered 17 has a positive going square wave added at the end of the center pulse. Likewise, since there is an algebraic summation, the horizontal lines H1 and H3 have a positive square wave of the same magnitude that the driver write pulse had and this occurs at the same time that the driver write pulse was applied. To cause the cell to write, line H2 numbered 20 has a negative square wave applied at the same time that the vertical write pulse was applied and thus this negative transition which is added algebraically causes a relatively large potential difference to be applied across the selected cell. Wave forms 22, 23 and 24 illustrate the wave forms which appear across the various cells and it can be seen that the wave form 23 has a larger magnitude of excursion than the other wave forms 22 and 24. Thus, due to this excursion, which is labelled cell write pulse, cell 2,2 will be addressed to be written while there will be no effect on the other cells. That is, those cells that have previously been written will continue to emit light pulses while those cells which have not previously been written will not be written due to the application of the driver not write pulses to the non-selected lines.

Finally, the wave form required to erase a cell is illustrated in FIG. 6A by wave form 25. The initial part of the wave form shows the 28 illustrate sustain voltage being applied to a written cell and the square wave 28 illustrates the pulse which is required to erase it. That is, the previous excursion was in the negative direction and the pulse 28, therefore, must be in the positive direction to negate this negative potential in the cell. It must not be high enough to rewrite or sustain the firing of the cell. Thus, for instance, in the event that the sustain voltage is in the order of minus 150 volts, the cell can be erased by application of approximately a plus 40 volt potential for a predetermined time. Conventionally these erase pulses are of the same magnitude as the pulses added to the sustain pulses since these potentials are available from the drivers but they may, in fact, be required to be larger in width than illustrated to accomplish erasure.

In FIG. 6B the wave form illustrates what occurs to the cells that receive the cancelling pulse. This is shown as a glich 30 which again is indicative of the fact that nothing occurs to the cells. Again, as illustrated by wave form 27 in FIG. 6C, certain of the cells receive an over-cancelled pulse, but since this over-cancelling pulse is in the same direction i.e., the negative direction as the previous sustaining voltage, it does not cancel or erase the cells receiving the pulse. Upon the next positive excursion the cells, which had been written, will receive a positive excursion and this sustaining voltage wave form will cause those cells to continue to fire and the erase or cancel pulse will not affect any of these cells.

Refer next to FIG. 7 which illustrates one implementation of a vertical driver. This driver provides the required vertical wave forms illustrated and briefly described in connection with FIG. 5.

To illustrate the operation of the vertical driver of FIG. 7, reference to the wave form of FIG. 9A should be made. The dotted line 59 illustrates the vertical sustain input applied to line 4 of FIG. 7. The heavy line 60 illustrates the output at line 42.

In operation the transistor, T normally is operated as a constant current source. This is due to the fact that the base voltage when T, is turned on is constant. Since the collector current is approximately equal to the emitter voltage, which is, therefore, caused to be constant, divided by the value of resistor R a constant collector current will result. This constant collector current flows through resistor R, with a very small part being taken by transistor T so that a constant voltage drop across R, is being held throughout the wave form applied to line 4 independent of the varying potential. The emitter voltage of T, which is the output on line is one diode drop (neglible) below the collector of T,. This is the base-emitter drop which is essentially a diode drop. The output voltage thus, for all practical purposes, is the voltage appearing on line 4 minus the drop across R Thus, referring again to FIG. 9A, the dotted wave 59 is reducedby some voltage which is approximately again equal to the collector current of T, times R This is represented by the solid wave form 60. In this manner, it is possible to control T, in such a way that if the current to T, is turned off both the voltage at the base of T and the emitter of T, will rise by the amount that the voltage was previously dropped. This is the vertical driver write pulse in FIG. 9A. If this voltage was previously set at 40 volts then a 40 volt pulse will be applied to line 42 upon turning T, off.

T, is controlled by logical inputs, either from module 40 which is simply one of many possible implementations of an AND/INVERT or the vertical not write generator input through diode D,.

As shown in FIG. 9A, the driver either is going to put out a positive pulse write pulse, or a negative pulse as shown in the next wave form--a vertical not write pulse. One or the other is going to occur given that some cell anywhere on the panel is being written. If this driver is selected for writing, diodes 31 and 32 in the module 40 will be high and at the proper time, the signal W (write) or E (erase) would appear going positive which would turn transistor 39 on, dropping the input to D, and turning transistor T, off which would give rise to a positive pulse output. At the same time that this is happening, there is an input to diode D, which is common to all other vertical drivers. That is each vertical driver has a diode D associated with it. All of these inputs are driven positive which back biases D Therefore, only diode D, is forward biased and this turns transistor T, off.

Assume. next that the driver is not selected. One of the inputs to either diodes 31 or 32 or both diodes will be low. Again, at the proper time, the signal W or Eoccurs, however, it does not turn the module transistor 39 on because one of the inputs to diodes 31 or 32-or both are low. Therefore, the output of transistor 39 remains at a high level. However, considering D again, any

time a write or erase operation occurs, a positive pulse is applied to D,. This positive pulse turns transistor T, on harder because it increases the voltage at the base of T,. That is, R, is pulling up on the base of T, and T, is turned on harder and the voltage level is such that T, is turned on so that a negative 40 volt pulse is put out by the driver as shown in FIG. 9A (vertical not write pulse).

R, must be of sufficient magnitude to supply enough current to T, when its base goes positive. This comes from +VCC. R, is simply a pull down resistor. That is, T,, when putting out a positive voltage, supplies the current to the load which would be connected to line 42. When T, is turned off, R, pulls line 42 back toward ground. D is simply a protection for transistor T since if there is a capacitive load transistor T, will help pull the load again towards ground in conjunction with R.,. D, also assures that the base-emitter of transistor T, will. not be reverse biased.

The horizontal driver and control operates similarly to the vertical. For a brief description of the horizontal driver, refer to FIG. 8 and the wave forms of FIG. 9B. The prime difference is that when the output voltage is at a high level, the write pulse is negative and the not write pulses positive. Therefore, the circuit is different as far as the logical inputs. However, with respect to transistors T,, T resistors R R and R the vertical and horizontal drivers are identical. The horizontal sustain input is the dotted line in 9B numbered 61, the output is the solid line 62. At the point that a horizontal write pulse is to be generated, assuming that this driver is the selected driver, the logic inputs to diodes 53 and 54 are brought high at the appropriate time and the signal write or erase comes true. Since module 50 is an AND circuit no inversion occurs such that transistor T, is turned on by the module and a negative pulse occurs at the output line 58 of the horizontal driver. Similarly to the vertical driver, there is also another input which is the horizontal not write erase signal which is common to all horizontal drivers and this signal is negative. This input would have no effect, since the input to D, is going negative and the base of transistor T, isdriven positive such that D, is back biased at the write time. Again, assume that this driver is a non-selected driver in which case the input to diodes 53 and 54 or both would be low. When the signal write or erase comes true and, therefore, the input to diode 55 goes high, nothing happens at the output since module 50 is an AND gate. Again, the input to D, is being driven in a negative direction because somewhere a driver has been selected and thus transistor T, will be turned off.

If the driver is non-selected, when theinput to D, goes negative, transistor T, is turned off since it has no drive. The collector of T, will then rise and there will be no drop across R at this time. This rise is illustrated in FIG. 9B as the horizontal not write pulse and is of essentially equal magnitude but opposite plurality to the horizontal write pulse. The resultant cell voltage is shown in FIG. 9C which is the algebraic summation of the wave forms of FIGS. 9A and 98.

FIG. 9D illustrates the timing of the logic levels input to either a vertical or a horizontal driver which is in a write or erase mode. These pulses are controlled by the logic and are timed so that they appear at the proper point at the correct time. Again, as above indicated, the logic forms no part of the subject invention.

FIG. 10 illustrates the summing resistor-matrix drive which is the heart of the subject invention. The drivers and panels are shown in a simplified notation for purposes of facilitating the description. That is, in FIG. 10 each vertical and horizontal line are shown as coming out of the same end of the panel which is not the actual case as was discussed in conjunction with FIG. 2. Considering FIG. 10, it can be seen that there are two first and second sets of vertical drivers b, through b and b,, a,, through a,,respectively, and there is a resistor matrix between those drivers and the panel. Likewise, associated with first and second horizontal drivers c, through c, and d, through d, d,, respectively, there is a horizontal resistor matrix. As is obvious, only part of a panel is shown. Theoretically, the matrix and panel could be expanded indefinitely.

To select a given cell, for instance cell 73, first drivers b and c, are turned on which dictates that by subsequent selection of an a or d driver, a cell within the upper center dotted character position in which cell 73 is located can be turned on or off. Once b and c have been selected, selecting an a and d will select a cell. The reason that thismatrix organization was set up in the manner shown was because, obviously, the logic control required can be reduced by a great amount. In addition as shown, a further advantage of the matrix is that it requires much less than one driver per line. For example, if a hundred lines were to be driven with a square matrix, there would be 10 drivers on one side; for example, 10 as and 10 bs or only a total of 20 drivers required to select a hundred lines.

Referring still to FIG. 10, it can be seen that each of the a drivers are cross coupled by a resistor to a line of each of the b drivers. Further, it can be seen, that each of the b drivers are cross coupled by means of a resistor to one of the lines of the drivers. This, in effect, results in what might be referred to as a half-select driver. That is, for selection of a particular cell, half of the potential would be applied by an a driver and half by a b driver. While this in actuality is not the case, it is nearly so and this assumption will suffice for purposes of describing the operation of the matrix. It can be further seen in FIG. that by necessity, there must be as many a drivers as there are lines connected to each of the b drivers. The b drivers, as illustrated, define the width of the character positions shown in dotted lines, while the c drivers define the height of the character position. Again, referring to the c and d drivers, there must be a d driver for each of the'lines driven by the 0 drivers.

For purposes of illustration of the operation of the matrix, a description of the selection or addressing of cell 73 will next be presented. As above indicated, first selection will be made of the b and c drivers which define the character position on the matrix. In this case, driver b will be selected by the logic and it will apply a half-select voltage through resistor 74 to drive line 80, which is the vertical drive line associated with cell 73. At the same time, driver c will be selectedand it will apply through resistor 70, a half-select voltage along line 81 which is the horizontal drive line for cell 73. Thus, the character position is selected. Next, the desired cell, which in this case is cell 73, is selected by selecting one of the drivers a, through a,- and d through (1, which are respectively vertical and horizontal drivers. In this case, to select cell 73, driver d is selected and it applies a half-select potential along line 72 and this half-select potential passes through resistor 71 and is applied to line 81 which results in a full horizontal voltage being applied to cell 73. Similarly, to set or select cell 73, driver a, applies a half-select potential to line 82 and this half-select potential is cross coupled by means of resistor 75 to line 80 which is the vertical drive line for cell 73 and this results in a full vertical potential being applied to cell 73 and the cell is written or turned on. From a further consideration of FIG. 10, it

can be seen that by means of the aforementioned operation any of the character positions'can be selected and any of the cells within a given character can be simultaneously selected.

An additional advantage of this technique, which was previously briefly mentioned, is that to erase a character it is not necessary that each of the cells within a character be erased one by one as is the usual case. This, again, results in a great simplification of the logic required to erase a cell. Through use of this resistor matrix, a complete character can'be erased by application of an erase potential to the b and c drivers. Thus, for instance, assuming that the character position in which cell 73 is located is to be erased an erase potential need only be applied to driver b and driver c and this will result in complete erasure of all of the cells in the character.

In summary, there has been provided a system and technique of driving a gas panel in which a summing resistor matrix is employed between the drivers for the gas panel and the gas panel. The resistor matrix receives outputs from the drivers and through utilization of cross coupling by means of resistors, applies the potential from the drivers to the gas panel. The resistor matrix is made up in such a way such that for each horizontal line two driver inputs are employed and, likewise, for each vertical line twodriver inputs are employed. While it would seem that this would greatly increase the number of drivers required, this in fact is not the case.

Each of the horizontal drive lines into the gas panel and each of the vertical drive lines into the gas panel receives a signle input which comprises the output from the two drivers associated with the single drive line since the two lines are cross coupled by means of a resistor. Through utilization of this cross-coupled resistor matrix, the number of drivers is greatly reduced since a single vertical and single horizontal driver in fact drives all of the lines in a character position. That is, one of the lines coming into the resistor matrix from the horizontal drivers, and one of the lines coming into the resistor matrix from the vertical drivers, selects a character position and the other horizontal and vertical lines then select the particular cell positions which are to be written.

Through use of this technique, the control logic is greatly simplified and entire characters can be erased by application of a single erase pulse from the drivers which select the character positions.

While the invention has been particularly shown and described with reference to a particular embodiment,

it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the invention.

What is claimed is:

l A method of driving and controlling a gas panel which includes horizontal and vertical drive lines which are selectively connected to first and second horizontal and vertical drivers under the control of a logical character generator, said method comprising:

a. electrically connecting a summing-resistor matrix drive between said drivers and said gas panel horizontal and vertical drive lines;

b. applying a potential from both said first and second horizontal drivers to the horizontal drive line of a-selected cell through said matrix while simultaneous applying a negative potential to all other horizontal drive lines, and;

c. applying a potential from both said first and second vertical drivers to the vertical drive line of said selected cell through said matrix while simultaneous applying a negative potential to all other vertical drive lines.

apparent intersections of said drive lines to be written but being sufficient to provide a sustaining potential to said gas panel.

3. The method of claim 2 further wherein all of said cells located at the intersections of said drive lines are erased by applying a single erase pulse to a plurality of vertical and a plurality of horizontal drive lines simultaneously.

4. The method of claim 3 further wherein there is applied an additional potential from said vertical drivers to the said vertical drive line of said selected cells through said matrix and an additional potential from said horizontal drivers to the said horizontal drive line of said selected cell through said matrix to produce an electrical potential sufficient to write said selected cell.

5. The method of claim 4 further wherein a plurality of said first and second horizontal drivers are selected to simultaneously write a plurality of cells.

6. The method of claim 5 further wherein a plurality of said first and second horizontal drivers are selected to simultaneously erase a plurality of cells.

7. A gas panel drive system in which first and second horizontal and vertical drivers are, under control of character generating logic, selectively activated to supply potentials of sufficient magnitudes to write cells, sustain cells once written and erase cells which are located at the apparent intersection of the vertical and horizontal drive lines of said gas panel, said system comprising:

a. a summing-resistor matrix drive connecting said first and second vertical drivers to said vertical drive lines of said gas panel and connecting said first and second horizontal drivers to said horizontal drive lines of said panel;

b. said means for connecting including a matrix wired such that during generation of said write potential only the cell being written receives a potential and all other cells can be caused to receive a zero or negative potential.

8. The gas panel drive system of claim 7 further wherein each of said first vertical drivers and each of said second vertical drivers are selectively resistively coupled to said vertical drive lines of said gas panel and each of said first and second horizontal drivers are selectively resistively coupled to said horizontal drive lines of said gas panel.

9. The gas panel drive system of claim 8 further wherein said plurality of vertical drive lines connected to a single vertical driver is resistively coupled to a different one of said second vertical drivers and each of said horizontal drive lines are resistively coupled to one of said second horizontal drive lines.

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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3906451 *Apr 15, 1974Sep 16, 1975Control Data CorpPlasma panel erase apparatus
US3911421 *Dec 28, 1973Oct 7, 1975IbmSelection system for matrix displays requiring AC drive waveforms
US3938136 *Jan 4, 1974Feb 10, 1976Hitachi, Ltd.Method and device for driving a matrix type liquid crystal display element
US3993990 *Feb 3, 1975Nov 23, 1976Owens-Illinois, Inc.Memory devices
US4011558 *Oct 22, 1974Mar 8, 1977U.S. Philips CorporationDC gas panel electrical display device
US4027196 *Nov 12, 1975May 31, 1977International Business Machines CorporationBilateral selective burst erase system
US4027285 *May 2, 1975May 31, 1977Motorola, Inc.Decode circuitry for bipolar random access memory
US4045790 *Aug 22, 1975Aug 30, 1977Owens-Illinois, Inc.Matrix discharge logic display system
US4123751 *Apr 5, 1976Oct 31, 1978The Post OfficeElectronic display apparatus including a DC-responsive electro-luminescent phosphor screen
US4137551 *Oct 4, 1976Jan 30, 1979Rca CorporationCathode addressing system
US4349819 *Mar 28, 1980Sep 14, 1982Fujitsu LimitedSystem for driving a plasma display panel device
US5043719 *Dec 21, 1990Aug 27, 1991Canon Kabushiki KaishaMatrix circuit
EP0030478A2 *Dec 9, 1980Jun 17, 1981Fujitsu LimitedGas discharge panel device
Classifications
U.S. Classification345/69
International ClassificationG09G3/28, G09G3/288
Cooperative ClassificationG09G3/296, G09G2310/0218, G09G3/291
European ClassificationG09G3/296