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Publication numberUS3827041 A
Publication typeGrant
Publication dateJul 30, 1974
Filing dateAug 14, 1973
Priority dateAug 14, 1973
Also published asCA1027269A, CA1027269A1
Publication numberUS 3827041 A, US 3827041A, US-A-3827041, US3827041 A, US3827041A
InventorsCook H
Original AssigneeTeletype Corp
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Display apparatus with visual segment indicia
US 3827041 A
Abstract
An apparatus for providing a visual display of encoded information on a cathode-ray tube screen wherein the information is stored in a memory which has a storage capacity greater than the display capacity of the tube screen. The address to the memory is decoded and in response to the writing of a preselected character row from the memory, and a selected scan line and scan line position, an indicia or marker signal is generated. Generation of the indicia signal occurs at a scan position adjacent the normal display area of the display screen. The signal serves to control the beam intensity of the cathode-ray tube so as to create a visual marker on the screen indicating the segment of the memory being displayed.
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United States Patent Cook 1451 July 30, 1974 [54] DISPLAY APPARATUS WITH VISUAL 3,706,075 12/1972 Fredrickson et a1 340/1725 3,742,482 6/1973 Albrecht et a1. 340/324 AD SEGMENT INDICIA [75] Inventor: Harold D. Cook, Wheaton, 111.

[73] Assignee: Teletype Corporation, Skokie, I11.

[22] Filed: Aug. 14, 1973 [21] Appl. No.: 388,296

[52] [1.5. CI 340/324 AD, 340/172.5 [51] Int. Cl. G06f 3/14 [58] Field of Search 340/324 AD, 172.5

[56] References Cited UNITED STATES PATENTS 3,082,294 3/1963 Dean 178/68 3,242,470 3/1966 Hagelbargcr et al. 340/172.5 3,422,420 1/1969 Clark 340/324 AD 3,524,182 8/1970 Criscimagna ct a1. 340/324 A 3,610,902 /1971 Rahenkamp et a1 340/172.5 3,643,252 8/1967 Roberts 340/324 A 3,654,620 4/1972 Bartocci 340/l72.5 3,676,850 7/1972 Goldman ct al. 340/324 A 3,680,077 7/1972 'Hobcrecht 340/324 A 3,683,359 8/1972 Kleinschnitz 340/324 A Primary Examiner-David L. Trafton Attorney, Agent, o Firm-114M121?! 19 $.10 ELLE Landis 5 7] ABSTRACT An apparatus for providing a visual display of encoded information on a cathode-ray tube screen wherein the information is stored in a memory which has a storage capacity greater than the display capacity of the tube screen. The address to the memory is decoded and in response to the writing of a preselected character row from the memory, and a selected scan line and scan line position, an indicia or marker signal is generated. Generation of the indicia signal occurs at a scan position adjacent the normal display area of the display screen. The signal serves to control the beam intensity of the cathode-ray tube so as to create a visual marker on the screen indicating the segment of the memory being displayed.

Claims, 2 Drawing Figures 82 8O 78 UP 76 DOWN SCROLL RESET COUNTER 84 OUTPUT [66 RESET LOAD ADDRESS 64 MEMORY ADDRESS MEMORY ADDRESS 68 CHARACTER COUNTER 74 ROW COUNTER c1 oci COUNT 100 DIVIDER -c1 oc1 ROW RANDOM ACCESS DECODER MEMORY O E 56 HO K SCAN LINE FONT DECODER DECODER 96 [I6 m [I4 m 112 f" 29 E0 ZN 6O 62 I26 124 PARALLEL TO T I SERIAL SHIFT [O8 REGISTER L) K 104 I06 I02 PATENTED JUL 3 0 I 313 37.041

SHEET am 2 UP 76 DOWN SCROLL COUNTER" RESET 72 W OUTPUT /66, RESET LOAD ADDRESS 64 MEMORY ADDRESS MEMORY ADDRESS 68 CHARACTER COUNTER ROW COUNTER -OLOOK COUNT IOO DIVIDER' CLOCK,

aa ROW I 85 v I RANDOM ACCESS DEOODER MEMORY ov m 44 E 94 3 v 5 R v 90 //o \{T v v SCAN LINE FONT DECODER DECODER 9s 96 Z9 E, Z N 6O 2 I i J I22 T A I26 I24 T PARALLEL TO SERIAL HIFT REGISTER I08 CLOCK DISPLAY APPARATUS WITI-I NISUAL SEGMENT INDICIA BACKGROUND This invention generally relates to a display apparatus for providing a visual presentation of encoded information and more particularly relates to such an apparatus which includes a memory having a capacity greater than the capacity of the display and means providing a visual indicia related to that segment of the memory being displayed.

Various systems have been suggested for providing a visual display of stored, coded information. One such arrangement enters the information into a storage memory from which each coded character is selectively read-out, decoded and used to control the beam of a cathode-ray tube. Thus, the tube screen provides a visual presentation corresponding to the character readout from the memory. The character presentation on the cathode-ray tube may be in the form of a dot matrix created by a plurality of horizontally spaced scans of the electron beam. The beam is pulsed during each scan to create the desired dot pattern.

When the number of character locations in the memory equals the number of character locations on the screen of the cathode-ray tube, the memory capacity is sufficient to fill the screen of the tube. If is often desirable to provide the memory with more capacity than the amount necessary to fill the screen. Under such conditions, an entire message can be stored in the memory, however, only a portion of the text will be displayed at one time. The memory text is moved up or down past the window formed by the screen of the cathode-ray tube in a manner generally termed scrolling." During scrolling, the text material appears to move vertically across the screen as though it was printed upon a roll of paper. Since the memory is capable of storing a greater number of rows than are presented on the screen at any one time, it would be convenient if the operator were provided with a visual indicator related to the particular portion or segment of the stored text being displayed. For example, let it be assumed that the cathode-ray tube screen accommodates twenty-four rows of text, and that the memory capacity is equivalent to seventy-two rows of text. The operator would find it helpful to be provided with some visual indication designating the identity of row one, row twenty-five, and row forty-nine of the memory when displayed. An indicia or marker designating the first row of one of the three memory segments would always appear upon the screen thus providing the user with a convenient reference indicating the segment of the memory being displayed and its relative position with respect to the remainder of the memory capacity.

It is particularly desirable if the memory segment markers. are placed upon the-cathode-ray tube screen at a location which is not utilized for the display of information so that the full capacity of the cathode-ray tube screen is available fortext material. Additionally, it also advantageous if the segment markers are generated separate and apart from the memory rather than being stored therein. Such an arrangement allows the full capacity of the memory to be devoted to the storage of text material.

SUMMARY OF THE INVENTION The illustrated embodiment'of' the invention includes a character display means in the form of a cathode-ray tube and a storage memory supplying information to the display. The storage capacity of the memory exceeds the display capacity of the tube, thus permitting only a segment of the display to be presented at a given time. The memory segment is selected by an address means. Control means responsive to a selected address generates an indicia signal. The embodiment further includes means actuated by the indicia signal for producing visual segment indicia or markers on the display corresponding to the segment of the memory storage being displayed.

As illustrated the segment markers are placed upon the screen in an area of the screen not generally used for text display, but rather adjacent the text display area.

It is a main object of this invention to provide a display apparatus including means for indicating the segment of the storage memory being displayed.

Other objects, advantages, and features of the invention will be more readily appreciated after reference to the following description and accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates three fragmentary cathode-ray tube presentations and partial diagram of a portion of a display apparatus; and

FIG. 2 is a partial diagram which when combined with the diagram of FIG. 1 illustrates a display apparatus including certain features of this invention.

DESCRIPTION OF THE ILLUSTRATED EMBODIMENT GENERAL Briefly, the illustrated embodiment generates indicia l0, l2, and 14 (FIG. 1) upon the screen 15 of a cathode-ray tube 16 (FIG. 2) which provides the user with a visual markers indicating the memory segment being displayed upon the screen of the tube. A timing means 18 isillustrated in FIG. 1 which supplies the necessary timing signals and address outputs for control of the cathode-ray tube beam deflection circuits as well as the portion of the apparatus of FIG. 2. Encoded information is stored in a code storage memory 20 and selectively read-out for processing and control of the cathode-ray tube 16 which provides a visual display of the stored information. The capacity of the memory is greater than the display capacity of the screen of the cathode-ray tube 16.

The apparatus includes means for generating indicia upon the screen related to the segment of the memory storage being displayed. Each of the fragmentary views of FIG. 1 correspond to the upper left-hand comer of a screen raster displaying one memory segment. Three illustrative screen fragments 22, 24, and 26 are shown which exhibit in sequence segment indicia l0, l2, and 14 relating to a particular portion of the storage memory. Although only three segment indicia are illustrated, it will be appreciated that the concept may easily be expanded to accommodate any number N of memory segments.

TIMING Throughout the following description, certain timing relationships are described. These relationships are provided .to give the reader a better understanding of the operation of the embodiment herein described and not in limitation of the invention. The letter E is illustrated to facilitate explanation and is formed by a matrix of dots seven columns wide and nine lines high and the area of the raster assigned to each character is nine dots wide and fourteen dots in height. Serving to determine the spacing of the dots and establish at time base for the apparatus is a dot generator 28 which in turn drives a character width counter 30 of modulus nine, equivalent to the width of the raster alloted to a character. Upon the completion of the horizontal scan of each line of each character, the character width counter 30 provides an output pulse the period of which is equivalent to the time necessary to write the width of one character.

Providing an output pulse at the commencement of each horizontal scan of the cathode-ray tube, is a scan character counter 32 having a modulus of one hundred including two divide by ten counters 34 and 36 in tandem. An entire character line is scanned and the beam retraced during a time duration equivalent to the generation of 100 characters. As illustrated, the width of the screen of the cathode-ray tube accommodates eighty characters with a horizontal retrace time equivalent to 20 characters. Serving to trigger the horizontal retrace circuitry, a signal output is supplied by the scan character counter 32 and serves to trigger a horizontal retrace circuit 38 which controls the horizontal deflection of the cathode-ray beam after the 80th character in the row has been scanned.

The count nine output of the first divide by ten decode 34 of the scan character counter 32 is fed to one input of a ninetynine count AND-gate 40 and the count nine output of the second divide by ten decode 36 of the scan character counter 32 is fed to a second input of the AND-gate 40. Thus, upon coincidence of the two count nine signals which corresponds to a count of 99, an output pulse is provided at the output of the AND- gate 40 for purposes to be subsequently considered. It will be appreciated that since the scan width of the screen is eighty characters wide and the retrace time is approximately equivalent to 20 characters, the ninetyninth pulse output will occur when the cathode-ray beam is at the left-hand side of the screen adjacent to the matrix area assigned to the first character on the line. This portion of the horizontal scan is generally non-linear and therefore, is usually not utilized for the generation of display characters. The output of the scan character counter 32 is fed to a scan line counter 42 with a modulus of fourteen. I

As previously mentioned, the matrix area assigned to each character is approximately nine dots in width and fourteen dots in height. Thus, each fourteen scans of the beam, correspond to the writing of an entire horizontal row of characters. The scan line counter 42 generates one output pulse for each fourteen scan lines. The counter levels in the scan line counter 42 are brought out via lines 44 for decoding purposes to be described. The output of the scan line counter 42 is fed to a text row counter 46 modulus twenty-five. The vertical display area of the cathode-ray tube is of sufficient length to accommodate 24 rows of characters; with the vertical retrace requiring a time equivalent to the writing of one character tow. The output of the text line counter drives a vertical retrace circuit 48.

MEMORY CONTROL With particular referece to FIG. 2, the storage memory 20 is in the form of a random access memory. As previously mentioned, the cathode-ray tube 16 screen has a capacity sufiicient to display 24 rows of characters. For purposes of discussion, the memory 20 is assumed to have a storage capacity three times that of the display capacity of the cathode-ray tube screen or a memory capacity of 72 rows of characters. The memory 20 includes address inputs 50 and 52 and parallel output lines 54 which feed the coded character signals to the input of a font decoder 56. The font decoder 56 serves to decode the information which has been stored in the memory 20 toa video format and includes an address 58 as well as output ports 60. The address input 58 of the font decoder 56 is connected by the lines 44 to the four parallel address levels provided by the scan line counter 42. The memory 20 presents a selected encoded character to the input of the font decoder 56, and the address lines 44, which present a binary level related to the scan line, select the appropriate decoding scan level for that character. For example, if an encoded letter E is presented to the font decoder 56 and the address input designates scan line 6, the output will provide dots at character columns 2 through 5 inclusive. The output of the font decoder is connected to the input of a parallel-to serial shift register 62 which serves to convert the parallel to input from the font decoder 56 into a serial output for control of the beam intensity of the cathode-ray display tube 16. The output from the register is stepped by pulses from the dot generator via line 63. Each output level of the font decoder 56 relates to one of the nine character columns.

Serving to address the memory 20 is a memory address character counter 64 and a memory address row counter 66. The output of the character counter 64 and the output of the row counter 66 are connected to the input address lines 52 and 50, respectively, of the memory. Thus, the row counter 66 addresses the memory with respect to the selected row of characters and the character counter 64 serves to select the particular character in that row. The display address character counter 64 is stepped by a clock pulse via line 68 from the output of the character width counter 30 thereby causing the counter 64 to step once for each character width. Upon the lapse of a time interval equivalent to the scan time period of 100 characters, an output pulse is generated by the memory address character counter 64 which is applied to one input of a reset OR-gate 70 via line 72 and to a divide by fourteen divider 74. After fourteen scan lines which is equivalent to the scanning of a complete character row, the divide by fourteen divider 74 feeds a pulse to the clock input of the row counter 66. In response to this pulse, the row counter 66 is stepped one position, thereby addressing the memory 20 to next adjacent character row. After a complete raster has been scanned, the vertical retrace pulse from the output of the text row counter 46 is fed via line 76 to the load input of the row counter and to the remaining input of the OR-gate 70. Thus, the character counter 64 is reset for each raster of characters as well as at the end of each character row. Additionally, upon the application of a vertical retrace pulse to the load input of the row counter 66, the counter is loaded by the address output of a scroll address counter 78.

The scroll counter 78 provides the address of the first row in the display. For example, if the first 24 rows of the memory are to be displayed, the scroll counter will provide the address of the first row. If the second segment of the memory is to be displayed, the scroll counter 78 will provide the address of the twenty-fifth row, and correspondingly, if the last segment is to be displayed, the scroll counter 78 will provide the address of the forty-ninth row. Further, the display may overlap any two memory segments. In such an instance, the scroll counter 78 will address an intermediate line, lt will be appreciated that regardless of the number of the first row displayed, the raster will always include the first row of a memory segment. Serving to increment the scroll counter 78 are two inputs 80 and 82 respectively designated up and down. Additionally, a reset input 84 is provided to reset the scroll counter 78 to the first row of the memory. The up, down, and reset inputs are controlled by external circuitry which does not form a part of this invention.

in operation, the scroll counter 78 is set to the first line to be displayed and in response to a vertical retracepulse via the line 76, the scroll address is loaded into the row counter 66. Thus, the memory is addressed for the first row to be displayed and the first character of the row. This character is read-out from the memory 20 and fed to the font decoder 56. As previously mentioned, each row of characters is composed of fourteen scan lines, each of which defines a unique dot pattern. Assuming that the first character to be displayed is the letter E as illustrated in FIG. 1, the output of the front decoder 56 will provide a dot at columns 2 through 8, corresponding to he first scan line of the row. This output is fed to the shift register 62 wherefrom it is clocked serially into the intensity control element of the cathode-ray tube 16. After the completion of the scan of the first character, an output from the character width counter 30 steps the character counter 64 one position to the second character in the row and the memory 20 reads-out the second character of the line. The font decoder 56 provides an output related to the dot pattern of the first scan line of the second character and the process continues until the first scan line of the first row of characters has been completed. The character counter 64 resets and commences scanning of the second scan line of the character row. Thus, each of the characters are decoded on a line by line basis until all fourteen scan lines comprising a single character row have been completed at which time the output of the divide by fourteen divider 74 supplies a pulse to the row counter 66 causing it to address the memory 20 at the second row. in this manner, the entire raster of 24 rows of characters are scanned and upon recurrence of the vertical retrace pulse, the memory address row counter 66 is agains loaded. In the event the scroll counter 78 has been incremented or decremented, the display will start on the newly addressed row.

lNDlCIA GENERATION With further reference to FIG. 2, the illustrated embodiment includes a means for generating indica related to the memory segment being displayed. A control means 85 is provided which generates an indicia signal and includes an address row decoder 88, receiving the output of the row counter 66. The row decoder 88 generates an output signal in response to the occurrence of rows one, twenty-five, and forty-nine along lines 90, 92, and 94, respectively. As mentioned, these character rows designate the start of one of the three segments stored within the memory. The row one output of the decoder 88 is fed to one input of a first OR- gate 96 and the row twenty-five address counter is fed into one input of a second OR-gate 98. The row fortynine output is fed into the remaining inputs of each of the two OR-gates 96, and 98. Thus, each of the OR- gates supplies an output signal in response to a memory address corresponding to a forty-ninth memory row. The second OR-gates 98 provides an output signal in response to row twenty-five and the first OR-gate 96 provides an output signal upon the decoding of the first row address. The output from the OR-gate 98 is fed to one input, of a first AND-gate 102 and a second AND- gate 104. The output of the OR-gate 96 is fed to one input of a third AND-gate 106. Each of the AND-gates include three inputs. One input of each of the three AND-gates 102, 104, and 106 is connected to the output of the ninety-nine count AND-gate 40 of the timing unit via line 108.

The decoding means additionally includes a scan line decoder 110, the address inputs of which are connected to the binary outputs of the scan line counter 42 via lines 44. The decoder 110 provides three outputs 112, 114, and 116 corresponding to the respective decoding of scan line two, scan line six, and scan line ten of each character row. The scan line two output 112 is connected to the remaining input of the AND-gate 102, the scan line six output is connected to the remaining input of the AND-gate 106, and the scan line ten output is connected to the remaining input of the AND- gate 104. Thus, upon the simultaneous occurrence of character row one, scan line six, and the ninety-nine count signals, the AND-gate 106 will provide an output pulse to one input of an OR-gate 118. Upon the simultaneous occurrence of scan lines two or ten with count ninety-nine and character row twenty-five, the AND- gates 102 and 104 provide output pulses which are respectively coupled to the two remaining inputs of the OR-gate 118. In response to scan lines two or six or ten with character row forty-nine, and scan count ninetynine, all three of the AND-gates 102, 104, and 106 will sequentially provide output pulses to the inputs of OR- gate 118. Thus, it will be appreciated that in response to a display of character row one which corresponds to the first segment of the memory, the AND-gate 106 will provide an output only during a small portion of the scan of line six. When character line twenty-five is addressed, which is the first row of the second segment of the memory, the AND-gate 102 will provide an output corresponding to the occurrence of scan line two and the AND-gate 104 will provide an output corresponding to he occurrence of scan line ten. In response to the address of character row forty-nine from the memory, all three of the dot AND-gates 102, 104, and 106 will sequentially provide an output corresponding to the occurrence of scan lines two, six, and ten coinciding with the output pulse from the count ninetynine AND-gate 40. The output of the OR-gate 118 is connected to the anodes of two steering diodes 120 and 122 the cathodes of which are connected to inputs 124 and 126 of the parallel to serial shift register corresponding to character columns six and seven.

For purposes of discussion, let it be assumed that the first twenty-four lines of memory are being displayed on the face of the cathode-ray tube 16 and the memory 166. During the retrace of the cathode-ray beam at a 7 point just prior to the commencement of the scanning of the first character, a ninety-nine count pulse occurs at the remaining input to the AND-gate 1106 creating an output signal. As previously mentioned, this signal occurs during a non-linear portion of the scan at a screen position not generally used for display purposes and is coupled through the OR-gate 118 and the steering diodes 120 and 122 to the inputs 124 and 126 of the parallel to serial shift register 62. Thus dots are generated at scan line six, columns six and seven. Since'this portion of the scan is non-linear, the two generated are compressed producing a single elongated dot as illustrated at Id in FIG. I.

When the scroll counter 78 has loaded the row counter 66 for the second segment of display commencing at row twenty-five of the memory an output pulse appears at the output of the OR-gate 98. Upon coincidence with the output from the decoder 110 corresponding the scan lines two or ten and the output of the ninety-nine AND-gate 40, an indicia signal is supplied to the sixth and seventh column inputs I24 and 126 of the shift register 62. A second segment indicia 12 is produced in the form of two elongated dots in the left margin of the display at scan lines two and ten as illustrated in FIG. 1. In a similar manner, during the display of the last segment of the storage memory 20, line forth-nine will be decoded along with scan lines two, six, and ten to produce the third segment indicia 14 consisting of three dots at the left of the display area. Thus, it will be appreciated that the display of lines one, twenty-five, and forty-nine will each produce a unique dot display at the left margin of the display area adjacent the first character row of the memory segment. In this manner, the user is provided with visual indicia representing the particular segment of the storage memory being displayed. The location on the screen of these segment indicia is particularly convenient as they are readily recognizable by the operator since they are located in the left margin of the display adjacent the text. It will be appreciated that the generation of these segment indicators does not utilize any storage memory capacity, thereby allowing the entire memory to be devoted to the storage of information. Further, the segment indicators are not displayed upon a portion of the display area which is generally used for the display of character information, but rather, during that portion of the scan line which is non-linear. Thus, the indicators do not reduce the available display capacity of the apparatus.

OPERATION Briefly, in response to the operators command, the scroll counter 78 is set with the address of the first line to be displayed. Upon command of the vertical retrace signal 76, the scroll address is loaded into the memory row counter 66 and the character counter 64 is reset. 6

intensity of the beam of the cathoderay tube 16. The.

row address to the memory and the scan line of the character row are decoded. Upon coincidence of the first character row and a selected scan line, a signal is generated which is pulsed to the control circuitry in response to the ninety-ninth pulse output from the scan character counter 32. The occurrence of the ninetyninth pulse is such that the indicia signal occurs when the scan line is located to the left of the normal text area on the tube screen, creating a unique dot pattern corresponding to the memory segment being displayed.

Although the invention has been particularly shown and described with reference to a preferred embodiment thereof, it will be understood that various changes in form and detail may be made without departing from the spirit and scope of the invention.

What is claimed is:

1. In a display apparatus including character display means and a storage memory supplying information to the display means for visual presentation thereon, the memory having a storage capacity exceeding the display capacity of the display means, the improvement comprising:

address means for selecting a segment of the total capacity of the storage memory for display, control means responsive to said address means for generating an indicia signal related to that segment of the code storage being displayed, and means actuated by said indicia signal for producing visual segment indicia on the display means corresponding to the segment of the memory storage being displayed.

2. The apparatus of claim 1 wherein said control means includes decoding means responsive to said memory address means so as to generate said indicia signal upon the occurrence of a preselected address.

3. In the display apparatus of claim 2, wherein the display means includes a cathode-ray tube, the information from the memory is fed to a font decoder serving to decode the output of the memory storage into a display format, and scan line address means are provided for controlling the font decoder, the improvement further comprising:

said control means for generating the indicia signal receiving the output of the scan address and serving to generate said indicia signal to control the cathode-ray tube display at a time determined by said scan line address means.

4. The apparatus of claim 3 wherein said scan address means includes a scan signal generator controlling the horizontal scan circuitry of the cathode-ray tube, said scan signal generator supplying a scan position signal to said control means indicating a scan line position located adjacent the normal display area of the cathoderay tube; said control means generating said indicia signal in response to said scan position signal so as to place said signal segment indicia upon the cathode-ray tube screen at a preselected location not used for the normal display of information.

5. The apparatus of claim 4 wherein:

the character format displayed upon the cathode-ray tube screen is in the form of a dot matrix, each character being composed of a plurality of horizontal scan lines producing a predetermined number of dots to form the desired character;

said indicia producing means including means for selectively generating at least one dot upon the cathode-ray tube in response to said indicia signal thereby providing an indication of the storage segment being displayed.

6. The apparatus of claim wherein said control means includes gating means controlled by said memory address decoding means and said font decoder for generating N number of dots wherein N corresponds to the relative position of the memory segment being displayed with respect to the memory capacity.

7. The apparatus of claim 5 wherein said control means is responsive to said scan position signal prior to the start of the generation of a scan line so as to place said indicia adjacent the normal text display area of the cathode-ray tube.

8. The apparatus of claim 2, wherein the display means includes a cathode-ray tube, ascan signal generator for controlling the horizontal retrace circuitry of the cathode-ray tube, said scan signal generator supplying a signal to said control means indicating a scan line position located adjacent the normal display area of the cathode-ray tube so as to place said segment indicia upon the cathode-ray tube display surface at a location not used for the normal display of information.

9. The apparatus of claim 8 wherein said control means is responsive to said scan signal generator adjacent the start of the normal display area of the cathoderay tube.

10. The apparatus of claim 2 wherein said memory address means includes a row address for addressing the memory to a selected row;

said decoding means is responsive to said row address so as to generate said indicia signal upon the occurrence of a preselected row thereby providing an indicia on the display means corresponding to a selected row of the memory segment being displayed.

11. The apparatus f claim 10 wherein said row address is in the form of a presetable counter and a scroll counter for selectively presetting said row address in response to a control signal.

12. In the display apparatus of claim 11, wherein the display means includes a cathode-ray tube and the information from the memory is fed to a font decoder serving to decode the output of the memory storage into a display format and scan address means controlling the font decoder, the improvement further comprising:

said control means receiving the output of the scan address and serving to generate said indicia signal to control the cathode-ray tube display at a time determined by said scan line address means.

13. The apparatus of claim 12 wherein said scan address means includes a scan signal generator controlling the horizontal scan circuitry of the cathode-ray tube, said scan signal generator supplying a scan position signal to said control means indicating a predetermined scan line position located adjacent the normal display area of the cathode-ray tube; said control means generating said indica signal in response to said scan position signal so as to place said visual segment indicia upon the cathode-ray tube screen at a preselected location not used for the normal display of information.

14. The apparatus of claim 13 wherein:

the character format displayed upon the cathode-ray tube screen is in the form of a dot matrix, each character being composedof a plurality of horizontal scan lines producing a predetermined number of dots to form the desired character;

said indicia producing means includes means for selectively generating at least one dot upon the oath ode-ray tube in response to said indicia signal thereby providing an indication of the storage segment being displayed.

15. The apparatus of claim 14 wherein said dot generating means is responsive to said scan positions signal prior to the start of the generation of a scan line so as to place said indicia adjacent the normal text display area of the cathode-ray tube.

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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US4158837 *May 17, 1977Jun 19, 1979International Business Machines CorporationInformation display apparatus
US4169262 *Nov 17, 1977Sep 25, 1979Intel CorporationVideo display circuit for games, or the like
US4368466 *Nov 20, 1980Jan 11, 1983International Business Machines CorporationDisplay refresh memory with variable line start addressing
US5574508 *Nov 2, 1994Nov 12, 1996Rca Thomson Licensing CorporationVertical panning for interlaced video
US8974384Jan 28, 2008Mar 10, 2015Roche Diagnostics Operations, Inc.Data processing device for processing measured values
US20080243758 *Jan 28, 2008Oct 2, 2008Hans KintzigData processing device for processing measured values
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Classifications
U.S. Classification345/25, 715/765, 345/27, 365/236
International ClassificationG09G1/00, G09G5/34
Cooperative ClassificationG09G1/00, G09G5/343
European ClassificationG09G1/00, G09G5/34A
Legal Events
DateCodeEventDescription
Mar 11, 1985ASAssignment
Owner name: AT&T TELETYPE CORPORATION A CORP OF DE
Free format text: CHANGE OF NAME;ASSIGNOR:TELETYPE CORPORATION;REEL/FRAME:004372/0404
Effective date: 19840817