US 3836887 A
3-bit counts on a binary counter counting clock pulses are decoded and a control signal generator responds to those decoded counts assigned to four control switches to generate a time-divided multiplexed control signal including pulses resulting from the switches in their "ON" position. The control signal and 3-bit counts are transmitted in parallel to all four detectors. In each detector that count assigned to the associated switch is decoded to extract that pulse originating from that switch, if present, from the control signal. The extracted pulse causes the associated electric installation to be put in operation. An analog PAM multiplexed signal may be used as the control signal.
Description (OCR text may contain errors)
Unite States Patent 3,836,887
Ueda et a1. Sept. 17, 1974  CONTROL SYSTEM FOR ELECTRIC 3,742,447 6/1973 Sognefest et al 340/147 SY INSTALLATIONS ON VEHICLE E D I Y k Primary xaminerona d J. us 0  Inventors. Attslgshl I Jet}a, Mitsuakl Ishu, both Attorney, Agent, or Firm Robert E. Bums;
O apan Emmanuel J. Lobato; Bruce L. Adams  Assignee: Mitsubishi Denki Kabushiki Kaisha,
Tokyo, Japan  ABSTRACT 22 Filed; 1 1972 3-bit counts on a binary counter counting clock pulses are decoded and a control signal generator responds PP N05 315,835 to those decoded counts assigned to four control switches to generate a time-divided multiplexed con- 52 us. CI. 340/163, 340/168 R trel Signal including Pulses resulting from the Switehes 51 Int. Cl. H04q 9/00 in their position The control signal and 5 Field f Search 340 1 7 R 3 147 R, counts are transmitted in parallel to all four detectors. 340 147 SY, 168 R 7 3 7 168 In each detector that count assigned to the associated switch is decoded to extract that pulse originating 5 References Cited from that switch, if present, from the control signal.
The extracted pulse causes the associated electric in- 3 577 I87 :TATES PATENTS 340 167 R stallation to be put in operation. An analog PAM mul- 3 651 463 3/1972 Ri /122E511IIIIIIIIIIIII 340i147 R iplexed Signal may be used as the signal 3,689,887 9/1972 La Falce et a] 340/163 3 Claims, 4 Drawing Figures T R A II T;T R J1:O 9 SIGNAL DETECTOR 26A 34A 28A I ELECTRIC CLOCK INSTAL- I LATION I 34 I COUNTER i i I 34B 2 5 I ELECTRIC zoAiw CONTROL DECODER i ii T Iii SWITCH I I l I i CONTROL 1 I I SWITCH L CONTROL I SIGNAL DETECTOR J2 6C 34C 28C SIGNAL ELECTR 200 gwl T g GENERATORb INST/L10 CH 2 I LATION I I I 20 CONTROL I I SWITCH I L SIGNAL DETECTOR 340 28p ELECTRIC INSTAL- PATENTEDSEPWIQH 3.836.887 I SHEET 2 BF 4 FIG. 2
CLOCK PULSES FROM 12 o H l L OUTPUTS H FROM 14 e I H. b C1 SAMPLING PULSES C FROM 18 2 C CONTROL SIGNAL FROM 20 d OUTPUT FROM 32A e,
OUTPUT FROM 32B 2 O OUTPUT FROM 320 s v OUTPUT FROM 32D 8 OUTPUT FROM 34A 1,
OUTPUT FROM 348 f2 OUTPUT FROM 34C f OUTPUT FROM 34D f CONTROL SYSTEM FOR ELECTRIC INSTALLATIONS ON VEHICLE BACKGROUND OF THE INVENTION This invention relates to a control system for electric tors. In view of the standpoint of security, public nuil5 sances etc., there is recently a tendency to increase the number and types of electric installations equipped on the vehicle. This had led to an increasingly complicated circuit configuration of electric wiring required for DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to FIG. 1 of the drawings, there is illustrated a control system for electric installations constructed in accordance with the principles of the present invention. Only for purposes of illustration the arrangement illustrated contemplates to control four electric installations equipped on a vehicle. Thus the arrangement is adapted to transmit four different control signals to the four electric installations respectively through the use of a 3-bit parallel code. As will be well known, the use of a 3-bit parallel code theoretically permits the transmission of eight (8 2 different signals for controlling eight electric installations. It is to be understood that the present invention does not restricted to the use of a 3-bit parallel code and that it is equally applicable to an n-bit code where n is any integer greater than three. For an n-bit code, the transmisconnections to those many electric installations and of dfferem Slgnals can be effected to control therefore to an increase in costs of manufacturing and installing them. Furthermore, it has been very difficult to check and repair the electric installations upon their failures.
SUMMARY OF THE INVENTION Accordingly it is an object of the present invention to eliminate the disadvantages of the prior art type control systems as above described.
It is another object of the invention to provide a new and improved control system for controlling a plurality of electric installations equipped on a vehicle or the like with a simplified circuit configuration of electric wiring required for connections to the electric installations.
The present invention accomplishes these objects by the provision of a control system for controlling a plurality of electric installations equipped on a vehicle, comprising means for producing plural-bit binary coded signals, selected ones of the binary coded signals providing adress signals for the plurality of electric installations respectively, and means for transmitting the plural-bit binary coded signals to the electric installations through a plurality of transmission line equal in the number to the bits of the binary coded signals, and also transmitting control signals from a plurality of sources of control signal through another transmission line to the electric installations for selectively controlling the operation of the latter.
If only the binary-coded signals for those sources of control signals are transmitted to the electric installations, the another transmission line may be omitted.
BRIEF DESCRIPTION OF THE DRAWINGS The invention will become more readily apparent from the following detailed description taken in conjunction with the accompanying drawings in which:
FIG. 1 is a block diagram of a control system constructed in accordance with the principles of the present invention;
FIG. 2 is a graph illustrating waveforms developed at various points in the arrangement shown in FIG. 1;
FIG. 3 is a block diagram of a modification of the invention; and
FIG. 4 is a fragmental block diagram of another modification of the invention.
In the arrangement of FIG. 1, a transmitter unit generally designated by the reference numeral 10 includes a clock or a reference time generator circuit 12 for producing a train of clock pulses and a counter 14 connected to the clock 12 counts the clock pulses to form 3-bit binary coded counts or signals which are, in turn, connected through three transmission lines 16-1, 16-2 and 16-3 to a decoder 18. The transmitter unit 10 further includes a plurality, in this case, four of control switches 20A, 20B, 20C and 20D having respective control inputs provided by the operator for a vehicle (not shown) on which the arrangement of FIG. 1 is equipped. The switches 20A, 20B, 20C and 20D may be preferably of the contact closure type and are connected to a control signal generator circuit 22 having the decoder 18 connected thereto through a plurality of leads one for each switch. The control generator circuit 22 is connected at the output to a control transmissionline 24.
All the transmission lines 16 and 24 are connected to a plurality, in the example illustrated, four of signal detector units 26A, 26B, 26C and 26D each connected to one of a plurality, in this case, four of electric installations 28A, 28B, 28C and 28D to be controlled disposed at predetermined positions on the vehicle (not shown The signal detector units 26A, 26B, 26C and 16D are, of course, disposed at their positions determined by the positions of the associated electric installations 28A, 28B, 28C and 28D respectively. All the detector units 26 are of the same construction and only one, for example, the detector unit 26A will now be described in detail. The signal detector unit 26A comprises a decoder 30A connected to the three transmission lines 16-1, 16-2 and 16-3 to translate the binary signals on the transmission lines 16-1, l6-2and 16-3 to corresponding decimal signals and to extract that translated desimal signal assigned thereto. Then the decimal signal from the decoder 30A is applied to an AND circuit 32A connected to the control transmission line 24. The AND circuit 32A is connected to a driving circuit 34A for causing the electric installation 28A to be driven through any suitable power line (not shown).
Each of the other signal detector units 26B, 26C and 26D includes the components corresponding to those included in the signal detector 26A and designated by like reference numerals denoting the latter components with the suffixed reference character identifying the associated detector unit. For example, 30C designates the decoder disposed in the signal detector unit 26C. However, the decoder in each detector unit is different from the decoders in the other detector units in the translated decimal signal to be extracted as will be described hereinafter.
The operation of the arrangement shown in FIG. 1 will now be described with reference to FIG. 2. The clock or reference time generator circuit 12 produces a train of clock pulses t, as shown at waveform a in FIG. 2. The counter counts the clock pulses t to provide three trains of pulses in the form of a conventional binary code called the l-2-4 binary code as shown at waveform b b and b;, in FIG. 2. After having counted eight clock pulses, the counter 14 is reset to the original state or cleared and then the counting process as above described is repeated. That is, the counter 14 acts as a 3-bit octal counter to produce one 3-bit coded parallel signal each time it counts each clock pulse t resulting in the generation of a time-divided 3-bit coded parallel signal. The binary coded signals b b and [2 are delivered through the transmission lines 16-1, 16-2 and 16-3 to the signal detector units 26A, 26B and 26C and also applied to the decoder 18 where the signals are decoded to provide four sampling pulses t t ,.t and assigned to the control switches 20A, 20B, 20C and 20D during each time period T within which the counter will have counted the eight clock pulses t The pulses t t t and t, are shown at waveforms c c c and c, in FIG. 2.
In the example illustrated, the odd numbered clock pulses result in the sampling pulses. For example, the counter 14 counts a third clock pulse t to provide a count or an output including the b,, b, and b portions high (H), low (L) and high (H) in amplitude respectively which is, in turn, decoded into the sampling pulse 1 assigned to the control switch 208. The number of the clock pulses resulting in the corresponding sampling pulses may be chosen dependent upon the number of the control switches. Thus, the control switches up to eight may be used for controlling the respective electric installations having a maximum number of 2 or 8 because of the use of 15-bit binary numbers.
On the other hand, the control switches A, 20B, 20C and 20D have been selectively brought into their driven or ON" position by the driver for the vehicle (not shown). It is now assumed that the control switches 20A, 20B and 20D have been brought into their ON" position while the control switch 20C remains in its OFF position. Those positions of the switches are supplied to the control signal generator circuit 22. In this circuit 22, the sampling pulses sample the status of the corresponding switches to produce signals or pulses indicating the ON position of the control switches. In the assumed condition under which the control switches 20A, 20B and 20D are in their ON" position, the control generator circuit 20 generates pulses for identifying the switches 20A, 20B and 20D and combine them into a time-divided, multiplexed control signal as shown at waveform d in FIG. 2. If the control switch 20C is in its ON position, the waveform d will include a dotted pulse coextensive with the sampling pulse t assigned to that switch. The control signal d is delivered through the control transmission line 24 to the other inputs to the AND circuits 32A, 328,
32C and 32D respectively of the signal detectors 26A, 26B, 26C and 26D.
Since the signal detector units 26A, 26B, 26C and 26D are substantially identical in construction to one another, the operation of the signal detector unit 268 will now be described with reference to FIG. 2. The counts on the counter 14 are successively supplied through the transmission lines 16-1, 16-2 and 16-3 to the decoder 30B as well as the other decoder 30A, 30C and 30D. The decoder 308 decodes counts on the counter 14 so that upon the occurrence of a particular decoded count assigned to the control switch 208 and hence to the associated electric installation 28B to produce a pulse temporally identical to the sampling pulse t from the decoder 14 assigned to the control switch 208. Thus that pulse is also designated by the reference character t-,,. The pulse t from the decoder 388 is applied to one input to the AND circuit 328 to permit the latter to determine whether or not the control pulse is present on the control transmission line 24 within the duration of the pulse t applied thereto. At that time, the control pulse generator circuit 22 is supplying the control pulse resulting from the control switch 20B to the other input to the AND" circuit 328. Therefore the AND circuit 328 applies an output to the driving circuit 328 as shown at waveform e, in FIG. 2. In the abscence of the pulse t on the control transmission line 24 due to the OFF" position of the control switch 208, the AND circuit 348 provides no output. When applied with the output e the driving circuit 348 is operated to drive the electric installation 28B through a power line (not shown) as shown at waveform f in FIG. 2. The process as above described is repeated with the remaining signal detector units 26A, 26C and 26D, excepting that the produce respective pulses assigned to the corresponding control switches. That is, each unit produces a pulse in response to that count from the counter 14 assigned to the control switch adapted to control the electric installation operatively coupled thereto. Thus the AND circuits 30A, 30B and 30D supply waveforms e and e shown in FIG. 2 to the respective driving circuits 34A, 34B and 34D to put the electric installations 28A, 28B and 28D in operation as shown at waveformsf f and f., in FIG. 2. In the example as above described, it has been assumed that the control switch 20C remains in its OFF position, so that the AND circuit 32C provide no output resulting in the electric installation 28C being not energized as shown in FIG. 2f
If the control switch 18C is in its ON" position then the AND" circuit 34C will provide an output as shown at dotted waveform e in FIG. 2 resulting in the energization of the electric installation 28C. Also if the control switch 208 is in its OFF position, the AND circuit 34B will provide no output.
From the foregoing it will readily be understood that the single control pulse or signal is provided for each of the electric installation 28 during each period T. This means that each of the driving circuits 34 is required only to have the applied pulse maintained for the period T. Also if the period T is preselected to be sufficiently short as compared with any time interval within which the control signal may be varied then the respective electric installations can be operated without any hindrance.
The present invention has been described in terms of the control system for transmitting the status of control switches or the ON and OFF positions thereof. However, it is to be understood that the invention is equally applicable to the transmission of analog electrical quantities which will now be described in conjunction with FIG. 3 wherein like reference numerals designate the components identical in operation to those shown in FIG. 1. In the arrangement as shown in FIG. 3, the transmitter unit has a plurality, in this case, four of sources of analog signal 36A, 36B, 36C and 36D substituted for the control switches 20A, 20B, 20C and 20D, and a first and a second pulse modulator cicrcuit 28 and 40 respectively serially interconnected to be substituted for the control generator circuit 22 as shown in FIG. 1. The sources 36 are connected to the first pulse modulator circuit 38 and the second pulse modulator circuit 40 is connected through the control transmission line 24 to a plurality, in this case, four of signal detector units 26A, 26B, 26C and 26D.
In each of the signal detector units 26, a first and a second pulse demodulator circuit 42 and 44 respectively serially interconnected to occupy the position of the AND circuit 32 as shown in FIG. 1. In other respects, the arrangement is identical to that illustrated in FIG. 1.
In operation, the decoder 18 produces sampling pulses t t t and 1 (see waveforms c through c, in FIG. 2) in the same manner as above described in conjunction with FIGS. 1 and 2. The sampling pulses are applied to the first pulse modulator 38 formed preferably of analog AND and OR gates. In response to the pulses 2,, t t and t the pulse modulator 38 samples analog signals provided by the sources 36A, 36B, 36C and 36D to form a series of pulses whose amplitudes are proportional to those of the sampled analog signals from the sources 38A, 38B, 38C and 38D or a pulse amplitude modulator (PAM) multiplexed pulse train. The PAM multiplexed pulse train is applied to the second pulse modulator circuit 40 where it may be subject to any of the pulse width, phase and code modulations etc. Then the pulse train thus pulse modulated is transmitted through the control transmission line 24 to four signal detector units 26A, 26B, 26C and 26D.
In each of the signal detector units 26, the decoder 30A, 30B, 30C or 30D is operated in the same manner as does the decoder 30A, 30B, 30C or 30D shown in FIG. I to form a pulse coinciding with the sampling pulse from the decoder 20 assigned to that source 36 adapted to control the electric installation 28 operatively coupled to the same detector unit. The pulses from the decoders 30 are substantially identical to the sampling pulses t t t and r, from the decoder 20 and also designated by t t t and t respectively, The pulse 1 t 2 or r, from the decoder 30A, 30B, 30C or 30D is supplied to the second pulse demodulator circuit 44A, 44B, 44C or 44D.
On the other hand, the pulse modulated pulse train from the control transmission line 24 is demodulated by the first pulse demodulator circuit 42A, 42B; 42C or 42D to form a replica of the PAM multiplexed pulse train provided by the first pulse modulator circuit 38. The PAM multiplexed pulse train thus restored is supplied to the second pulse demodulator circuit 44 where the pulse from the associated decoder 30 takes out from the PAM multiplexed pulse train only that pulse substantially coinciding with the same and assigned to the associated detector unit 26 and therefore to the electric installation 28 detector unit 26 and therefore to the electric installation 28 connected thereto to demodulate it into the original analog signal provided by the source 36 controlling that electric installation. For example, in the signal detector unit 26A, the analog signal from the source 36A is restored.
The analog signal restored by each of the second pulse demodulators 44A, 44B, 44C or 44D is operated to drive the associated electric installation 28A, 28B, 28C or 28D as in the arrangement of FIG. 1.
If the PAM multiplexed pulse train is not subject to any pulse modulation then the second modulator and first demodulator circuits 40 and 42 respectively can be omitted. In that event the first pulse modulator circuit 38 is connected to the second pulse demodulator circuit 44 through the control transmission line 24. This modification is substantially identical in operation to the arrangement as shown in FIG. 1.
In the arrangement of FIG. 3, it has been assumed that the sources of analog signals are disposed in a common position on the vehicle (not shown). However, such sources may be in many instances, scattered on the vehicle. In the latter event, the present invention may be realized into an arrangement as shown in FIG. 4 wherein like reference numerals designate the components identical in operation to those shown in FIGS. 1 or 2. In the arrangement of FIG. 4, a clock 12 and a counter 14 are identical to the clock and counter 12 and 14 respectively illustrated in FIG. 1 or 3 to form a binary coded signal generator 46 common to a plurality of analog signal transmitter units (only one of which is shown in dotted block 48A) disposed in their positions as determined by the positions of the associated source of analog signal 36 such as shown in FIG. 3 to control the operation of the respective electric installations 28.
The counter 14 is connected through transmission lines 16-1, 16-2 and 16-3 to the pulse detector unit 26A as well as all the remaining pulse detector units (not shown in FIG. 4).
Each of the pulse detector units represented by the unit 26A is the same in both construction and operation as that shown by the reference numeral 26B, 26C or 26D in FIG. 3 and connected to its own electric installation such as shown by the reference numeral 28A.
The output of the counter 14 is also connected through one portion of branches from the transmission lines 16-1, 16-2 and 16-3 to all the analog transmitter units such as the unit 48A including the components 18A, 36A, 38A and 40A interconnected in the same manner as shown in FIG. 3 excepting that the first modulator 38 has connected thereto the source 30A alone. The decoder in each of the analog transmitter unit is quite identical in operation to the decoder in the associated detector unit as shown by (see waveform c, in FIG. 2). The remaining components in each transmitter unit are identical to the corresponding components illustrated in FIG. 3.
Therefore the arrangement of FIG. 4 is quite identical in operation to that shown in FIG. 3. If desired, the second pulse modulator and first pulse demodulator circuits may be omitted as in the arrangement shown in FIG. 3.
The present invention has been illustrated and described as including three transmission lines through which a train of binary coded signals each composed of three bits, is transmitted in parallel to the side of a plurality of electric installations to be controlled, and a single control transmission line through which a timedivided, multiplexed control signal formed of four control signals is transmitted to the side of the electric installations to control the operation thereof respectively. However, the invention is characterized by means for generating one binary coded signal composed of a plurality of bits and assigned to each of a plurality of electric installations and a plurality of transmission lines equal in the number to the bits, the binary coded signals being transmitted in parallel to the side of the electric installations through the transmission lines. It is, however, to be noted that the control transmission line may be omitted in certain instances, for example, when the ON and OFF" positions of each of the control switches are transmitted to control the operation of the electric installations.
More specifically, with a selected one or ones of the control switches put in the ON position, a coded signal or signals representative of the ON position of the selected switch or switches can be transmitted to the signal detector units. On the contrary, if a particular control switch or switches is or are in the OFF position then a coded signal or signals representative of the OF F" position is or are arranged not to be transmitted to the detector units. On the other hand, each of the detector units is arranged to respond to the coded signal transmitted thereto to enable the associated electric installation to be operated whereas it responds to the abscence of the coded signal to maintain that electric installation inoperative. This measure permits the electric installations 'to be selectively control through the use of a plurality of transmission lines with the control transmission line omitted.
The present invention has several advantages. For example, the wiring to all the electric installations to be controlled is accomplished by using a single power line (not shown) for supplying electric powers to the electric installations, and a plurality of transmission lines for transmitting binary coded parallel signals whereby the wiring is much simplified as compared with the prior art practice. This simplification of the wiring results in improvements in reliability and in a decrease in manufacturing cost for the wiring. Also the wiring extends to all the electric installations without any branch leading to a further facilitation of the wiring. In addition, the signal detector units connected to the respective electric installations are very simple in construction and of the same design excepting that the binary coded signal to be decoded is different from one to another unit. This leads to the facilitation of the formation of the signal detector unit. Further an attempt to increase in the number of the electric installation can readily be realized by connecting the required additional number of the signal detector units 26 to both the transmission lines 16-1, 16-2 and 16-3 and, if necescode used, 2" signals can be transmitted through n transmission lines to control electric installations having a maximum number equal to the number of the bits forming the code. Further instead of the usual binary code produced by a counter, the present invention is equally applicable to any suitable binary code such as the 5-4-2-] code, the alternating binary code or the like. In addition, coded plates may be used to produce coded signals in practicing the invention.
What we claim is:
l. A control system for controlling electrical devices provided on a vehicle or the like comprising, means for providing n-bit natural binary coded signals where n is an integer, control signal generator means for selectively generating control signals corresponding to selected ones of said n-bit natural binary coded signals, a plurality of signal detector each corresponding to one of said n-bit natural binary coded signals and to an electrical device to be ontrolled for controlling said electrical device in response to said corresponding n-bit natural binary coded signal and a corresponding control signal and means defining a plurality of signal paths for applying said n-bit natural binary coded signals and said control signals to said plurality of signal detectors.
2. In a control system for controlling electrical devices provided on a vehicle or the like according to claim 1, wherein said means defining said plurality of signal paths comprises n signal paths for said n-bit natural binary coded signals and one signal path for said control signals, and said means for providing n-bit natural binary coded signals comprises means for applying said n-bit natural binary coded signals to said n transmission paths in a parallel format.
3. A control system for controlling electrical devices equipped on a vehicle or the like according to claim 2 wherein each of said signal detectors comprise, a decoder receptive of said n-bit natural binary coded signals for developing an output signal in response to said corresponding n-bit natural binary coded signal, an AND gate receptive of said decoder output signal and said control signals for developing an output signal in response thereto, and driving circuit means receptive of said AND gate output signal for energizing said corresponding electrical device in response thereto.