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Publication numberUS3839856 A
Publication typeGrant
Publication dateOct 8, 1974
Filing dateJan 24, 1972
Priority dateMay 14, 1971
Publication numberUS 3839856 A, US 3839856A, US-A-3839856, US3839856 A, US3839856A
InventorsDargent B
Original AssigneeTime Computer
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Solid state watch with calendar display
US 3839856 A
Abstract
Disclosed is a solid state electronic wristwatch with no moving parts and incorporating a calendar display. The same electro-optical elements are used for the calendar display as are used to display time.
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Description  (OCR text may contain errors)

United States Patent 1 Dargent 1 Oct. 8, 1974 SOLID STATE WATCH WITH CALENDAR 3,333,410 8/1967 DISPLAY 3,560,998 2/1971 3,576,099. 4/1971 [75] Inventor: Bruno Dargent, Lancaster, Pa. 03, 73 9 1971 [73] Assignee: Time Computer, 1nc., Lancaster, Pa. 2713;; [22] Filed: Jan. 24, 1972 [21] Appl' 3 Primary Examiner-Richard B. Wilkinson R l t d Us, Application D t Assistant Examiner-Edith Simmons Jackmon [63] Continuation-impart of Ser. No. 143,492, May 14, Anomey Shut 1971, Pat. No. 3,760,584, which is a continuation-in-part of Ser. No. 138,547, April 29, 1971, Pat. No. 3,721,084.

[57] ABSTRACT [52] US. Cl. 58/4 A, 58/58, 58/152 R [51] Int. Cl. G04b 19/24, G04b 37/12 Disclosed is a solid state electronic wristwatch with no Field Of Seal'dl A, 23 23 moving parts and incorporating a calendar display. 6 R The same electro-optical elements are used for the calendar display as are used to display time. [56] References Cited UNITED STATES PATENTS 6 Claims 9 Drawing Figures 3,328,954 7/1967 Miller 58/23 PAIENTED BET 81974 sum 10F 1 DlSPLAY ACTUATOR FREQUENCY CONVERTER m rr.

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SEE FIG. 40 n DISPLAY INTENSITY CONTROL SOLID STATE WATCH WITH CALENDAR DISPLAY This application is a continuation-in-part of copending U.S. Pat. application Ser. No. 143,492, now Pat. No. 3,760,584 filed May 14, 1971, for INTEGRATED CIRCUIT SOLID STATE WATCH, which application is in turn a continuation-in-part of copending U.S. Pat. application Ser. No. 138,547, now Pat. No. 3,721,084 filed Apr. 29, 1971, for SOLID STATE WATCH IN- CORPORATING LARGE-SCALE INTEGRATED CIRCUITS.

This invention relates to a solid state timepiece and, more particularly, to an electronic watch which employs no moving parts. It is especially directed to a watch of this type incorporating a calendar display for displaying the day, month, and A.M. or P.M. In the present invention, a frequency standard, in the form of a crystal oscillator, acts through solid state electronic circuit dividers and drivers to power in timed sequence the light-emitting diodes of an electro-optic display. Low power consumption and small size and weight are achieved through the use of complementary MOS circuits to produce what is in essence a miniaturized fixed program computer. In particular, the present invention is directed to a wristwatch in which substantially all of the electrical circuitry may be constructed using largescale integrated circuit techniques.

Battery-powered Wristwatches and other small portable timekeeping devices of various types are well known and are commercially available. The first commercially successful battery-powered wristwatch was of the type shown and described in assignees U.S. Reissue Pat. No. RE-26,l87, reissued Apr. 4, 1967, to John A. Van Horn et al for ELECTRIC WATCH. Electric watches of this type employ a balance wheel and a hairspring driven by the interaction of a current-carrying coil and a magnetic field produced by small permanent magnets.

In recent years, considerable effort has been directed toward the development of a wristwatch which does not employ an electromechanical oscillator as the master time reference. In many instances, these constructions have utilized a crystal-controlled high frequency oscillator as a frequency standard in conjunction with frequency conversion circuitry to produce a drive signal at a suitable timekeeping rate. However, difficulties have been encountered in arriving at an oscillatorfrequency converter combination having not only the required frequency stability, but also sufficiently low power dissipation and small size to be practical for use in a battery-powered wristwatch.

In order to overcome these and other problems, there is disclosed in assignees U.S. Pat. No. 3,560,998, is sued Feb. 2, 1971, a high frequency oscillator type watch constructed using low power complementary MOS circuits. The oscillator/frequency converter combination of that patent is described as suitable for driving conventional watch hands over a watch dial or, al ternatively, for selectively actuating the display elements of an optical display in response to the drive signal output of the converter. In assignees U.S. Pat. No. 3,576,099, issued Apr. 27, 1971, there is disclosed an improved watch construction in which the optical display is described as a plurality of light-emitting diodes which are intermittently energized to assure a minimum power consumption and an increasingly long life for the watch battery.

An improved watch construction of this general type incorporating solid state circuits and integrated circuit techniques is disclosed in assignees copending U.S. Pat. application Ser. No. 35,l96, filed May 6, 1970 now U.S. Pat. No. 3,672,155. The present invention is directed to an improved watch construction of the same general type as disclosed in the above-mentioned application and patents and one which utilizes no moving parts to perform the timekeeping function. In particular, the present invention is directed to an electronic wristwatch construcion in which substantially all of the electrical components are formed as large-scale integrated circuits so as to reduce both the cost and size of the watch components. Through the use of largescale integrated circuits it is possible to utilize standardized, mass production fabrication of the electrical components which not only substantially reduces the cost of the watch but, because of the reduction in size, makes more space available in a conventional wristwatch case for the watch battery and other wristwatch components.

In the present invention, the wristwatch comprises a frequency standard, preferably operating at a frequency of 32,768 Hz and formed as a crystal-controlled complementary MOS inverter used as an oscillator. Output signals from the frequency standard pass through a frequency converter, preferably in the form of a multi-stage binary frequency divider constructed of complementary MOS transistors. The signal is divided down in the frequency converter to produce an output of 1 Hz. The display actuator is formed by a plurality of registers, gates, and a decoder which drives an electro-optical display, preferably in the form of a bar segment arrangement of light-emitting diodes. Additional functions performed by the large scale integrated circuit involve time setting, resetting, switching, and display intensity control.

Through the use of NOR and NAND logic circuits and complementary MOS transistors, it is possible through the present invention to construct a solid state watch in which all but a very few of the electrical components may be formed using large-scale integration, commonly referred to as LSI.

The watch display preferably comprises a red colored filter which passes cold red light from a plurality of gallium aresenidephosphide light-emitting diodes which are preferably arranged in a seven bar segment array. The light-emitting diodes are energized in appropriate time relationship with an effective brightness determined by an intensity control circuit utilizing a photosensitive detector. Situated on the front of the watch adjacent the display is a pushbutton demand switch which, when depressed, instantly activates the appropriate visual display stations. Minutes and hours are programmed to display for 1% seconds with just a touch of the demand switch. Continued depression of this switch causes the minute and hour data to fade and the seconds to immediately appear. The seconds continue to count as long as the wearer depresses the demand button. Computation of the precise time is continuous and completely independent of whether or not time is displayed.

Setting is accomplished by actuating either an hourset switch or a minute-set switch. The hour-set switch rapidly advances the hours without disturbing the timekeeping of the minutes and seconds. Actuation of the minute-set switch automatically zeros the seconds while advancing the minutes to the desired setting.

The watch of the present invention is virtually shockproof and waterproof regardless of the environment in which it is placed. Electrical components and the display may be encapsulated with a clear potting compound so that no mechanical forces or corrosive elements can attack the electronics. Since there is no conventional stem for winding or setting, the small shaft sealing problem is eliminated. No maintenance or repair is normally necessary since the components are sealed and inaccessible to influences from the outside world. All solid state electrical components, including the light-emitting diode displays, have a virtually unlimited life.

Important features of the present invention include the use of an integrated circuit with a single decoder for decoding the time information to be displayed. In addition to time, the display can be used with the decoder to show day and month,-as well as A.M. and RM. of time. The display digits are individually strobed and special connections are provided to turn on the display at all times for use as a clock, for use as an alarm clock, to enter special information, such as date, month, A.M. and RM. times. In addition, a connection is provided as a carryout and for a 2 Hz UPDATE signal for the hours register for use with a calendar circuit so that the watch circuit may be used in conjunction with other circuitry to have and show on the same display days and months.

In the present invention, a separate calendar circuit is connected to the basic LSI time computer circuit. A second demand switch or date switch is added to the watch so that when the date switch is depressed, the watch shows on the hour display the month, on the colon display A.M. or P.M. (top dot is A.M. and bottom dot is RM. and on the minute/second display appears the date. The circuit automatically counts to 30 or 31 days, according to the month of the year and further automatically counts to 29 in February. The read" or first demand switch and the hour-set switch are used to set the calendar in conjunction with the date switch. When the hours are set in the watch, A.M./FM. (of the calendar) is automatically reset at A.M. without changing the date.

To set the days, the date button switch is depressed so that the date is shown on the display and then the read or first demand switch button is depressed. Days are advanced at one day a second rate and at the same time the A.M./RM. indication is advanced at the rate of 2 Hz. When the read switch is released, the days stay set at the desired date and the desired A.M. or RM. To set the month, the date button is depressed to display the date. The hour-set switch is then closed to run the month at two months a second rate. When the hour-set switch is reopened, the month is set as desired. The display always shows the date (both day and month) every time the date switch is closed and this display continues as long as the date switch is closed no matter what is done to the other switches.

It is therefore one object of the present invention to provide an improved electronic wristwatch.

Another object of the present invention is to provide a wristwatch which utilizes no moving parts for performing the timekeeping function.

Another object of the present invention is to provide a completely solid state electronic wristwatch in which the display is in the form of a plurality of light-emitting diodes.

Another object of the present invention is to provide an improved solid state timepiece in which substantially all of the electrical components are formed from large-scale integrated circuits.

Another object of the present invention is to provide an improved solid state wristwatch having a calendar display.

Another object of the present invention is to provide an improved electronic wristwatch which displays the day, month, and A.M. or RM. of time in a digital manner.

Another object of the present invention is to provide a visual display solid state wristwatch in which the date is displayed by the same visual display elements as are used to display time.

Another object of the present invention is to provide a completely solid state electronic wristwatch in which the display is in the form of a plurality of light-emitting diodes and which incorporates a calendar display.

These and further objects and advantages of the invention will be more apparent upon reference to the following specification, claims, and appended drawings, wherein:

FIG. 1 is a perspective view of a conventional sized mans wristwatch constructed in accordance with the present invention;

FIG. 2 is a simplified block diagram showing the principal components ofthe wristwatch of FIG. 1;

FIG. 3 is a more detailed circuit diagram of the wristwatch of the present invention showing in block form the large-scale integrated time computer circuit and the calendar circuit connected to it;

FIG. 4 is a detailed block diagram of the large-scale integrated time computer circuit of FIG. 3;

FIG. 5 shows the arrangement of the light-emitting diode bar segments in the watch of the present invention; and

FIG. 6 is a detailed circuit diagram of the calendar circuit portion of the watch illustrated in FIG. 3.

Referring to the drawings, the novel watch of the present invention is generally indicated at 10 in FIG. 1. The watch is constructed to fit into a watch case 12 of approximately the size of a conventional mans wristwatch. The case 12 is shown connected to a wristwatch bracelet l4 and includes a display window 16 through which time is displayed in digital form as indicated at 20. The window may desirably be closed off by a red light filter to enhance the display. Mounted on the case 12 is a pushbutton demand switch 18, by means of which the display 20 may be actuated when the wearer of the wristwatch l0 desires to ascertain the time.

In normal operation, time is continuously being kept but is not displayed through the window 16. That is, no time indication is visible through the window and this is the normal condition which prevails in order to conserve battery energy in the watch. However, even though the time is not displayed through the window 16, it is understood that the watch 10 continuously keeps accurate time and is capable of accurately displaying this time at any instant. When the wearer desires to ascertain the correct time, he depresses the pushbutton 18 with his finger and the correct time immediately is displayed at 20 through the window 16,

which shows a light-emitting diode display giving the correct time reading of :10, namely, 10 minutes after ten oclock. The hours and minutes, i.e., l0:l0, are dis played through the window 16 for a predetermined length of time, preferably 1% seconds, irrespective of whether or not the pushbutton 18 remains depressed. The exact time of the display is chosen to give the wearer adequate time to consult the display to determine the hour and minute of time. Should the minutes (or hours) change during the time of display, this change is immediately indicated by advancement of the minute (or hour) reading to the next number, i.e., 11, as the watch is being read. If the pushbutton 18 remains depressed, at the end of 1% seconds the hours and minutes of the display are extinguished, i.e., they disappear, and simultaneously the seconds reading is displayed through the window 16. The advancing seconds cycling from 0 to 59 continue to be displayed through window 16 until the pushbutton 18 is released.

Pushbutton 18 is a read switch or demand switch which is depressed when the wearer desires the time to be displayed. Incorporated in the watch 10 of FIG. 1 is a second pushbutton switch 22 in the form of an elongated bar and hereafter referred to as the date switch. When the pushbutton 22 of the date switch is depressed, the-day, month and the A.M. or PM. of time are displayed by the same diodes that display time in response to depression of pushbutton 18. However, contrary to the former, when the date button 22 is depressed, the day, month and A.M. or RM. of time are displayed so long as button 22 remains depressed and are immediately extinguished when the date button 22 is released.

FIG. 2 is a simplified block diagram of the principal components of the watch 10 of FIG. 1. The watch comprises a time base or frequency standard 26, preferably chosen to produce an electrical output signal on lead 28 at a frequency of 32,768 Hz. This relatively high frequency is supplied to a frequency converter 30 in the form of a divider which divides down the frequency from the standard 26 so that the output from the converter 30 appearing on lead 32 is at a frequency of 1 Hz. This signal is applied to the display acutator 34 which, in turn, drives the display 20 of the watch by way of electrical lead 36. While only an hours and minutes display is shown in FIG. 2, itis understood as previously described that the hours and minutes are first displayed for a predetermined time and if the pushbutton 18 remains depressed, the hours and minutes are extinguished and the seconds become visible. The same display diodes are used for both minutes and seconds since these are not displayed simultaneously, thus minimizing the power drain from the watch battery. For a more detailed description of the physical construction and mode of operation of the timekeeping portion of the watch of the present invention, reference may be had to assignees copending U.S. Pat. application Ser. No. 35,196, tiled May 6, 1970 now U.S. Pat. No. 3,672,155, the disclosure of which is incorporated herein by reference.

In the preferred embodiment, the display takes the form of a seven bar segment array of light-emitting diodes, preferably formed of gallium arsenide phosphide, which emit light when energized in the visible red region of the spectrum. While a seven bar segment display is preferred, it is apparent that other types of displays, such as the twenty-seven dot matrix display, may

be used. The frequency standard 26 of FIG. 2 is preferably a crystal-controlled oscillator comprising a complementary pair of integrated circuit enhancement transistors including a P-channel transistor and an N- channel transistor connected as a complementary pair. The divider 30 of FIG. 2 is preferably of the type shown and described in assignees U.S. Pat. No. 3,560,998, the disclosure of which is incorporated herein by reference. It comprises a multi-stage binary divider chain in which each stage of the divider is again formed by one or more complementary pairs of MOS integrated circuit transistors.

FIG. 3 is a circuit diagram of the watch 110 of the present invention with like parts bearing like reference numerals. The integrated circuit porion of the time computing part of the watch is illustrated by the large block '70. This block may be formed of one or several integrated circuit chips, but in the preferred embodiment it is formed from a single chip. In any event, it is understood that all the components within block are formed by large-scale integrated circuit techniques. Connected to the large block 70 is a second large-scale integrated circuit or calendar circuit 141 which controls the calendar display of the watch 10. In addition to the two integrated circuits 70 and 141, the watch comprises a battery 72 which, by way of example only, may comprise a conventional 3 volt wristwatch battery formed from two 1% volt cells connected in series. Connected to the positive side of the battery is a resistor 73 and the battery energizes the light-emitting diode display 38 which is shown in FIG. 3 as consisting of a pair of hours stations comprising the digits station 74 and tens station 76 and a pair of combination minutes and seconds stations comprising digits station 78 and tens station 80. In addition, the display 38 includes a pair of colon dots 81 and 83, each formed by a single light-emitting diode. The display stations are energized from integrated circuit 70 connected to battery 72 by way of a plurality of leads 79. The circuit is completed from the leads 79 to the anodes of the light-emitting diodes and the cathodes of the light-emitting diodes are individually connected to the other side of the power supply through strobing or switching N-P-N junction transistors 82, 84, 86, 88, 90, and 92. There is a separate lead 79 for the total number of bar segments in a display station. That is, with a seven bar segment display, there are seven leads 79, each one connected to a separate bar segment of each station (except the hours tens station) as more fully described below. However, all the cathodes of each station are connected in common through the N-P-N junction transistor for that display. The two bar segments 94 and 96 for the hours tens display have their cathodes connected to transistor 82 as do the colon dots 81 and 83. All cathodes of the hours units station 74 are connected to transistor 84. Display stations 78 and are used to display both minutes and seconds, so that station 80 has the cathodes of all diodes connected to transistor 86, referred to as the minutes transistor, and to transistor which acts as the seconds transistor. Similarly, all the diode cathodes of display station 78 are connected to a minutes transistor 88 and a seconds transistor 92. These transistors have their bases returned to the integrated circuit 70 through current limiting resistors 98, 100, 102, 104, 106, and 108, the emitters of the transistors being connected in common to ground, i.e., the negative side of the power supply battery 72 as indicated at 110.

The anodes of the bar segment diodes are energized from bipolar driver transistors illustrated in FIG. 3 as the P-N-P junction transistors 112, 114, 116, 118, 120, 122, and 124. Since the greatest number of bar segments at any display station is seven, there are seven driver transistors and seven leads 79. The transistor collectors are connected to the display diodes through individual ones of current limiting resistors 126 and the driver transistor bases are connected to the integrated circuit 70 through protective resistors 128. The emitters of the driver transistors are connected in common as at 130 to the positive side of power supply battery 72.

The external components of the oscillator or frequency standard 26 in FIG. 3 are the crystal 64, the variable capacitor 66 (tuning capacitor), and the bias resistors 62 and Tr network capacitors C C and C The remaining portions of the oscillator 26 are incorporated in the integrated circuit 70 of FIG. 3 as more fully disclosed in assignees copending US. Pat. application Ser. No. 143,492, filed May 14, 1971, the disclosure of which is incorporated herein by reference. Also external to the integrated circuit is a demand or read switch 132 which is closed when the button 18 of FIG. 1 is depressed. Further manually operated switches external to the integrated circuit 70 are minute-set switch 134 and hour-set switch 136. These switches are connected across battery 72 from the positive side of the battery to the time computer circuit 70 or the calendar circuit 141, as more fully described below. Series resistors 135, 137, and 139 for the switches may if desired be incorporated into the large-scale integrated circuit 141.

A feature of the watch of the present invention is that the intensity of the light emitted from the display diodes is varied in accordance with ambient light. That is, the diode light intensity is increased for greater contrast when the ambient light is bright, such as during daytime display, whereas the intensity of the light from the diodes is decreased when ambient light decreases. The automatic display intensity control circuitry is generally indicated at 144 in FIG. 3 and comprises a photosensitive resistor 146 suitably mounted on the face of the watch connected to the positive side of battery 72 and to a resistor 148 and capacitor 150. These components are connected to the positive side of the power supply through series resistor 152.

FIGS. 4a, 4b, and 4c, taken together (hereafter referred to as FIG. 4), show a detailed block diagram of the integrated circuit 70 of FIG. 3. In FIG. 4, like parts bear like reference numerals. FIG. illustrates the arrangement of the light-emitting diode segments of the display.

Referring to FIGS. 4 and 5, a signal having a frequency of 32,768 Hz is supplied from oscillator 26 over lead 28 to the divider input 160. The divider 30 is a 14- stage non-resettable counter forming the frequency converter 30 of FIG. 2. The counter is formed from 14 stages of binary flip-flops in a counting chain and each stage is comprised of complementary MOS transistors as previously described. The output of the 12th stage of the divider, having a frequency of 8 Hz, is applied by way of a lead 162 to the input of a 3-stage resettable counter 164 comprising three stages of MOS complementary symmetry transistor flip-flops which produce an output on lead 166 having a frequency of 1 Hz. The 8 Hz signal from the divider is also applied by way of a lead 168 to a 4-stage flip-flop decade counter 170, the output of which counter or controlled time 170 controls a 1% second timing flip-flop 248.

The 1 Hz signal on lead 166 is applied to a seconds units storing register 172 which divides by 10 and whose output is in turn connected to a seconds tens register 174 which divides by 6. The seconds tens register in turn has its output connected to a minutes units register 176 which again divides by 10 and the output of this register is connected to a minutes tens register 178 which divides by 6. The output of register 178 is in turn connected to a divide by 12 hours register, generally indicated at 180. These registers are all comprised of binary chains of complementary MOS transistor pairs and the individual stages, except for the control terminals, are in all respects similar to the individual stages of the binary dividers 30 and 164. For a detailed discussion of an individual stage forming a stage of either the divider 30, divider 164, or one of the registers 172, 174, 176, 178, and 180, reference may be had to assignees US. Pat. No. 3,560,998.

Output signals indicative of seconds units of time are developed in register 172 and these are applied through four selection gates or transmission gates 182, and through four input gates 184, to a decoder 186. The decoder 186 converts the 8-4-2-1 binary coded decimal signals from the register 172 into suitable drive signals for the displays which are applied to the light-emitting diodes of the display through the buffer amplifiers 188. The individual bar segments are labeled a through g and the relationships of the segments and their interconnections to the outputs of the buffer amplifiers 188 is illustrated in FIG. 5. That FIGURE shows the hours tens station 76 and the hours units station 74, along with the colon dots 81 and 83. While only the hours station 74 is illustrated in FIG. 5, it is understood that the outputs of the buffer amplifiers 188 are also connected to the corresponding bar segments of the combination minutes and seconds stations 78 and 80 of FIG. 3, each of these stations being in all respects identical to station 74. That is, output a from buffer amplifier 188 is not only connected to the a bar segment of station 74, but is also connected to the corresponding segment of stations 78 and 80 of FIG. 3. The correspondingly labeled other outputs of buffer amplifiers 188 are connected to the corresponding other bar segments of each of the stations 74, 78, and 80. Outputs b and c are also connected to the anodes of the colon dot diodes and outputs a and d from the buffer amplifiers 188 are connected to the anodes of the two diodes 94 and 96 forming the hours display. These diodes are simultaneously on or off to display a 1 or nothing at all in correspondence with the hours tens digit of time.

Register 174 in FIG. 4 is similarly connected through four transmission gates 190 to the input gates 184 and to the decoder 186, the input gates 184 and decoder 186 being common to all the registers. Register 176 is connected to the input gates 184 through selection gate 192 and register 178 is similarly connected to the input gates through selection gates 194. Finally, hours register is connected to the input gates through two sets of selection gates, i.e., first set 196 and second set 200. The integrated circuit 70 of FIG. 4 performs the functions of time base generation, time storage, and information decoding, as well as the miscellaneous functions of display timing, automatic intensity control, and display selection. The circuit is designed to operate at 2.2

to 3.2 volts and to use 1.00 inch light-emitting diode displays. The time base generator portion of the circuit consists of external components (crystal, resistor, and trimming capacitor), an inverter used as an oscillator, and a 14-stage non-resettable counter 30, as well as the 3-stage resettable counter 164. The l4-stage counter 30 provides the frequencies used throughout the system to perform such functions as timing, setting, resetting, switching, and display intensity control. The 3- stage counter 164 is resettable because it acts as a hold circuit during minute setting. After the minutes have been set, this counter remains in the reset mode which keeps a signal from passing into the seconds storage register 172 until the read or demand button 18 of FIG. 1 has been depressed and the read switch 132 of FIG. 3 closed. This counter consists of three stages so that the error upon starting is no greater than oneeighth of a second.

The time storage portion of the circuit consists of three registers, two divide by 60 and another divide by 12. The first divide by 60 register is resettable and is used to accumulate seconds. Both divide by 60 registers are subdivided into divide by and divide by 6 sections such that the first divide by 60 register is formed by the register sections 172 and 174 and the second divide by 60 register is formed by register sections 176 and 178. This division is provided because the time information must be displayed in decimal numbers. The divide by 12 register 180 displays the numbers 1 through 12 and resets to 1. This is accomplished by making the first flip-flop 202 in the divide by 10 section, indicated by the bracket 204, nonresettable. The first four flip-flops enclosed within bracket 204 constitute the divide by 10 section, the next flip-flop 206 controls the tens of hours and the last flip-flop 208 is used to insure positive resetting. At the count of 10, 8 and 2 are detected. This sets the tens of hours flip-flop 206 and triggers the resetting flip-flop 208 which resets stages 2, 4, and 8. Stage 1, i.e., flipflop 202, is already at 0 so the units hours decodes to zero. However, at 13, an AND gate 210 reads the tens of hours and stages 1 and 2. This toggles the tens of hours flip-flop 206 by way of lead 212 back to zero and resets stages 2, 4, and 8 by way of lead 214. Stage 1, i.e. flip-flop 202, is not reset and therefore the number 1 is decoded. However, this happens so rapidly that the number 13 is never displayed.

It is a feature of this invention that only one decoder 186 is used in conjunction with the strobing circuit, generally indicated at 216, by means of whichthe digits are individually strobed. The sixstrobe outputs, labeled A, B, C, D, E, and F, of the strobe circuit 216 are applied to the corresponding and similarly labeled lines 218, 220, 222, 224, 226, and 228 of the transmission gates 182, 190, 192, 194, and two sets in group 196, such that these selection gates are enabled in accordance with the strobe outputs. A second set of strobe circuit outputs, labeled 8,, 8-,, S S.,, S and S,,, are applied as correspondingly labeled inputs in FIG. 3 to the strobe transistors 82, 84, 86, 88, 90, and 92. The strob-' ing outputs are such that the sequence of the display is as follows: (a) tens of hours and colon, (b) units of hours, (c) tens of minutes, (d) units of minutes, or (a) nothing, (b) nothing, (0) tens of seconds, (d) units of seconds if seconds are displayed, and then the cycle repeats.

It is apparent from FIG. 4 that a common decoder 186 is used for all numerals to be displayed. The high frequency output of oscillator 26 is lowered in frequency by a series of binary divider stages in divider 30. This divider produces several output frequencies including an 8 Hz output which is fed into the register 164 to produce a 1 Hz output on lead 166. The 1 Hz output is fed into the counting registers 172, 174, 176, 178, and 180 where it is further divided by 10, 6, l0, 6, and 12, corresponding to the digits needed to display seconds, minutes, and hours. The binary coded decimal outputs of all the dividers in the counting registers are fed into corresponding selection gates 182, 190, 192, 194, and 196. These gates are controlled by the strobe circuit 216 and the number passing through the input gates 184 into the decoder/driver 186 is determined by this strobe circuit.

In the operation of the system, the timer controls the strobing circuit. When the demand switch is depressed, the minutes and hours are displayed for 1% seconds and if the demand switch remains depressed, the display automatically switches to seconds. Therefore, it is necessary for the strobe circuit to strobe only four numerals at any one time, although it controls all six numerals. After the strobing circuit 216 selects the register to be read, the time stored in that register (in binary coded decimal form) passes through the set of selection gates opened by the strobe circuit and through the input gates 184 which act as an interface to the decoder 186. This decoder changes the BCD information into the output necessary to form intelligible numerals. The strobing circuit 216 not only chooses which counting register will be read, but also completes the anode circuit for the corresponding numeral diodes. Therefore, only one numeral can be on at any one time but because the strobing action takes place so rapidly, it appears that as many as four numerals are lighted simultaneously.

Divider 30 produces a 256 Hz output (07 and 07) and a 128 Hz output (08 and 08),which. are applied to selected ones of four NAND gates 215 in strobe circuit 216. These signals are in turn passed through four NOR gates 217 which also receive a signal by way of lead 250 from the timer control flip-flop 248. The outputs A, B, C, D, E, and F from strobe circuit 216 are applied to the corresponding sets of selection gates 182, 190, 192, I94, 196, and 200m control which numerals are to be displayed asdescribed above. The other strobe outputs S S S S S and 8,; are applied to the bases of transistors 81, 84, 86, 88,90, and 92 of FIG. 3 to complete the anode-cathode circuits of the display diodes. In this way, it is possible for the strobe circuit to control which information from which register will pass to the decoder 186 and this BCD information must pass through the input gates 1 which are provided to prevent interference between the several outputs from the selection gates as they enter the decoder. The output of the decoder/driver 186 provides power by way of driver transistors 112, 114, 116,118, 120, 122 and 124 in FIG. 3 to those segments or display diodes which are to be activated to display the number corresponding to the BCD input number.

Display intensity control is obtained by varying the duty cycle of the strobe drive signal supplied to the strobing circuit 216 by way of a lead 230, this signal also being supplied as an ON-OFF signal by way of lead 232 to the input gate 184. The signal on lead 232 insures that the diodes, even when on, will blink on and off but at a rate such as 128 Hz so as to give the appearance of being continuously energized. The ON-OFF signal on lead 232 and the strobe drive signal 230 is therefore a 128 Hz signal or series of short width pulses having a repetition rate of 128 Hz in which the pulse width may be varied to vary the average duty cycle of the signal. This is accomplished by taking signals from the second, third, fourth, fifth, and sixth stages of divider 30, which signals are identified as 02, O3, O4, 05, and O6, and applying them to the five inputs of a NAND gate 234. The output from this gate on lead 236 is a series of 512 Hz pulses having a very short pulse width. These are applied through a NAND gate 238 by way of terminal 240 (labeled terminal 9) to the display intensity control 144 of FIG. 3. Resistor 152 in series with light sensor 146 and parallel resistor 148 gives increased linearity and the circuit in essence acts as a multivibrator which is triggered at a rate of 512 Hz from the divider 30 and NAND gate 234. The length ofv the output pulse generated by the multivibrator 144 and applied to terminal 242 (labeled terminal in FIG. 4) is determined primarily by the fixed capacitor 150 and the light sensitive resistor network 146, 148, and 152 in FIG. 3. These 512 Hz pulses, having a variable width and therefore a variable duty cycle in accordance with ambient light intensity, are supplied to the strobe circuit 216 by way of lead 230 and as ON-OFF or blinking signals to the input gates 184 to control the illumination duty cycle of the display diodes. The duty cycle in each digit is a maximum of 25 percent modulated by the light control network 144 to as low a 0.78 percent in the dark (3.12 percent of 25 percent). The strobing signals used for the minutes are also used for the seconds but in the preferred embodiment as illus trated, the minute display is also used for displaying seconds.

The display timer is generally indicated at 170 in FIG. 4. This timer automatically turns off the hours and minutes after 1% seconds. A momentary depression of the read or demand button 18 produces a correspond ing closure of the manual switch 132 in FIG. 3 and this completes a setting circuit, i.e., connects B+ to terminal 244 in FIG. 4, which is connected by way of lead 246 and acts to set a timing flip-flop 248. This flip-flop is reset only after the decade counter 170 has counted 10 pulses of a 8 Hz signal applied to it over lead 168. As long as flip-flop 248 is in the set condition, it puts the proper signal on lead 250 through NAND gate 291 so that only the hours and minutes are displayed. If the read or demand button remains depressed after the decade counter 170 has completed a cycle and supplied a reset signal by way of lead 252, the display automatically reverts to a display of seconds.

Divider 30 is a l4-stage binary device and produces a 2 Hz output on lead 254 which is combined with a 4 Hz signal on lead 256, an 8 Hz signal on lead 258; and a 16 Hz signal on lead 259 in NAND gate 260 to produce a 2 Hz setting signal on lead 262 which has a very short pulse width. This signal is applied through NAND gate 264 to the input of minutes register 1'76 and through NAND gate 266 to the input of hours register 180. Closure of the hours-set switch 136 in FIG. 3 applies B+ to terminal 268 and the short pulse width 2 Hz setting signal passes through NAND gate 266 to the hours register setting the hours display at the fast rate' of 2 hours per second. Closure of minute-set switch 134 in FIG. 3 applies 8+ to minute-set terminal 270 causing the 2 Hz setting signal to pass through gate 264 to the input of minute units register 196. This is a slow or fine setting with the minutes advanced at 2 per second. A display during setting is assured by connecting hour-set terminal 268 and minute-set terminal 270 through NOR gate 272 to the display intensity control circuit connected to terminals 240 and 242.

Operation of the minute-set switch applies a reset impulse to minute-set terminal 270 through NOR gates 275 to lead 276 which resets counter 164 and the seconds registers 172 and 174 to zero. In this way, the seconds display is automatically zeroed when the minutes are set. Counting is resumed in the seconds register as soon as the pushbutton 18 is depressed and the read switch 132 closed.

Decoder 186 is used to convert the 8-4-2-1 binary coded decimal codes from the registers into a seven segment display code for the display stations. It is used for the units and tens of seconds, for the units and tens of minutes, and for the units of hours. As previously described, the tens ofhours are either on or off to display a 1 or nothing. The tens of hours display is connected to the a and d outputs of the decoder while the colon is connected to the b and c outputs so that a BCD 1 turns on the colon only and a BCD 0 turns on the colon and the tens of hours. The proper coded information is generated in the large-scale integration circuit itself. A special feature of the decoder is that special information can be fed into it according to the following table:

That is, the display can be used with the decoder to show date and month, A.M. and RM. being shown with one or the other dot of the colon. This special information is introduced through leads 274, 276, 278, and 280, labeled Q Q Q and Q respectively, all under the control of a date input which is connected to the transmission gate control lead 156 in FIG. 3. The date input allows or prevents any signal to pass through the corresponding transmission gates, generally indicated at 284. If the date input is connected to 8+, the transmission gates 284 are short circuits.

Referring back to FIG. 3, it is a feature of the present invention that the watch incorporates a calendar display circuit 141 for displaying on the same display stations 74, 76, 78, and (and colon dots) the day, month and A.M. or P.M. of time. The calendar circuit is illustrated in FIG. 3 as interconnected with the time computer integrated circuit 70 and with the read or demand switch 132, the minute-set switch 134, the hourset switch 136, and with a date switch 138, which is closed in response to depression of the button 22 of FIG. 1. The calendar circuit 141 receives from the time computer circuit 70 (a) an input signal over lead 286 to calendar circuit terminal 5 from the LS1 carryout terminal 12, (b) on lead 288 a short 2 Hz update signal to calendar circuit terminal 6 from the LS1 time computer circuit terminal 16, (c) on lead 290 a signal frequency to the calendar circuit internal strobing terminal 12 from LSI 70 terminal 9, and (d) on lead 292 a synchronizing signal from the LSI 70 output S to a strobe terminal 11 of calendar circuit 141. The input on lead 292 may be a signal as low as 1.5 volts when the voltage supply is 2.5 volts and must have a low input threshold.

Calendar circuit 141 provides to LSI 70 (a) a BCD signal on leads 294 from terminals 1, 2, 3, and 4 of the calendar circuit to the LSI 70 terminals labeled Q Q Q and Q and (b) an hour set signal on lead 296 from calendar circuit terminal to LSI terminal 11. Both circuits 70 and 141 have in common (a) a read input on lead 295 applied to LSI terminal 2 and calendar circuit terminal 7 and (b) a date input on lead 298 from date switch 138 applied to LSl 70 terminals 13, 14, and and to calendar circuit 141 terminal 8. The hour-set signal from switch 138 is applied by lead 297 only to the calendar circuit terminal 9 and the minute-set signal from minute-set switch 134 is applied by lead 299 only to the LS1 70 terminal 1.

FIGS. 6a and 6b, taken together (and hereafter referred to as FIG. 6), show a detailed circuit diagram of the calendar circuit 141 of FIG. 3. In FIG. 6, like parts bear like reference numerals and the calendar circuit terminals in FIG. 6 are numbered 11-12, which terminals correspond to the terminals previously described and labeled I-l2 in FIG. 3. In FIG. 6, the circuit is comprised of a plurality of logic elements, including NOR gates, NAND gates, and inverters, numbered 301-340. In addition, it comprises a plurality of flipflops, labeled FF-I through FF-17. The circuit in general comprises an AM/PM counter 342, a day counter 344, and a month counter 346. Additional components of the circuit include a strobe circuit, generally indi cated at 348, and four transmission gates 350, 352, 354, and 356. Signals from the output of the strobe circuit 348, labeled 8' 8' 8' and S',,, are applied to the correspondingly labeled leads of the respective transmission gates 350, 352, 354, and 356. Outputs from these transmission gates pass through OR gates 333, 334, 335, and 336 to the binary coded decimal output terminals 1, 2, 3, and 4, and these gatesare under the control of an output signal labeled A on lead 358 from strobe circuit 348.

In the operation of the calendar circuit of FIG. 6, at I2 hours, 00 minutes, and 00'seconds, the signal on terminal 5 of the calendar circuit 141, which is received by way of lead 286 in FIG. 3 from time computer circuit 70, goes high and sets FF-l in FIG. 6. The flip-flop FF-I is used only to make a short signal (less than 0.5 seconds) through NOR gate 301, out of a 1 hour signal. That is, the output from the LS1 70 on lead 286 is high for 1 hour, i.e., from 12 hours, 00 minutes, and 00 seconds, to l2 hours, 59 minutes, and 59 seconds, and FF-l converts this 1 hour signal to a short signal of less than 0.5 seconds. This short signal through NAND gate 302 drives flip-flop F F-2, which is the AM/PM flip-flop. Flip-flop FF-3 makes a short signal from the output of flip-flop FF-Z. Flip-flops FF-4 through FF-7 constitute a decade counter and flip-flops FF-8 and FF-9 are used for the tens of days. The output from the A.M. flip-flop FF-2 is applied by lead 360 to transmission gate 350, the output of the days units counter comprising the decade counter formed by flip-flops FF-4 through FF-7,

is applied by leads 362 to transmission gate 352 and the output of the days tens counter, formed by flip-flops FF-8 and FF-9, is applied through logic gates to transmission gate 354. These gates comprising gates 303, 304, 305, and 306 blank out the tens of days when it is zero. Flip-flops .FF-10 through FF-14 comprise a counter which counts to 12 and forms the month counter. A system of gates comprising gates 307 through 318 reads the month and controls the day counter in order to count to 30 or 31 as it should and to count to 29 in February. The outputs of the month counter are applied over leads 364 to transmission gate 356. The controlling signals from the month counter to the day counters are fed by way of leads 366 and 368 so that the day counter counts to 29, 30, or 31 in accordance with the month, i.e., the setting of month counter 346.

When pushbar 22 in FIG. 1 is depressed, the date switch 138 of FIG. 3 is closed, applying positive power supply potential from the battery to the calendar terminal 8 of FIGS. 3 and 6. When this signal is applied to calendar terminal 8, it is also applied to terminals 13, 14, and 15 of LSI as illustrated in FIG. 3. On the LSI 70, this date signal turns on the display (terminal 13), opens the transmission gates controlling the O to Q inputs (terminal 14), and locks internally the time through the transmission gates A, B, C, and D (terminal 15). This means that it is possible to display any BCD information entered on the Q, to Q, inputs of the LSI 70 over leads 294 in FIG. 3. These inputs are illustrated at 274, 276, 278, and 280 in FIG. 4b.

The calendar circuit 141 can provide the BCD form of the date and month information at its output terminals 1-4 under the condition that it is synchronized and strobed at the proper frequency. In order to accomplish this, a strobing frequency signal (512 Hz) is provided at LSI output terminal 9 on lead 290 of FIG. 3 and this is applied to calendar terminal 12. This strobing signal is divided in' flip-flops FF-16 and FF-I7 in FIG. 6 to give the appropriate signals at the outputs 8' 8' 5' and S, of NOR gates 337, 338, 339, and 340. However, it is not allowed to pass through NOR gate 319 coupled to calendar terminal 12 before the signal from terminal S of LSI 70 applied to calendar terminal 11 goes from high to low, setting flip-flop FF-IS and allowing gate 319 to pass the signal at terminal 12.

In order to set the calendar reading, it is first necessary to close and keep closed the date switch 138 of FIG. 3 by continued depression of bar 22, which applies a B+ or logic I to calendar terminal 8 and allows the date and month to be displayed by the diodes through the LSI circuit 70. If the read switch 132 is now closed, a logic I (B+) is applied to calendar terminal 7 and the output of NAND gate 323 goes low and sets the flip-flop formed by NOR gates 321 and 322. This allows the2 I-Iz signal to drive flip-flop FF-2 through gates 302 and 328. This means that a 2 Hz signal is substituted on the CL terminal of flip-flop FF-2 for the input signal which sets the date at 1 Hz and the AM/ PM at 2 Hz. To set the month, the same thing is done with the date switch and the hour-set switch 136. With both these switches closed, a logic 1 is applied to calendar circuit terminals 8 and 9, which passes through gates 324, 325, 326, and 327, substituting to the output of the date counter by way of lead 370 a 2 Hz signal which drives the month counter at a 2 Hz rate. When the date and month are not displayed, the strobing circuit 348 is reset and the gates 333 through 340 are turned off to avoid any unnecessary signal or flashing segments when the display is turned on.

When the hour-set switch 136 is closed, a logic 1 is applied to calendar terminal 9 and if there is a logic 0 on calendar terminal 8, this produces a logic I at calendar terminal 10, which is applied to LSI 70 over lead 296 to set the hours of the watch and this signal is also passed through gates 329, 330, 331, and 332 to reset flip-flop FF-3 or keep it reset while the gate 329 is ready to let the next short 2 Hz signal reset flip-flop FF-Z through gate 330 so that the AM/PM counter is eventually reset at A.M. without changing the date.

It is apparent from the above that the present invention provides an improved solid state watch and particularly a solid state watch incorporating a calendar display. In the watch of the present invention, the calendar information is displayed upon the same display elements as are used to display time. This is particularly accomplished by incorporating in the watch a second large-scale integrated circuit in the form of the calendar circuit 141. While the .preferred embodiment and certain especially significant operating conditions have been set forth in detail, it should be understood that various modifications are readily apparent. In the preferred embodiment, the light-emitting diodes take the form of gallium arsenide phosphide LEDs of the type more fully shown and described in assignees U.S. Pat. No. 3,576,099, issued Apr. 27, 1971. However, it is understood that the display can assume any one of several forms. For example, the optical display may be formed using such well known devices as miniature incandescent bulbs, other types of light-emitting diodes, or the well known liquid crystals, as well as lesser known devices, such as ferroelectric crystals or electroluminescent displays and others. Similarly, the switches may take any desired form but in the preferred embodiment the read switch 132, date switch 138, hour-set switch 136, and minute-set switch 134 are all formed of magnetic reed switches of the type shown and described in assignees copending U.S. Pat. application- Ser. No. 138,557, filed Apr. 29, 1971, entitled SOLID STATE WATCH WITH MAGNETIC SETTING, the disclosure of which is incorporated herein by reference. Preferably, demand switch 132 and date switch 138 are actuated by permanent magnets carried in their respective pushbuttons l8 and 22. Hour-set switch 136 and minute-set switch 134 are operated by a separate permanent magnet manually applied to the exterior of the watch case adjacent the respective switches in the manner described in that application.

The invention may be embodied in other spedific forms without departing from the spirit or essential characteristics thereof. The present embodiment is therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

What is claimed and desired to be secured by United States Letters Patent is:

1. A wristwatch comprising a plurality of electrooptical digital display elements, a time computer coupled to said elementsfor causing said elements to display time, a date computer coupled to said elements for causing said elements to display calendar information, a manually operated switch coupling said' date computer to said display elements for energizing said display elements with calendar information upon operation of said switch, means in said date computer and coupled to said display for resetting the calendar information on said display, said wristwatch including a time read switch in addition to said manually operated switch, said calendar reset means being coupled to said switches and operative in response to them.

2. A wristwatch comprising a plurality of electrooptical digital display elements, a time computer coupled to said elements for causing said elements to display time, a date computer coupled to said elements for causing said elements to display calendar information, a manually operated switch coupling said date computer to said display elements for energizing said display elements with calendar information upon operation of said switch, means in said date computer and coupled to said display for resetting the calendar infor' mation on said display, said wristwatch including a time setting switch in addition to said manually operated switch, said calendar reset means being coupled to said switches and operative in response to them.

3. A wristwatch comprising a frequency standard, a frequency converter coupled to said standard, an electro-optical display, a time computer coupling said frequency converter to said display, a date computer coupling said frequency converter to said display, and switch means coupled to said display for selectively ene'rgizing said display from said time and date computers, both said time and date computers including means for strobing said display elements.

4. A wristwatch according to claim 3 wherein said time computer includes means for displaying the minutes and seconds of time on the same display elements.

5. A timepiece of sufficiently small size and power consumption for use as a wristwatch comprising a solid state time computer, a plurality of electro-optical time display elements coupled to said time computer, and a date computer coupled 'to said display elements whereby said elements may be used as a calendar display, said display elements including means for displaying A.M. and RM. of time.

6. A timepiece according to claim 5 wherein said means for displaying A.M. and RM. of time comprise display elements also arranged to display a pair of

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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3971205 *Sep 5, 1974Jul 27, 1976Citizen Watch Co., Ltd.All electronic-type timepiece
US4006585 *Jan 3, 1975Feb 8, 1977Citizen Watch Co., Ltd.Electronic timepiece with electrochromic display element
US4064687 *Aug 5, 1975Dec 27, 1977Casio Computer Co., Ltd.Digital display type timepiece
US4075826 *May 19, 1975Feb 28, 1978Hughes Aircraft CompanyTiming circuit for digital wristwatch
US4084402 *May 22, 1975Apr 18, 1978Hughes Aircraft CompanyTiming circuit for display sequencing in a digital wristwatch
US4091609 *Dec 6, 1976May 30, 1978Kabushiki Kaisha Daini SeikoshaDigital electronic timepiece
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US4207731 *Nov 18, 1977Jun 17, 1980Kabushiki Kaisha Suwa SeikoshaElectronic timepiece control circuit
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Classifications
U.S. Classification368/29, 968/928, 968/961, 368/224, 968/959, 968/960
International ClassificationG04G9/10, G04G9/00
Cooperative ClassificationG04G9/107, G04G9/0017, G04G9/105, G04G9/102
European ClassificationG04G9/00C, G04G9/10D, G04G9/10B, G04G9/10C