US 3846745 A
An electronic scanning switch adapted to sequentially scan a plurality of signal sources and provide interpolated output signals at the output terminals thereof. The scanning switch comprises a switching means and an interpolator adapted to sequentially connect each output line to a plurality of transducer signals through constantly varying intervals.
Description (OCR text may contain errors)
United States Patent [191 Hill et al. Nov. 5, 1974 ELECTRONIC SCANNING SWITCH  Inventors: Eugene Emerson Hill, 1210 Caswell  References Cited Cres.; Marvin Seymour Scrimshaw, UNITED STATES PATENTS 708 Sanfield Cres, bo of 2,726,385 12/1955 Moore 343/16 LS Cornwall, Ontario, Canada 3,108,251 10/1963 Corbett 340/l6 R 3,568,141 3/1971 Schwarz et al  June 1973 3,676,839 7/1972 Wohl et al. 340/6 R  Appl. No.: 367,751 E R h d A F l Primary xaminer ic ar ar ey I Related Apphcamn Data Attorney, Agent, or FirmBurns, Doane, Swecker &  Continuation-in-part of Ser. No. 120,598, March 3, M thi 1971, abandoned.
 Foreign Application Priority Data  .ABS'IIRACT D l 8 1970 Canada 101027 An electronic scann ng switch adapted to sequentially scan a plurality of slgnal sources and provide Interpolated output signals at the output terminals thereof.  6 The scanning switch comprises a switching means and l 51] Int Cl G018 7/54 G018 3/80 an interpolator adapted to sequentially connect each a a o t 3 o 9 I Field of Search 340/6 16 343/16 output lme to a plurallty of transducer signals through constantly varying intervals.
104, 154 25 Claims, 24 Drawing Figures I00 102 2 I03 v I04 6 105 5 I06 200 I' l' F r 1' F 1' TRANS- 4a texts w INTER DELAY ms DUCER PRE- SELECTOR SWITCHING LATOR LINES PLAY ARRAY AMPS MATRIX Po ts lS L516 4s "l '"\s I" 2 1 r" r r r r r w l u 1 1 16 n3 too I l SECONDARY our Bl l l SELECTOR or IE STABLE OSCILLATOR DECODER oecoosn DRIVER I la- -s 6, l I J| "1 MOD |s H a I COUNTER t PRIMARY 1 1: I l SELECTOR I DECODER I l n i "-2 a l 4 -no 1' 2 l MOD 3 M00 ls F4 non I6 COUNTER couurzn COUNTER F, PARATOR T -u5 lm 4 I PATENIEUunv s 1924 3.846745.
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sum 11or17 wvi III IIIIIIIIIL PATENTEDnuv 51974 8.846745 SHEET 1uoF17 NAND my PAIENTEMBV 519?: 3846745 SHEET 150F17" I200 r"";o; Z I F I [Cw it 1 -1 1 SELECTOR MATRIX I v Z48 V L204 I .C l. .1
230 CONTROL SIGNAL GENERATOR FIG l8 2| Q48 l-ZIO r l-INTERPOLATOR l SELECTOR L MEANS SELECTOR MEANS l L I l6 l6 l |s I 2 CONTROL SIGNAL GENERATOR FIG I9 ELECTRONIC SCANNING SWITCH BACKGROUND'OF THE INVENTIGN .In a sonar system of the type wherein .a plurality of transducers are .immovably fixed to .the .hull of .a ship in a circular array, the signals from a group of contiguous transducers are sequentially commutated to the electronic processing apparatus by means of a mechanically rotating scanning switch. In order to compensate for the curvature of the transducer array, time delays are applied to the output signals from the scanning switch by the use of delay lines. By this means, the
curved transducer array is electrically transformed into a plane. The output signals from the delay lines are combined to form a signal known as a beam which is used to intensity modulate a helically moving spot on the CRT. The rotating mechanical scanning switch is able to combine the signals from adjacent transducers in constantly varying proportions and consequently the transition of the signal at each of its outputs from one transducer to the next is smooth and continuous. This characteristic of the mechanically rotating scanning switch is desirable in order to obtain an accurate indication of the bearing ofthe target and to present an accurate representation of the shape of the target on the plan position indicator display. On the other hand, rotating mechanical scanning switches present a number of disadvantages in that they are bulky, expensive to buy and to maintain, difficult to repair in the field and constitute a source of noise.
The present invention contemplates a non-rotating electronic switch which will sequentially scan a plurality of transducer signals and provide smoothly varying interpolated output signals consisting of the output signals of a group of contiguous transducers.
Electronic scanning switches have been used in previously proposed systems to sequentially switch beams which have already been formed, i.e., preformed beams. However, the apparatus required to produce the large number of preformed beams which are used in such a system. results in a very bulky package. Moreover. such systems do not provide a satisfactory means for interpolating the signals.
OBJECTS OF THE INVENTION It is therefore an object of the present invention to provide a new electronic scanning switch for use in commutating signals from a plurality of receivers.
It is a still further object of the present invention to provide an electronic scanning switch which may be used either in a receiving mode or in a transmitting mode.
It is a still further object of the present invention to provide an electronic scanning switch which is capable of continuously scanning either through 360, or between anytwo preselected bearings, or at afixed'bear- I vIt is a still further object ofthepresent invention to provide aninterpolator whichelectronically combines the output signals of the receiversin constantlyvarying proportions.
In accordance with the present invention, signals,
from aplurality of sources are sequentially connected by means of a switching matrix, to an interpolator, which combines :parts of signals from adjacent sources in constantly varying proportions, to provide a smoothly varying interpolated output.
THE DRAWINGS The features of the invention which are believed to be novel are set forth with particularity in Jtheappended claims. The organization and manner of operation of the invention, together with further objects and advantages thereof, may best be understood 'by reference to the following description taken in connection with the accompanying drawings, in the several figures of which like reference numerals identify like elements, and in which:
FIG. 1 is a block diagram of an embodiment of a sonar system-constructed in accordance with the present invention; v
FIG. 2(A) is a schematic diagram of the switching matrix shown in FIG. 1;
FIG. 2(8) is a circuit diagram of a fragment of the switching matrix shown in FIG. 2(A):
FIG. 3 is a plan view of a circular transducer array;
FIG. 4 is a circuit diagram of part of the interpola'tor;
FIG. 5 is a wave form diagram showing examples of FIG. 9 .is a representation of a logic'circuit of one channel of the secondary selector decoder shown in FIG. 1;
F [G 10 is a wave form diagram showing the input signals and output signals of the modulus 3 counter shownin FIG. 8 and the input and output signals of the secondary selector decoder channel shown in FIG. 9;
FIG. 11 is a wave form diagram showing the input signals and. a representative number of the output signals of the primary selector decoder;
FIG. 12(A) is a wave form diagram of the signals in a representative number of the output lines of the secondary selector decoder contained in the embodiment shown in FIG. 1.
FIG. 12(B) is a wave form diagram of the signalsin the output lines of the one-out-of-l6 switching matrix decoder shown in FIG. 1;
FIG. 13 is a diagram showing the transducers, preamplifiers and selector shown in FIG. 1;
FIG. 14 is a block diagram of a sonar system adapted to operate in a transmitting mode;
ment of the present invention;
FIG. 16 is a block diagram showing a further embodiment of part of the control signal generator; and
FIG. 17 is a representation ofa logic circuit of the selector primary decoder.
FIG. 18 is a block diagram showing an embodiment of a simplified selector means in accordance with the present invention together with the control signal generator connected thereto. The selector means illustrated is adapted for use with a 48 stave transducer array.
FIG. 19 is a block diagram illustrating a leap frog arrangement of an electronic scanning switch in accordance with the present invention adapted for use with a 48 stave transducer array.
FIG. 20 is a schematic diagram respresenting the operating characteristics and the circuitry of a selector means of the type shown in FIG. 18. For purposes of simplicity, the selector means illustrated is adapted for use with a 12 stave transducer array.
FIG. 21 is a schematic diagram illustrating the circuit of a scanning switch of the type shown in FIG. 19. For purposes of simplicity the embodiment illustrated is adapted for use with a 12 stave transducer array.
FIG. 22 shows wave form diagrams of the control signals carried by representative number of the control lines of the circuit shown in FIG. 21.
DETAILED DESCRIPTION Referring now to FIG. 3, there is shown a plan view of a sonar transducer array 100, the output signals of which are commutated by the electronic scanning switch constructed in accordance with the present invention. The transducer array 100 shown in FIG. 3 comprises 48 transducers T1 to T48 arranged along the circumference of circle 200. Although the array used in the system described herein contains 48 transducers, it is to be understood that the present invention may be used with transducer arrays comprising other than 48 transducers. The transducers, which may be either slightly directional or omni-directional, are spaced along the circumference of a circle a distance of approximately one-half the wave length of the sonar frequency in sea water.
The output of transducers T1 to T48 is applied to preamplifiers PI to P48 respectively. as shown in FIG. 13. These 48 identical preamplifiers, the design of which is known in art, are characterized by a very uniform gain (i I db) and phase shift (i The preamplificrs are also able to limit signals of large amplitude without altering the phase shift of the fundamental frequency of the input signal.
Referring again to FIG. 13, which shows a block diagram ofa representative portion of the head end of the sonar system, preamplifiers P1 to P48 are connected via lines Z1 to Z48 respectively, to the source terminals of 48 field effect transistors (FET's) O1 to Q48 respectively, in selector 103. The gate terminals of FETs O1 to 048 are connected to lines M1 to M48 respectively, which are connected to the secondary selector decoder 117. The drain terminals of FETs O1 to Q48 are connected in groups of three, to lines V1 to V16 which are connected to switching matrix 104. Each oflines V1 to V16 is connected to the drain terminals of three FETs so that each line V1 to V16 forms a circuit with three transducers located 120 from one another in the circular array 100 as shown in FIG. 3. Thus, where there are 48 equally spaced transducers T1 to T48 in the array,
line Vi is in a circuit with a transducers T1, T17 and T33, line V2 is in a circuit with transducers T2, T18 and T34, line V3 is in a circuit with transducers T3, T19 and T35 and so on.
The FETs used in the present invention comprise a pair of spaced electrodes (drain and source electrodes) formed of a substrate of semi-conductive material with a control electrode (gate electrode) formed therebetween. In the absence of a voltage of a specific level and polarity, the impedance in the source to drain path of the FET is very high (approximately 50 megohms.) However, when a voltage of a specific level and polarity is applied to the gate electrode, the impedance of the source to drain path in the F ET becomes low (approximately 500 ohms.) The FETs used in the device actually constructed in accordance with the present invention were MEM 500 C Dual P channel-enhancement mode silicon insulated gate field effect transistors.
manufactured by General Instruments.
In operation, the amplified signals from transducers T1 to T48 are applied by way of preamplifiers P1 to P48 and lines Z1 to Z48 to the source terminals of FETs O1 to Q48 respectively, in selector 103. Conduction in the source to drain path in FETs O1 to Q48 is controlled by the voltage in lines M1 to M48 respectively, which are connected to the gate terminals of the FET's. FIG. 12(A) shows wave form diagrams of the voltage signals in a representative number of lines M1 to M48. When the voltage in any of lines M1 to M48 is negative, the FET to which the line is connected, is conductive.
The period of one cycle of the control signal in each of lines M1 to M48, for example II to t2, is equal to the time required for the system to complete one scan of all 48 transducers, i.e., the scan period. As will be seen from FIG. 12(A), each FET O1 to Q48 is conductive for H3 of the scan period and is non-conductive for 2/3 of the scan period. FETs O1 to Q48 commence conduction in sequence at intervals of H48 of the scan period. Similarly, FETs Q1 to Q48 terminate conduction in sequence at intervals of 1/48 of the scan period.
During the period that a FET is conductive, the other two FETs, to which the drain terminal of the conductive FET are connected, are non-conductive. Thus, as will be seen from the phase relationship of the control signals shown in FIG. 12(A), FET O1 is conductive for N3 of the scan cycle, during which time line VI carries the signal from transducer Tl. During the next 1/3 of the scan cycle, FET Q17 is conductive and line VI carries the signal from transducer T17. During the next l/3 of the scan cycle, FET 033 is conductive and line VI carries the signal from transducer T33. Similarly, line V2 sequentially carries the output signals of transducers T2, T18 and T34 for H3 of the scan cycle each, line V3 sequentially carries the output signals of transducers T3, T19 and T35 for H3 of the scan cycle each, and so on.
Lines VI and V16 carry the output signals of 16 contiguous transducers. At intervals of H48 of the scan period one FET in the selector 103 ceases to be conductive and another FET connected to the same output line VI to V16 becomes conductive. Thus, at intervals of H48 of the scan period, one of lines V1 to V16 is switched from one transducer to another transducer which is located from the first transducer. For example, if during a first interval, lines VI to V16 carry the output signals of transdicers T1 to T16 respectively,