|Publication number||US3851210 A|
|Publication date||Nov 26, 1974|
|Filing date||Jun 22, 1973|
|Priority date||Jun 22, 1973|
|Publication number||US 3851210 A, US 3851210A, US-A-3851210, US3851210 A, US3851210A|
|Original Assignee||Owens Illinois Inc|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (4), Referenced by (11), Classifications (13), Legal Events (1)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent [191 Schermerhorn Nov. 26, 1974 METHOD OF DRIVING AND ADDRESSING Primary Examiner-J-Ierman Karl Saalbach GAS DISCHARGE PANELS BY INVERSION ssis ExaminewE, LaROChe TECHNIQUES Attorney, Agent, or FirmDonald Keith Wedding  Inventor: D. Schermerhorn, Swanton,  ABSTRACT Asymmetric components of sustainer voltage wave Asslgneei Toledo, Ohio forms are applied to and interchanged between op  Filed: June 22, 1973 posed electrode arrays of multicelled gas discharge display/memory panels to cause inversion of the state PP ,553 of each cell as on cells to off and off cells to on. As applied at regular intervals, inversions by [52'] CL 315/169 R, 315/169 TV, 315/340 sustainer componentinterchange is shown as an effec- [51 Int. Cl. H05b 37/00, HOSb 39/00 electronic condmonmg of Such (splay/memory  Field of Search 315/169 R 169 TV 250 panels Erase techniques applied to on cells in the 315/324, 340; 340/324 M state inverted from normal cause those cells to be written when reinverted to normal. Grounded partial  References Cited select signals zladdresseid to cells arelshown as effelctive erase manipu ations uring norma sustainer vo tage UNITED STATES PATENTS intervals and as effective write manipulations when $654388 4/1972 315/169 R X imposed as erasures during inversion while sustainer gg't a' components are interchanged bet-ween electrode ar- 3,792.3r1 2/1974 Trogdon 3l5/l69 TV rays' 37 Claims, 10 Drawing Figures PAIIZIIIE;
SHEET MP 5 ISUSTAINER INTERFACE ADDRESSING CIRCUIT f l I PATENTL; IZSVZS I974 sum 3 or s ON CELL LIGHT- f'\ f' j\ OF-F11 CELL LIGHT PAIENK; HSVZBISM CELL LIGHT SUSTAJNER COMPONENT SUSTAINER COMPONENT F Q I r (I) 6 55 2 J l I W003 m3 I III/7 I I o6 NORMAL SUSTAINER INVERTED NORMAL SUSTAINER CYCLES SUSTAINER CYCLES CYCLE 77 V 7a 75 USER SELECTION CONTROL I TER M LOGIC LOGIC N FACE (DECODING) (CLOCKING) TRANSISTOR 3 PANEL DIODE I SUSTAINER MATRIX z 46 55 Z I I 8| 1 l 82 METHOD OF DRIVING AND ADDRESSING GAS DISCHARGE PANELS BY INvERsIoN TECHNIQUES RELATED APPLICATIONS This application is related to applications for US. Letters Patents, filed herewith in the name of Jerry D. Schermerhom entitled Circuits for Driving and Addressing Gas Discharge Panels by Inversion Techniques Ser. No. 372,549 (Case 5-13030), Spatial Discharge Transfer Gaseous Discharge Display/Memory Panel, Ser. No. 372,730 (Case S-12404), and Method of Introducing Logic Into Display/Memory Gaseous Discharge Panels by Spatial Discharge Transfer, Ser. No. 372,542 (Case S-13l51), and an application for US. Letters Patent, Ser. No. 372,543 filed herewith in the names of Michael E. Fein and Jerry D. Schermerhom entitled Electronic Conditioning of Gas Discharge Panels by Inversion Interval Extension (Case F-l2517).
BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to methods of and apparatus for controlling gas discharge devices, especially multiple gas discharge display/memory devices which have an electrical memory and which are capable of producing a visual display or representation of data.
2. Description of the Prior Art Heretofore, multiple gas discharge display and/or memory panels have been proposed in the form of a pair of opposed dielectric charge storage members which are backed by electrodes, the electrodes being so formed and oriented with respect to an ionizable gaseous medium as to define a plurality of discrete gas discharge units or cells. The cells have been defined by surrounding or confining physical structure such as the walls of apertures in a perforated glass plate sandwiched between glass surfaces and they have been defined in an open space between glass or other dielectric backed by conductive electrode surfaces by appropriate choices of the gaseous medium, its pressure and the electrode geometry. In either structure, charges (electrons and ions) produced upon ionization of the gas volume of a selected discharge cell, when proper alternating operating voltages are applied between the opposed electrodes, are collected upon the surface of the dielectric at specifically defined locations and constitute an electrical field opposing the electrical field which created them so as to reduce the voltage and terminate the discharge for the remainder of the cycle portion during which the discharge producing polarity remains applied. These collected charges aid an applied voltage of the polarity opposite that which created them so that they aid in the initiation of a discharge by imposing a total voltage across the gas sufficient to again initiate a discharge and a collection of charges. This repetitive and alternating charge collection and ionization discharge constitutes an electrical memory.
An example of a panel structure containing non-physically-isolated or open discharge cells is disclosed in US. Letters Patent 3,499,167 issued to Theodore C. Bakenet al. Physically isolated cells have been disclosed in the article by D. L. Bitzer and H. G. Slottow entitled The Plasma Display Panel A digitally Addressable Display With Inherent Memory Proceeding of the Fall Joint Computer Conference, I E E E, San Francisco, Calif, Nov. 1966, pp 541-547 and in US. Patent No. 3,559,190.
One construction of a memory/display panel includes a continuous volume of ionizable gas confined between a pair of dielectric surfaces backed by conductor arrays typically in parallel lines with the arrays of lines orthogonally related to define in the region of the projected intersections, as viewed along the common perpendicular to each array, a plurality of opposed pairs of charge storage areas on the surfaces of the dielectric bounding or confining the gas. Many variations of the individual conductor form, the array form, their relationship to each other and to the dielectric and gas are available,
hence the orthogonally related, parallel line arrays are discussed herein merely as illustrative.
In prior art, a wide variety of gases and gas mixtures have been utilized as the ionizable gaseous medium, it being desirable that the gas provide a copious supply of charges duringdischarge, be inert to the materials with which it came in contact, and where a visual display. is
desired, be one which produces visible light or radiation which stimulates a phosphor. Preferred embodiments of the display panel have utilized at least one rare gas, more preferably at least two, selected from helium, neon, argon, krypton or xenon.
In an'open cell Baker et al. type panel, the gas pressure and the electric field are sufficient to laterally confine charges generated on discharge within elemental or discrete dielectric areas confined generally. to a region in proximity to the registering projections of opposed electrodes through the dielectric layers and gas.
The space between the dielectric surfaces occupied by the gas is such as to permit photons generated on discharge in a selected discrete or elemental volume of gas to pass freely through the gas space and strike surface areas of dielectric remote from the selected discrete volumes, such remote, photon struck dielectric surface areas thereby emitting charged particles so as to condition at least one elemental volume other than the elemental volume in which the photons originated.
With respect to the memory function of a given discharge panel, the allowable distance or spacing, between the dielectric surfaces depends inter alia, on the frequency of the alternating potential imposed, the distance typically being greater for lower frequencies.
While the prior art does disclose gaseous discharge devices having externally positioned electrodes for initiating a gaseous discharge, sometimes called electrodeless discharge, such prior art devices utilized frequencies and spacing or discharge volumes and gas pressures such that although discharges are initiated in the gaseous medium, such discharges are ineffective or not utilized for charge generation and storage at higher frequencies. Although charge storage may be realized at lower frequencies, such charge storage has not been utilized in a display/memory device in the manner of the Bitzer-Slottow or Baker et al. devices.
In operation of the display/memory device an alternating voltage is applied, typically, by applying a first periodic voltage wave form to one array and applying a cooperating second wave form, frequently identical to and shifted on the time axis with respect to the first wave fonn, to the opposed array to impose a voltage across the cells formed by the opposed arrays of electrodes which is the algebraic sum of the first and second wave forms. The cells have a voltage at which a discharge is initiated. That voltage can be derived from externally applied voltage or a combination of wall charge potential and externally applied voltage. Ordinarily, the entire cell array is excited by an alternating voltage which, by itself, is of insufficient magnitude to ignite gas discharges in any of the elements. When the walls are appropriately charged, as by means of a previous discharge, the voltage applied across the element will be augmented, and a new discharge will be ignited. Electrons and ions again flow to the dielectric walls extinguishing the discharge; however, on the following half cycle their resultant wall charges again augment the applied external voltage and cause a discharge in the opposite direction. The sequence of electrical discharges is sustained by an alternating voltage signal that, by itself, could not initiate that sequence. The half amplitude of this sustaining voltage has been designated V,,.
In addition to the sustaining voltage there are manipulating voltages or addressing voltages imposed on the opposed electrodes of a selected cell or cells to alter the state of those cells selectively. One such voltage termed a writing voltage transfers a cell or discharge site from the quiescent to the discharging state by virtue of a total applied voltage across the cell sufficient to make it probable that on subsequent sustaining voltage half cycles the cell will be in the on state. A cell in the on state can be manipulated by an addressing voltage termed an erase voltage which transfers it to the off state by imposing sufficient voltage to draw off the surface or wall charges on the cell walls and cause them to discharge without being collected on the opposite cell walls so that succeeding sustainer voltage transitions are not augmented sufficiently by wall charges to ignite discharges.
A common method of producing writing voltages is to superimpose voltage pulses on a sustainer wave form in an aiding direction and cumulatively with the sustainer voltage, the combination having a potential of enough magnitude to fire an off state cell into the on state. Erase voltages are produced by superimposing voltage pulses on a sustainer wave form in opposition to the sustainer voltage to develop a potential sufficient to cause a discharge in an on state cell and draw the charges from the dielectric surfaces such that the cell will be in the off state. The off state cell wall voltage frequently is midway between the extreme magnitude limits of the sustainer voltage, 2 V
The stability characteristics and non-linear switching properties of these bistable cells are such that in the case of a cell which has not fired in the preceding half cycle of sustaining voltage the state of any cell in the cell array can be changed by selective application of an external voltage which exceeds the firing or discharge igniting potential. In the case of a cell which has been fired in the preceding half cycle and has accumulated charges which can aid the sustaining voltage, the cell can be turned off by applying a voltage which discharges the cell. These manipulating signals are applied in a timed relationship with the alternating sustaining voltage, and through control of discharge intensity, accomplish selective state transitions by changing the wall voltage of only the cell being addressed.
Cells are transferred to the on state by applying a portion of the manipulating signal superimposed on the sustaining voltage termed a select signal on each of two opposed electrodes which constitute the cell. Conventionally, like sustaining signals are imposed on each electrode array so that half the sustaining voltage is imposed on each array and half the select signal is imposed on the addressed cell electrode in each electrode array at a time when the sum of the applied voltages is sufficient to ignite a discharge. Further, the partial select signals on each electrode are limited to a value which will not impose a firing potential across other cells defined by that electrode and not selected. A typical write signal for a cell is developed by applying half select voltages to the addressed electrodes of the cell to be placed in the on state at a time the sustaining voltages are developing a pedestal potential somewhat below the maximum sustaining voltage. Typically, a write signal is imposed on each opposed electrode of the cell during the terminal portion of asustain voltage half cycle when any wall charging which may result from the prior sustainer transient is substantially completed. The manipulating signal thus ignites a single, and unique, cell at the intersection of the selected two opposed electrodes. This ignited discharge thus establishes the cell in the on state since a quantity of charge is stored in the cell such that on each succeeding half cycle of the sustaining voltage, a gaseous discharge will be produced.
In order to erase a cell or transfer it to the off state the charge stored in the cell is discharged at a time when the sustaining voltage is imposing a voltage in opposition to the wall charge voltage. As for writing, the erase manipulation is facilitated if the sustaining voltage is at a pedestal level below the level providing the maximum applied voltage so that the erase half select voltages are at a convenient level. Typically an erase signal is imposed on each opposed electrode of the cell during the terminal portion of a sustain voltage half cycle, when the wall charging from the prior sustainer discharge is substantially completed, but preceding the next half cycle alternation by enough time so that the wall discharge of the selected cell is substantially stabi lized.
In the operation of a multiple gaseous discharge device, of the above described type, it is necessary to condition or prime the discrete elemental gas volume of each discharge cell by supplying at least one free electron thereto such that a gaseous discharge can be initiated when the cell is addressed with an appropriate voltage signal.
One such means of panel conditioning comprises periodically applying an electronic conditioning signal or write pulse to all of the panel discharge cells. However, electronic conditioning is self-conditioning and is only effective after a discharge cell has been conditioned previously; that is electronic conditioning involves periodically discharging a cell. Accordingly, one cannot wait too long between the periodically applied conditioning pulses since there must be at least one free electron present in order to discharge and condition a cell.
External radiation can be employed to condition a panel, as by flooding part or all of the gaseous medium of the panel with ultraviolet radiation. This is sometimes inconvenient since external radiation may not be available to the panel and at best, requires auxiliary equipment.
A frequently employed conditioning termed internal conditioning comprises using internal radiation such as from a radioactive material.
Photon conditioning where photons excite electrons as by impingement upon the dielectric surface of the cells is utilized by providing one or more pilot discharge cells maintained in the on state for the generation of photons. This is particularly effective in an open cell construction as disclosed by Baker et al. where the space between the dielectric surfaces occupied by the gas is such as to permit photons generated on discharge in a selected discrete or elemental volume of gas to pass freely through the panel gas space so as to condition other elemental volumes of other discharge units. In addition to or in lieu of the pilot cells, other sources of photons internal to the panel may be used.
Internal photon conditioning may be unreliable when a given discharge unit to be addressed is remote in distance relative to the conditioning source. Accordingly, a multiplicity of pilot cells may be required for the conditioning of a panel having a large area. In one highly convenient arrangement, the panel matrix border is comprised of a plurality of such pilot cells.
Circuitry for sustaining voltages, and where employed their pedestals, and for the manipulating voltages for writing and erasing individual cells can be quite extensive.
Transformer coupling of manipulating signals to the electrodes of multiple gas discharge display-memory devices has been disclosed in William E. Johnson et al. US. Patent No. 3,618,071 for Interfacing Circuitry and Method for Multiple Discharge Gaseous Display and/or Memory Panels which issued Nov. 2, 1971. The coupling of individual electrodes in large arrays involving substantial numbers of electrodes is cumbersome and expensive. Accordingly, solid-state pulser circuits capable of feeding through the sustaining voltage were proposed as exemplified in William E. Johnson US. Pat. No. 3,611,296 of Oct. 5, 1971 for Driving Circuitry for Gas Discharge Panel." Multiplexing of the signals to the electrodes in an array has been utilized employing combinations of diode and resistor pulsors to manipulate cell potentials as shown in US. Pat. No. 3,684,918 issued Aug. 15, 1972 to Larry J. Schmersal for Gas Discharge Display/Memory Panels and Selection and Addressing Circuits Therefore.
An object of the present invention is to facilitate the manipulation of cell states in a multiple gas discharge display/memory devices.
Another object is to enhance the control of the manipulation of cell states in multiple gas discharge display/memory devices.
Another object is to reduce current requirements on addressing components.
Another object is the elimination of transformer coupling or other level translation means in the addressing means.
These objects are attained by a sustainer voltage wave fonn for multiple gas discharge display/memory devices which lends itself to convenient manipulation and to utilization with convenient addressing signals.
SUMMARY OF THE INVENTION This invention involves a practical technique of utilizing electronic inversion in multiple gas discharge display/memory devices. It is concerned with the signal wave forms applied to individual electrodes or electrode arrays as sustaining voltages whereby the on state cells of a device are turned off as the off state cells are turned on by employing dissimilar sustaining wave forms on the opposed electrodes of a cell and interchanging those wave forms to accomplish the electronic inversion.
A feature of the invention is the utilization of one wave form for one electrode or electrode array which alternates between different absolute magnitudes with respect to ground external of the device. This enables manipulation signals to be arranged to pull-to-ground providing convenient erase signals transferring addressed cells from the on" to the off state. By employing erase manipulations of selected cells in conjunction with electronic inversion of the device, selected cells can be conditioned to be written by erasing manipulations during a device inversion period so that the reinversion to a normal sustainer voltage wave form writes those cells.
Another feature involves electronic conditioning the device periodically by the change of assymetric sustaining voltages between the electrode arrays causing a periodic inversion, whereby physical activity in the device is maintained at a high degree and reliable transfer of state characteristics is maintained.
DESCRIPTION OF THE DRAWINGS FIG. 1 is a partially cut-away plan view of a gaseous discharge display/memory panel as connected to diagrammatically illustrated sources of operating potentials;
FIG. 2 is a cross-sectional view (enlarged but not to proportional scale since the thickness of the gas value, dielectric members and conductor arrays have been enlarged for purposes of illustration) taken on lines 2-2 of FIG. 1;
FIG. 3 is an explanatory partial cross-sectional view similar to FIG. 2 (enlarged, but not to proportional scale) with block diagrammed sustainer component and addressing circuits;
FIG. 4 is a generalized sustaining voltage wave form applied across a panel, typical cell wall voltages for such awave form, and the component wave forms making up the resultant sustainer wave form, illustrating a means for offsetting the off state cell wall voltage from external ground according tov this invention;
FIGS. 5 through 8 are sustaining voltage wave forms applied across a panel, the component sustaining wave forms making up the resultant systainer, typical cell wall voltages resulting from wall charges, and light emitted for discharging cells all represented along the time axis, illustrating the effect of an interchange of the component sustaining signals between the electrode arrays to invert the state of the cells of the panel for various relationships between the instantaneous magnitudes of the components at the instant of their interchange;
FIG. 9 shows the wave form of FIGS. 5 through 8 with addressing voltages superimposed to illustrate cell write and erase techniques according to this invention; and
FIG. 10 is a block diagram of one form of interfacing and addressing circuit employing the wave forms according to this invention in the control of a multicelled gaseous discharge display/memory panel.
DESCRIPTION OF THE PREFERRED EMBODIMENT One form of multicelled gas discharge display/memory device to which the invention is applicable as illustrated in FIG. 1, utilizes a pair of dielectric films l and 11 separated by a thin layer or volume of a gaseous discharge medium 12, the medium producing a copious supply of charges (ions and electrons) which are alternately collectable on the surfaces of the dielectric members at opposed or facing elemental or discrete areas, X and Y, defined by the conductor array on nongas contacting sides of the dielectric members, each dielectric member presenting large open surface areas and a plurality of pairs of elemental X and Y areas. While the electrically operative structural members such as the dielectric members and 11 and conductor arrays 13 and 14 are all relatively thin (being exaggerated in thicknes in the drawings), they are formed on and supported by rigid non-conductive support members 16 and 17 respectively.
One or both of non-conductive support members 16 and 17 pass light produced by discharges in the elemental gas volumes unless only the memory function is utilized, in which case they can be opaque. Advantageously, they are transparent glass. Members 16 and 17 essentially define the over-all thickness and strength of the panel. They serve as heat sinks for heat generated by discharges and thus minimize the effect of temperature on operation of the device. For example, the gas layer 12 is usually under 10 mils and typically about 4 to 6 mils in thickness as determined by spacer l5. Dielectric layers 10 and 11 (over the conductors at the elemental or discrete X and Y areas) are usually between 1 and 2 mils thick. Conductors 13 and 14 are about 8,000 angstroms thick and may be of transparent, semi-transparent or opaque conductive material such as tin oxide, gold or aluminum.
Spacer 15 may be made of the same glass material as dielectric films 10 and 11 and may be an integral rib formed on one of the dielectric members and fused to the other member to form a bakeable hermetic seal enclosing and confining ionizable gas volume 12. A separate final hermetic seal may be effected by a high strength devitrified glass sealant 15S. Tubulation 18 is provided for exhausting the space between dielectric members 10 and 11 and for filling that space with the ionizable gas. For large panels, small beadlike solder glass spacers 15B may be located between conductor intersections and fused to dielectric members 10 and 11 to aid in withstanding stress on the panel and maintain uniformity of thickness of gas volume 12.
Conductor arrays 13 and 14 may be formed in situ on support members 16 and 17, typically as parallel lines of about 3 mils width spaced 17 mils center to center and having a resistance less than about 1,000 ohms per linear inch of conductor line and usually less than 50 ohms per inch.
Dielectric layer members 10 and 11 are formed of an inorganic material and are preferably formed in situ as an adherent film or coating which is not chemically or physically affected during bake-out of the panel. One such material is a solder glass such as Kimble SG-68 manufactured by and commercially available from the assignee of the present invention. This glass has thermal expansion characteristics substantially matching the thermal expansion of certain soda-lime glasses suitable, when in plate form, for support members 16 and 17. Dielectric layers 10 and 11 must be smooth and have a dielectric strength of about 1,000 volts per mil and be electrically homogeneous on a microscopic scale (i.e. no cracks, bubbles, crystals, dirt, surface films or other irregularities). Also, the surfaces of dielectric layers 10 and 11 should be good photo-emitters of electrons. Alternatively, dielectric layers 10 and 11 may be overcoated with materials designed to produce good electron emision, as in US. Pat. No. 3,634,719, issued to Roger E. Emsthausen. Where an optical display is desired, at least one of the dielectric layers and any overcoats therefore should pass light.
The ends of conductors 14-1 14-4 and support member 17 extend beyond the enclosed gas volume 12 and are exposed for the purpose of making electrical connection to external circuitry generically termed the sustainer, interface and addressing circuitry 19. Likewise, the ends of conductors 13-1 13-4 on support member 16 extend beyond the enclosed gas volume l2 and are exposed for the purpose of making electrical connection to sustainer, interface and addressing circuitry 19.
A schematic representation of the device and representative sustaining and addressing voltage sources is shown in FIG. 3 in a form which will best beappreciated with reference to the wave forms according to this invention as shown in FIGS. 4 through 9. Prior art sustainer voltage components have been applied to the opposed electrode arrays of display/memory device panels referenced from ground, each usually with one-half the total amplitude of the sustainer voltage amplitude. For convenience we will assume the electrodes are orthogonally related and will identify one array as the x coordinate and the other as the y coordinate.
Prior art sustainer voltages have been generated by developing a periodic voltage with a predetermined time relationship on each of the opposed arrays of a multicelled gaseous discharge display/memory panel. Each sustainer voltage component has been of the same magnitude such that a convention has developed wherein the symbol V has been applied to the voltage magnitude which is half the total applied across the cells by the resultant sustainer waveform and that total has been designated 2 V,,. In considering waveforms having essentially a square wave form it is to be appreciated that as in prior devices the shape of component wave forms is not critical to device operation and the square wave if chosen for convenience in illustration. Further, it should be recognized that the square wave representation is an approximation only in that a finite rise time and decay time is required for signal transitions.
The present resultant sustainer wave forms applied across the cells are developed from components which are not identical in magnitude. This gives rise to off state wall voltage for cells which are not conditioned to discharge each half cycle which is displaced from the usual external ground level. As illustrated, the component wave forms are square and are at their extreme levels for essentially a full half cycle although such intervals for extremes are not critical to operation according to the invention. The component wave forms 21 and 22 have like periods t and t which are offset along the time axis in a non-critical manner. It should be understood that the offset of component wave forms can range from synchronism, to a phase difference although at synchronism, the components tend to cancel in the resultant sustainer wave form 23. In the illustrated wave forms the component sustainer wave forms are about 135 out of phase to produce pedestals 24 and 25 as will be discussed.
Wall charge plots 26 have transitions which are offset along the time axis from the applied sustainer voltage since the wall charge transitions are not initiated until a critical voltage transition has occured and a short time lag has elapsed. Transfer characteristics for the cells (not shown) are available to indicate the voltage level required for a given charge displacement. Generally, the magnitude of the sustainer voltage 23 is sufficient to develop a wall charge 26 which almost totally neutralizes the applied sustainer and thus closely approaches the sustainer magnitude for such transitions as at 27. The lower magnitude erase signals 28 dis-' charge the cell walls to a level intermediate the sustainer amplitudes as will be shown in FIG. 9, possibly with a slight overshoot of the neutral axis as at 29 which decays toward the neutral level in the reverse field at 31 which may be present following the erase signal pulse, depending on erase pulse height, width, and time position. Each of the wall charge transitions involves a time interval represented by the knees 32 in the curves 26. Thus where wall charge transitions take place, some interval of time is required for the charge level to stabilize. For example, where the operating frequency of the sustainer is fifty kilohertz (SOKh), and t, and t, of the example are 10 microseconds (half a 20 microsecond period) a typical wall charge stabilization requires about seven microseconds depending upon gas and geometry. As will be explained, these stabilization intervals impose some limitations on the time relationships of the sustainer and wall charge transitions which can be employed in manipulating the panel. A sustainer voltage need not be referenced from ground. That is, the sustainer voltage component applied to the x coordinate array of electrodes 13 need not switch between ground and some chosen voltage, but rather, can be switched between any two voltages. As shown in FIG. 4, a sustainer voltage component for the x coordinate is switched between a value V and V while the y coordinate sustainer voltage component is switched between V and V to produce a resultant sustainer voltage 2V, (V, V,,) (V, V The resultant wave form across the panel is generalized for the case where the two alternating components 21 and 22 have the same period with equal half cycle periods and those periods are offset in time so that t and t, are equal and the center of the band of off cell wall voltage 33 lies midway between the sustainer voltage amplitude extremes. This relationship provides the greatest sustainer range.
In FIG. the sustainer circuitry ground external of the display panel is shown placed between V and V,, of FIG. 4 for one component of the sustainer voltage, normally the x component 21 so that one value is positive and the other negative, designated as V and V The other component of the sustainer voltage, normally the y component 22, is shown references to ground in the external circuitry such that V is ground and V, is V It should be recognized that there are no restrictions on the sustainer component voltages in that while V the smaller excursion from the reference voltage, ground V is positive it could be negative and the lower voltage, and while V the larger excursion from the reference voltage, is negative it could be positive and the higher voltage. As will be explained for the present operation the theoretical minimum limit is V /V equal to one, a typical practical value is V /V equal to two thirds, a preferred practical value is V /V equal to one-half and the maximum practical value is determined by the transfer characteristics of the panel employed particularly that excursion of the resultant sustainer voltage from the neutral cell wall value during the interchange of sustainer components on the electrode arrays which is tolerable without an involuntary writing of cells in the off state.
Consider the condition where V is one-half V in absolute magnitude. Under these circumstances the sustainer voltage component 21 normally applied to the x coordinate array 13 can be interchanged with the sustainer voltage component 22 normally applied to the y coordinate array 14 and, if the values are chosen to produce an effective sustainer voltage with the algebric sum of the components, the cell states in the panel can be inverted in response to the interchange. That is every on cell is transferred to an off state and every 0 cell is transferred to an on state.
These inversions rely upon the known phenomena in a multicell display/memory gas discharge device as will be appreciated from a consideration of FIGS. 3, 4 and 5. The general region of registry of an electrode 13-1 in the electrode array 13 for the x ccordinate and an electrode 14-1 in the electrode array 14 for the y coordinate comprises a discharge site or cell in the ionizable gas defined by the boundries represented by the dashed lines 34. Dielectric surfaces X-and. Y for the on cell 13-1 14-1 are shown while the cell 13-2 14-4 is shown in the off state. It will be noted that the draw- 7 ing represents the state wherein the x coordinate, array 13, is at a relatively positive voltage with respect to the y coordinate array 14 such that the on state cell has negative charges 35, electrons, collected on its dielectric surface X while the surface y has positive charges 36, ionized atoms, collected on its surface. The charges are termed wall charges and produce the augmenting voltage which on the next alternation of the sustaining voltage impose a total voltage across the cell sufficient to ignite ionization in the reverse direction.
Adjacent cells in the off state have an off state wall charge although random photon generated electrons 37 are represented in their vicinity for priming or conditioning purposes.
The composite generalized wall charge for a cell initially in the on state" is shown in the dot-dashed lines 26 of FIG. 4, and the dashed line 33 represents the wall charge of a cell initially in the off state. In FIG. 4 the half periods of the components areequal (t t,,) and each is half a sustainer cycle although they may be unequal. It will be noted that with symmetrical half periods of the composite sustainer voltage of FIG. 4, the off state cell wall charge voltage 33 is midway between the extremes of amplitude. The on state cell wall charge voltage is characterized by a wave form which builds from an offset along the time axis from the sustainer transition, the growth occurring with the accumulation of charge from ignition of ionization until neutralization of the sustainer voltage.
As further shown in the plot of cell light vs. time in FIG. 4 at A the on cell emits a burst of light having an interval of the order of 500 nanoseconds. While the onset of light coincides with the discharge the duration of the light bursts is not shown to scale along the time axes in the curves. They occur when the rising voltage of the opposite polarity to that which created the wall charge voltages, added to the wall charge voltages, exceeds the firing voltage at the discharge site. They terminate when the accumulation of neutralizing charge builds up a wall voltage which reduces the total effective voltage across the cell below that at which an ionization discharge will be maintained.
FIG. shows the wall voltages for the assumed special case where the components of the sustainer voltage applied to the x and y coordinates are different magnitudes and are interchanged. This waveform shifts the resultant sustainer voltage with an interchange of sustainer voltage components and, when appropriately timed with respect to the wave forms, will impose a write signal on the cells in the off state, and leave the wall charge of the cells in the on state at a potential such that they no longer are discharged by the succeeding half sycle transients of the composite sustainer voltage.
Transitions of a cell from the on state to the off state by a sustainer voltage component interchange at time 38 shifts the resultant sustainer voltage as at 39 so that its new off state cell wall voltage 41 approaches, or in the assumed case is the same value as, the wall voltage 27 of the previously discharging cells so that subsequent resultant sustainer voltage transitions 42 have no augmenting wall voltage at those cells to raise their voltage to a level required to ignite a discharge. This is illustrated by the on cell discharge B-C and level C of FIG. 5. Conversely with respect to the cells in an off state the displacement of the resultant sustainer voltage with respect to their previously acquired off state wall voltage upon interchange of the sustainer components is toward the wall voltage of a discharging cell. In the assumed case it is at the voltage of a discharging cell. That is the wall voltage effectively is of a magnitude and polarity at D of FIG. 5, to aid the transition of the sustainer voltage at this time so that a discharge igniting voltage is imposed across those cells. As a result, the charged particles accumulate on the dielectric surfaces of the cell walls as they neutralize that voltage and decay in their photon emission. This charge accumulation represented by the wall voltage level at E of FIG. 5 re-enforces the subsequent cycle of the interchanged wave form to maintain the on state for those cells until they are discharged to an off state" level.
The sustainer component voltages may be derived from bussed pull-up and pull-down circuits as shown in FIGS. 3. Each electrode of the x array 13 is connected to the pull-up buss 43 through an isolation diode 44 and a lead 45 (shown only for electrode 13-1). Lead 45 is connected to the x pull-down buss 46 through isolation diode 47. A pull-up circuit 48 acts as a selectively operable switch to couple source V applied at 49, to pullup buss 43 while a pull-to-ground circuit 51 and a pulldown circuit 52 respectively act as selectively operable switches to connect ground and terminal 53 coupled to a source at V to the pull-down buss 46. Corresponding pull-up and pull-down busses 54 and 55 are coupled to the y array electrodes by leads, as 56 to 1441 through isolation diodes 57 and 58. Y array pull-up circuit 59, pull-to-ground circuit 61, and pull-down circuit 62 selectively apply voltages V ground and V to busses 54 and 55.
The pull-up and pull-down circuits are clocked in synchronism. Several control approaches are available. These circuits can be arranged to switch on and thus impose their respective potentials only while a control signal is imposed or they can be arranged to be switched on by one signal and hold the on condition until an off signal is imposed. In either event the diode isolated capacitance of the panel electrodes 13 and I4 retain the buss applied voltage on the cells even after the sustainer voltage is terminated.
Imposition of a sustainer voltage component on one electrode array establishes a charge level which tends to be displaced in response to transitions in the imposed sustainer component on the opposed electrode array. Since the symmetrical circuitry for each array permits each to be driven to levels V V and V each array is subject to displacement currents as the opposite array makes transitions to V or V An escape path for such displacement currents is provided to clamped levels of V and V through their nonnally back biased clamping diodes 63 and 64 connected to busses 46 and 43 and diodes 65 and 66 to busses and 54.
In operation, as depicted in the wave form drawing, essentially square rise and decay patterns are represented with a slight slop to indicate some change with time and, when an interchange occurs, the transition of the component wave is made to the new level with only that slope. In FIG. 5 an interchange is illustrated for the condition in which both components are at the V level so that the period of the normal y component is transferred to and continued without shift along the time axis as the x component from F to G. Thus the interval V is imposed, .I-K on the y component, is now made up of two segments, L-M on the y component and F-G on the x component. Similar shifts from the x component to the y component at the moment of interchange will be noted.
It should be noted that it has been assumed in FIGS. 5 through 9 that the pull-up and/or pull-down circuits are turned on by the clocking control at the moment of interchange of components. For example in FIG. 5 pull-up circuit 59 had been turned on to raise curve 22 to the V level at L on the y array 14. Since the x array had been raised to level V by pull-up circuit 48 at N while curve 21 is onthe x axis and no potentials are required to be imposed to shift that level, a turn-on of pull-up circuit 48 at time F is unnecessary. Normal clocking of a pull-down circuit was sequenced at this time and the interchange merely causes pull-down circuit 62 to be turned on instead of pull-down circuit 53. However, where the component levels are different at the moment of interchange, the retention of sustainer component levels has not been assumed in the drawings and excursions to the levels programmed for that moment are illustrated. In FIG. 6 the x sustainer component when switched from wave form 21 to wave form 22 at the instant of time 67 is shown pulled-down to V at P. This assumes that even though pull-toground circuit 61 may have been turned off following the transition on the y array to V at time R the clocking control turns the x array pull-to-ground circuit 51 on at the moment of interchange. It also assumes that the y array pull-up circuit 59 is turned on by the clock control at this time to raise the y sustainer component to V at S of FIG. 6. Similar turn-on of pull-up, pull-to-ground and pull-down circuits are assumed at the instants of interchange 68 and 69 of FIGS. 7 and 8 respectively to cause the transitions in sustainer component level as at T and U in FIG. 7 and at V and W in FIG. 8.
A somewhat different mode of operation is assumed for the wave forms of FIG. 9 wherein the capacitive storage capability of the electrode arrays is relied upon to retain the signal levels imposed at the instant of interchange 711 until the next change in the new wave form is programmed by the clock control. This type operation results in a level V in the time interval between 60 and 70 as established at time Z by pull-to-ground circuit 61 rather than an excursion of the wave form to V as would be the case if an exact exchange of wave forms were made. Similarly at the instant of reexchange 72 of components to return to normal sustainer operation no excursion of the x component from V to V in the time interval between AA and BB is shown since pull-up circuit 48 is not turned on for that interval and the first tum-on for the x component is of a pull-down circuit 52 to impose V as at CC.
Either form of clocking of the switching circuits can be employed. The results of the particular type of control can be constructed according to the principles illustrated above.
Generally, the interchange between electrode arrays 13 and 14 of sustainer components of dissimilar amplitudes, where 2V V equals the resultant sustainer amplitude 2V will transfer cells in the off state to the on state. However, if the interchange is made at a time when the two components are at their most remote extremes the memory within the cell at that time is lost. The conditions at the moment of interchange for an interchange when one component is at V and the other component is at ground is shown in FIG. 6 while FIG. 7 illustrates one component at V and thus 2V in the assumed case, and the other component is at external ground. In each of these interchange conditions the cell in the on state is turned off during the transition in the resultant sustainer voltage wave form from its pre-interchange level to the maximum deviation from that level.
In order to accomplish a reliable inversion of states in the cells of a panel through interchange of applied sustainer voltage components, a transition of the extreme of the resultant sustainer voltage augmented by the wall charge voltage of the preinversion off state wall charge must be great enough to initiate a discharge to the on state of those cells which were in the off state prior to inversion. Further, those cells which were in the on state prior to inversion should not be subjected to a resultant sustainer voltage transition incidental to inversion sufficient to initiate or continue an on state discharge from the quiescent cell wall voltage established prior to inversion. If discharge activity of on state cells has not stabilized at the time of an excursion of the resultant sustainer voltage, the wall charge of the on state cells can be transposed to the post interchange on state level and all cells would then be on with a resultant loss of memory for the panel.
Consider the interchange at the moment one component is at V and the other is at V as at time 69 as illustrated in FIG. 8. The component transitions are cumulative in the resultant sustainer voltage and, as a consequence the transition of the on cell wall charges augments a transition of 2 (V V,) to continue the on state while the off cell wall charge transition is 2V V or the usual sustainer level and transfers those cells to the on state. With all cells on memory is eliminated since reinversion will place all cells in the off state.
A marginal operation is realized with the interchange illustrated in FIG. 7. Depending upon the cell discharge parameters as determined by the geometry of the unit, gas composition and pressure, and sustainer voltages the unit will invert the state of all cells or it will place all cells in the on state. Interchange of the components when at levels V and V results in a transition of the resultant sustainer which can establish a cell wall voltage on the preinversion on state cells which offers sufficient augmentation to reignite the discharge in those cells during inversion. The excursion at U in the y sustainer component produces a sustainer voltage transition to DD. If that value at DD, which for the example is V;, above the neutral axis of the inverted sustainer wave form, is maintained a sufficient interval to permit the on cell wall charges to approach its level then on the transition to EE of the sustainer the cells will be in the marginal firing range and the memory of their states would be lost. However, in the illustration the peaking of the wave form at DD is brief relative to the interval required for stabilization and is followed by a reduction to relatively low levels as at FF. This prevents the wall charge of those cells which were on" prior to the sustainer component interchange from reaching the high value of a normal sustainer transition and the reverse field causes some drooping of the wall charge as at GG followed by hunting around the neutral level. Even with conditions providing an assumed effective inversion, a range of wall charge patterns can be experienced during the inverting transition. Instead of the overshoot at GG where the wall charge produces level slightly exceeding the neutral level HH of the subsequent sustainer half cycle, the resultant sustainer voltage may be sufficient to raise the level just to the stable off state level of that following'half cycle with a relatively sharp knee (as shown by the alternative plot JJ), or the resultant sustainer voltage may develop a plot having a soft knee at at KK. Also, the preinversion off state" cells may have a small amount of wall charge transferred as at LL due to the high but short pulse characterized by transitions to DD and FF. None the less, as in FIGS. 5 and 6 the normal off state cells have enough wall charge at MM to augment the inverted sustainer voltage sufficiently to fire them.
Reinversion of the inverted panel at the moment the component level relationships are equal, FIG. 5, are at ground and V FIG. 6, or are at ground and V FIG. 7, cause a turn off of the cells which were on during the inversion by discharging their wall charges to an off state level of a normal resultant sustainer prior to the transition of the normal resultant sustainer to its maximum opposite value. Also, the off state wall charge of cells in the off state during the abnormal resultant sustainer coincides with the on state wall charge of a normal resultant sustainer to cause the turn on of the cells which were off during inversion.
Where electronic conditioning is to be achieved by interchange of sustainer components of dissimilar amplitudes, the interchange can be made over a range of component relationships provided a condition is established to maintain the wall charge level of the cells previously in the on state at the new off state level and the inversion occurs with sufficient frequency to insure particle activity, the presence of electrons 37, sufficient to provide for discharge ignition conditioning or priming. In a sustainer operating at the typical 50 kilohertz frequency and thus with a microsecond sustainer voltage period, typically an interval of 16 normal periods between the inversion conditioning period is effective and provides adequate contrast in the display. However, it is to be understood that other ratios of normal cycles to abnormal cycles can be employed.
Where panel memory is to be retained, the moment of interchange becomes significant since it is desirable that the cells which were in an on state during the normal sustainer wave form will transfer to the off state and that cells which were previously in an off state will turn on as a result of the interchange. That is, it is desirable that the panel invert. In the assumed case inversion will occur if the interchange of sustainer components on the electrode arrays occurs when both components are at the same level, V in the example; and in a somewhat less advantageous manner when one component is at the reference level, ground in the example.
Both write and erase manipulations of selected cells can be accomplished by cell erase functions where electronic inversion is available. That is during a normal sustain cycle, a cell in the on state can be erased by imposing voltage impulses on the opposed electrodes of the cell to be erased at a time prior to the transition of the sustainer voltage to the next half cycle of alternation such that the charged particles are drawn from the cell walls and permitted to recombine leaving the cell walls essentially free of charges and at the off state potential level. Since an inversion can be accomplished by an interchange of sustainer components, a cell can be written by inverting the panel, erasing that cell while in its inverted and thus on state, and reinverting the panel to return it to its normal state such that the cell is transferred from its off state to the onstate.
A particularly advantageous manipulation of cell states in a panel can be accomplished with external addressing circuitry which imposes ground as erase partial selects, the erasing voltage pulses being superimposed on the sustainer voltage. This is possible where the off state wall charge of an off state cell internal of the panel is other than the external ground.
These signals can be applied to the panel in the manner generally represented in FIG. 3 as more fully disclosed in the present inventors co-filed patent application Serial No. 372549, filed June 22, 1973 entitled Circuits For Driving and Addressing Gas Discharge Panels by Inversion Techniques for sustaining voltage and addressing circuit configurations.
Addressing of the electrode 13-1 is accomplished through select signal circuit 73 in response to control logic signals on lead 74 from the control logic 75, FIG. 10, forming a portion of sustainer, interfacing and addressing circuit 19 for the panel. Each of the electrodes in the X and Y arrays is similarly addressed as through select signal circuit 76 for electrode 14-1. While the select signal can be of a range of suitable values to manipulate the states of the addressed cell, in the example grounded select signals are employed in timed relationship to the composite sustainer voltage including the inversion controls as they respond to the input to the panel control system.
As shown in FIG. 10, signals are issued at the user interface 77 from which they are passed to the selection logic 78 or decoding equipment which identifies the discharge sites on the panel 79 to be written and erased. This information is passed to the control logic which translates it into the controls for each of the select signal circuits such as 73 and 76. These signals are passed on leads typified by 74 of FIG. 3 and the controls for the sustainer 81 to maintain the required synchronism of the sustainer and addressing functions. Those select signal circuits can be transistor switches which selectively couple the junction of diodes 44 and 47 and electrode lead 45 in the case of electrode 13-1 and diodes 57 and 58 to lead 56 in the case of electrode 14-1 both to a source of ground potential for each electrode. These circuits are represented as the transistordiode matrix 82 to which pull-up and pull-down busses 43 and 46 for the x array and 54 and 55 for the y array pass from sustainer 81. The leads 45 and 56 extend from matrix 82 to the panel electrodes.
FIG. 9 represents the transitions of wall charge and sustainer voltage for addressed cells manipulated by the erasure technique. As a typical example consider V %|V,,|so that 2 V,, as previously defined for the case where V is the amplitude for the smaller component and V V is the transition for the larger component, equals 2 V 3/2 V It is to be appreciated that the ratio V /V can be varied over a suitable range. A suitable value for 2 V in currently available panels is 240 volts and with the above proportions V 68.6 volts while V -I03 volts.
The erase pulse in the illustration is V +|V 171.6 volts above the bottom of the sustainer voltage. Assuming the o cell wall voltage to be volts (midway between the sustainer extremes), the erase pulse is the equivalent of 171.6-120 or 51.6 volts above the off state cell wall voltage. For the typical cell geometry, gas composition and pressure this is known to be an effective value for the erase pulse height. It is seen that this erase pulse height can be varied by varying the ratio V /IV L In employing grounding as a partial select signal the greatest partial select is V above the bottom of the sustainer. Hence, this partial select is below the off state cell wall voltage by l 20 V 17 volts, that is, below the mid-point of the sustainer voltage wave form 31. The partial select contribution required from the other component of the sustainer wave form is readily obtainable by pulling the 68.6 voltage of V to ground, also providing a partial select below the off state. Since neither partial select is greater than the excursion of the resultant sustainer from the off state, troublesome partial selects, which might marginally alter the state of cells having one electrode of the addressed cell, are avoided.
The special case assumed above can be generalized in that both lV IandIV Iare typically less than\V,L the effective half sustaining voltage. We note that normally lV I 5 WA 5 V, (although in principal,lV \can range greater than V This will be appreciated since if [V l IV Iand if the select pulse at time t,, of FIG. 9 will cause an erase, then the level shift of the sustainer without a select signal will, or at least may, at time 1,, cause cells which were inverted to the off state to write such that on inversion all cells would be erased. This type of response would erase the entire panel. That is, the cells having a pre-inversion on state would exhibit a wall voltage at level NN at time 2 of FIG. 9 which would augment the inverted sustainer excursion at t,, sufficiently to ignite a discharge. The cells thus would reinvert to an off state and the memory of their normal on state would be lost. Therefore, voltage |V |must be sufficiently greater than |V,,lso that the pulse at time t erases but the sustainer voltage transition from off state wall charge levels at time t,, does not write. In the example, wherelV,,l=lV,y2, the level of the sustainer voltage at time t,, falls at the level of the normal sustainer and thus at the wall charge voltage level for the cells in the off state." Such a transition of a sustainer, by definition, will not cause writing since it is not significantly beyond the normal off state wall voltage. Again, if IV =|v,y2 the inversion of cells in the off state during the normal sustainer cycle is assured during the inverted sustainer cycle since the off state wall charge is displaced from the extreme transition of the inverted sustainer an amount equal to the normal sustaining voltage for on state cells.
When |V |==lVLl/2 it is implicit that |VL|=V3- Itis desirable to reduce voltage requirements on the sustainer voltage circuits. Such reductions are facilitated with |VL| V,,, however, this relationship is limited to levels which afford reliable operation in achieving. a sufficient transition of sustainer voltage at the interchange of sustainer components to assure the amplitude from off state cell wall potential for normal operation will fire to normally off cells.
In addition to the use of assyrrim e t ric SiIStaTAETEIH ponent wave forms and their interchange on the electrode arrays as a means of inversion for conditioning the panel by regular inversions, e.g., at a ratio of 16 normal sustainer cycles to each inverted sustainer cycle, the proposed wave forms are also effective as a reliable initial turn-on of the panel. The relatively low particle activity level in the ionizable gas requires substantial initial excitation. This wave form is particularly advantageous in this regard since s flash voltage is imposed on the panel at the first inversion which approximates 2 (V +IV I) V, which for a V of 120 volts is about 220 volts.
The manipulating signals illustrated in FIG. 9 are imposed when the wall charge voltage has approached a stabilized condition and thus typically about two to seven microseconds for the assumed cell and operating parameters after the sustainer voltage transition across the neutral axis to an extreme. The height (determined by the ratio IV MV D and width of the manipulating signal pulses along the time axis are also chosen to permit an approach to a stabilized condition of the newly developed wall charge. A typical pulse interval has been illustrated as two to seven microseconds for the assumed cell and operating parameters. Stabilization of the wall charge conditions following a manipulating signal and prior to any major transition of the sustainer voltage is also advantageous in achieving reliable operation, thus as above, an interval of about 2 to 7 microseconds between the termination of the signal and the sustainer transition is desirable, particularly when. a voltage level other than that of the manipulating signal is established prior to the next sustain cycle, as is illustrated in FIG. 9.
As shown in FIG. 9 a succession of normal sustainer cycles maintain a stable panel condition with certain cells in an on state having a wall charge voltage as shown in plot 26. At time t with. the respective sustainer components at opposite amplitudes, specifically with the x sustainer component at V and the y sustainer component at V both components are drawn to ground on those x and electrodes defining the on state cells. The cumulative voltage pulse resultant 28 across those cells draws their wall charge off the cell walls. Atthis time it is advantageous to avoid loading the select signal circuits 73 and for each cell with the voltages and currents available fromthe sources V and V accordingly, it is advantageous to reduce the buss voltages immediately preceding the addressing of cells. One technique of making such a reduction is to turn off the pull-up and pull-down circuits and to pull the busses to ground, relying upon the panel electrode capacitances at the junctions of the isolationdiodes 44, 47, 57 and 58 to maintain the signal levels of those electrodes of each array which are not pulled to ground by select signal circuits at their sustainer levels. Since the primary function of this operation is to discharge the capacitance of the busses low power transistor switches can be employed for this function.
One sequence of addressing is to turn-off the pull-up and pull-down circuits to the busses, pul the busses to or near ground, sense their pull to ground and in response thereto enable the addressing control logic to operate the addressed select signal circuits. A convenient technique providing an pull-down circuit off for a portion of each sustainer cycle as a regular element of their sequence of operations, and to clock addressing functions during that 37 off interval.
As shown in FIG. 9 the erase pulse is at a level above the neutral wall voltage. This level may be approached by the wall charge of the erased cells if permitted to persist until the resultant sustainer makes its transition to a higher level. Upon the next reversal of the resultant sustainer, this intermediate wall charge level can be sufficient to rewrite the cells, since in the assumed case the sustaining voltage excursion from the wall charge level will approach V +V at t,,. In order to eliminate this wall charge overshoot 29, a reverse voltage can be imposed which tends to bring the wall charge of these cells toward the netural level. This can be done by reimposing the V voltage on the x array through the tum-on or pull down circuit 52 and/or reimposing the V voltage on the array through the tum-on of pullup circuit 59 to produce sustainer voltage levels below the wall charge netural before the next excursion above the wall charge netural. This will pull the wall charge of the just erased cells toward netural sufficiently to militate against a reignition of discharge at 1 ln many cases, however, the manipulation pulse width and height can be chosen in accordance with charge transfer cyrves so that it is unnecessary to reimpose V and V before the next sustain cycle (not illustrated). To assure the wall charge of the just erased cell is reduced toward the netural wall charge level sufficiently to avoid an involuntary discharge and to assure that no capacitive displacement voltages occur to cause an undesired discharge at the next resultant sustainer reversal, it is necessary to clock a ground to the pull-up busses 43 and 54. This can be done with a lowe power pull-toground circuit isolated by diodes from the pull-up busses as disclosed in the above noted application for [15. Letters Pat. Ser. No. 372,549 filed June 22, 1973.
, Cells are erased from the panel display by grounding the sustainer components during a normal sustainer cycle. They are written in response to signals from the user interface 77 to the selection logic 78, and the control logic 75 which cause a panel inversion by the described interchange of sustainer components between electrode arrays. The control logic 75 then clocks the buss grounding circuits, and the select signal circuits for the addressed cells so that upon reduction of the buss levels the select signal circuits re enabled. It can then actuate means to insure the erased cells have their wall charge levels drawn toward the netural wall charge level at PP and upon completion of the inverted sustainer cycle as at time 72 return to a normal sustainer cycle. Thus, the cells erased durng inversion enter the on state on reinversion.
From the above it can be generalized that an erase pulse, whether applied during a normal sustainer cycle, or an inversion sustainer cycle is applied to the components in opposition to their then current excursions in magnitude at a level sufficient to develop a nearly netural wall charge level. These erase pulses should be applied an interval following the transition from V to V on the appropriate aray of electrodes sufficient to permit a reasonable stabilizaton of wall charge for on3 cells. The erase pulses and the attendant wall discharge to approach the neutral wall level should be completed before the transition from V to V on the appropriate array.
It is to be appreciated that the wave forms illustrated in FIG. 9 can be created by operations other than set forth above. For example, if the select signal circuits 73 and 75 have sufficient power handling capacity, buss pull-down is not a prerequisite to addressing. Further, if the erase pulse magnitude or interval of application is controlled precisely enough to bring the erased wall charge to the neutral wall charge level, or so close to that level that involuntary reignition of a discharge in erased cells is avoided, no manipulation of buss voltages prior to the next sustainer excursion will be required. Accordingly, the simplified block diagram of sustainer and select signal circuitry of FIG. 3 will suffice.
While writing has been illustrated by inversion and erasing, the electronic conditioning achievable by the interchange between arrays of assymmetric wave forms forming components of the resultant sustainer voltage can be used to advantage without writing in this manner. The contrast of the display is reduced as the frequency of inversion is increased. Thus if the cells are written in the normal manner by imposing a write pulse during a normal sustainer cycle the extra inversions of the above writing technique are unnecessary. Another combination of these manipulations which reduces the frequency of the contrast reducing panel inversions used for conditioning is to employ only border conditioning of the panel and write cells by inverting the panel and erasing the cells to be written during the inversion.
Combinations of conditioning techniques are also contemplated as where both border conditioning and inversion conditioning are employed. Border conditioning can be arranged in overlapping relationship so that when certain cells are on for a normal sustainer cycle other cells are off and. upon inversion of the panel the normally off border cells are on to take the place of the then off normally on border cells.
While the examples discussed have assumed essentially square wave forms of sustainer voltages, the principles of the invention are applicable to other wave fon'ns. Frequency of operation has assumed half periods of ten microseconds the sustainer operating frequency can be other than the assumed typical kH. For example, if the contrast and brightness were at an acceptable level the operating frequency could be reduced to produce a half period for the sustainer of up to one hundred microseconds.
The examplary and preferred embodiments of this invention have involved the interchange of sustainer voltage components between the opposed electrode arrays as the inversion technique. It is to be appreciated that the invention is not restricted to an interchange of the wave forms since the inversion can be accomplished with dissimilar sustainer voltage components. For example, the x array could have pull-up and pulldown circuits for a first component such as a wave form having magnitude limits of V and V while a second component wave form might be imposed on that array having magnitude limits V (different from V and V The y array sustainer component could have magnitude limits such as V and V to be imposed while the first wave form is imposed on the x array and limits V and V,, to be imposed while the second wave form is imposed on the x array. Of course the combined component waves imposed simultaneously should produce a resultant voltage magnitude equal to the sustainer voltage characteristic of the device to which they are applied. Since a range of voltages will afford the desired sustainer function, it should also be appreciated that the sums of the absolute values of magnitudes of simultaneously applied sustainer component wave forms as the wave forms for normal and inverted operation of the device. need not be identical but need only fall with the opera" tive range of voltages. The relative values of these sustainer components should be chosen such that the effective cell wall potential for a cell in the on state during imposition of one combination of wave form components of the alternating sustainer on the opposed arrays is essentially at the effective neutral cell wall potential for a cell in the off state during the imposition of the other combination of waveform components of the alternating sustainer on the opposed arrays. Further, the off state cell wall potential for a cell in the off state during imposition of the one combination of wave form components of the alternating sustainer on the opposed arrays should be essentially at the effective cell wall potential for a cell in the on state during imposition of the other combination of wave form components of the alternating sustainer on the opposed arrays.
In recapitulation it should be noted that the preceding disclosure involves a method of inverting the discharge state of cells of a multi-celled gas discharge display/memory device which may be a panel 79 having parallel conductors 13-1 13-4 and 14-1 14-4 comprising first and second arrays of electrodes in an orthogonal relationship arranged so that each of a plurality of cells are comprised of the proximate portions of electrodes in arrays 13 and 14. These cells have a characteristic which enables them to be maintained on or off in response to the application of an alternating sustainer voltage across them and between the arrays 13 and 14. Such cells can be sustained by applying dissimilar alternating sustainer component voltage wave fonns to arrays 13 and 14 such that the magnitude of one wave form is at least twice the magnitude of the other and the sum of the absolute values of their magnitudes equals the sustainer voltage magnitude required of the cells. Inversion of the cells, as for electronic conditioning of the device, can be accomplished by interchanging the voltage wave forms between the arrays 13 and 14. This inversion is conveniently accomplished when the magnitude of the second wave form is about 3 times that of the first, particularly when the first alternates between a reference level e.g., ground, and an amplitude equal to a first magnitude and the second alternates between a level displaced from said reference level by about said first magnitude on one side of said reference level and a level displaced from said reference level on the opposite side to a magnitude having an absolute value about twice that of the first.
Electronic sustaining can be accomplished by a regular program of normal cycles of a given plurality spaced by a given number of cycles of the interchanged wave form.
Control of the discharge state of the several cells is by means of manipulating signals applied to electrodes defining a selected cell. One unique form of signal is a ground pulse applied while the component first and second wave forms are clocked toward their maximum excursions from the reference level. This establishes an off state of the selected cell. If the off state of a cell is established while the field of cells including the selected cell is inverted in state, then upon reinversion by interchange of the first and second wave forms to their normal arrays the selected cell is turned on. The voltage transitions of the ground pulses when summed are of a level to draw down the wall charge of the selected cell to an off state wall charge level. It is to be understood however that pulses of other amplitudes may be used and may be generated by pulling selected elevtrodes to a level other than ground but intermediate voltage levels V and V Advantageously, the pulses are applied between the moment the on wall charge of the cell has stabilized at its on level and the moment the sustainer voltage makes a transition through ground. The time width of the pulses is advantageously sufficient to enable the cell wall charge to substantially stabilize near neutral. If the wall charge of the selected cell is carried beyond neutral, it can be drawn toward neutral prior to the next major transition of the second wave form through appropriate manipulations to avoid reignition of discharge therein.
Parameters of operation according to this invention reside in a substantial range. The inversion techniques can be employed in various sequences, particularly when combined with manipulating signals to achieve display/memory conditions combined with or apart from the electronic conditioning functions. In view of the alternatives suggested and available from the above techniques, it is to be appreciated that the preceding disclosure is presented merely for purposes of illustration and that it should not be read as limiting the spirit or scope of the invention.
What is claimed is:
l. The method of operating a multicelled gas discharge display/memory device having a first array of electrodes and a second array of electrodes arranged so that each of a plurality of cells are comprised of proximate portions of electrodes in said first and second arrays, a volume of ionizable gas in the vicinity of said proximate portions, and a dielectric layer intermediate at least one of said electrode proximate portions and said volume of gas, said cells having the bistable characteristic that cells in an on state of discharge have an on state cell wall charge on said dielectric layer and are retained in an on state and cells in an off state have an off state" cell wall charge and are retained in an off state in response to the application of an alternating sustainer voltage having a sustaining value across the first and second electrode arrays, comprising: imposing a first portion of the alternating sustainer voltage which cyclically pulsates between voltage values on the first array of electrodes; and imposing a second portion of the alternating sustainer voltage which cyclically pulsates between voltage values with greater magnitude than the magnitude of the first portion of the second array of electrodes during the imposition of the first portion, the sum of the absolute values of the magnitudes of the first and second portions during at least a portion of each alternation of said sustainer equalling the magnitude of the sustaining voltage for the device.
2. The method according to claim 1 wherein the first portion of the alternating sustainer voltage pulsates between a reference voltage and a voltage on a first side of said reference voltage and wherein the second portion of the alternating sustainer voltage pulsates to a voltage on the side of said reference voltage opposite said first side.
3. The method according to claim 2 including the step of applying, while said first array is at thevoltage on said first side of said reference voltage and the second array is at the voltage on the side of said reference voltage opposite said first side, a voltage pulse to said reference level to a selected electrode of said first and second array having proximate portions defining a selected cell which is in the"on state of discharge to transfer said cell to the off state of discharge.
4. The method of inverting the discharge states of cells in a multicelled gas discharge display/memory device having a first array of electrodes and a second array of electrodes arranged so that each of a plurality of cells are comprised of proximate portions of electrodes in said first and second arrays, a volume of ionizable gas in the vicinity of said proximate portions, and a dielectric layer intermediate at least one of said electrode proximate portions and said volume of gas, said cells having thebistable characteristics that cells in an on state have a cell wall charge when discharged producing an on" cell wall potential and are retained in an on state and cells in an off state have an off state cell wall charge producing :an off state cell wall potential and are retained in an off state in response to the application of an alternating sustainer voltage having a sustaining value across the first and second electrode arrays, comprising:
imposing a first portion of the alternating sustainer voltage which cyclically pulsates between voltage values on the first array of electrodes;
imposing a second portion of the alternating sustainer voltage which cyclically pulsates between voltage values with greater magnitude than the magnitude of the first portion of the second array of electrodes during the imposition of the first portion, the sum of the absolute values of the magnitudes of the first and second portions during at least a portion of each alternation of said sustainer equalling the magnitude of the sustaining voltage for the device;
interchanging a third portion of the alternating sustainer voltage which cyclically pulsates between voltage values with the second portion of the alternating voltage on the second array of electrodes; and
interchanging a fourth portion of the alternating sustainer voltage which cyclically pulsates between voltage values with greater magnitude than the magnitude of the third portion with the first portion of the alternating voltage on the first array of electrodes during the imposition of the third portion of the second array of electrodes the sum of the magnitudes of the absolute values of the third and fourth portions during at least a portion of each alternation of said sustainer voltage equalling the magnitude of the sustaining voltage for the device; the sustainer voltage first, second, third and fourth portions being of values such that the effective cell wall potential for a cell in the on state during imposition of the first and second portions of the alternating sustainer voltage is essentially at the off state cell wall potential for a cell in the off state during imposition of the third and fourth portions of the alternating sustainer voltage, and the off state cell wall potential for a cell in the off state during imposition of the first and second portions of the alternating sustainer voltage is essentially at the effective cell wall potential for a cell in the on state" during imposition of the third and fourth portions of the alternating sustainer voltage.
5. The method according to claim 4 wherein the second portion magnitude is at least twice the magnitude of the first portion.
6. The method according to claim 4 wherein the fourth portion magnitude is at least twice the magni tude of the third portion.
7. The method according to claim 4 wherein the first portion magnitude is essentially equal to the third portion magnitude.
8. The method according to claim 4 wherein the second portion magnitude is essentially equal to the fourth portion magnitude.
9. The method according to claim 4 wherein said first and third portions pulsate between the same reference level and a level displaced from said reference level by the amount of their respective magnitudes.
10. The method according to claim 4 including the step of periodically interchanging said sustainer voltage portions whereby said device is electronically conditioned.
11. The method according to claim 4 including the step of imposing voltage pulses on selected electrodes of each electrode array which define a cell to change the discharge state of that cell.
12. The method of inverting the discharge states of cells in a multicelled gas discharge display/memory device having a first array of electrodes and a second array of electrodes arranged so that each of a plurality of cells are comprised of proximate portions of electrodes in said first and second arrays, a volume of ionizable gas in the vicinity of said proximate portions, and a dielectric layer intermediate at least one of said electrode proximate portions and said volume of gas, said cells having the bistable characteristic that cells in an on state of discharge are retained in an on state and cells in an off state of discharge are retained in an off state in response to the application of an alternating sustainer voltage having a sustaining value across the first and second electrode arrays, comprismg:
generating a first voltage wave form which cyclically pulsates between voltage values to define an amplitude of a first magnitude; generating a second voltage wave form which cyclically pulsates between voltage values to define an amplitude of a second magnitude at least twice said first magnitude, the sum of the absolute values of said first and second amplitudes during at least a portion of each alternation of said sustainer voltage equalling the sustaining voltage for said device;
imposing said first voltage wave form on the first array of electrodes;
imposing said second voltage wave fonn on the second array of electrodes; and
interchanging said voltage wave forms between said first and second arrays.
13. The method according to claim 12 wherein the amplitude of the second wave form is about three times the amplitude of the first wave form.
14. The method according to claim 12 including the step of imposing voltage pulses on selected electrodes of each electrode array which define a cell to change the discharge state of that cell.
15. The method according to claim 12 wherein said first and second wave forms have equal regular periods and said interchange of said wave forms is made at regular intervals whereby said device is electronically conditioned.
16. The method according to claim 15 wherein said interchange is maintained for at least one wave form period.
17. The method according to claim 16 wherein the voltage pulses are in opposition to the voltage of the wave form applied at that moment to each electrode.
18. The method according to claim 12 wherein the first wave form alternates between a reference level and a second level displaced from said reference level by said amplitude of a first magnitude.
19. The method according to claim 18 wherein said reference level is essentially at ground external of said device.
20. The method according to claim 18 wherein said second wave form alternates between a third level displaced from said reference level in the direction of displacement of said displacement of said second level from said referenced level, and a fourth level displaced from said reference level in a direction of displacement from said reference level opposite the displacement of said third level from said reference level.
21. The method according to claim 20 wherein said third level is generally of the magnitude of said second level and said fourth level is of a magnitude having an absolute value about twice the magnitude of said second level.
22. The method according to claim 20 wherein said reference level is essentially at ground external of said device.
23. The method according to claim 20 wherein said first and second wave forms have like periods; clocking said wave forms in a time phase relationship which includes an interval during which said first wave form is displaced from said reference level and said third wave form is displaced from said reference level toward said third level.
24. The method according to claim 21 including the step of synchronizing the imposition of said voltage pulses to occur during an interval said voltage wave forms are interchanged; and then interchanging said voltage wave forms to return said first voltage wave form to said first array and said second voltage wave form to said second array.
25. The method according to claim 16 including the step of imposing voltage pulses on selected electrodes of a selected cell in a direction opposed the voltage on the unselected electrodes of each electrode array, which cause the selected cell in the on state of discharge to change the discharge state of that cell to the off state while each of said waveforms are displaced from the reference level and are on opposite sides of the reference level.
26. The method according to claim 25 including the step, following the change of the selected cell to the off state, of interchanging said wave forms between said arrays whereby said first wave form is imposed on said first array, said second wave form is on said second array and the selected cell is transferred to its on state of discharge.
27. The method according to claim 25 including the step of maintaining said voltage pulses on said selected electrodes for an interval sufficient to achieve substantial stabilization of the wall charge on the cell defined by said electrodes.
28. The method according to claim 25 wherein said device includes cells in the on state of discharge hav ing characteristic stable on wall charge levels and cells in the off state having characteristic stable off state wall charge levels including the step of timing imposition of said voltage pulses to occur in an interval between the substantial stabilization of the on wall charge of a cell and the next major transition through the reference level in the second wave form to terminate the on state for said cell.
29. The method according to claim 25 wherein the voltage pulses are imposed to the reference level.
30. The method according to claim 29 including the step of producing a wall charge level on said cell approaching the off state level subsequent to application of said voltage pulses and prior to the next major transition through the reference level in said second wave form.
31. The method of selectively initiating a discharge of a given cell in a multicelled gas discharge display/- memory device which comprises initiating a discharge in a field of cells of said device which includes said given cell, extinguishing the discharge in said given cell; and then inverting the discharge state of all cells in the field whereby said extinguished cell is placed in an on state of discharge.
32. The method of electronically conditioning a mu]- ti-celled gas discharge display/memory device having a first array of electrodes and a second array of electrodes arranged so that each of a plurality of cells are comprised of proximate portions of electrodes in said first and second arrays, said cells having the characteristic that cells in an on state are retained in an on state and cells in an off state" are retained in an off state in response to the periodic application of an alternating sustainer voltage across the first and second electrode arrays, comprising:
generating a first cyclic pulsating voltage wave form having an amplitude of a first magnitude;
generating a second cyclic pulsating voltage wave form having an amplitude of a second magnitude, the sum of the absolute values of said first and second magnitudes equalling the sustainer voltage magnitude for said device;
imposing said first voltage wave form on the first array of electrodes;
imposing said second voltage wave form on the second array of electrodes; cyclically clocking said imposed wave fonns through a given plurality of cycles;
then cyclically interchanging said voltage wave forms between said first and second arrays for a given number of cycles following. said clocked plurality of cycles of imposed wave forms; and
returning said first wave form to said first array and said second wave form to said second array for the clocked plurality of cycles following each given number of cycles of interchanged wave forms.
33. The method according to claim 32 including the steps of interchanging said voltage wave forms between said first and second arrays during said cyclically clocked plurality of cycles; and transferring a selected cell to an off state while said voltage wave forms are interchanged whereby said selected cells is placed in the on state during subsequent applications of said first wave form to said first array and said second wave fonn to said second array.
34. A method of controlling the discharge of discharge units of a multiple-discharge gaseous display/- memory device of the type in which a discharge in an ionizable gas generates charges alternately collectible on pairs of discrete areas of pairs of opposed dielectric surfaces of said units to constitute an internal bias voltage on the gas, each of said dielectric surfaces being backed by a conductor array with a first and second of said arrays defining a plurality of pairs of opposed discrete areas, comprising:
supplying a first signal to all conductors of the first array, said first signal being a periodically applied alternating voltage having asymmetrical major and minor amplitudes with respect to an intermediate ground;
supplying a second signal to all conductors of the second array, the second signal being a periodically applied alternating voltage having an amplitude between ground and a value between the absolute values of the amplitudes of the first signal voltage and being related in time to the signal applied to the first array to impose a potential between said arrays of a magnitude insufficient to initiate a discharge and generate charges at any of the opposed discrete areas, but of sufficient magnitude to sustain one or more of the opposed discrete areas in a discharged state with the aid of said internal bias voltage following an initial discharge therein; and
simultaneously transferring the first signal to the second array and the second signal to the first array prior to a major amplitude excursion of the first sigcrete areas and whereby the internal bias voltage of the opposed discrete areas in a discharged state prior to transfer is insufficient to augment the inverted potential to sustain said discharge state.
35. The method according to claim 34 wherein the first signal minor voltage absolute value is essentially equal to the magnitude of the second signal.
36. The method according to claim 34 including the steps of selectively superimposing a ground signal on a first selected conductor of one array, selectively superimposing a ground signal on a second selected conductor of the array opposite said one array to terminate the discharge in a selected opposed discrete area defined by the first and second selected conductors.
37. A method of controlling the display/memory state of units of a multiple-discharge gaseous display/- memory device of the type in which a discharge in an ionizable gas generates charges alternately collectible on pairs of discrete areas of pairs of opposed dielectric surfaces of said units to constitute an internal bias voltage on the gas in response to the application of an alternating sustaining wave, each of said dielectric surfaces being backed by a conductor array with a first and sec 0nd of said arrays defining a plurality of pairs of opposed discrete areas, comprising:
establishing a discharging state in the pairs of opposed discrete areas of said device defining units of said device; selectively terminating the discharge state and the charge generation for a unit of said device; and inverting the state of all units of said device whereby that unit whose discharging state was selectively terminated is placed in a discharging state.
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|U.S. Classification||345/71, 345/204, 315/340|
|International Classification||G09G3/28, G09G3/288|
|Cooperative Classification||G09G3/294, G09G3/296, G09G3/297, G09G2310/0254, G09G2320/0228|
|European Classification||G09G3/294, G09G3/297, G09G3/296|
|Jun 9, 1987||AS||Assignment|
Owner name: OWENS-ILLINOIS TELEVISION PRODUCTS INC., SEAGATE,
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:OWENS-ILLINOIS, INC., A CORP. OF OHIO;REEL/FRAME:004772/0648
Effective date: 19870323
Owner name: OWENS-ILLINOIS TELEVISION PRODUCTS INC.,OHIO
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:OWENS-ILLINOIS, INC., A CORP. OF OHIO;REEL/FRAME:004772/0648