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Publication numberUS3855612 A
Publication typeGrant
Publication dateDec 17, 1974
Filing dateFeb 20, 1973
Priority dateJan 3, 1972
Publication numberUS 3855612 A, US 3855612A, US-A-3855612, US3855612 A, US3855612A
InventorsW Rosvold
Original AssigneeSignetics Corp
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Schottky barrier diode semiconductor structure and method
US 3855612 A
Abstract
Schottky barrier diode semiconductor structure having a semiconductor body formed essentially of silicon and having a surface with an active device formed in the semiconductor body having collector, base and emitter regions and with at least two metals on said surface combining with the silicon to form an alloy of at least two metals and silicon which is in contact with the collector, base and emitter regions and also extends beyond the base region to form a Schottky barrier diode having a barrier height which is determined by the composition of the alloy.
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SCI-IOTTKY BARRIER DIODE SEMICONDUCTOR STRUCTURE AND METHOD Dec. 17, 1974 Primary Examiner.lohn Zazworsky Assistant Examiner-William D. Larkins Attorney, Agent, or Firm-Flehr, Hohbach, Test,

[75] Inventor: Warren C. Rosvold, Sunnyvale, I Albritton & Herbert Cal1f.

[73] Assignee: Signetics Corporation, Sunnyvale, [57] ABSTRACT Cahf Schottky barrier diode semiconductor structure hav- [22] Filed: Feb. 20, 1973 ing a semiconductor body formed essentially of silicon I and having a surface with an active device formed in [21] Appl' 334022 the semiconductor body having collector, base and Related US. Application Data emitter regions and with at least two metals on said 3] continuationdmpan f M4590 Jan. 3, surface combining with the silicon to form an alloy of 1972, b d at least two metals and silicon which is in contact with the collector, base and-emitter regions and also ex- 1521 US. Cl 357/15, 357/46, 357/67 tends beyond the base region o form a S ottky bar- [51 Int. Cl. 11011 19/00 rier diode having a barrier height which is determined [58] Field of Search 317/234 L, 235 UA y the Composition f the l y- In the method, the alloy of at least the two metals in References Clted combination with the silicon is adjusted to modify the UNITED STATES PATENTS barrier height of the Schottky barrier diode so that a 3.609 472 9/1971 Bailey 317/234 barrier height can be chosen ranging between 3,616,380 10 1971 Lepselter Ct al. 317/235 and 3.623.925 ll/l97l Jenkins et al. 317/235 3,699,408 10/1972 Shinoda el al. 317/235 3 10 D'awmg F'gures .835 Pi. Si 0.86

lo 20 3O 4O 5O 6O 7O 8O 90 I00 PAIEm n mm 1 m4 sum 1 or 3 SCI-IOTTKY BARRIER DIODE SEMICONDUCTOR STRUCTURE AND METHOD CROSS-REFERENCE TO RELATED APPLICATION This application is a continuation-in-part of application Ser. No. 214,590, filed Jan. 3, 1972 now abandoned.

BACKGROUND OF THE INVENTION 1. Field of Invention This invention relates to the format-ion of Schottky barrier diodes and in particular the formation of such Schottky barrier diodes by the use of a platinel silicide.

2. Description of Prior Art In integrated circuits used for certain applications as, for example, primarily logic circuit applications, Schottky barrier diodes are used in conjunction with the base-collector junction in order to keep the transistor from going deeply into saturation during operation. Previously this has been accomplished by using gold diffusion and other approaches to decrease the carrier lifetime. Such Schottky barrier diodes improve the recovery time of a device and thus improve .the speed of the integrated circuit. Schottky barrier diodes have beenformed using an aluminum silicide. However, because of the Schottky barrier height, it has been difficult to provide a plurality ofsuch deviceswhich can be placed in operation allatthe'same timeas, for example, in a large integrated circuit. There. is, therefore, a need for a new and improved Schottky barrier diode.

SUMMARY OF THE INVENTION AND OBJECTS The semiconductor structure consists of a semiconductor body formed essentially of silicon and having a planar surface. Analloy of platinel silicide is formed on said surface on-predetermined areas thereof. Alayer of insulating material is disposed on the surface and contact means carried by said layer of insulating material extends through said surface and makes contact with said alloy of platinel silicide in said predetermined areas.

In the method for fabricating the semiconductor structure, a semiconductor body is provided which is formed essentially of silicon which has a planar surface. A layer of insulating material is formedon the surface and openings are formed in the layer of insulating material extending to said surface. A mixture of platinum and nickel isdepositedinto the openings. The-semiconductor body is heated to form an alloy between-the silicon and the platinum and nickelto form a ternary compound. The unreacted platinum and nickel inthe field is removed. Contacts are formed which are carried by the layer of insulating material and which extend through the openings in the layer ofinsulating material to make contact with said ternary compound in said predetermined areas.

In general, it is an object of thepresent invention-to provide a structure and method which provides a Schottky barrier diode.

Another object of the invention is to provide a structure and method of the above character which has a low Schottky barrier height and also a-low contact resistance.

Another object of the invention is to provide a structure and method in which it is possible to obtain substantially the same barrier height as with an aluminum system.

Another object of the invention is to provide a structure and method of the above character in which it is possible to adjust the barrier height between a predetermined range of .64 and .835.

Another object of the invention is to provide a structure and method of the above character which makes it possible to tailor the barrier height to the circuit design.

Another object of the invention is to provide a structure and method of the above character in which at least two metals are utilized in combination with silicon to form a ternary compound.

Another object of the invention is to provide a structure and method of the above character in which a ternary compound is formed.

Another object of the invention is to provide a structure and method of the above character in which the ternary compound is metallurgically compatible with both aluminum and gold interconnection systems.

Another object of the invention is to provide a structure and method of the above character in which the ternary compound is formed without going into a liquid phase.

Another object of the invention is to provide a structure and method of the above character in which the ternary compound is formed at a temperature of approximately 350C.

Another object of the invention is to provide a structure and'method of-the above character in which the Schottky diode hasan optimum barrier height value with an optimum size.

Another object of the invention is to provide a structure and method of the above character in which the Schottky .barrier diode can be utilized with a transistor to provide a Baker clamped transistor.

Additional objects and features of the invention will appear from the following description in which the preferred embodiment is set forth in detail in conjunction with the accompanying drawing.

BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a cross-sectional view of an RF sputtering system used in conjunction with the present method for fabricating a structure of the present invention.

FIG. 2 is a plan view showing the way in which a target is formed for use in the apparatus shown in FIG. 1.

FIGS. 3-8 are cross-sectional views of a semiconductor structure showing the steps utilized for fabricating a semiconductor structure of the present invention.

FIG. 9 is a circuit diagram showing the manner in which the Schottky barrier diode formed in FIG. 8 serves to provide a Baker-clamped" transistor.

FIG. 10 is'a graph showing Schottky barrier height as a' function of. platinum concentration in platinel silicide.

DESCRIPTION OF PREFERRED EMBODIMENT InFIG. 1 there is shown a bi-directional RF sputtering system which can be utilized for evaporating or sputtering the materials which are utilized in conjunction with the present invention. Thus, as shown in FIG. 1, a-housing 11 is provided with a chamber 12 adapted to be evacuated to provide the desired vacuum within the chamber. A substrate holder 13 is rotatably mounted in the chamber 12 and, if desired, is adapted to be rotated by means (not shown). RF power is supplied to the substrate holder 13 from a source 14 in the form of an RF power oscillator oscillating at a suitable frequency such as 13.56 ml-lz. The substrate holder 13 is adapted to carry a plurality of substrates l6 positioned on the upper surface of the substrate holder and facing a target 17 mounted within the chamber 12. The target.l7 is connected to the other side of the RF power supply 14. A pair of dark shields 18 are provided in the chamber and serve a function well known to those skilled in the art. A shutter 19 is rotatably mounted upon a spindle 21 which has a hand wheel 22 provided thereon so that the shutter 19 can be moved between two positions, one in which it is out of the way so that the target is exposed to the substrate holder, and another position in which the shutter 19 is disposed between the target 17 and the substrate holder 13.

A plan view of the target 17 is shown in FIG. 2. The target is formed of the materials which it is desired to evaporate to form the ternary compound utilized in connection with the present invention. Thus, the target 17 can be formed of two of the materials of the compound such as bulk nickel having an impurity of 99.9 percent with strips 26 of platinum formed thereon having an impurity of 99.99 percent. As hereinafter explained, the area covered by the platinum strips is precisely chosen so that there is a predetermined ratio between the exposed area of the nickel and the exposed area of the platinum.

The substrate 16 upon which the two materials are to be evaporate-d or sputtered in the apparatus shown in FIG. 1 can be of any suitable type. However, in connection with the present invention, it is desirable that the semiconductor structure be formed ofa semiconductor body 31 formed essentially of silicon. A buriedlayer (not shown) can be provided if desired. As shown in FIG. 3, this semiconductor body can be provided with a suitable impurity such as a P-type impurity. An epitaxial layer 32 is formed on the body 31 and also has a certain impurity therein such as an N-type impurity. The epitaxial layer 32 is provided with a planar upper surface 33 which is covered by a layer of suitable insulating material such as silicon dioxide.

Thereafter, by conventional techniques well known to those skilled in the art, the desired active and passive devices are formed in the epitaxial layer 32. Thus, as shown in FIG. 4, there can be provided an active device in the form of a transistor by forming a P-type region 36 in the layer 32 which is defined by a dish-shaped P-N junction 37 extending to the surface. Similarly, therev is provided an N-type region38 which has been diffused into the P-type region 36 and is defined by a dish-shaped P-N junction 39 also extending. to the surface 33. At the same time, an N+ region 41 is formed in the layer 22 to make contact to the collector region of the active device. 4

After the necesary diffusions have been carried out,

regions 38; and the openings 47 expose the base regions 39 and also are used for making the Schottky diodes as hereinafter described.

After the openings 44, 46 and 47 have been formed, the semiconductor structure which is shown in FIG. 3 is cleaned in the apparatus shown in FIG. 1 utilizing RF induced argon ion bombardment at 0.55 watts per sq. cm. for a period of approximately 3 minutes. During this time approximately 150 Angstroms of silicon are removed while only approximately Angstroms of silicon dioxide from the layer 43 are removed. This cleaning operation is carried out to ensure that there is no possible contamination on the surface of the silicon in the openings 44, 46 and 47.

As soon as the cleaning operation has been completed, the shutter 19 is moved into a position between the substrate holder and the target to protect the substrate 16 from the initial supporting from the target.

The semiconductor structures of the type shown in HO. 4 are positioned on the substrate holder 13 as shown in FIG. 1 with the openings 44, 46 and 47 facing the target.

After the shutter 19 has been moved into position between the substrate holder and the target, the target is cleaned to remove any oxidized or chemically contaminated portions of the target itself. The target itself is cleaned at a power density of 1.5 watts per sq. cm. for approximately 5 minutes. Approximately l500 Angstroms of material is removed from the target during this operation.

As soon as the cleaning operation has been completed, the shutter 19 is moved to an out-of-the-way position and material is deposited from the target over the entire surface of each of the substrates carried by the substrate holder to form a layer 51 on each of the substrates which overlies the surface of the same layer 43 and also extends into the openings 44, 46 and 47 to make contact with predetermined areas of the surface 33. The layer 51 can have a thickness ranging from 500 to 1000 Angstroms. However, a thickness of approximately 750 Angstroms is preferable to satisfy the chemical reaction hereinafter described.

As explained previously, the target 17 is formed of two materials so that an alloy of the two materials is formed having a predetermined proportion of the two materials. It has been found that in connection with the present invention it is desirable to provide an alloy of nickel and platinum in which the alloy is from approximately to percent nickel with the remainder being platinum. The preferred percentage has been found to be approximately 88 percent nickel and 12 percent platinum. To obtain the desired ratios, platinum strips 26 are resistance welded to the nickel target so that the platinum strips 26 represent approximately 12 percent of the area and the remainder of the target which is formed of nickel represents approximately 88 percent of the area. Since both materials have almost identical deposition rates when bombarded with RF acthe oxide layer 34 is preferably stripped and a new oxide layer 43 is grown on the surface 33 and by the use of conventional photolithographic techniques, openlugs 44, 46 and 47 are formed in the insulating layer 43 to expose-predetermined areas of the surface. Thus, it

can be seen that the openings 44 expose the collector contact regions 41; the openings 46 expose the emitter tivated ions of argon, the alloy which is formed of platinum and nickel and called platinel has the same ratio as the ratios of the areas which are exposed to the RF activated ions.

After the RF sputtering operation has been completed, the substrates are removed from the RF sputtering apparatus shown in FIG. 1 and are placed in a vacuum alloy furnace which is then pumped down to a vacuum which is less than 5 X l0 Torr. The substrate is then heated to a temperature which is 350C and above to possibly as high as 900C with the preferable temperature being approximately 450C. When a temperature of 450C is utilized, the temperature is maintained for means in the form of leads 56, 57 and 58 which extend into the windows or openings 44, 46 and 47 and make contact with the ternary alloy regions 52 overlying the collector contact, emitter contact and base contact approximately 2 minutes. A solid-solid reaction takes 5 areas as shown lhFlGr AS Will also be noted from place when all the available platinel is consumed or, in 9 the Platlhel Slllclde legion 52 Contacting the other words, reacts with the silicon in the windows or ase region 39 al ex ends to he right f th ba e reopenings 44, 46 and 47 to form a ternary compound gion and makes contact with the epitaxial layer 32 and which can be identified as a platinel silicide alloy. In thus effectively shorts the base to the collector of the this reaction, it is important that the reaction not pass 10 ctive e ice s Shown n FlG. 8 which can be identithrough a liquid phase but that it all take place in the fied as a transistor T through what can be termed the solid phase. In connection with this alloying operation, Schottky barrier diode D. The Schottky barrier diode it is desirable to keep the temperature as low as possiis formed by the portion of the alloy 52 to the right of ble because this has the least effect upon the active and the base region 36. The Schottky barrier diode operpassive devices which may be formed in the substrate ates in a manner well known to those skilled in the art and also because it simplifies cooling of the substrates. to continuously bleed off the majority carriers which Although it has been stated that the alloying operaare electrons so that the collector is not permitted to tion should be carried out in a separate alloying fursaturate nace, it should be appreciated that if desired, the alloy- A Schematic representation of the effect of the ing peration can also be carried out in {he sputte u SChOflky barrier diode is shown in 9 in Which the ing apparatus shown in FIG. 1 even though greater dif- Schottky barrier dlode Serves to p 3 Bakerficulty may be encountered in cooling the substrat clamped transistor which will not operate far into satuf r th ll i operation h b l d, ration thereby enhancing circuit speeds and noise char- The platinel combines with the silicon to form the aeteristles for the deviceternary alloy regions 52 as shown in FIG. 6. It has been It has been found that the use of the platinel silicide found that this reaction is almost instantaneous and for is very desirable in the present semiconductor structure this reason only a very small amount of time is required because all Optimum baffle-r height Value g g from for the reaction atavery low temperature. It is believed bet een -68 to -75 and preferably .7 electron volts is that this is possible because there is involved a solidprovided. t the Same time that this optimum barrier solid interfacial reaction between metals representing height Value is ng Obtained, it is Possible to p im ze atomically clean surfaces or, in other words, in which the size Of the Schottky barrier diode S0 that it can be h i t f are not t i t d relatively small while still having the desired thermal During the alloying operation, it is found that the stabilityalloy of nickel and platinum or, in other words, the y y ofexamplerthe Presentlhvelllloh was used to platinel combines with approximately equal amounts of P the all'alumlhum metallurgy Plevlously lhcol' silicon so that the ternary alloy has a compositio porated in the Signetics 7400S series of integrated cirwhich is approximately 50 p ent sili d 37% t cuits. This device used Baker-clamped transistors and 45 percent nickel with the balance being p]atinum thus BVOidS the problems of gold diffusion. it has been Thus, when the platinel is formed of 88 percent nickel found that mpr yi ds n be tain using he and 12 percent platinum, the ternary alloy will have 50 platinel silicide. Typical parameters of platinel silicide percent ili 44 percent i k l d 6 percent l i- Schottky barrier diode transistors are as follows: It also i been folind that h depth to which the Internal Overlay Schottky Barrier Transistor ternary alloy ls formed is determined by the depth of the original layer 51. Thus, if the layer 51 is deposited Beta at 100 is 80 to a depth of 1000 Angstroms, the silicon will be re- Voltage Offset at l F 15 335 mv acted with the platinel to a depth of approximately Voltage, base Collector at l M l5 350 mv 1000 An stroms.

After tl le ternary alloy 52 has been formed, the plati- OUTPUT GUARD RING SCHOTTKY BARRIER nel is removed from the field or, in other words, in any TRANSISTOR area in which the platinel was not in direct contact with Voltage Offset at 1 1A is 300 mV silicon. This is accomplished by the use of a suitable Voltage, base to collector at l A is 320 mV material such as sulphuric acid consisting of three vol- A Schottky barrier height of 0.70 electron volts is umes of H 0 with 7 volumes of H 50 The platinel silconsistent with integrated circuit design rules for Bakicide is inert to this solution and is not affected by it. 55 er-clamped transistors using Schottky'barrier diodes. In After the undesired platinel has been removed as addition, the contact resistance of the platinel silicide shown in FIG. 7, a suitable metal such as gold or alumito P-type silicon having an impurity concentration of num is evaporated over the insulating layer 43 and into 10" at cm is low. These physical qualities make the the openings 44, 46 and 47. Thereafter, the undesired platinel silicide superior to the non-alloy silicides for portions of the metal are removed by suitable photocircuit applications as can be seen from the table set lithographic techniques so that there remains contact forth below:

Metal Silieide Rc (P-Si. 10'" cm) o (N-Si, lO' cnl, l00

Plaiincl l0'-' ohms 0.70 uV Platinum l0 ohms 0.80 e\' Nickel l0 ohms 0.67 c\' Aluminum 5X10 ohms 0.73 c\' Rhodium l ohlll 0.70 c\' As can be seen from the table, platinum forms an unusually excellent ohmic contact to silicon. However, its

Schottky barrier height when formed as platinum silicide, is unusually high, being approximately .835 electron volts in less than 10 atoms per cm N-type silicon; Nickel, on the other hand, when reacted with silicon has quite a low Schottky barrier height, approximately .64 electron volts with the N-type silicon but its contact resistance to other doped silicon, particularly P-type, is very, very high. Platinel, when combined with silicon to provide the platinel silicide, provides the desired low contact resistance and the optimum Schottky barrier height.

In the embodiment of the invention shown in FIG. 8, the low contact resistance to P-type silicon is particularly significant with respect to the base which is doped with a P-type impurity. It also would be particularly important for diffused resistors (not shown) which also would be doped with P-type impurities. It can be readily appreciated that if the contact resistance was high, the V saturation levels of the transistor would be too high for normal device operation and, in addition, the values of the resistors would be changed so that the device would not operate as intended and possibly would not operate at all. Thus, the use of the platinel silicide provides the desired low contact resistance while at the same time providing a Schottky barrier height within certain limits to provide normal clamping operations.

The platinel silicide produced by the present invention should be suitable for use in practically all integrated circuits and even in discrete devices. in addition, it also could be used as a replacement for theplatinum silicide in the classical beam lead metallurgy structure giving the advantage that it does have a .low Schottky barrier height which can be used in circuitry where this is of importance. I

The platinel silicide does not differeintrinsically in electrical aspects from aluminum but is advantageous principally because it is easy to fabricate semiconductor structures using the same while obtaining a very high yield even where there are large numbers of junctions in the device. One of the principal reasons it is possible to obtain a higher yield is that it is much easier to sputter the platinum and nickel than it is aluminum.

Because of the characteristics of the platinel silicide, it will operate very effectively with either gold or aluminum bonding systems.

It has been found that when the platinel is reacted with silicon having a l00 orientation with respect to the surface plane of the silicon semiconductor body. the resultant alloy is inert to sodium hydroxide and potassium hydroxide so that the platinel silicide can be utilized as a very effective anisotropic etch mask. Anisotropic etchants such as potassium hydroxide are utilized in conjunction with certain buffers or sodium hydroxide itself to etch the silicon.

In conjunction with the foregoing, the principal purpose was to provide a platinel silicide which would make it possible to obtain the same barrier height as could be obtained with a conventional aluminum system which is .70 electron volts in 1 1 l silicon. It now has been found that this .70 electron volt figure may not be optimum for the best possible electronic design for integrated circuits. In order to achieve the optimum electronic design for an integrated circuit, it has been found that it is particularly desirable to be able to adjust the barrier height between .64 and .835 electron volts. In the platinel silicide system, it has been found that an optimized barrier height is .75 electron volts which is particularly advantageous in the design of certain integrated circuits.

In carrying out this work, a graph was developed as shown in FIG. 10 which shows the relationship of platinel silicide Schottky barrier height as a function of the platinum concentration for a guard ring diode with V, measured at 10 uA in 1 11 oriented silicon. As can be seen from FIG. 10, a percent nickel silicide has a barrier height of .65 electron volts which is at the lefthand side of the graph in FIG. 10. By adding platinum to the composition, it can be seen that the barrier height increases until it reaches .835 electron volts at 100 percent platinum. The curve in the graph shows that there is, a very rapid change as platinum is added to the composition of the range from zero to 10 percent platinum and that from 10 percent platinum to 100 percent platinum, there is approximately a straight line re lationship. From the graph, it can be seen that by utilization of the present invention, a selected barrier height can be chosen ranging from .64 to .835 electron volts depending upon the composition.

This is a very important feature because it makes it possible for the circuit designer to optimize the geometrical requirements and theelectrical requirements of the integrated circuit and then tailoring the barrier height to fit these requirements. Since this is possible, .it is possible to reduce the size of the clamping device very significantly as, for example, by a factor of 2 or 3, by virtue of the lowering of the barrier height while still maintaining a usable series resistance.

Although the disclosure herein is primarily directed to the use of nickel and platinum, it should be appreciated that any two metals can be utilized which will combine with silicon to make it possible to adjust the barrier height. in addition, it should be appreciated that it should be possible to utilize more than two metals as, for example, 3 or 4 metals to obtain similar features.

It is apparent from the foregoing that there has been provided a new and improved semiconductor structure in which platinel silicide is utilized as a Schottky barrier diode and method for making the same in which optimum Schottky barrier heights are obtained with good contact resistance. With the method, it is possible to obtain very high yield even in complicated circuits. In addition, it is possible to adjust the barrier height between .64 and .835 electron volts to permit a circuit de signer to optimize the electrical and geometrical requirements of the circuit and then tailoring the barrier height to meet these requirements.

I claim:

1. In a Schottky barrier diode semiconductor structure, a semiconductor body formed essentially of silicon and having a surface, an insulating layer formed on the surface and having an opening therein exposing a portion of the surface, a ternary alloy formed in said opening, said ternary alloy being formed of platinum and nickel and silicon of the semiconductor body to provide a Schottky barrier diode with a barrier height ranging from approximately .64 to approximately .835 electron volts as determined by the composition of the ternary alloy and in which the ternary alloy is comprised of approximately 50 percent silicon with nickel ranging from approximately 37 1% to 45 percent of the alloy and with platinum constituting the balance.

2. In a Schottky barrierdiode semiconductor structure, a semiconductor body formed essentially of silicon having a surface, an active device formed in said semiconductor body having collector, base and emitter regions extending to said surface, an insulating layer formed on said surface and having openings therein exposing areas of said surface having portions of said collector, base and emitter regions extending thereto, a ternary alloy formed in said openings which is an contact with the collector, base and emitter regions and which also extends beyond the base region to form a Schottky barrier diode, said ternary alloy being formed of at least two metals and silicon on said semiconductor body to provide a barrier height which is determined by the composition of the alloy, said at least two metals being platinum and nickel and having a relationship of approximately percent platinum and 75 percent nickel, said barrier height being approximately 0.75 electron volts and leads on said insulating layer extending into said openings and making contact with the ter' nary alloy in said openings.

3. In a Schottky barrier diode semiconductor structure, a semiconductor body formed essentially of silicon having a surface, an active device formed in said semiconductor body having collector, base and emitter regions extending to said surface, an insulating layer formed on said surface and having openings therein exposing areas of said surface having portions of said collector, base and emitter regions extending thereto, a ternary alloy formed in said openings which is in contact with the collector, base and emitter regions and which also extends beyond the base region to form a Schottky barrier diode, said ternary alloy being formed essentially of platinum, nickel and silicon in which silicon comprises approximately 50 percent of the alloy, nickel comprises approximately 37 a to 45 percent of the alloy and platinum constitutes essentially the balance of the alloy, said ternary alloy providing a barrier height which is determined by the composition of the alloy and leads on said insulating layer extending into said openings and making contact with the ternary alloy in said openings.

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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3968019 *Mar 21, 1975Jul 6, 1976Hitachi, Ltd.Method of manufacturing low power loss semiconductor device
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US4545116 *May 6, 1983Oct 8, 1985Texas Instruments IncorporatedMethod of forming a titanium disilicide
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US4946803 *Dec 8, 1988Aug 7, 1990North American Philips Corp., Signetics DivisionMethod for manufacturing a Schottky-type rectifier having controllable barrier height
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EP0118158A2 *Mar 5, 1984Sep 12, 1984Philips Electronics N.V.Programmable read-only memory structure and method of fabricating such structure
Classifications
U.S. Classification257/479, 257/E21.608, 204/298.26, 257/E27.4, 257/486, 204/192.25
International ClassificationH01L27/07, H01L21/288, C23C14/58, H01L21/00, H01L21/8222
Cooperative ClassificationH01L21/00, C23C14/58, C23C14/5806, C23C14/5893, H01L21/8222, H01L27/0766
European ClassificationH01L21/00, C23C14/58, H01L27/07T2C2S, C23C14/58B, H01L21/8222, C23C14/58N