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Publication numberUS3858703 A
Publication typeGrant
Publication dateJan 7, 1975
Filing dateNov 12, 1973
Priority dateJan 5, 1973
Also published asUS4400102
Publication numberUS 3858703 A, US 3858703A, US-A-3858703, US3858703 A, US3858703A
InventorsDuley Howard
Original AssigneeCentronics Data Computer
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Bidirectional dual head printer
US 3858703 A
Abstract
A high-speed impact printer of the dot-matrix type employing at least first and second print head assemblies for printing characters or other symbols in line-by-line fashion upon a paper document. In the dual head embodiment each print head assembly prints substantially one-half of the line of characters or symbols and both heads operate simultaneously during the print mode. The print mode is such that printing of every other line occurs as the print heads move from left to right and printing of the interspersed lines occurs as the print heads move from right to left after having completed the previous line of characters or other symbols. Novel electronics are provided to accomplish the above printing modes. The multiple head printer may also be employed in a graphics mode. It is further possible to employ more than two heads, for example, three or more, in either the printing or graphic modes, if desired. The printer has the further capability of "half-step" printing.
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Jan. '7, 1975 ABSTRACT BIDIRECTIONAL DUAL HEAD PRINTER me am wm m [SHJOT S p .m m flds l u anam b m mb m m. m m d S a e m h u dh nt 6 foo h 0 OCT. t m flm n a fla D. C h aac m o p pm m e en l nm dtn ea e Th0 p $b afmr m BB .W lm n hP l m vxm AeMbh nr m C r e u P S dm 0 H C, vfl 3 m w m l h dn 2 m m 1 w m m v u 0 0 HCHN may l d w w k MA F 3 U 77 2 substantially one-half of the line of characters or sym- [2l] Appl. N0.: 414,645

bols and both heads operate simultaneously during the print mode. The print mode is such that printing of as the print heads move from g of the interspersed lines oc- [52] US. 197/1 R every other line occurs [51] B4lj l/34 left to right and printin move from right to left after revious line of characters or other symbols. Novel electronics are AQUVP 6 a em d mm em ho C 8 2. mm TV ua Ch 06 5 72 ,7 5H 7 0 W4 43 3., R3 19 71 90 h C r a e S f 0 d l e .1 F m 5 provided to ache multiple head References Cited UNITED STATES PATENTS complish the above printing modes. T printer may also be employed in a further possible to employ more example, three ormore, in eithe graphics mode. It is th an two heads, for r the printing or printer has the further graphic modes, if desired. The capability of half-step printing.

Primary Examiner-Robert E. Bagwill Assistant Examiner-R. T. Rader 13 Claims, 38 Drawing Figures Attorney, Agent, or FirmOstrolenk, Faber, Gerb & Soffen l llllll PATENTEUJAH H975 $358,708

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PATENTED JAN 71975 sum m or 14 BIDIRECTIONAL DUAL HEAD PRINTER The present invention relates to line printers and more particularly to a novel multiple head line printer device wherein the heads are arranged in spaced fashion and are simultaneously performing print operations as well as being capable of printing in both the forward and reverse feed directions.

BACKGROUND OF THE INVENTION Wire matrix printers are becoming increasingly more important and more useful in the field of high-speed document printing. Printers of this type are extremely advantageous for use in conjunction with computers, data terminals, communication systems and the like, wherein it is desired to provide a print-out of the data either received or converted and compiled by a computer.

One extremely advantageous wire printer of the dotmatrix type is described in U.S. Pat. No. 3,703,949 issued Nov. 28, 1972 and assigned to the assignee of the present invention. The wire matrix printer described therein is comprised of a carriage assembly which supports a print head assembly carrying a plurality of solenoid driven print wires. The print head assembly, including the solenoid drivers, is moved transversely across a paper document, usually at a constant rate of speed. The arrangement of the print head assembly is such as to provide a lightweight compact structure and to minimize the mass which is moved across the paper document, enabling the structure to move at relatively high speed. The location of the print head assembly at any given instant is detected by a position read-out or registration assembly which permits print-out at any given location regardless of the speed at which the print head assembly is being moved and, even deviations of the speed of movement will not affect or reduce the registration quality.

The print head assembly is arranged preferably so as to align the print wires which impact the paper document along an imaginary straight line which is typically arranged in vertical fashion. The print head assembly moves from left to right in the printing phase with the solenoids being selectively operated so as to print any combination of dots" upon the paper document,

which dots are typically formed by causing the free ends of the print wires to be impacted against an inked ribbon so as to form dot patterns upon the paper document. Combinations of the dot patterns (i.e., vertical rows of the dot patterns) cooperatively represent a character or other symbol. The printer described in the above-mentioned United States patent is capable of printing up to 132 characters per line of print. Upon the completion of printing of a line, the print head is moved from the right toward the left, preferably at a carriage return speed which is greater than the speed at which the print head assembly is moved during the print' operation. This time interval thus constitutes a dead time interval since no printing occurs during a carriage return" operation.

Although the aforementioned wire matrix printer provides reasonably good operating speeds, continued efforts have been made to improve the state of the art in order to advance printing speeds measurably. The wire matrix printer of the above-mentioned U.S. Pat. No. 3,703,949 is capable of printing a line of 132 characters at a rate of the order of 60 lines per minute (for full 132 character lines). Whereas thisoperating speed may be useful for certain applications, it is still nevertheless desirable to provide a capability of printing at ever increasing speeds.

BRIEF DESCRIPTION OF THE INVENTION The present invention is characterized by providing a novel multiple print head wire matrix printer which retains all of the advantageous features of the single print head printer embodied in the aforementioned US. Pat. No. 3,703,949 but, due to its significantly increased capability, is capable of printing at speeds of lines per minute for full 132 character lines, which is an output speed more than double that ofthe printing capabilities of the wire matrix printer disclosed in the abovementioned US. Pat. No. 3,703,949.

The printer of the present invention is comprised of a printer housing having means movably'mounting at least first and second p'fint head assemblies which are moved in a direction transverse to the direction of feed of the paper document and which are moved simultaneously so as to affect the simultaneous operation of the plurality of print head assemblies. In the preferred embodiment incorporating first and second print head assemblies (i.e., in the dual head printer), each print head operates to print one-half of a line of characters. In operation, the dual print heads are initially moved to their left-hand most positions and move from left to right as the printing operation of the first line of charac ters is initiated. As soon as the dual print heads reach their extreme right-hand most positions, a paper feed operation is performed, causing the paper document to be advanced in preparation for printing the next line of characters. At this time, the dual head assemblies are moved toward the left from their right-hand most positions and printing of the second line of characters is initiated as the dual heads move from the right toward the left. It can thus be seen that printing occurs in both di rections, eliminating the need for a carriage return operation. In this manner, every-odd line of characters is printed by moving the dual head assemblies from left toward the right while every even (interspersed) line of characters is printed by moving the dual head assemblies from the right toward the left.

Even greater operating speeds may be obtained through the use of the same concept and by increasing the number of individual print head assemblies to a number greater than two thus even further enhancing operating speeds. Y

The printer of the present invention, in order to assure absolute registration of each vertical column of dots printed by each of the print head assemblies, employs a registration means which is comprised of a registration strip having a plurality of substantially equispaced narrow substantially transparent slits. The registration strip is mounted in a stationary fashion and has a length which is physically about one-half the length of the line of characters about one-half the length of the line of characters to be printed. The number of slits provided in the registration strip is of a magnitude approximately equal to at least one-half the total number -od characters which may be printed on a line multiplied by the number of vertical dot patterns employed to represent any given character. In one preferred embodiment, each print head assembly is provided with seven slender print wires whose impact ends are arranged along a vertically aligned imaginary straight line. Nine closely spaced vertically aligned dot patterns cooperatively form each character or symbol with the dots of the 9x7 matrix being selectively formed to represent any given character or symbol. Since the vertically aligned dot columns are very closely spaced to one another, it is not possible, as a practical matter, to provide vertically aligned transparent slits in the registration strip with such close spacing. As an alternative therefore, the registration strip is provided with only five closely spaced vertically aligned transparent slits for each character with the slits being sufficiertt in number to control the printing of five of the nine columns employed to form each character. The electronics of the printer, however, is designed to provide for half-step printing whereby the electronic logic initiates formation of vertical dot columns at half-step locations between the five registration slits. Thus, it is possible through the system logic to create half-step dot patterns at four positions interspersed between the five registration slits to create a 7-row by 9-column matrix of dots with those particular dots selected being adapted to represent any desired character of symbol.

The printer electronics includes shift register means having a capacity sufficient to store up to 132 characters or other symbols plus a dummy character. After the shift register is loaded with the dummy character and the number of characters to be printed for a particular line (either 132 characters or some lesser quantity) means are provided for shifting the characters in the shift register, which is of the recirculating type, a sufficient number of places so as to move the binary code representing the first character to be printed by the right-hand print head assembly (i.e., the print head assembly which is designed to print the right-hand portion of a line of characters) into the right-hand most stage of the shift register. In the recirculating mode of the shift register all those characters which pass out of the right-hand most stage of the shift register are reinserted into the left-hand most stage so that all of the characters originally loaded into the shift register are retained therein at least until a full line of characters is printed. The binary coded combination now' in the right-hand most stage of the shift register is then applied to a buffer stage to temporarily store this first character. Immediately thereafter, the shift register then undergoes a sufficient number of shift operations so as to place the binary coded representation of the first character to be printed by the left-hand print head assembly (i.e. the print head assembly adapted to print the left-hand half ofa line of characters) into the righthand most stage of the shift register.

The coded representation for the character to be printed by the right-hand print head assembly is transferred from temporary storage to the character generator for generating the left-hand most or first dot column for that character without erasing the character from the temporary storage. The information developed by the character generator representing the first dot column to be printed by the right-hand print head assembly is temporarily stored in a second buffer means. Thereafter, the coded representation of the character to be printed by the left-hand print head assembly and which is located in the right-hand most stage of the shift register is then applied to the full-step character generator causing it to develop the first dot column pattern for the character to be printed by the left-hand print head assembly. The output of the character generator at this time, simultaneously with the output of the character generator just previously stored is simultaneously caused to enable both left and right-hand print head assemblies to print the first or left-hand most dot column for the first character to be printed by each of these print head assemblies. This completes the first full step dot column.

Immediately thereafter and between the first two adjacent vertically aligned registration slits, the timing of the system logic causes the binary coded representations of the first character to be printed by the left and right-hand print head assemblies to be sequentially applied to the half-step character generator which causes the dot column pattern for the first half-step dot column of the right-hand character to be printed to be generated. by the half-step character generator and temporarily stored in the second buffer means. Immediately thereafter, the binary coded representation of the character to be printed by the left-hand print head assembly and which is stored in the right-hand most stage of the shift register, to be applied to the halfstep character generator. The first half-step vertical dot patterns are then simultaneously applied to the print head assemblies to develop the first half-step dot column pattern. This technique is repeated for the four remaining full-step dot patterns and the three remaining half-step dot patterns thereby completing the simultaneous printing of the first character of both the right and left print head assemblies. The shift register is then shifted the appropriate number of steps to shift the binary coded representations of the second characters or symbols to be printed by the left and right-hand print assemblies to again cause the printing of the second character by each print head assembly. This operation is repeated until both of the left and right-hand print head assemblies complete the printing of an entire line. After completion of the first entire line, the right-hand-most print head assembly will have moved to the extreme right-hand end of the paper document while the lefthand print head assembly will have moved to a location substantially equal to half the width of a full line of characters on the paper document. At this time, the shift register will be operated so as to permit the dual head assemblies to print the next line of characters while the print head assemblies move from the left to the right, thereby totally eliminating the need for a conventional carriage return operation which, for example, is the type of operation employed in the aforementioned US. patent.

In printing operations wherein the plurality of print head assemblies move from the right toward the left, the shifting operation imposed upon the shift register is substantially the same in nature as the shifting operations imposed upon the shift register in cases where the plurality of print head assemblies move from left to right. However, the logic of the system is adapted to automatically transfer dot column patterns in the reverse order during printing operations in which the plurality of print head assemblies move from the right to the left. Thus, the binary coded representations of the characters or symbols to be printed are transferred to the full and half-step character generators in the same manner as was previously described. However, the distinction in printing with the print head assemblies moving from right to left is such that the right-hand most dot column patterns of the characters to be printed by the print head assemblies are the first dot column patterns to be transferred to the print head assemblies, therefore the dot column patterns for the characters to be printed by the print head assemblies are transferred to the print head assemblies in the reverse order from that employed during printing operations in which the print head assemblies move from the left to the right. The electronic logic of the system is such as to immediately recognize the direction of movement of the print head assemblies in order to automatically and properly transfer the appropriate dot column pattern to the print head assemblies.

Regardless of which direction the print head assem blies move, each full-step dot column pattern is printed when the registration system detects the presence of a transparent registration slit. The electronics of the system functions to control the printing of each half-step dot column pattern which necessarily will be positioned between a pair of adjacent transparent registration slits representative of full-step dot column positions. The registration system further includes a light source and a light sensitive detector mounted upon the carriage assembly which moves the plurality of print head assemblies. A signal is generated by the movement of the optical pickup head and light source moving across the vertically aligned registration strip which consists ofa series of alternately transparent and opaque slots. At each transparent slot the signal developed is amplified and shaped to generate a strobe pulse that initiates the timing for the printing of each character. The strobe pulses are counted (there are six pulses per character) and a decoder provides a plurality of individual states which are employed for the dotcolumn positions of the dot matrix. The strobe also undergoes a delay to develop a signal called delay strobe which enables the time sharing between two character generators. This allows the dot column patterns in the halfstep positions to be inserted between the five fullstep positions to provide better definition in character formation.

The carriage assembly is slidably mounted upon guide means and is provided with means for supporting and accurately positioning the plurality of print head assemblies upon the carriage assembly. Various adjustment mechanisms are provided for each print head assembly to assure its correct alignment, as well as its alignment relative to the other print head assemblies. The driving force for the carriage assembly consists of a closed loop belt drive wherein the timing belt is entrained about a drive pulley and a driven pulley with the free ends of the timing belt being fixedly secured to opposite ends of the carriage assembly to thereby form a closed loop for the timing belt. Single motor means are employed for driving the carriage assembly in both the forward and reverse print directions with clutch means being provided to move the carriage assembly alternatively in the forward and reverse directions as each succeeding line of characters is completed. An electromagnetic brake means is employed for abruptly terminating the movement of the carriage assembly as it arrives at each of its extreme left and right-hand most positions.

The single motor means is further employed as the driving means for imparting all other forms of mechanical or physical motion such as, for example, paper feed (i.e., line feed), form feed and ribbon feed.

It is therefore one primary object of the present invention to provide a high speed impact printer of the dot matrix type employing a plurality of simultaneously operating print heads which cooperatively function to print each line of characters.

Another object of the present invention is to provide a novel impact printer of the dot-matrix type in which printing is performed by the print head assemblies regardless of the direction in which the print head assembly is moving as as to totally eliminate the need for conventional carriage-return" operations.

Still another object of the present invention is to provide a novel high-speed impact printer of the dotmatrix type in which half-step" dot patterns may be generated to significantly improve the resolution of characters or other symbols to be printed.

Still another object of the present invention is to provide a novel high-speed impact printer of the dotmatrix type employing a simplified and yet highly reliable mechanical driving means for the rapid and accurate movement of the print head assemblies, as well as for performing all other mechanical functions such as paper feed and ribbon feed operations.

BRIEF DESCRIPTION OF THE FIGURES The above as well as other objects of the present invention will become apparent when reading the accompanying description and drawings in which:

FIG. 1 is a perspective view of a printer incorporating the principles of the present invention.

FIG. 2a Zq show schematic diagrams of logical control circuitry employed to operate the printer of FIG. 1.

FIGS. 3a 3d is a logic circuit diagram which shows the circuits for storing data to be printed by the printer of of FIG. 1.

FIG. 3b shows a logic diagram of the latch circuits for temporarily storing the character to be ultimately transferred to the right hand print head.

FIG. 30 is a logic diagram showing the character generators used to generate full and half step dot column patterns.

FIG. 3d shows the latch circuitry for temporarily storing the dot column pattern used to operate this righthand print head.

FIGS. 404d, 4h and 4k-4m logical circuit diagrams of the circuitry employed to control the operation of the shift register, character, generators and latch circuits of FIGS. 3a3d.

FIGS. Sa-Sd are logic diagrams of the logical circuitry employed to control print head movement.

FIGS. 6a and 6b are logic diagrams showing the logical circuitry employed to control paper document movement.

FIG. 7 shows a flow diagram of the operation of the printer of FIG. I and its logical circuitry.

DETAILED DESCRIPTION OF THE FIGURES FIG. 1 shows a simplified version 1MB of the printer which comprises first (A) and second (B) print head assemblies 101 and 102 mounted upon carriages 103 and 104 respectively, which, in turn, are mechanically joined by coupler 105 so as to move in unison. Each print head assembly is provided with seven solenoids each utilized to selectively print seven vertically aligned dots. Copending application M-7l27 shows a typical print head construction. The carriages are secured to a closed loop timing belt 106 as shown at 07. Belt 106 is driven by a motor M whose output is selectively coupled to belt 106 by either forward clutch 108 or a reverse clutch 109.

An inked ribbon 110 is positioned in front of both print heads 101 and 102 and spans paper document 111. The selective energization of solenoids S of the two print heads causes the ribbon to inpact the paper document 111 and form the dot column patterns.

The print heads each form characters or other symbols, each printing nine dot columns which collectively form a character. The carriages 103-104 ride along guide tracks 112 (only one is shown in FIG. 1) in moving in the forward and reverse directions.

The registration or accurate placement of the dot columns is assured by a photo-sensing device comprised of a light source and phototransistor (not shown) which cooperates with a registration strip 113 having vertical slits 113a. The light source and phototransistor are positioned on opposite sides of registration strip 113 to generate video pulses whenever they are aligned with one of the slits 113a to permit full-step dot columns to be printed. Half-step dot columns are printed in between adjacent slits 113a under the control of a logic circuit to be more fully described.

The paper document is moved in the direction of arrow 114 by pin feed mechanism 115 and 116 under control of form feed, line feed and top of form signals to be more fully described. The pin feed mechanisms are selectively coupled to the motor M through clutch mechanisms (not shown for purposes of simplicity) which are activated to provide the appropriate paper movement.

The printer, in addition to providing simultaneous operation of the print heads 101 and 102, also provide for printing in the forward (left to right) direction, as well as the reverse (right to left) direction. Although the data representing the characters and other symbols to be printed is always entered into the printer member in the same order, logical circuitry is provided to assure that the correct dot column patterns are applied to the print heads regardless of the direction of movement of the print heads.

FIG. 3a shows the shift register 300 comprised of four register sections 301-1 through 301-4 which are cooperatively capable of storing 132 8-bit data words plus a dummy character to provide a large plurality of character combinations representing characters, symbols and other special functions. It should be understood however that the register length (i.e., the number of stages and the number of registers) may be modified to be either greater or lesser in number than that specitied hereinbelow to accommodate either more complex or simpler applications. The dummy character, which is a ONE at DS8, when detected at the output stage indicates that the register is full or that loading of the register with less than a full line of 132 characters has been completed.

Each data word is fed in in parallel at the inputs 302-1 through 302-8, respectively. Input 303 serves as the input terminal for shifting each data word applied to input terminals 302 into the left-hand most stages of the shift register sections 301, as will be described in more detail hereinbelow.

Since each of the register stages are substantially identical to one another, some of the stages have been omitted from FIG. 3a for purposes of simplicity, it being understood that their design and operation is the same. Considering register section 301-1, it is capable of storing 133 pairs of bits and, upon the application of each shift pulse, loading the pair of bits of the data word applied to input terminals 302-1 and 302-2 into its left-hand most stage, while shifting all previously loaded pairs of bits one stage to the right. Shift register section 301-1 is provided with output terminals 304-1 and 304-2 for coupling the contents of its right-hand most stage to other circuitry. These output terminals are coupled, in turn, to respective amplifier stages 305-1 and 305-2, respectively, whose outputs are simultaneously coupled to the output terminals TB1 and TB2, respectively, for coupling to the inputs of other electronic hardware to be more fully described and further for feeding back the pair of bits appearing in the right-hand most stage back to the left-hand most stage of the two-bit register section so as to provide a recirculating shift register. In this respect, the outputs of am plifiers 305-1 and 305-2 are coupled to leads 306-1 and 306-2, respectively, which are coupled to the recirculation inputs 307-1 and 307-2, respectively, for feeding back the contents of the right-hand most stage of the shift register into the left-hand most stage thereof. The input of an SRCL signal at terminal 308 is coupled to inputs 307-1 through 307-8 to operate the register in the recirculate mode. Clearing of the shift register is accomplished by loading space codes to clear all stages of the shift register 300 when it becomes necessary to do so, with the circuitry employed therefore to be more fully described hereinbelow.

FIG. 3b shows the buffer register employed for temporary storage of the data word to be ultimately employed for operating the right-hand or B print head assembly (in a manner to be more fully described). The buffer register 310 is comprised of 8 bistable flip-flop stages 311-1 through 311-8, each being capable of storing one of the 8 binary bits transferred thereto from the right-hand most stage of shift register 300 shown in FIG. 3a by means of the output terminals TB1-TB1 respectively.

Since all of the bistable flip-flop stages are substantially identical in both design and operation, only one will be described herein in detail for purposes of simplicity. Also, it should be understood that some of the flip-flop stages have been omitted from FIG. 3b likewise for purposes of simplicity. The output terminal TB1 is sumultaneously coupled to input terminal 311-1a of bistable 311-1 and to one input of AND gate 312-1, there being one such gate 312-1 through 312-8 associated with each of the remaining bistable stages. The remaining inputs of the stages 312-1 through 312-8 are coupled in common to lead 313 which receives the signal CATCG which is generated for a purpose to be more fully described hereinbelow.

Bistable 311-1 has its output 311-1b coupled to one input of AND gate 314-1,there being a similar such AND gate 314-2 through 314-8 associated with each of the remaining bistables 311-2 through 311-8, respectively. The remaining input of each of the gates 314 are coupled in common to lead 315 which receives signal LBD which is generated for a purpose to be more fully described.

The outputs of gates 312-1 and 314-1 are each coupled to respective inputs of OR gate 316-1 whose output is coupled to inverter stage 317-1 (noting that a similar OR gate and amplifier is provided for each of the remaining bistables 311-2 through 311-8, respectively). The outputs of each of the inverters 317-1 through 317-8 appear at output terminals CHADDI CI-IADDS for application of the output of the amplifiers to the respective input stages of the appropriate character generator circuits, as will be more fully described in connection with FIG. 3c.

In operation, the 8-bit data word appearing in the right-hand most stage of shift register 300 is coupled through outputs TBl-TB8 and is either passed by gates 312-1 through 312-8 when the signal CATCG is present so as to be passed through the respective OR gates 316 and amplifiers 317 and appear at outputs Cl-IADD1- CHADD8, or alternatively to be loaded into the bistables 311-1 through 311-8 in the presence of the signal LFFB which is selectively applied to terminal 318. Thus, the 8-bit word appearing in the righthand most stage of shift register 301 is either passed directly to output leads CHAID1 CI-IADD8 or is temporarily stored in bistables 311-1 through 311-8 and at some later time is gated out by LBD through gates 314 and 316 for a purpose to be more fully described hereinbelow.

FIG. 30 shows the full-step and half-step character generators 320 and 325, respectively. Each of these character generators have a first set of input terminals 320a-1 through 320a-6 and 325a-1 through 325a-6, respectively, a second set of input terminals 32011-1 through 32012- and 32512-1 through 325b-5; and a set of output terminals 3200-1 through 3200-7 and 3250-1 through 3250-7, respectively. Input sets 320a-1 through 320a-7 and 325a-1 through 325a-7 are coupled in common to the associated leads Cl-IADD1 through GFIADD7 as is shown. Input sets 320b-1 through 320b-5 and 325b-1 through 325b-5 are respectively coupled to input terminals W1 through DCW5 and DGW01 to 5CW05 for receiving full-step and half-step dot column selection signals which are generated by the registration means in a manner to be more fully described. The character generators are basically read-only-memories of the MOStype capable of producing a 9X7 clot-matrix for a 64 character set. The timing pulse sets DCW1 through DCW5 and DCW01 through DCW05, respectively control the generation of the appropriate enabling signals for the print head assembly solenoids at each of the five full-step positions in the case of character generator 320 and at each of the four half-step positions in the case of the halfstep character generator 325.

The six bits of information available from the buffer circuitry of FIG. 3b and which are applied to the inputs of the character generators 320 and 325 at 320a-1 through 320a-6 and 325a-1 through 3250-6 respectively. represent six binary bits which identify a character or other symbol. The character generators are adapted to provide binary information at their outputs 3200-1 through 3200-7 and 3250-1 through 3250-7 which represent the dots to be printed for a particular dot column. The dot column selected is determined by the timing pulses available at inputs 320-1 through 320b-5 and 325b-1 through 32512-5. Each timing pulse for the full step" character generator is developed to- 3200-1 t0 3200-7 generates the full step dot patterns gether with the presence of a registration slit, whereas after the occurance of each registration slit and before the occurrence of the next registration slit, in order to provide for half-step printing.

while outputs 3250-1 to 3250-7 generates the half step dot patterns.

Turning to a consideration of FIG. 3d there is shown therein the buffer circuits for simultaneously coupling the dot column patterns developed by the character generators to the printing head driving circuits.

As was described hereinabove, the dot column pattern for the right-hand or B head will be transferred first. This dot column pattern will be applied to input.

terminals 331-1through 331-7. Each dot position signal passes through first and second inverters 332-1 through 332-7 and 333-1 through 333-7 which are connected in cascade. The outputs of the inverters 333 are each coupled simultaneously to one input 334-1a of a bistable flip flop 3341-1 and to one input of a gate 335. The dot column pattern for the B head is loaded into bistables 334-1 through 334-7 upon the development of the LBD signal which is applied to the inputs of all of the bistables 334 when the dot column pattern is derived from the half-step character generator. The digital state of the bistable circuits appearing at the outputs 334-1b through 3341-7b is applied to one input of a gate 336-1 through 336-7 when the signal DGSL1 is present.

The signal LBD is generated by the presence of either the strobe'delay signal TBDLY) or the center strobe signal (CDRSTB). These enabling signalsare applied to gate 337 whereupon the dot column patterns for the B print head generated by the full-step and halfstep character generators are applied to inputs 331-1 through 331-7 temporarily loaded into bistables 334-1 through 334-7 respectively.

The transfer of the full-step and half-step dot column patterns for driving the A print head occurs subsequent thereto whereupon the full and half step dot column patterns sequentially appear at inputs 331-1 through 331-7 and are passed by 'gates 335-1 through 335-7 upon the occurrence of the TGSL1 and TGSL2 signals which gate the dot column patterns through gates 335 simultaneously with the gating of the respective full-step and half-step dot column patterns for the B print head through gates 336. The TGSL signal is developed when either the strobe signal (STROBE) or the delay strobe signal (DELSTB) are present at their respective inputs to gate 338, causing gate 338 to go high, which condition is applied to gate 339. When the coded character in the right-hand most stage of shift register 301 (see FIG. 3a) is binary zero in all of its positions TBl through T87 and is binary 1 in its 8th position TBO, i.e., is a dummy. character, gates 340 and 3410a apply a disabling level to the remaining input of gate 339 causing the output TGSL to be inhibited. This causes the dot column patterns for both the A and B print heads to be simultaneously disabled to driver amplifier circuits (not shown) which selectively drive the print wires of the A and 13 heads to form the dot column patterns developed by the character generator.

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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US4026402 *Jul 28, 1975May 31, 1977Centronics Data Computer CorporationIncremental line printer
US4030590 *Oct 3, 1975Jun 21, 1977Ncr CorporationSpacing and connecting a plurality of print heads
US4064800 *Mar 1, 1976Dec 27, 1977Sperry Rand CorporationPrinter device using time shared hammers
US4116567 *Dec 22, 1976Sep 26, 1978Okidata CorporationPrinter synchronization control for shuttle having non-uniform velocity
US4119383 *Jul 20, 1976Oct 10, 1978Oki Electric Industry Co., Ltd.Method and apparatus for inserting intermediate dots in a dot matrix using a dot printer
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Classifications
U.S. Classification400/124.8
International ClassificationB41J3/54, G06K15/10, B41J2/255, G06K15/02, B41J2/23, B41J19/00, B41J2/235, B41J2/305, B41J19/14, B41J2/25
Cooperative ClassificationB41J2/305, G06K15/10, B41J3/54, B41J2/235, B41J2/255, B41J19/142
European ClassificationB41J2/235, B41J3/54, B41J19/14B, B41J2/305, B41J2/255, G06K15/10
Legal Events
DateCodeEventDescription
Nov 19, 1990ASAssignment
Owner name: FIDELCOR BUSINESS CREDIT CORPORATION, 810 SEVENTH
Free format text: SECURITY INTEREST;ASSIGNOR:GENICOM CORPORATION;REEL/FRAME:005521/0609
Effective date: 19900925
Owner name: GENICOM CORPORATION, GENICOM DRIVE, WAYNESBORO, VA
Free format text: RELEASED BY SECURED PARTY;ASSIGNOR:CHEMICAL BANK;REEL/FRAME:005521/0662
Effective date: 19900926
Jul 20, 1990ASAssignment
Owner name: CHEMICAL BANK, A NY BANKING CORP., NEW YORK
Free format text: SECURITY INTEREST;ASSIGNOR:GENICOM CORPORATION, A CORP. OF DE.;REEL/FRAME:005370/0360
Effective date: 19900427
Jan 27, 1988AS02Assignment of assignor's interest
Owner name: CENTRONICS DATA COMPUTER CORP.,
Owner name: GENICOM CORPORATION, ONE GENICOM DRIVE, WAYNESBORO
Effective date: 19880126
Jan 27, 1988ASAssignment
Owner name: GENICOM CORPORATION, ONE GENICOM DRIVE, WAYNESBORO
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:CENTRONICS DATA COMPUTER CORP.,;REEL/FRAME:004834/0870
Effective date: 19880126
Owner name: GENICOM CORPORATION, A DE. CORP.,VIRGINIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:CENTRONICS DATA COMPUTER CORP.,;REEL/FRAME:4834/870
Owner name: GENICOM CORPORATION, A DE. CORP., VIRGINIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:CENTRONICS DATA COMPUTER CORP.,;REEL/FRAME:004834/0870
Nov 6, 1987ASAssignment
Owner name: GENICOM CORPORATION, ONE GENICOM DRIVE, WAYNESBORO
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:CENTRONICS DATA COMPUTER CORP. BY CHANGE OF NAME CENTRONICS CORPORATION;REEL/FRAME:004779/0557
Effective date: 19871028
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:CENTRONICS DATA COMPUTER CORP. BY CHANGE OF NAME CENTRONICS CORPORATION;REEL/FRAME:004779/0557
Owner name: GENICOM CORPORATION, A DE. CORP.,VIRGINIA
Apr 26, 1982ASAssignment
Owner name: FIRST NATIONAL BANK OF BOSTON, THE (AS AGENT)
Free format text: SECURITY INTEREST;ASSIGNOR:CENTRONICS DATA COMPUTER CORP.;REEL/FRAME:003980/0280
Effective date: 19811119
Owner name: FIRST NATIONAL BANK OF BOSTON, THE (AS AGENT), MAS
Jan 11, 1982ASAssignment
Owner name: FIRST NATIONAL BANK OF BOSTON THE, AS AGENT
Free format text: SECURITY INTEREST;ASSIGNOR:CENTRONICS DATA COMPUTER CORP.;REEL/FRAME:003984/0799
Effective date: 19811119
Owner name: FIRST NATIONAL BANK OF BOSTON, THE, AS AGENT, MASS