|Publication number||US3863023 A|
|Publication date||Jan 28, 1975|
|Filing date||Feb 28, 1973|
|Priority date||Feb 28, 1973|
|Also published as||DE2408451A1, DE2408451B2, DE2408451C3|
|Publication number||US 3863023 A, US 3863023A, US-A-3863023, US3863023 A, US3863023A|
|Inventors||Baker Theodore C, Murley Ellsworth M, Schmersal Larry J|
|Original Assignee||Owens Illinois Inc|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (3), Referenced by (27), Classifications (12), Legal Events (1)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent Schmersal et a1.
[451 Jan. 28, 1975 METHOD AND APPARATUS FOR GENERATION OF GRAY SCALE IN GASEOUS DISCHARGE PANEL USING MULTIPLE MEMORY PLANES  Inventors: Larry J. Schmersal; Theodore C.
Baker; Ellsworth M. Murley, all of Toledo,-,Ohio
 Assignee: Owens-Illinois, lnc., Toledo, Ohio  Filed: Feb. 28, I973  Appl. No.: 336,599
 US. Cl. 178/6, 178/73 D, 315/169 TV,
 Int. Cl. H04n 5/70  Field of Search 4, 178/6, 7.3 D; 315/169 R,
315/169 TV; 313/108 A, 108 B; 340/324 M  References Cited UNITED STATES PATENTS 3,590,156 6/1971 Easton 178/75 D 3,627,924 12/1971 Flemingm. 178/73 D 3,739,084 6/1973 Heinrich 178/6 Primary Examiner-Howard W. Britton Assistant Examiner-Michael A. Masinick Attorney, Agent, or FirmDonald Keith Wedding; E.
J. Holler  ABSTRACT A method and system for producing a gray scale on a gaseous discharge panel. A number of gray level ranges are defined and a number of memory planes equal to the number of gray level ranges are provided, each memory plane having the same number of storage areas as the number of storage and discharge areas in the display panel. An image field is scanned with a vidicon tube and the elements of the signal corresponding to the picture elements are digitized according to the gray level range in which they fall and are fed in sequence to the memory plane corresponding to that gray level. The contents of each memory is then read out to excite the display panel beginning with the memory corresponding to the brightest gray level range and ending with the memory corresponding to the dimmest gray level range. Due to thestorage characteristics of the panel, the bits read from the memory corresponding to the brightest grey level range excite corresponding discharge areas of the display panel for a longer period of time than the bits from the memory planes corresponding to the dimmer gray level ranges and the resulting display picture has gradations of gray corresponding to the original scanned image.
4 Claims, 2 Drawing Figures 40a 40b r7 9 39 1 mt 5 M A V 1 LINE 6/ III 1. am: A //4 WRITE ROW s LINE 5 OSCILLATOR SEQUENCER. COLUMN EED COUPLER r 3111 27 I 3 snvse HDRJZDNTAL VERTICAL 8 SWEEP sweep llllll" v/ ROW 5 5 ROW & COLUMN COLUMN 5 couPtm I SUSTAINING 4 VOLTAGE A TO 0 W sum- VIDICON LEVEL CONVERTER. fag I I I I I I l m o- ROW 6. E OFF COLUMN COUPLER:
L sews: 26 r40 gnmgi UL murmur GEN.
PARALLEL Row 5 smrk smrr $5, COLUMN COUPLER Z 2/ I COUNTER. SENSE l 49 "46 i sl J LDEI'ZAYV r29 READ PULSE 4.3 148 OSCILLATOR. GENERATOR 1 J4 E 1 tatum/ fill/AL Puts:
26 -"'f LINE LINE 1 r 12.0 uv/Tut PULSE LINE METHOD AND APPARATUS FOR GENERATION OF GRAY SCALE IN GASEOUS DISCHARGE PANEL USING MULTIPLE MEMORY PLANES This invention relates to a method and system for producing a gray scale in a gaseous discharge storage and display panel. Since a gaseous discharge panel such as a plasma panel is an on-off device, light intensity emitted therefrom cannot inherently be varied. This represents a serious disadvantage for a display device as it is frequently desirable to display an image having variable shades of brightness.
It has been discovered that the apparent light intensity of the discharge areas of a gaseous discharge panel can be varied by pulsing the discharge areas on and off very rapidly so that the persistence of vision of the eye averages the light. As the ratio of on time to off time is increased, the apparent intensity of the light emitted by the discharge area increases. Thus, the gray scale can be produced by varying the on/off time of the discharge areas and if the on/off time of each discharge area is controlled, a half-tone picture can be displayed.
It is thus an object of the invention to provide a method and apparatus for producing a gray scale in a gaseous discharge panel.
It is a further object of the invention to provide a method and apparatus for displaying a half-tone picture with a gaseous discharge panel.
The above objects are accomplished by providing a number of memory planes equal in number to the number of gray level ranges to be reproduced. Each memory plane has the same number of storage areas as the number of storage and discharge areas that the display panel has. An image is scanned and the picture elements are separated into a finite number of shades of gray, equal in number to the number of memory planes provided. Each picture element is stored in its proper sequence in a memory plane associated with the shade of gray that the picture element corresponds to, and the contents of the memory planes are then sequenced into the panel to reproduce the original picture.
FIG 1 is a diagram of a system according to an embodiment of the invention.
FIG. 2 is a detailed drawing of the A to D level converter 5 of FIG. 1.
The object of the system shown in FIG. I is to produce a gray scale in gaseous discharge storage and display panel 23. Panel 23 can, for instance, be the storage and display panel disclosed in US. Pat. No. 3,499,167 assigned to the same assignee as the present application. The panel disclosed in that patent is a crossedconducting element panel which emits light locally at areas corresponding to the cross-over areas of two conducting elements when the two conducting elements are excited with the required voltage. A sustaining voltage may be applied to all of the conducting elements to insure that a discharge area remains excited after initial excitation and is therefore also a memory area, until the discharge is extinguished by removing the sustaining voltage.
In FIG. 1, memory planes I4, l5, l6 and 17, which can be ferrite core arrays each have the same number of storage areas as the discharge panel 23. One memory plane is required for each shade of gray desired. Four are shown, but more or less can be used if desired. While for ease of illustration, only eight storage areas per line are shown in the memory planes and discharge panel of FIG. 1, in an actual device, 200 or more areas per line could be used. The essential idea of the invention is to break down the picture elements being scanned into a finite number of shades of gray. store each shade of gray in proper sequence in its own memory plane, and then sequence the contents of each memory plane into the discharge panel to reproduce the original picture.
The system of FIG. 1 shows a vidicon tube as the primary analog picture pick-up device. A vidicon has been chosen in this embodiment because it allows sufficient speed to reproduce TV pictures on a discharge panel, but it should be understood that other pick-up devices can be used. The vidicon sweeps a raster by making the horizontal sweep frequency of the voltage generated by horizontal sweep generator 2 many times the vertical sweep frequency of the voltage generated by vertical sweep voltage generator 3. In order to make the number of raster lines correspond to the number of rows in memory planes l4, l5, l6 and 17 the ratio of the horizontal sweep frequency to the vertical sweep frequency is made equal to the number of rows in each memory plane. Row and column coupler 6 has a plurality of row conducting elements 370 to 37h equal in number to the number of rows of conducting elements 38a to 3812 of memory plane I4 and a number of column conducting elements 39a to 3911 equal in number to the number of columns of conducting elements 400 to 40h of memory plane 14. Row and column couplers 8, 10 and 12 likewise have row conducting elements and column conducting elements which correspond respectively to the row and column conducting elements of memory plane I5, 16 and 17. Elements 37a to 37h are connected to elements 38a to 38h and elements 39a to 3911 are connected to elements 40a to 40h and elements of the other couplers are connected to corresponding elements of the other memory planes so that by simultaneously activating a row conducting element and a column element of a coupler an information bit is stored at a corresponding location in the panel 23.
In the embodiment shown in FIG. 1 four gray level ranges of the image to be scanned are decided upon. A to D level converter 5 explained in greater detail in FIG. 2 is arranged to generate; an output signal on line 40 when the output of the vidicon has a signal corresponding to the brightest gray level range, an output signal on line 39 when the output of the vidicon is a signal corresponding to the next brightest range, a signal on line 38 when the vidicon output corresponds to the next-to-the-dimmest range and an output on line 37 when the vidicon output corresponds to the dimmest gray level range. Memory plane 17 will thus store bits corresponding to picture elements in the brightest range, memory plane 16 will store bits corresponding to picture elements in the next-to-brightest range, memory plane 15 will store bits corresponding to elements in the nextto-the-dimmest range and memory plane 14 will store bits corresponding to elements in the dimmest range.
While for ease of illustration the outputs 60 and 61 of row and line sequencer 9 are shown as only being connected to row and column couplers 6, they are actually coupled to each of the row and column couplers in the same fashion and while only line 37 is being shown connected to coupler 6 through AND'gate 41, together with row line 60, actually each of the lines 38, 39 and 40 are connected to row and column couplers 8, l and 12 by being AND gated with the output of row line 60. Hence, the inputs to each of the couplers is identical, except that a different output of level converter 5 is AND gated with row line 60 in each case. Write oscillator 7, which can for instance be an astable multi-vibrator provides pulses to row and line sequencer 9 which is synchronized by the horizontal and vertical sweep generators 2 and 3 to provide output pulses on lines 60 and 61 which pulses, if AND gate 41 and corresponding AND gates associated with the other couplers were not present. would be operative to provide pulse signals to all of the couplers in row-byrow sequence in synchronism with the scanning of the raster, and memory planes 14, 15, 16 and 17 would be filled with l bits in row-by-row order, Due, however, to the presence of AND gate 41, and the corresponding AND gates associated with the other couplers 1 bits are supplied only to the memory planes associated with the gray level range which corresponds to the picture element from which the bit is derived. Hence, as the vidicon scans a raster l bits are entered to the memory planes in synchronism and in positional correspon dence with the scanning elements of the picture with bits derived from elements in different gray level ranges being entered to different memory planes. After an entire frame is scanned, memory plane 17 will have bits stored at storage areas corresponding to image locations where the brightest picture elements occur, memory plane 14 will have bits stored at storage areas corresponding to image locations where the dimmest picture elements occur and memory planes 15 and 16 will have bits corresponding to elements of intermediate brightness stored therein.
In an actual embodiment row and line sequencer 9 would include a row counter and a line counter, each having 8 output lines and represented for ease of illustration in FIG. 1 as single output lines 60 and 61. Each of the 8-row output lines would be AND gated in a separate AND gate with lines 37 and the outputs of the AND gates would be connected to conducting ele ments 39a to 39h while the line counter output lines would be connected to conducting elements 37a to 37h. The row counter would count the output pulses of write oscillator 7 while the line counter would count the horizontal sweep signals so that an output pulse would be supplied to element 37a by the line counter while the row counter stepped through eight pulses supplied to the AND gates associated with the element 390 to 39h. The line counter responsive to the next horizontal sweep signal would then supply a pulse to element 37b while the row counter would again supply eight pulses to the AND gates associated with lines 39a to 39h. The same procedure would take place in each of the other row and column couplers 8, l0 and 12.
The information is extracted from the memories by read oscillator 18 operating in conjunction with the read-out pulse generator 19. Read oscillator 18 may be any standard pulse generator which generates a pulse train of constant frequency such as an astable multivibrator. Read oscillator 18 is arranged to operate at a much higher frequency than write oscillator 7, the frequency of oscillator 18 being limited only by the time required to subtract a bit from the memory planes. To avoid cross-talk when reading and writing simultaneously read and write oscillators l8 and 17 are operated asynchronously.
In an actual embodiment. the read-out pulse generator 19 would be comprised of four read-out row and column couplers such as 6, l8, l0 and 12 operating in combination with a row and line sequencer pro- 5 grammed to activate the conducting elements of the couplers in line-by-line fashion. Unlike the writing process, however, the reading would not be synchronized with the sweep voltage of the vidicon. but rather. as indicated above, would be as fast as permitted by the time it would take to extract a bit from the memory planes. For ease of illustration. read-out generator 19 is illustrated as a block in FIG. 1 with leads 45. 46. 47 and 48 respectively being arranged to read-out memory plane 17, l6, l5 and 14. To eliminate cross-talk while reading and writing simultaneously while the information is written in horizontal rows read-out pulse generator 19 is arranged to read the information out in vertical columns. Generator 19 is further arranged to have an initial output pulse line 70 and a final output pulse line 30 on which pulses appear shortly after the initial read-out pulse is generated and shortly after the final read-out pulse is generated respectively. Lines 30 and 70 may for instance be connected through delay networks to the appropriate stages of the counter network of generator 19. Additionally, generator 19 is also arranged to have a column line output 29 which generates a pulse shortly after the last read-out pulse in each column appears and which can also be connected through a delay network to an appropriate stage of the counter network.
The bits of brightest gray level range memory plane 17 are read out first column-by-column by read-out signals on line 45. After the first read-out pulse is generated, a signal appears on line 70 which signal is operative to trigger row and column sustaining voltage generator 35 to the on-state. The voltage supplied to the row and column elements by generator 35 is not high enough to trigger the panel to emit light, but is high enough to sustain an emission after triggering occurs. The bits are fed out of the memory plane on sense line 24 to shift register 20 which receives a series shift pulse on line 28 with each pulse generated by read oscillator 18. After an entire column of bits is entered to shift reg ister 20 a signal indicating the end of the column is generated on line 29 which signal is fed on line 50 to shift register 20 and which is operative to parallel shift the column of hits out of the shift register to display panel 23. The signal on column line 29 is also fed to line 31 where it activates counter 21, the outputs of which selectively actuate the output conductors of panel pulse generator 22. While in an actual embodiment, counter 21 would have eight output lines connected to the eight conductors at panel 22, for ease of illustration a single output line 51 is illustrated. Thus, at the same time that the rows of bits are shifted out of register 20, the output conductor of panel pulse generator 22 corresponding to column of the memory plane read out is activated and the net column and row voltage is sufficient in combination with the sustaining voltage to cause an area corresponding to the cross-over area of the activated row and column activated to emit light. The bits can be re-written after being read out.
The panel will thus first be excited at appropriate locations by all of the bits read from brightest gray level range memory plane 17. After a suitable delay produeed by delay means 42, read-out pulse generator 19 causes the columns of next-to-brightest memory plane 16 to be read out on sense line by read-out signals on line 46. In the same fashion as explained in conjunction with memory plane 17, the bits of memory plane 16 are fed through shift register 20 to excite the appropriate locations of display 23.
After a delay introduced by delay means 43, panel 23 is excited by the bits of next-to-dimmest memory panel 15 and after a delay introduced by delay means 44 panel 23 is excited by the bits of dimmest memory plane 14. After the final bit of memory plane 14 is read out, a signal is generated on final pulse line which after being delayed for a suitable time in delay means 53, feeds a turn-off signal to sustaining voltage generator 35. The removal of the sustaining voltage extinguishes the panel and immediately after turn-off, readout pulse generator 19 begins to read-out memory plane 17 once again and the entire process is repeated. The frame rate of construction is made fast enough so that no flicker appears.
FIG. 2 illustrates the A to D level converter 5 of FIG. 1 in greater detail. In FIG. 2 the outputs of vidicon 4 are fed to level detectors 80, 81, 82 and 83 which may, for instance, be Schmitt triggers. The output of the level detectors are arranged to be in the one state until the input signal to the detector exceeds the predetermined amplitude level at which time the output changes to the zero state. Zero state output line 84 from level detector 80 and one state output line 85 from level detector 81 are fed to AND gate 91. Likewise, zero state output line 86 of level detector 81 and one state output line 87 of level detector 82 are fed to AND gate 92 and zero output line 88 of level detector 82 and one state output line 99 of level detector 83 are fed to AND gate 93. Output lines 37, 38, and 39 from AND gate 91, 92 and 93 respectively, are fed to row and column couplers 6, 8 and 10 and zero state output line from level detector 83 is fed to row and column coupler 12 as shown in FIG. 1.
When the output signal of vidicon 4 is greater than the triggering level of level detector 80 but less than the triggering level of level detector 81 then level detector 80 will be in the zero state and level detector 81 will be in the one state and signals will appear on lines 84 and 85 simultaneously thus causing AND gate 91 to generate an output signal on line 37. Likewise, when the output signal of the vidicon is greater than the triggering level of level detector 81 but less than the triggering level of level detector 82, then level detector 81 is in the zero state and level detector 82 is in the one state and signals appear on lines 86 and 87 simultaneously causing an output signal to be generated by output line 38 of AND gate 92. In a similar fashion, when the output signal from the vidicon is between the triggering level of level detector 82 and the triggering level of level detector 83, AND gate 93 will generate an output on output line 39. When the vidicon output signal is greater than the triggering level of level detector 83, an output appears on zero state output line 40. Lines 37, 38, 39 and 40 are fed to the row and column couplers 6, 8, 10 and 12 as shown in FIG. 1.
Thus there has been described a preferred embodiment ofa method and system for producing a gray scale in a discharge and storage panel.
While we have disclosed and described the preferred embodiments of our invention, we wish it understood that we do not intend to be restricted solely thereto, but that we do intend to include all embodiments thereof which would be apparent to one skilled in the art and which come within the spirit and scope of our inventron.
1. A system for producing a gray scale in cross conductor gas discharge and display panel having a plurality of crossing areas which correspond to a plurality of display and storage areas comprising,
means for scanning an image field and generating an image signal corresponding thereto,
a plurality of separate storage means for storing signals corresponding to each of a plurality of gray level ranges from a brightest range to a dimmest range,
each of said storage means having at least as many discrete storage positions as said panel has crossing areas, said positions in each of said storage means being in geometrical correspondence with the positions of said crossing areas in said panel,
means for routing signals derived from said image signal to different ones of said storage means dependent on the amplitude of said image signal in synchronism with the scanning of said field so that said signals derived from image signals within each amplitude range which corresponds to a different gray level are stored in the storage means corresponding to that gray level at positions which correspond to their position in said scanning field,
means for sequentially exciting said panel with signals corresponding to the signals stored in each of said storage means beginning with signals from said storage means corresponding to said brightest range and ending with signals from said storage means corresponding to said dimmest range so that the crossing areas corresponding to the storage positions which stored signals therein are excited, said means for sequentially exciting including means for exciting the panel with signals corresponding to all stored signals in a storage means before the panel is excited with signals from the storage means corresponding to the next dimmest gray level and also including delay means of arbitrary delay time controlling the delay between excitation of the panel with signals from one storage means and with signals from the next storage means,
and means for extinguishing the entire panel at the same time, said panel remaining in the excited state until extinguished, whereby said signals corresponding to each gray level range cause said panel to be excited for a longer period of time than the signals from each dimmer gray level range, thereby producing said gray scale.
2. The system of claim 1 wherein said means for exciting includes a shift register means and means for reading the signals stored in each row or column of storage positions of each of said storage means sequentially into said shift register.
3. The system of claim 2 further including means for parallel shifting each row or column of signals which is read into said shift register out of said shift register for exciting a row or column of said display panel.
4. A method for producing a gray scale in a cross conductor gas discharge and display panel having a plurality of crossing areas which correspond to a plurality of display and storage areas comprising,
scanning an image field and generating an immage signal corresponding thereto,
providing a plurality of separate storage means for storing signals corresponding to each of a plurality of gray level ranges from a brightest range to a dimmest range, each of said storage means having at least as many discrete storage positions as said panel has crossing areas, said positions in each of said storage means being in geometrical correspondence with the positions of said crossing areas in said panel,
routing signals derived from said image signal to different ones of said storage means dependent on the amplitude of said image signal in synchronism with the scanning of said field so that said signals derived from image signals within each amplitude range which corresponds to a different gray level are stored in the storage means corresponding to that gray level at positions which correspond to their position in said scanning field, sequentially exciting said panel with signals corresponding to the signals stored in each of said storage means beginning with signals from said storage means corresponding to said brightest range and ending with signals from said storage means corresponding to said dimmest range so that the crossing areas corresponding to the storage positions which stored signals therein are excited. the delay time between exciting said panel with signals from one storage means and signals from the next storage means being predetermined but arbitrary,
and extinguishing the entire panel at the same time.
said panel remaining in the excited state until extinguished whereby said signals corresponding to each gray level range cause said panel to be excited for a longer period of time than the signals from each dimmer gray level range, thereby producing said
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|U.S. Classification||348/797, 345/690, 315/169.1, 348/E03.14, 315/169.4, 345/63|
|International Classification||G09G3/28, H04N5/66, H04N3/10, H04N3/12|
|Jun 9, 1987||AS||Assignment|
Owner name: OWENS-ILLINOIS TELEVISION PRODUCTS INC., SEAGATE,
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:OWENS-ILLINOIS, INC., A CORP. OF OHIO;REEL/FRAME:004772/0648
Effective date: 19870323
Owner name: OWENS-ILLINOIS TELEVISION PRODUCTS INC.,OHIO
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:OWENS-ILLINOIS, INC., A CORP. OF OHIO;REEL/FRAME:004772/0648