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Publication numberUS3870922 A
Publication typeGrant
Publication dateMar 11, 1975
Filing dateApr 27, 1973
Priority dateMay 2, 1972
Publication numberUS 3870922 A, US 3870922A, US-A-3870922, US3870922 A, US3870922A
InventorsShutoh Masamichi
Original AssigneeNippon Electric Co
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Graphic pattern generation for a tv-like scanned-graphic display equipment
US 3870922 A
Abstract
A pattern generating means comprising logical circuitry for controlling a cathode ray tube display device which scans in the conventional line by line manner. The pattern generator means stores the data representing the slope of two lines forming at least part of the pattern as well as: generating data indicating the line presently being scanned and the grid point being generated on the line being scanned; and data representing the coordinates of the starting and finishing points of the leftmost and rightmost lines. The starting point X-coordinates of the left and right-hand lines defining at least a portion of the pattern are compared against the grid point data to generate an X-pattern control signal; and the Y-coordinates of the starting and finishing points of the pair of lines are compared against the data indicating the scan line presently being generated to generate a Y-pattern control signal. The X- and Y-pattern control signals are combined in an AND gate to generate a pattern control signal used to generate the portion of the pattern, represented by the pair of lines, in sharp contrast to the region surrounding the pattern on the display.
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Elit Sates [191 Shutoh 14 1 Mar. 11, 1975 GRAPHIC PATTERN GENERATION FOR A TV-LIKE SCANNED-GRAPHIC DISPLAY EQUIPMENT Masamichi Shutoh, Tokyo, Japan Nippon Electric Company, Limited, Tokyo, Japan Apr. 27, 1973 Inventor:

Assignee:

Filed:

Appl. No.:

Foreign Application Priority Data May 2, 1972 Japan 47-44319 May 16. 1972 Japan 47-48873 References Cited UNITED STATES PATENTS 12/1970 Nielsen 6/1971 Waller 315/18 3/1972 Waller 315/18 5/1972 Blejwas et al. 315/18 Primary Examiner-Maynard R. Wilbur Assistant Examiner-J. M. Potenza Attorney, Agent, or Firm--Ostrolenk, Faber, Gerb & offen T 40/ y-smer/maeis 57] ABSTRACT A pattern generating means comprising logical circuitry for controlling a cathode ray tube display device which scans in the conventional line by line manner. The pattern generator means stores the data representing the slope of two lines forming at least part of the pattern as well as: generating data indicating the line presently being scanned and the grid point being generated on the line being scanned; and data representing the coordinates of the starting and finishing points of the leftmost and rightmost lines. The starting point X-coordinates of the left and right-hand lines defining at least a portion of the pattern are compared against the grid point data to generate an X-pattern control signal; and the Y-coordinates of the starting and finishing points of the pair of lines are compared against the data indicating the scan line presently being generated to generate a Y-pattern control signal. The X- and Y-pattern control signals are combined in an AND gate to generate a pattern control signal used to generate the portion of the pattern, represented by the pair of lines, in sharp contrast to the region surrounding the pattern on the display.

Means are also provided for controlling the time at which the slope values are summed with the starting coordinate points of the pair of lines in accordance with the positive or negative value of the slopes.

12 Claims, 15 Drawing Figures AND 4725 fiG/S'TER A67 GRAPHIC PATTERN'GENERATION FOR A TV-LIKE SCANNED-GRAPHIC DISPLAY EQUIPMENT The present invention relates to a graphic pattern generator for use in a television-like scanned-graphic display equipment for displaying various graphic patterns in response to display information supplied from an information handling system such as an electronic computer or an electronic exchange system.

BACKGROUND OF THE INVENTION Graphic display equipment is effectively used as a man-machine interface in a computer system and as display terminal equipment. With the development of the time sharing system and the on-line system in which many terminal stations are installed, the number of display devices to be used therein are proportionally increased. In such cases, the manufacturing cost of the terminal equipment greatly affects the total cost of the computer system. For this reason, the cost of manufacturing the terminal equipment should be as low as possible. However, inasmuch as the prior-art graphic display equipment is not standardized such as the television (or TV) receiver even though a graphic pattern is displayed on the picture tube in the TV receiver, specially designed electronic circuits are required for dis playing the graphic pattern. For this reason, such priorart graphic display equipment is costly to manufacture. In the graphic display device employing the TV- scanning technique, the electron beam of the picture tube sequentially scans a screen from the upper to lower ends in accordance with a predetermined scanning pattern, in order to simplify the deflection operation of the scanning beam of the tube. In contrast, in the conventional random scanning-type-graphic display equipment, the deflection of the electron beam of the picture tube is deflected corresponding to the contour of the graphic pattern to be displayed on the screen. As a result, the deflection system including deflection coils, a deflection amplifier and the like have a fast response to the scanning by the beam. Also, in the prior-art equipment, since the analogue electrical signals must be generated corresponding to the contour of the graphic pattern, the electronic circuits employed in such prior-art display equipment become more complicated in construction and more costly to manufacture. On the other hand, the TV-scanned display equip ment is capable of using a conventional TV receiver as a display device, and therefore, the total manufacturing cost of the equipment can be remarkably reduced.

Furthermore, in the near future, the video telephone system as well as the CATV system will be widely used as a mass communication system, and the television receiver used in the above two systems is likely to be employed as the display terminal equipment of the computer system. For this purpose, the techniques for enabling the TV-scanned-graphic display equipment to display the graphic pattern in response to the display information supplied from the computer become more important.

Moreover, it is very often required in the pattern display to distinguish a specific area enclosed by the pattern from the other patterns or areas on the display surface. For example, when traffic conditions are displayed, it is desired to distinguish a specific road or highway from other parts or to mark an especially congested area of traffic. Also, in the atmospheric pollution-condition display in a public hazard monitoring system a, highly affected or polluted area must be made distinct from other areas.

These can be accomplished by causing the graphic pattern enclosed by line segments to be illuminated at a predetermined brightness or in a predetermined color. However, in the prior-art random scanning-typegraphic display equipment, the computation of the data for the line segments for displaying a bright graphic pattern in the dark background or a dark graphic pattern in the bright background is required except in a very rare case when only a very small area is brightly or darkly displayed. As a result, there is another disadvantage that such a large amount of information or data for the graphic pattern-display overloads the memory of a computer system. The TV-like scanned-graphic pattern display equipment utilizing a scan-converter tube has a similar disadvantage to that of the random scanning-type-graphic display equipment.

One example of the conventional graphic pattern display equipment employing the TV-scanning technique is disclosed in a paper entitled Computer Generated Graphic Segments In A Raster Display published in AFIPS CONFERENCE PROCEEDINGS-Spring Joint Computer Conference, 1969, pages 161-172. In the display equipment, the computer is utilized to solve the equations representing the line segments used to display a graphic pattern and to convert the resultant digital data into a video signal. However, by the use of the computer to convert the digital data into the video signal, the processing time of the computer becomes longer, and consequently, the total cost of the display equipment is greatly increased.

Another example of the conventional TV-scanningtype-graphic display equipment is described in a paper entitled Scanned-Display Computer Graphics published in Communications of the ACM, Vol. 14, Number 3, March issue, 1971, pp. 143-150. Since the generation of the brightness signal and the scan conversion of the equipment are all performed by the processing of the computer, the capacity ofthe storage devices must be increased, affecting the efficient use .of the storage.

In addition, a graphic display equipment utilizing a scan-converter tube has been in use. Since this equipment handles signals in analogue form, it becomes complicated in construction. Furthermore, precise adjustment and maintenance of the equipment must be made to attain stable operation.

BRIEF DESCRIPTION OF THE INVENTION AND OBJECTS The object of the present invention is therefore to provide a graphic pattern generator for a TV-like scanned-graphic display equipment with simple logic circuits free from the above-mentioned disadvantages of the prior-art equipment for displaying a graphic pattern formed by line segments.

Another object of the present invention is to provide a graphic pattern generator capable of displaying a bright graphic pattern on the dark background or a dark graphic pattern upon a bright background without resorting to an increase in the amount of data to be supplied from the computer for displaying purposes.

The graphic pattern generator of the present invention comprises (making reference to FIGS. 1 and 2, for

example): means including slope registers II and 2 for termporarily storing values representing slopes (AX/AY equivalent to the ratio of the difference AX to the difference AY of each ofa pair ofline segments) of a pair of line segments defining a graphic pattern to be displayed, and accumulators 3 and 4 for adding the contents stored in the registers I and 2 to X- coordinates of starting points of the pair of line segments, respectively, as one scanning line is changed to the other, thereby generating output signals representing the X-coordinates of the two points at which the pair of line segments intersect the scanning line; means having an X-address counter 5 for counting a position in the X-direction in a display surface or screen of each scanning line, and comparators 6 and 7 for comparing the contents of the counter 5 with the contents of the accumulators 3 and 4, thereby producing coincidence signals representing the two points of each scanning line; means 0 for deriving an X-direction'brightnessgate signal in response to the coincidence signals, the brightness-gate signal being supplied to display a bright or dark pattern in a dark or bright background; means including registers 9 and 10 for temporarily storing maximum and minimum values of Y-coordinates of the pattern to be displayed, a Y-address counter 11 for counting a scanning position in the Y-direction in a display surface, and comparators 12 and 13, for comparing the content of the counter 11 with the contents of the registers 9 and 10, thereby giving coincidence signals representing the maximum and minimum values of the Y-coordinates ofthe pattern; means M for generating a Y-direction-brightness-gate signal in response to said second mentioned coincidence signals; and an AND gate circuit 15 for producing an output signal, upon receipt ofthe X- and Y-direction-brightness-gate signals.

Thus, by a relatively simple logic operation of the present graphic pattern generator, the brightness signal is generated in response to the pattern display data from an information processing unit such as a computer and applied directly to a display device employing the TV-scanning technique in order that the graphic pattern distinguished from other areas may be displayed in the display screen or surface without the necessity for employing the computer for the operations performed by the aforesaid logic.

BRIEF DESCRIPTION OF THE FIGURES The present invention will now be described more in detail in conjunction with the accompanying drawings, in which:

FIG. 1 shows a diagram for explaining the principle of operation of the present invention;

FIG. 2 shows a schematic block diagram of the basic arrangement of the device of the invention;

FIG. 3 shows a first embodiment of this invention;

FIGS. 4- and 5 show waveform diagrams for explaining the first embodiment of FIG. 3;

FIGS. 6 a, b, c and d show diagrams for explaining the principle of the operation ofa second embodiment;

FIG. 7 shows the second embodiment of this inven tion;

FIGS. 8 and 9 show waveform diagrams for explaining the second embodiment shown in FIG. 7;

FIG. 10 shows more in detail a block diagram of an accumulator control circuit shown in FIG. 7;

FIG. 11 shows a waveform diagram illustrating the operation of the main constituents shown in FIG. 10; and

FIG. 12 shows a diagram for explaining the mode of operation for displaying a polygonal graphic pattern with the present invention.

DETAILED DESCRIPTION OF THE FIGURES In FIG. 1, a trapezoid ABCD is shown as one example. A reference character a denotes scanning lines 11-1, n, n+1, n+2, n+3, n+4 and n+5 in the TV-like scanned-graphic display device; white dots [2 denote grid points or grids on the scanning lines a; sloping line segments c and d respectively intersect the scanning lines a; and thick (i.e., cross-hatched) lines g, the portions of the scanning lines a at which the bright or dark signals (the brightness signals) appear so that the trapezoid ABCD can be displayed as a bright or dark pattern distinguished from other areas on a display surface. For this purpose, the grids or spots where the left and right sides AB and CD of the trapezoid cross the scanning lines a must be detected so as to generate the brightness signal between the detected grids of each scanning line a. For instance, assuming that X- and Y-coordinates are set as shown in FIG. 1, the X-coordinates of the intersections between each scanning line a and the line segments c and d can be detected for each scanning line. More definitely, such X-coordinates are obtained as follows. For instance, the X-coordinate at which the left side AB or the line segment 0 crosses the scanning line (n+1) is obtained by adding a slope of the left side AB to the X-coordinate of the start point A of the left side AB. Similarly, the Xcoordinate at which the right side CD or the line segment d crosses the scanning line (n+1) is given by the addition of a slope of the right side CD to the X-coordinate ofthe start point C of the right side CD. Then, the X-coordinates at which the left side AB intersects the scanning line (n+2) is obtained by adding the slope of the left side AB to the X- coordinate of the intersection given with regard to the previous scanning line (n+1). In like manner, such X- coordinates ofthe intersections can be obtained one by one in a sequential manner.

Thus, the brightness signal is generated in synchronism with the TV-like scanning of the display device in the display equipment between the two X-coordinates of the intersections for each scanning line, thereby permittng the graphic pattern to be displayed on the dis play surface as a dark or bright pattern distinguished from the adjacent areas.

In FIG. 2 which shows a schematic diagram of the present invention, slope registers 1 and 2 are adapted to temporarily store graphic pattern-display information representing positive or negative slopes of a pair of line segments in a plurality of line segments defining the graphic pattern to be displayed. The slope signals stored in the registers 1 and 2 are transferred from an information handling unit 1000 such as a computer through signal lines 101 and 201, respectively. Accumulators 3 and 4 store the pattern-display information representing )(-coordinates of the starting points of a pair of line segments supplied through signal lines 301 and 401, respectively, from the processing unit 1000, and also add the contents of the registers 1 and 2 applied through signal lines 302 and 403, respectively, to the previous contents stored therein with every change of the scanning lines until the X-address scanning line passing a maximum value of Y-coordinate of the line segments defining the pattern has been scanned. An Xaddress counter 5 sequentially counts the grids (i.e., points) on each scanning line a in the order of the scanning direction and comparators 6 and 7 compare the contents of the accumulators 3 and 4 with the content of the X-address counter 5 to generate coincidence signals on signals 601 and 701, respectively, when the compared contents coincide with each other. In response to the coincidence signals from the comparators 6 and 7, an Xdirection-brightness-control circuit 8 gives an X-direction-brightness-gate signal for the brightness control of the display device during the time interval between the coincidence signals of each scanning line to an AND gate circuit 15 through a signal line 801. A Y-start-address register 9 and a Y-finish address register 10 temporarily store the pattern-display information indicating a minimum value (Y-coordinate of the vertex) and a maximum value (Y-coordinate of the base) of the graphic pattern to be displayed. The display information is also developed by the unit 1000 and appears at signal lines 901 and 110, which are coupled to registers 9 and 10, respectively. A Y-address counter 11 counts the scanning lines in the order of the scanning, or in other words, the Y-coordinates of the grids. Comparators 12 and 13 compare the contents of the registers 9 and 10 with the content of the Y-address counter 11, and generate coincidence signals on signal lines 121 and 131, when the compared contents coincide with each other. A Ydirection-brightness-control circuit 14 produces a Ydirection-brightness-gate signal during the time interval corresponding the scanning from top to bottom of the graphic pattern in response to the coincidence signals from the comparators 12 and 13. This gate signal is fed to AND gate circuit 15 through signal line 141. The circuit 15 produces an output signal on a signal line 151 only when the X- and Ydirection-brightness-gate signals are simultaneously applied thereto from the circuits 8 and 14.

The principle of operation will be given below with reference to FIGS. 1 and 2 more in detail. First, the display data required for displaying the trapezoid ABCD (see FIG. 1) are given to the registers 1 and 2 from the unit 1000. More definitely, the slope (equal to l) of the line segment AB, the X-coordinate (m+7) of the starting point A of the segment AB, the slope (+1) of the line segment CD, the X-coordinate (m+10) of the starting point C of the line segment CD, the Y- coordinate n representing the top of the trapezoid ABCD and the Y-coordinate (n+5) of the bottom line segment BD are respectively stored in the slope register 1, the accumulator 3, the slope register 2, the accumulator 4, the Y-start-address register 9 and the Y-endaddress register 10. The X-address counter 5 starts counting the X-direction addresses or X-coordinates of the grids in each scanning line in response to the TV type-scanning from the left-hand margin, and simultaneously, the Y-address counter 11 counts the scanning lines shifted downward, that is, the Y-coordinates of the grids. When the content in the Y-address counter 11 reaches a predetermined number n, the comparator 12 generates the coincidence signal on the signal line 121. Thus, the high-Y-direction-brightness-gate signal generated on the output signal line 141 from the brightness-control circuit 14 is continuously generated until the counter 11 has counted (n+5). When the scanning line n is scanned, the comparators 6 and 7 produce the coincidence signals in a case where the X-address counter 5 counts (m+7) and (m+10). Then, when the scanning beam is shifted from the scanning line n to the scanning line (n+1), the slope values stored in the reg-. isters 1 and 2 are supplied to the accumulators 3 and 4, and added to the contents in the accumulators 3 and 4. As a result, the contents of the accumulators 3 and 4 become (m+6) and (m+11), respectively. Thus, the X-directionbrightness-gate signal is generated between the grids (m+6) and (m+1l). In a similar manner, the X-directionbrightness-gate signals are produced between the grids (m+5) and (m+12), (m+4) and (m+13), (m+3) and (m+14) and (m+2) and (m+15) depending on the scanning of the scanning lines (n+2), (n+3), (n+4) and (n+5), respectively. Therefore, the output signal from the gate circuit 15 is obtained only when the X- and Y-direction-brightnessgate signals are simultaneously applied thereto, and is transferred to a TV-scanning type-display device to distinguish the trapezoid ABCD from other areas of the screen. For example, the trapezoid ABCD may be brightly displayed against a dark or black background (or vice versa).

In FIG. 3 which shows the first embodiment of the present invention in greater detail, the information processing unit 1000 is not shown for the simplicity of illustration. The register 1 includes a decimal integer section 21 and a units integer section 22 for respectively storing a decimal and a units integer of a slope value fed from the unit 1000 (not shown) through the signal line 101. The accumulator 3 also is composed of a decimal integer section 31 and a units integer section 32. The contents in the sections 21 and 22 of the register 1 are respectively applied through signal lines 321 and 322 to the sections 31 and 32 of the accumulator 3, and added to those values in the sections 31 and 32. The overflow of the decimal section 31 is shifted through a signal line 310 to the integer section units 32 as a carry. In the instant embodiment, inasmuch as the register 1 and the accumulator 3 are so designed as to handle not only an integer slope but also a slope including a decimal, any graphic pattern defined by a plurality ofline segments with any slope can be correctly displayed. The slope register 2 also has a decimal section 23 and an integer section 24, and similarly, the accumulator 4 is composed of a decimal section 41 and a units integer section 42. The comparators 6 and 7 compare the contents in the integer sections 32 and 42 of the accumulators 3 and 4, respectively, with the content in the X-address counter 5 in a similar manner to that described above with regard to FIG. 2. The X- directionbrightness-control circuit 8 includes an Exclusive-OR gate circuit 81 coupled to the comparators 6 and 7 through the lines 601 and 701, respectively, a binary counter 82 connected to the circuit 81 through a line 802, and an OR gate circuit 83 coupled to the counter 82 through a line 803. The circuit 81 is designed to supply an output signal on the line 802 when either one of the respective coincidence signals from the comparator 6 or 7 is generated on the line 601 or 701. The counter 82 is reversed by the output signal of the circuit 81. In response to the coincidence signal supplied from the comparator 6 through the line 601 or an output signal on the counter 82, the OR gate circuit 83 gives an output signal on the signal line 801, that is, an Xdirectionbrightness-gate signal on the line 801. More specifically, the Exclusive-OR gate circuit 81 fi generates the: o utzputis'ignalin iresponsei to the accinci 5 obtained fromhe-eomparaterse :a'nd 'J',:The Extzhisiviz i i i i deaeestgnaasrmm the coirnparatortiand 'l toactuate ORgatecireuit 3:1 generates: the: output waveform -S-6-,i the counter M only: when the contents inthe ima e and: upon receipt of the traiiing edge of the signal 326: section s 32 meda -.2:of-theaccurrzulators :3 iand l areidife the counter produces the :signai S+7tAlsI0 the R; 1 ferenti from each ether; Accordingly; the :cotrn'telr 82 5 gate circuit fi3 produc'es the signal S fi in :respoznse :to pro ou'tp tt signatwhichis suppliedto thc QR i the sig'n'ai s-ztian d S-7 .:When the signals s -d and 5 g'ate: circuit: 83 itoi become the x eirgeenzent brightness ldific ide; i a h other; t g p i; Signal 3.1.3; t

:gate signal; However; when the conten .of tl-ieintege ml; v m

In FIG; 5 the ECQHfitff cl 1 t counter II are shown at +2 (in:contractedmanner rv a tive 055% at 1 :16am: the coincidence signals-earned from the comparators I 2 and: 13, M3 9 :anl: 5 105162 45p 40.; ttt s -i from the circuit: ingresponsc. I I si gnai derived: through; :the; signal l ne; 60: from the acomaarta cr: 6 inc c ope a i n 5 th Ya a tas t me is; in? aiddi 0R gate' z a. Sig. reset by the trail ied I from the ek fl a ss gsz upplie otromt e c mca awr lan th se? i ndflr 'ndeadd tlie c o tents ot the page 240, the; EOREga te Y-direction-brightnessgate signal on the line Ml during the time interval from the moment of the scanning line passing the top of the pattern to another moment of the scanning line passing the bottom of the pattern. The AND gate circuit ll5 functions in the same manner as that described in FIG. 2.

In FIG. l, the count clock signals of the )(-address interval r in FIG. 5), the comparator 12 generates the coinci- 40 dence signal 8-9 in FIG. 5. In response to the trailing edge of the signal 5-9 (at time point r in FIG. 5), the flip-flop l0 is set to generate the signal S-lll. As the accumuIators 3 and 4 are controlled by the signal S-ll through the signal line M5, they are not actuated until counter 5 are shown at 8-1; those of the Y-address the coincidence Signal 5-9 from the comparator 12 counter It, at $42.; the addition signals on a signal line falls at time P i t 5 or, in other Words when 503 to be fed to the accumulators 3 and d, at 5-3; the h scanning h Passlhg the p of the pattern to be coincidence signals of the comparators 6 and 7, at S-4 dlsplayed 1S belhg seahhed- However, h eeeumulfltofs and S-5, respectively; the output signals of the Exclu- 3 and 4 are kept actuated uhtl] the cotheldehee slghal sivc-OR gate circuit til, at 5-6; and the output signals from the Comparator 13 falls that 15, durlhg the ofthe binary counter a2 and ofthe OR gate circuit as, seaming Period from next one to the s n line at 8-7 and 5-8, respectively. The pulse interval of the Passmg the P of the pattern to theseehhmg h P pulses shown at 5-1 corresponds to the distance bemg the bottom- A5 a result the x'dlreetleh-bl'lghthess' tween the adjacent grids on each scanning line. The gate Signal pp on the ig h 801 between time interval n-r or 1 -4 corresponds to a fly-back inthe x-eeerdmates 0f the Startlhg POlhtS and terval of the scanning line, and during the time interval in G- 1 Of t e Pair Oflinc Segments intersectt -t the grids on the scanning line are displayed on the g the Scanning hhe in 1 and thereafter display surface. The counter 5 counts the pulse numtween the YdiHaIB gi en by the accumulators 3 bars d i th ti i v l fo h scanning and 4 to which the signals represented the slopes of the line. The (-address counter lll counts the signal S-2 line segments stored in the registers 1 and 2 are added, during the fly-back interval and utilizes this signal to respectively, until the scanning linc in FIG 1 increase the address ofthe scanning line stored therein. passing the bottom of the pattern has been scanned. Before the scanning operation for the scanning line The Y-direction-brightnessgate signal S-l2 (during corresponding to the increased address is initiated, in the time interval l '-t in FIG. 5) from the OR gate cirresponse to the signal S3, the contents of the registers cuit 43 appears on the signal line 141 during the period 1 and 2 are added to those of the accumulators 3 and from the scanning of the scanning line passing the top t, respectively. By the coincidence signals 8- 11 and 5-5 of the pattern to the scanning line passing the bottom.

Thus, the TV-scanning type-pattern display device is controlled depending on the output signal of the gate circuit obtained only when the X- and Y-directionbrightness-gate signals are simultaneously applied thereto. For this reason, the bright or dark graphic pattern may be emphatically displayed in the black or dark background.

The function of the graphic pattern generator of the present invention may be further enhanced as will be set forth below. A graphic pattern formed by the line segments having very large slopes AX/AY may be displayed by adopting the principle of operation described in connection with FIGS. 6a, b, c and d.

In FIGS. 6a, b, c and d which are for explaining the second embodiment, four examples of a pair of line segments defining the pattern are illustrated depending upon the combinations of the slopes AX/AY Black dots c, d, e and) represent the brightness-controlled grid points on the grid lines b for generating the line segments AB, CD, EF and GH. In general, a line segment may be approximated by a group of grids located most closely to the line segment to be generated on the twodimensionally arrayed grids. Detailed description of the reference letters a, b and d are omitted here, because they are similar to those shown in FIG. 1. It is assumed now that the line segment having small X-coordinates will be referred to as a left side, whereas the line segment having large X-coordinates. as a right side. In FIG. 6a, the left side AB has a negative slope, whereas the right side CD, a positive slope; in FIG. 6b, the left side AB has a negative slope and the right side EF has also negative slope; in FIG. 60, both of the left and rights side GH and CD have a positive slope; and in FIG. 6a, the left side GI-I has a positive slope, whereas the right side EF, a negative slope (said slopes being defined with reference to the scanning sequence i.e., left to right in the X-direction and top to bottom in the Y-direction).

In order to display a bright quadrilateral defined by a pair of left and right sides against a dark background, the X-coordinate of the leftmost black dot (that is, the minimum X-coordinate referred to as the leftmost coordinate) and the X-coordinate of the rightmost black dot (that is, the maximum X-coordinate referred to as the rightmost coordinate) must be detected for each scanning line. Thus, the bright signal may be generated between the leftmost and the rightmost coordinates. However. it should be noted that the method for obtaining such leftmost and rightmost coordinates depends upon the slopes of the segments. In FIG. 6a, the leftmost coordinates are the X-coordinates of the grid points at which the line segment AB intersects the scanning lines a, whereas the rightmost coordinates are the X-coordinates of the grid points at which the line segment CD intersects the scanning lines a. More particularly, for instance. the leftmost coordinates for the scanning lines (n+1) and (n+2) are obtained by adding the slope of the line segment AB to the X-coordinate of the starting point A of the segment and to the resultant X-coordinate which was obtained with respect to the scanning line (n+1), respectively. Similarly, the rightmost coordinates for the scanning lines (n+1) and (n+2) are obtained by the addition of the slope of the line segment CD to the X-coordinate of the starting point C of the segment and to the resultant X- coordinate obtained with regard to the scanning line (n+1), respectively. These operations can, in turn, be applied to the scanning line (n+3).

In the example shown in FIG. 6a, the left side AB has a slope 3 and the right side, a slope +3. However, the method for obtaining the rightmost coordinates for a pattern shown in FIG. 6b is different from that described with reference to FIG. 6a. More particularly, the rightmost coordinates are not the X-coordinates of the grid points at which the line segment EF having a negative slope intersects the scanning lines, but are the coordinates displaced to the right by the absolute value of the negative slope. Therefore, the first addition of the slope to the X-coordinate of the starting pont B will not be performed when the scanning line n is changed to the next scanning line (n+1), but the addition of the slope to the previous rightmost coordinate E as the starting point is carried out in similar manner to the case of the example shown in FIG. 6a from the scanning line (n+2). The leftmost coordinates shown in FIG. 6b are obtained in the same manner as that in the leftmost coordinates of FIG. 6a. The leftmost coordinates of the example shown in FIG. 6c are obtained in a manner substantially similar to that used for obtaining the rightmost coordinates of FIG. 6b. The rightmost coordinates in FIG. 60 are derived in a similar manner to that used to obtain the rightmost coordinates in FIG. 6a. In alike manner, the leftmost and rightmost coordinates of the example shown in FIG. 6d may be obtained in a similar manner to that used in obtaining the 1eftmost coordinates of FIG. 6c and that used in obtaining the rightmost coordinates of FIG. 6b, respectively.

In summary, when the left side has a negative slope, the leftmost coordinates for the scanning lines (n+1) and (n+2) are obtained by the addition of the slope of the line segment to the initial X-coordinate present on the scanning line n and the resultant X-coordinate which was obtained with respect to the scanning line (n+1), respectively. If the line segment on the left side has a positive slope, the leftmost coordinates can be obtained by starting the above addition from the scanning line (n+1). Similarly, the rightmost coordinates for the right side CD are obtained by the reverse operation to that in the case of the leftmost coordinates for the left side depending on the positive and negative gradients of the slope. The brightness signal is generated between the thus obtained leftmost and rightmost coordinates of each scanning line in synchronism with the scanning of the TV scanningtype display device to permit a bright pattern to be displayed against a dark background. Obviously, the pattern may be dark and be displayed against a white background if desired for some applicatrons.

The pattern generator of the present invention capable of accomplishing the above mentioned function explained with reference to FIGS. 6a through 6d is shown in block diagram form in FIG. 7 as the second embodiment. The second embodiment is substantially similar to the first embodiment of FIG. 3 except that the former further comprises an accumulator control circuit 16 for controlling the operation of the accumulators 3 and 4 in response to the addition timing signal generated during the flyback interval and transferred through the signal line 503, the coincidence signals of the comparators l2 and 13 fed through signal lines 163 and 164, the count clock pulses applied from the Y- address counter 11 through a signal line 113, and the signals representing the slopes supplied from the registers 1 and 2 through signal lines 102 and 202.

Next, the operation of the second embodiment will be described with reference to FIGS. 6, 7, 6 and 9. The output waveforms in FIGS. 8 and 9 indicated by the primed reference symbols correspond to the unprimed symbols appearing in FIGS. 4 and 5.

The slope of the left side, the )(-coordinate of the starting point of the left side, the slope of the right side, the X-coordinate of the starting point of the right side, the Y-coordinate passing the top of the quadrilateral and the Y-coordinate passing the bottom of the quadrilateral are respectively stored in the register 1, the accumulator 3, the register 2, the accumulator 4, Y-startaddress register 9 and the Y-finish address register 10. Then the X-address counter counts the grid points from the leftmost grid in the X-direction, and in like manner, the Y-address counter 11 counts the scanning lines as one scanning line is changed to another one, thereby counting the address of the grid in the Y- direction. When the content of the counter 11 coincides with the address of the scanning line passing the top ofthe quadrilateral to be displayed during the time interval I -I in FIG. 9, the coincidence signal (S-9' in FIG. 9) is derived from the comparator 12. As a result, the Y-direction-brightness-gate signal (8-12 in FIG. 9) is obtained from the Y-direction-brightnesscontrol circuit 14. The circuit 16 controls the addition operation of the accumulators 3 and 4 depending upon the positive or negative slope signals derived from the registers 1 and 2. If the content of the register 1 is positive, for instance, the slope ofthe left side GH (see FIG. 6c), the addition operation of the accumulator 3 starts in response to the signal S-lll shown in FIG. 9 on the trailing edge at time point r of the coincidence signal 8-9. However, in a case where the content ofthe register 1 is negative, for example, the left side AB (see FIG. 6a), the addition operation of the accumulator 3 is ini tiated by the signal S-l3' shown in FIG. 9 at time point 1, that is, by the trailing edge at time point I delayed by one line scanning operation as compared with time point 1 If the content of register 2 is negative (the right side EF in FIG. 6b), the addition operation of the accumulator 4 starts by the signal 8-11 but when the content of the register 2 is positive (the right side CD in FIG. 6a) the addition operation is initiated in response to the signal 5-13. Thus, the leftmost and rightmost coordinates for each scanning line are stored in the accumulators 3 and 4, respectively. The coincidence (during the time interval -1 in FIG. 3) of the content of the X-address counter 5 with the leftmost coordinate permits the comparator 6 to generate the coincidence signal (S-4' in FIG. 8). For this reason, the X-direction-brightness-gate signal on the signal line 301 becomes high, upon receipt of the rising edge (at point r, in FIG. 9) of the coincidence signal 5-4, as shown at 8-3 in FIG. 3. By the coincidence (during the time interval t,,-I,- in FIG. 6) of the content of the counter 5 with the rightmost coordinate, the X-direction-brightness-gate signal S-El' becomes low or goes off in response to the trailing edge (at time point 1 of the coincidence signal (5-5 in FIG. 3) from the comparator 7. The above operations are carried out for each scanning line. When the content of the counter 11 coincides with the Y-coordinate of the scanning line passing the bottom of the quardrilateral to be displayed during the time interval -1 in FIG. 9, the coincidence signal (S-lt) in FIG. 9) is obtained from the comparator 13, whereby the Y-direction-brightnessgate signal (8-12 in FIG. 9) becomes low or goes off, and the signals 5-11 and S- 13' shown in FIG. 9 are reset. In this manner, the operation of the accumulators 3 and 4 is terminated. Thus, the brightness signal is generated on the signal line 151 by the AND gate circuit 15 only when the X- and Y-direction-brightness-gate signals are simultaneously supplied through the signal lines 361 and 141 thereto, whereby a bright graphic pattern defined by a pair of line segments may be dis played against a dark background.

The above mentioned accumulator control circuit 16 will be described in more detail below with reference to FIGS. 10 and 11. The circuit 16 comprises an Exclusive-OR gate circuit 61, a binary counter 62, an AND gate circuit 63, a bistable flip-flop 64, inverters 65 and 66, AND gate circuits 67, 68, 69 and 70, and OR gate circuits 71 and 72.

In FIG. 16, the Exclusive-OR gate circuit 61, which is coupled to the comparators 12 and 13 through the signal lines 163 and 164, respectively generates an output signal only when either one (but not both) of the coincidence signals from the comparators 12 and 13 is applied thereto. Upon receipt of the trailing edge of the output signal from the gate circuit 61, the counter 62 is actuated to produce the output signal S-ll shown in FIG. 11 with respect to the coincidence signals 5-9 and 8-10. The output signal of the counter 62, transferred through a signal line 621, the reset-side output signal of the flip-flop 64, fed through a signal line 641 and the count clock pulse derived from the Y-address counter 11 through the signal line 113, are all applied to the AND gate circuit 63 whose output signal is supplied through a signal line 643 to set the flipflop 64, which is reset by the coincidence signal of the comparator 13 supplied through a signal line 165.

Assuming that the flip-flop 64 is initially reset, the reset-side output signal S-14 (see FIG. 11) of the flipflop 64- is high. Under this state, if the output signal 5-11 of the counter 62 becomes high, the output signal of the AND gate circuit 63 appears on the line 643, upon receipt of the pulse P3 of the count clock pulses 5-2 of the counter 11. Consequently, the set-side output signal (on a signal line 642) of the flip-flop 64 becomes high, and at the same time, the reset-side output signal of the flip-flop 64 (in line 641) becomes low. In this way, the signal 8-13 becomes high at a time point delayed by one line scanning time after the signal S-1 1 has become high. Thereafter, the flip-flop 64 is reset by the coincidence signal of the comparator 13.

Thus obtained output signal 8-11 of the counter 62 determines the addition operation timing of the accumulator 3 in a case where the line segment of the left side has a positive slope, and that of the accumulator 4 in a case where the line segment of the right side has a negative slope. Similarly, the set-side output signal 5-13 of the flip-flop 64 prescribes the addition operation timing of the accumulator 3 in a case where the line segment of the left side has a positive slope, and that of the accumulator 4 in a case where the line segment of the right side has a negative slope. The circuit comprising the inverters 65 and 66, AND gate circuits 67, 68, 69 and 70 and OR gate circuits 71 and 72 controls the addition operation timing of the accumulators 3 and 4- depending on the positive or negative slopes of the left and right sides of the graphic pattern. The operation for controlling the accumulator 3 will be given below with respect to the line segment of the left side. It is assumed here that the output signal of the register 1 appearing on the signal line 102 is high when the slope is positive, and is low when the slope is negative. If the output signal of the register 1 is low, the output signal of the AND gate circuit 68 is not given through a signal line 681 to the OR gate circuit 71, since the signal in the signal line 103 is low. The high output signal of the inverter 65 is supplied through a signal line 651 to the AND gate circuit 67. The circuit 67 gates the output signal from the counter 62 in order that the addition timing signal fed through a signal line 503 is generated and supplied through a signal line 671 to the OR gate circuit 71. As a result, the addition timing signal is given through the signal line 161 to the accumulator 3. Also, when the slope in the register 1 is positive, the signal on the signal line 651 is low, and the signal on signal line 103 is high, respectively. Therefore, the addition timing signal to be applied to the accumulator 3 is produced by the circuit 68 gating the set-side output signal (on the signal line 642) of the flip-flop 64. The circuit for controlling the accumulator 4 for the line segment of the right side includes the inverter 66, AND gate circuits 69 and 70 and OR gate circuit 72. The operation of the circuit will not be described because such operation can be easily derived by those skilled in the art from the above description of the control circuit for the accumulator 3. In addition, since the registers 1 and 2, accumulators 3 and 4 and X- and Y-directionbrightness-control circuits 8 and 14 of FIG. 7 are similar to those in FIG. 3, detailed description will be omitted here. The accumulators 3 and 4 used in the first and second embodiments may be of the type described in ARITHMETIC OPERATIONS IN DIGITAL COM- PUTERS (Reference 1) published by D. Van Nostrand Company, Inc., 1955, particularly on pages 101 to 113 thereof (see description on FIGS, 4-13 to FIGS. 4-24). Also, the binary counters 5, 11, 82 and 62 in the embodiments may be composed of those disclosed in a paper entitled DESIGN OF TRANSISTOR CIRCUITS FOR DIGITAL COMPUTERS (Reference 2) published by John F. Rider Publisher, lnc., I959, in particular on pages l-7 to l-9 (see description on FIGS. l-9 and 1-10) and pages 2-17 to 2-22 (see description on FIGS. 2-16, 2-17 and 2-18). Moreover, the comparators 6, 7, l2 and 13 in the embodiments may be of the type described on pages 2-32 and 2-33 (particularly, see FIGS. 2-31) of the Reference 2.

With the application of the pattern generator of the present invention to the graphic display device employing the TV-scanning technique, the scanning must be performed in synchronism with the operation of the X- and Y-address counters and 11. When the brightness signal stored in a buffer memory is repetitively read out therefrom for refreshing the display pattern, a magnetic disc, drum or delay line may be used as the buffer memory. The brightness signal is stored in the memory position in the buffer memory designated by a write address corresponding to the contents of the X- and 'Y-address counters 5 and 11, and the stored signal are read out therefrom in synchronism with the scanning of the display device.

When it is desired to display a plurality of patterns with different brightness, the level of the brightness signal for the patterns may be varied in a manner well known in the art. It is also possible to display a plurality of patterns each having a different color by adding the color information to each pattern for performing the modulation of colors.

As has been described above, the pattern generator of the present invention can generate the time-serial brightness signals for displaying the graphic pattern distinguished from other areas on the screen and suitable for the TV-type scanning. In addition, a desired line segment may be also displayed by storing the same information for displaying in the resistors 1 and 2 and the accumulators 3 and 4. Also, a plurality of the pattern generators of the present invention can be used in order to display a plurality of patterns, simultaneously.

According to the present invention, a polygon ABC- DEFG shown in FIG. 12 will also be easily displayed. More particularly, the slope of the side AB is stored in the register 1, and when the content of the Y-address counter 11 coincides with the Y-coordinate of the point B, the slope of the side BC is stored in the register 1. In like manner, when the content of the register 11 coincides with the Y-coordinate of the point C, the slope of the side CD is stored in the register 1. In the slope register 2 for the right side, the slope of the side GF is first stored and, when the content of the register 11 coincides with the Y-coordinate F, the slope of the side FE is stored in the register 11.

Furthermore, the second embodiment (see FIG. 7) of the present invention may be used for generating the brightness signal for a display device employing the interlacing scanning technique. The generation of the brightness signal is controlled by the accumulator control circuit 16. As is apparent from FIG. 6, in this case, the leftmost and rightmost coordinates are obtained for every one scanning line. For instance, in the case of a pattern defined by a pair of sides wherein the left side has a negative slope and the right side has a positive slope, the leftmost and rightmost coordinates for the scanning line (n+2) are obtained in the field 1 (of the interlaced field) including the scanning line n passing the starting points of the left and right sides by doubling the gradient of each of the left and right sides and adding the resultant value to the X-coordinates of the starting points, respectively, and in the field 2 (the field not including the starting points), the leftmost and rightmost coordinates for the scanning line (n+3) are obtained by doubling the gradient of each of the left and right sides and adding the resultant value to the X- coordinates (present on the scanning line [n+1]) increased from the X-coordinates of the starting points by the value equal to the slopes, respectively. In the case ofa pattern having a left side with a positive slope and a right side with a negative slope, in the field 1, the leftmost and rightmost coordinates for the scanning line (n+2) next to the scanning line n including the starting points are obtained by doubling the gradient of each of the left and right sides and adding the resultant value to the X-coordinates of the starting points, and thereafter, the leftmost and rightmost coordinates for the scanning line (n+4) are obtained by doubling the gradient of each of the left and right sides and adding the resultant value to the X-coordinates of the leftmost and rightmost coordinates in the preceding scanning line (n+2). In the field 2 (of the interlaced fields), for example, the leftmost and rightmost coordinates for the scanning line (n+3) can be obtained by doubling the gradient of each of the left and right sides and adding the resultant value to the X-coordinates-of the starting points.

bodiment of this novel invention, many variations and modifications will now be apparent to those'skilled in the art. Therefore this invention is to be limited, not by the specific disclosure herein, but only by the appending claims.

What is claimed is:

l. A graphic pattern generator for a TV- like line by line scanned-graphic display equipment capable of dis- .two points at which the pair of line segmentsintersect the scanning line being generated;

X-address countermeans for generating a count representing the position in the X-direction in a display surface of each scanning line as the line is being generated, and comparators (6,7) for comparing the contents of the X-address counter means with the contents of the accumulators to produce coincidence signals representing said two points of intersection of a scanning line with the line segments;

means (it) for generating an X-direction brightnessgate signal for each scanning line in response to the coincidence signals, the brightness-gate signal being supplied to display the bright or dark graphic pattern in the dark or bright background respectively;

means including registers (9,10) for temporarily storing therein maximum and minimum values of Y- coordinates of the pattern to be displayed;

a (-address counter (111) for generating a count representing the scanning position in the Y-direction in the display surface as the scan progresses scan line by scan line, and comparators (12,13) for comparing the content of the (address counter with the contents of the registers (9 and 10), to develop coincidence signals representing the maximum and minimum values of the Y-coordinates of the pattern to be displayed;

means (M) for generating a Y-direction-brightnessgate signal in response to the coincidence signals obtained from the Y-direction comparators (l2 and 13); and an AND gate circuit (15) for producing an output signal upon simultaneous receipt of the X- and Y-direction-brightness-gate signals.

2. A pattern generator as defined in claim 1 further comprising an accumulator control circuit (16) for controlling the addition operation of said accumulators (3%) whereby the addition timing of the accumulators is determined depending upon the positive and negative signs of slopes ofthe pair of line segments forming the graphic pattern.

3. Pattern generator means for controlling the generation of a pattern upon cathode ray tube type display devices wherein the display device generates patterns operation and wherein at least a portion of the pattern is defined by a pair of sloping lines intersecting said scan lines, said means comprising: 5 first and second accumulator means for storing data representing the coordinate of the starting point end of each of-said sloping lines, the starting point enc being that end which is first traversed during a scan;

coordinate identifier means for generating a count representative of one of the coordinates which identify the location of each scan line as it progresses;

means for comparing the contents of said accumula' tors with said identifier means for generating a signal whose-duration represents the time interval during which a scan line moves between the starting points of'said sloping lines.

4-. The pattern generator means of claim 3 further comprising first and second storage means each storing data representing the slopes of one of said sloping lines;

means for summing the slopes values into one of said accumulators as each new scan line is generated to scan line w1ll intersect the sloping lines.

5. The pattern generator means of claim 4 further comprising;

third and fourth storage means for storing data rcspectively representing the remaining coordinate of each end point of at least one of said sloping lines;

second identifier means for generating a count repre senting the other coordinate of the scan as it progresses;

second means for comparing the contents of said third and fourth storage means with said second identifier means for generating a signal whose time interval represents the time required for the scan lines to traverse the said end points as the scan pro gresses.

6. The means of claim 5 further comprising means coupled to said first and second comparator means for generating a contrast signal whose time duration represents the time required for the scan lines to traverse the region defined by said sloping lines.

7. The means of claim 6 further comprising means coupled to the display device and controlled by said contrast signal for generating said pattern in a manner which contrasts sharply with the region immediately surrounding said pattern.

8. The means of claim 7 further comprising accumulator control means coupled to the second comparator means and the first and second identifier means and the first and second storage means for controlling the time at which the slope values are summed with the accumulators wherein the slope values are inserted into their accumulators delayed by one scan line depending on the positive and negative signs of the slope values.

9. A method for controlling the generation of a pattern in a display device of the cathode ray tube type comprising a. scanning the display in a line by line fashion;

b. generating a first count representing the position of the line presently scanning the display;

c. generating a second count representing the line presently scanning the display face;

by a typical raster type scan line by scan line scanning identify the locations at which the newly generated d. storing the X, Y coordinates of the starting points of a pair of sloping lines intersecting the scan lines and representing the periphery of the pattern to be displayed;

e. storing data representing the slopes of each of the pair of sloping lines;

f. comparing the X coordinates of the starting points of the pair of sloping lines with the first count to develop an .X-pattern signal having a time duration equal to the length of time required for each scan line to move between the two X-coordinates;

g. comparing the Y-coordinates of the starting and finishing points of at least one of the pair of sloping lines against the second count to generate a Y- pattern control signal having a time duration equal to the length of time required for the scan lines to pass through the Y-start and finish coordinates;

h. applying a pattern control signal to the display device only when said X- and (pattern control signals are simultaneously present to cause the portion of the pattern represented by the pair of sloping lines to appear on the display in sharp contrast to the region of the display surrounding the pattern.

10. The method of claim 9 further comprising i. summing the slope value of each of the pair of lines with the X-coordinate of sloping the starting point of its associated sloping line to alter the X-pattern signal for the next scan line.

11. The method of claim 10 further comprising repeating step (i) as each new scan line is generated until the value of the second count exceeds the value of the Y-coordinate of the finishing point of the said one of the pair of sloping lines.

12. The method of sloping claim 11 wherein step (i) further comprises controlling the time at which each slope value is summed to the last generated X- coordinates of the pair of lines in accordance with the sign (positive or negative) of the slope.

l l l

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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US4228432 *Aug 28, 1979Oct 14, 1980The United States Of America As Represented By The Secretary Of The NavyRaster scan generator for plan view display
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Classifications
U.S. Classification315/383, 315/365, 345/24
International ClassificationG09G5/42
Cooperative ClassificationG09G5/42
European ClassificationG09G5/42