|Publication number||US3872435 A|
|Publication date||Mar 18, 1975|
|Filing date||May 18, 1973|
|Priority date||May 18, 1973|
|Publication number||US 3872435 A, US 3872435A, US-A-3872435, US3872435 A, US3872435A|
|Inventors||Cestaro Victor L|
|Original Assignee||Cestaro Victor L|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (5), Referenced by (45), Classifications (15)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent Primary E.\'aminer-Harold l. Pitts Almrney Agent, or Firm-Bauer & Amer Cestaro Mar. 18, 1975 OPTO-ELECTRONIC SECURITY SYSTEM  ABSTRACT lnvemofi victor Cestam, l9 Allegheny DR An opto-electronic security system comprising an op- WeSt, Farmingville, 11738 to-electronic key device and an opto-electronic lock  Filed. May 18, 1973 apparatus. The key device comprises a housing containing no source of electrical power but having means l PP 361,807 for generating a plurality of distinct preselected signal pulse trains in a predetermined manner to correspond-  CL" 340/147 MD, 34O/149 R 0/149 A, ingly activate light emitting sources, preferably opera- 340/274 ble 1n the infra-red spectrumJlhe opto-electromc lock  Int. Cl. H04q 9/00 E an decimal power l mealis  Field of Searchm" 340/l47 R, 147 MD 149 R for recelvmg said key device and for supplying electri- 34O/164 R, 274; 317/134 cal power to said key device for energization thereof,
light sensing means disposed in optical alignment with  References Cited aiddlightdemittincgl sougces and dita pirocclzssingj meansl or eco mg sat pre etermine an se ecte signa D STATES PATENTS pulse trains of said key device as received by said light 3,500,326 3/1970 Beniord 340/164 R Sensing means. T opto electronic lock apparatus has 33 3 12/1370 gf g a predetermined code associated therewith and being 3401149 R operative to electrically actuate a locking mechanism 316861659 8/197 Kostrom... ...mi: ..340/274 into Position when Said decoded Signals are coincident with said predetermined code, and alarm means operatively connectedwith said lock apparatus and actuable thereby when said decoded signals are not coincident with said predetermined code.
18 Claims, 9 Drawing Figures PATEI'HEU I 3,872,485
sum 1 BF 6 FIG. IA
PARALLEL k DATA 36 oB| |gE s kfigw COUNTER 3$ REGISTER L CLEAR CLOCK 28 3o em- 46 I 7 LED DIVIDE BY J OSCILLATOR 2 CLOCK 34 GENERATOR CLEAR 38 FIG. 2 v Q E CHANISM DRIVER DIVIDE BY 8 COUNTER FIG. 3
PATENTED J 81975 sumuufgg IIIII mOwZww PATENTEB MAR I 8 i975 SHEET S [If 6 mskzo w w .v n N V630 w m v m N x0040 1 OPTO-ELECTRONIC SECURITY SYSTEM CROSS REFERENCE TO RELATED APPLICATION This application is a refiling of application Ser. No. 2l 1,5 l I, filed Dec. 23, l97l, now abandoned.
BACKGROUND OF THE INVENTION The present invention pertains to a new and novel electronic security system and apparatus which encompasses a new opto-electronic lock apparatus including bolt actuating circuitry.
Heretofore, electro-optical security systems and magnetic card systems employed, although an improvement in the art, did not provide a system which was extremely difficult to pick. The use of mechanical keys having predeterminedly spaced openings therein for optical transmission therethrough was capable of duplication without a great deal of difficulties by those expertise in the field of picking lock and security systems. The same difficulties arose in conjunction with magnetic card security systems.
SUMMARY OF THE INVENTION Accordingly, it is the primary object of the present invention to provide a new and novel opto-electronic security system having an externally appearing complexity of such magnitudeas to'render the same virtually impenetrable.
It is another object of thepresent invention to provide an opto-electronic security system of the foregoing type which incorporates solid state logic components so as to require a minimal size physical apparatus for the system provided.
It is a further object of the present invention to provide an opto-electronic security system of the foregoing type including an opto-electronic key device and an opto-electronic lock apparatus wherein the key device and lock apparatus are precoded and wherein said lock apparatus includes means for periodically continuously verifying the matching of the codes when the key device and lock apparatus are placed in operating relationship, so as to initially open a lock mechanism and thereafter maintain the same in an open condition.
-It is yet a further object of the present invention to provide an opto-electronic key device which does not include an electrical power source as an integral element thereof, which is encased in a housing of minimal size and which has the elements thereof encapsulated in epoxy after fabrication thereof to prevent disassembly and inspection without districtions of the device.
BRIEF DESCRIPTION OF THE DRAWINGS The foregoing and other object, features and advantages of the present invention will become more apparent from the detail description hereinafter when considered in conjunction with the accompanying drawings wherein:
FIG. 1A is a perspective view of the opto-electronic key device of the opto-electronic security system which is constructed pursuant to the principles of the present invention;
FIG. 1B is a partial perspective view of the door of the lock apparatus containing a key receiving recepticle;
FIG. 2 is a functional electrical block diagram of the opto-electronic key device of the present invention and mechanically shown in FIG. 1;
FIG. 3 is a functional electrical block diagram of the opto-electronic lock apparatus of the present invention;
FIG. 4 is a combination electrical schematic and logic diagram of the block illustrated functional components of the key device depicted in FIG. 2;
FIG. 5 is a logic diagram of the block illustrated functional components depicted in FIG. 3;
FIG. 6 is an electrical schematic representation of several of the functional block components illustrated in FIG. 3;
FIG. 7 is a timing chart depicting the waveforms of the data transmission of the key device shown in FIG. 2; and
FIG. 8 is a timing chart depicting the waveforms of the data processing information of the lock apparatus of FIG. 3.
Referring now to the drawings, and more particularly to FIG. 1 thereof, there is depicted an opto-electronic key device 10 constructed in accordance with the principles of the present invention. The device 10 comprises a substantially rectangular shaped housing 12 having three separate and distinct light ports 14, I6 and 18 formed in one of the walls 20 of the housing and whose purposes will be discussed more fully hereinafter. The top wall 22 of the housing 12 is provided with power contacts or terminals 24 and 26 which are adapted to be connected with a source of DC. voltage, as will be discussed hereinafter. It is herein to be noted the key device 10 employs solid state, and in particular integrated circuitry, so that the actual size of the same is about that of a small cigarette lighter but of lesser weight. Thus, the key device may easily be carried upon a key ring.
Referring now to FIG. 2, it will be seen that the key device 10 comprises an oscillator 28 whose output is connected as the input of a divide by 2 clock generator 30. Outputs from clock generator 30 are fed to a parallel to serial shift register 32, to a shift and clear generator 34 and to a divider counter 36 having a division factor in the present embodiment of 8. Outputs from the divide by 8 counter 36 are fed as inputs to the register 32 and to the shift and clear generator 34. An output from the generator 34 is fed to the register 32 as the third input thereof, while another output from the generator 34 is fed as an input to the CLEAR (CLR) light emitting diode (hereinafter referred to as LED) 38 via a coupling resistor 40 (FIG. 4). Similarly, the output of the shift register 32 is fed to the DATA LED 42 via a coupling resistor 44 while the output from the clock generator 30 is fed to the CLOCK LED 46 via a coupling resistor 48. It is herein to be noted that the anodes of each of the LEDs 38, 42 and 46 are connected to a source of positive potential via the positive power terminal 24, as will be described hereinafter.
After the key device 10 has been placed in its operating position by inserting the same into the key receiving recepticle 47 provided in the door 49 of the lock apparatus (FIG. 1B), a positive potential is applied to the power terminal 24, the astable multi-vibrator oscillator 28 which includes transistors Q1 and Q2 drives the 2 to 1 flip-flop counter 30 which is part of an integrated circuit designated 1C4, of the SN 7473 type, to generate square wave CLOCK pulses whose waveform is indicated as 50 in FIGS. 7 and 8 and where periodicity or repetition rate is dependent upon the frequency of oscillation of the multivibrator 28.
The CLOCK pulses 50 are fed to the parallel inserial out shift register 32 comprising an integrated circuit designated ICS of the SN 74166 type, via the input ter minal 7 thereof while the complementary pulses CLOCK designated 52 are fed to the divide by 8 counter 36, designated as IC2, via an input terminal thereof, the circuit IC2 being of the SN 7493 type.
The shift register ICS is programmed with the lock combination of the corresponding lock apparatus and which comprises BIT 1 through BIT 8 and which for the purposes of the present description may be assumed to be the binary number lllOlOOl (2 33). All of the parallel inputs to the shift register are normally set at the l state corresponding to a voltage level which is either positive or negative with respect to ground and are adapted to be switched to a state by the application of a ground potential (zero volts) to the corresponding pin at that particular bit of the parallel inputs designated BIT 1 through BIT 8.
With particular reference to FIGS. 7 and 8, upon every transition of the individual CLOCK pulses from the 0 state to the I state, a DATA bit is shifted outwardly from the shift register from left to right commencing with BIT A" and as viewed in FIG. 4. When this occurs, the output of LED DATA is switched off and remains in this state until the DATA pulses 54 return to the 0 state. However, when power is initially applied to the system of FIG. 2, there will be no shifting of DATA from the register until the SHIFT pulse input 55 has switchedto its 0 state (FIG. 7). When the SHIFT input attains its 0 state, the parallel inputs are fed into SN 7400 N type and IC3 of the SN 7410 type comprise the shift and clear generator 34.
The CLOCK, CLR and DATA pulses are applied to the LEDs 46, 38 and 42, respectively, which are disthe shift register IC5 during the next succeeding CLOCK pulse. Thereafter the SHIFT input returns to the I state and the CLK-INH pulse 56 returns to its 0 state/Thus, no DATA can be shifted out from the shift register until sufficient time has transpired to permit 1 l CLOCK pulses to be counted, wherefore, actual DATA transmission commences on the twelfth CLOCK pulse. This operation prevents any spurious operation of the system which might result in the false activation of the alarm system of the lock apparatus, as will be discussed hereinafter, and insures that no DATA transmission occurs until after the system has been stabilized.
The SHIFT pulse 55 is generated by that part of counter circuit IC4 which is part of the shift and clear generator 34 and on the ninth CLOCK pulse, the .I input of this flip-flopis armed" by being switched to its 1 state which appears at the pin 14 of this integrated circuit. The count of nine (CNT 9) is gated with the ninth CLOCK pulse to generate the INH pulse 58 (FIG. 7) which pulse is applied to the clock input of IC4 at pin 1. When the [NH pulse 58 falls to its 0 state, the SHIFT output 55 is switched to itsO state to commence the SHIFT pulse, as seen by FIG. 7. Upon the negative transition of the eleventh CLOCK pulse which is coincident with CNT l, CNT 2 and CNT 8, and thus CNT 11, counter IC4 is forced to reset at its R input when it is switched to its 0 state by the application of the CNT 11 pulse 60 thereto. When the counter [C4 is reset, the output at pin 13 thereof, which is the SHIFT output, is switched back to its L state to end the described portion of IC4 in conjunction with ICl of the posed in coaxial alignment with the ports 14, 16 and 18 of the key device housing 12. The light transmission from the LEDs is then received by the light sensing means of the lock apparatus, will now be described in detail.
With particular reference to FIG. 3, there is depicted the opto-electronic lock apparatus of the present invention which is generally denoted by the reference numeral 60. The apparatus 60 includes a DATA light sensing diode (hereinafter referred to as LSD) 62, a CLEAR (CLR) LSD 64, and a CLOCK LSD 66. The LSDs 62, 64 and 66 are disposed in optical alignment with the LEDs 42, 38 and 46, respectively. The pulse outputs of the LSDs 62, 64 and 66 are amplified by amplifiers 68, 70 and 72, respectively, each of which comprises a three-stage amplification circuit, as clearly seen in FIG. 6.
The outputs of amplifiers 68 and 70 are fed to the input of a serial to parallel shift register 74 while the output of amplifier 72 is fed as an input to the register 74 and to a divide'by 8 counter 76. The parallel outputs from register 74 are fed to a decoder 78 whose output is fed simultaneously to an and gate 80 and an alarm generator 82. The output from counter 76 is fed both to the And gate 80 and to the alarm generator 82. The output of alarm generator 82 is connected to an alarm system 84 and through a timer circuit 86 as a third input of the gate 80. The output of gate 80 is connected to a driver mechanism 88 which is in turn connected to the actual bolt locking or other locking mechanism 90.
With reference to FIG. 5, when the key device 10 is inserted into the recepticle 47 provided therefor (FIG. 1B) in the door 49 of the lock apparatus 60, a leaf switch 92 is closed and power is applied to the entire system; i.e., to the lock apparatus 60-and to the key device 10 via the power terminals 24 and 26, as discussed hereinbefore.
When the system is activated and there is pulse transmission via the LEDs 38, 42 and 46, the transmissions are received by the LSDs 62, 64 and 66 and then supplied to the register 74. The'DATA pulse train 54 (FIG. 8) is entered at the serial input of the register and shifted therethrough by means of the CLOCK pulses 94.
The register 74 is comprised of two integrated circuits denoted IC6 and IC7 (FIG. 5), both of the SN 7495 type. The decoder 78 comprises the integrated circuits IC8, IC9, IC10 and [C11, with IC8 and [C9 being of the SN 7404 type, IC10 being of the SN 7430 type and [C11 being of the SN 7400 type. The combination of IC6 and IC7 is sampled upon the occurrence of every eighth CLOCK pulse and if coincidence occurs, then IC10 is shifted to its 0 state and the output thereof is inverted to a I state by means of the inverter amplifier portion of IC9. Upon the occurrence of the eighth CLOCK pulse CNT 8, denoted by reference numeral 96 in FIG. 8, the output of the decoder 78 is switched to its 0 state by virtue of the pulse coincidence condition at IC ll. This 0 state output pulse is applied as the input at terminal 98 of a retriggerable monostable multivibrator which is schematically illustrated as [C14 of the SN 74 l 28 type and which comprises alarm generator 82.
[f continuous decode pulses persist to provide an input at terminal 98, then the output of [C14 will stay in its 1 state, whereat the pulse output will be present at pin 8 thereof to signify and maintain an open condition of the lock apparatus 60. This is due to the fact that the capacitor 100 connected between pins 11 and 13 of [C14 and resistor [02 connected to pin 13 thereof provide a time constant which is longer than the period of twelve consecutive CLOCK pulses but of sufficiently short duration so that the bolt actuating relay 104 of the bolt activating amplifier [06 (H6. 6) will not remain constantly energized by a single decode pulse applied to terminal 98. This feature of the system prevents the use of multiple code picking devices for actuating the lock mechanism.
Should a burglar or other unauthorized personnel attempt to gain access by inserting an improper key device in the receptiele provided therefor in the lock apparatus, then the following sequential operation will ensue. The KEY-[N input, which is pin 1 of [C11, is switched to its 1 state. This is usual, however, since this is the condition that occurs whenever power is applied to the system but OPEN will remain in its 1 state due to the fact that there is no decode pulse at the output of lCll. Thus, the J input of the flip-flop [C13 of the SN 7473 type becomes armed in its 1 state and if it remains thereaft upon the pulse 96 (CNT 8) is switched to its 0 state, the output of [C13 is switched to its 1 state. When the output of [C13 is in its 1 state it forward biases the base to emitter junction of transistor Q via the coupling and voltage divider biasing resistor 108 to cause current flow through the collector to emitter circuit of the transistor. This conduction causes current flow through the relay coil 110 of the alarm holding relay [12. The relay [[2 has a pair of normally open contacts in its deenergized condition and a pair of normally closed contacts [14 in its energized condition. The normally open contacts are in parallel with the leaf switch 92 so that power remains applied to the system but the closing of contacts 114 activates any external type of alarm system connected thereto.
The integrated circuit [C13 in conjunction with transistor 015 comprises driver mechanism 88.
[t is herein to be noted that the alarm system may be any type of audible or visual alarm, such as a bell, buzzer, light or relay actuating device to dial a predetermined telephone number to inform a security agency or a police agency of the unauthorized attempt at access to the lock assembly.
The proper combination for a particular lock assembly is selected during the manufacture thereof by wiring of the inputs of [C10 to either the input or output sides of the inverter amplifiers [C8 and [C9 and more particularly to pins 1 through 12 and pins 5 through 8 thereof, respectively. When the properly coded key device is used, the forced reset (R) of [C13 will be switched to its 0 state when there is a DECODE output. This will reset the alarm holding relay [[2 by causing the output at pin 9 of [C13 to be switched to its 0 state and remove the forward bias on transistor 015. The circuit may also be reset from inside the lock apparatus by momentarily removing the power applied to the system.
lt will thus be seen that there has been described a new and novel opto-electronic security system which is virtually tamperproof.
While there has been described the preferred embodiment of the present invention, it will be apparent to those skilled in the art that there are many changes, modifications and improvements which may be made in the present invention without departing from the spirit and scope thereof as discussed and described in the foregoing specification.
What is claimed is:
1. An opto-electronic security system for controling locking means, comprising key means for producing distinct signal trains and transmitting said signal trains as light signals in accordance with a predetermined code combination, and
lock means for receiving the light signals,
said lock means comprising alarm means and decoding means electrically connected to said locking means and said alarm means for decoding the light signals in a predetermined manner whereby when the decoded signals compare with the predetermined code combination said locking means is actuated and opened and when the decoded signals do not compare with the predetermined code combination said locking means is maintained closed and the alarm means is activated.
2. An opto-electronic security system as claimed in claim 1, wherein said key means comprises timing means for delaying the transmission of specific light signals to said lock means.
3. An opto-electronic security system as claimed in claim 2, wherein said key means is absent of any electrical power supply means, and
said lock means includes a receptacle for accommodating the key means and means for supplying electrical power to said key means when the latter is inserted in saidreceptacle.
4. An opto-electronic security system as claimed in claim 3, wherein said key means comprises integrated circuit means for producing distinct electrical signal trains of the predetermined code combination and light emitting diode means electrically connected to the electrical signal train producing means for converting the electrical signal trains into light signals of the same code combination.
5. An opto-electronic security system as claimed in claim 4, wherein said electrical signal train producing means of the key means comprises oscillator means having an output,
clock signal generating means having an input electrically connected to the output of said oscillator means, and
a plurality of outputs for providing clock pulses thereat,
counting means having an input electrically connected to an output of the clock signal generating means, and a pair of outputs, shift and generating means having a first input electrically connected to an output of the clock signal generating means, a second input electrically connected to a first output of said counting means, and a pair of outputs, parallel to serial shift register means having 6. An opto-electronic security system as claimed in claim 5, wherein said clock signal generating means is operative to disaid light sensingdiodes converting light signals rean input electrically connected to the second of said light emitting diode means of said key means comprising I a first light emitting diode electrically connected to the second output of said shift and clear generating means for transmitting clear" light pulses,
a second light emitting diode electrically connected to an output of said clock signal generating means for transmitting clock light pulses,
a third light emitting diode electrically connected to said output of said shift register means for transmitting encoded data light pulses.
vide the output of said oscillator means by a factor of 2.
7. An opto-electronic security system as claimed in claim 6, wherein said counting means comprises a divide by 8 counter. 8. An opto-electronic security system as claimed in claim 7, wherein claim 5, wherein said light emitting diodes transmit light pulses in th infrared range of the spectrum.
10. An opto-electronic security system as claimed in claim 9, wherein said lock means comprises a plurality of light sensing diodes each of which is disposed in optical align- 'ment with a corresponding one of said light emitting diodes when said key means is in proper position within saidtreceptacle,
ceived from said light emitting diodes into corresponding electrical signals,
- each of said light sensing diodes having an output,
said decoding means comprising integrated circuit means having a plurality of inputs electrically coupled to the outputs of the amplifying means and a pair of outputs, and said decoding means determining coincidence between said electrical signals produced by said light emitting diodes and said predetermined code combination.
11. An opto-electronic security system as claimed in claim 10, .wherein said lock means further comprises integrated circuit serial to parallel shift register means having a plurality of inputs each electrically connected to the output of a corresponding one of said amplifying v means and a plurality of outputs each electrically connected to a corresponding one of the inputs of said decoding means,
counting means having an input electrically connected to the output of one of said amplifying means and a pair of outputs, and
additional timing means,
said alarm means havingan input electrically connected to an output of said decoding means and an other input electrically connected to an output of said counting means, and
said locking means being electrically connected to an output of said counting means and to said additional timing means.
12. A light signal transmitter key apparatus, comprisintegrated circuit means for producing distinct electrical signal trains of a predetermined code combination; light emitting diode means connected to said electrical signal train producing means for converting I a plurality of outputs for providing clock pulses thereat, counting means having an input electrically connected to an output of the clock signal generating means, and, a pair of outputs, shift and clear generating means having a first input electrically connected to an output of the clock signal generating means, a. second input electrically connected to a first output of the counting means, and a pair of outputs, parallel to serial shift register means having an input electrically'connected to the second of said outputs of said counting means, an input electrically connected to an output off said clock signal generating means, an input electrically connected to an output of said shift and clear generating means, and an output. 14. An opto-electronic security system as claimed in claim 13, wherein said clock signal generating means is operative to divide the output of said oscillator means by a factor of 2. 15. An opto-electronic security system as claimed in claim 14, wherein said counting means comprises a divide by 8 counter. 16. An opto-electronic security system as claimed in claim 15, wherein said clock signal generating means is operative to provide square wave clock pulses at the outputs thereof. 17. A light signal transmitter key apparatus as claimed in claim 13, wherein to the output of said shift register means for transmitting encoded data" light pulses. 18. A light signal transmitter key apparatus as claimed in claim 17, wherein said light emitting diodes transmit light pulses in the infrared range of the spectrum.
* =l l l l
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|U.S. Classification||340/5.64, 340/542, 361/172, 340/5.65, 340/600|
|International Classification||G07F7/08, G07C9/00|
|Cooperative Classification||G07C2009/00785, G07F7/0866, G07C9/00119, G07C2009/00603, G07C9/00182|
|European Classification||G07F7/08C, G07C9/00E2, G07C9/00B12|