|Publication number||US3894265 A|
|Publication date||Jul 8, 1975|
|Filing date||Feb 11, 1974|
|Priority date||Feb 11, 1974|
|Also published as||CA1041160A, CA1041160A1, DE2505453A1|
|Publication number||US 3894265 A, US 3894265A, US-A-3894265, US3894265 A, US3894265A|
|Inventors||Kenneth P Holmes, Carl R Snyder|
|Original Assignee||Esquire Inc|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (1), Referenced by (43), Classifications (12), Legal Events (1)|
|External Links: USPTO, USPTO Assignment, Espacenet|
United States Patent [1 1 Holmes et al.
[451 July 8,1975
[ HIGH INTENSITY LAMP DIMMING CIRCUIT  Assignee: Esquire, Inc., New York, NY.
 Filed: Feb. 11, 1974  Appl. No: 441,429
 References Cited UNITED STATES PATENTS Snyder Primary Examiner-James W. Lawrence Assistant Examiner-E. R. LaRoche ABSTRACT A high intensity lamp dimming circuit in which the lamp or lamps are placed in series with a pair of reactive elements, one of which is at least partially bypassed when the voltage across the element and the current through it are of the same polarity. The relative time of the bypass determines the amplitude of the lamp current and hence its brightness. A control network, isolated from the power lines to which the lamp network is connected, controls the timing of the bypass. This control network preferably uses a programmable unijunction transistor and operates on a low-level dc setting. The control circuit design permits ready connection to single phase and three phase power systems alike.
29 Claims, 16 Drawing Figures 16 15 I 32 I 14- i i l1 1 12 J l gl rz 54 SHEEI FULL LAMP CURRENT LAMP VOLTAGE DIM LAMP CURRENT FULL 01v STATE IT I2 I 1 0 DIM STATE FIG. 20
1; BEFORE 1, IF rR/Ac NOT FIRED FIRING WAC I1 AFTER TR/AC COMMUTATES e 1 AFTER FIRING TR/AC F /G.2b 6 5 h BETWEEN 0 AND as *nf 'auu @575 B94265 saw 5 v'Vvv I22 I TRIAC I i MODULE CURRENT VOLTAGE I SENSOR E SENSOR I I L \IS L INHIBIT (ENABLE) 10 7 CONTROL 704 CIRCUIT TRANSISTOR ZERO- ONE SHOT SHUNT L/NE CROSSING MULTMBRA TOR ACROSS DETECTOR ANODE 0F T PM 60 TO GND.
I00 96 9a 76 I TRANSISTOR SHUNT LINE PEAK ONE SHOT ACROSS DETECTOR MUL TI VIBRA TOR ANODE 7 PUT 60 TO ONO.
HIGH INTENSITY LAMP DIMMING CIRCUIT BACKGROUND OF THE INVENTION l. Field of the Invention This invention relates to lamp dimming circuits for high intensity discharge lamps, such as mercury vapor lamps, having two electrode terminals and no heater, and more specifically, to improved control circuits which are isolated from the lamp circuits for convenience of making multiple connections, both single phase and three phase, and for safety.
2. Description of the Prior Art Mercury vapor and other metallic-additive high intensity discharge (I-l.l.D.) lamps have found widespread acceptance in lighting large areas, such as warehouses, gymnasiums, and the like, primarily because of their relatively high efficiency and low maintenance when compared to incandescent lighting systems. There has been general approval of "such systems for large area illumination in spite of the fact that therer has been no wide-spread satisfactory method of reducing the illumination during periods when full illumination has not been desired. When it is desired to reduce illumination in an area normally lit by a high intensity discharge lamp system, it has been necessary either to completely turn off some of the lamps in the system or to switch to an auxiliary incandescent or fluorescent lamp system.
Switching off some lamps and not others gives unsatisfactory full-range control and increases the complexities of the system by requiring additional wiring, switching equipment, etc. Having to provide an auxiliary system likewise greatly increases the complexities of the overall lighting system. In addition to additional wiring and switches, additional fixtures, lamps and even power handling equipment is required when an auxiliary system is employed.
Only recently has a system been developed which could incorporate a dimming control system directly into a high intensity discharge lamp network. This system is revealed in copending patent application Ser. No. 353,793, filed Apr. 23, 1973, now US. Pat. No. 3,816,794, and entitled High Intensity Gas Discharge Lamp Dimmer System, a continuation of patent appli cation Ser. No. 238,800, filed Mar. 28, 1972, now
abandoned, assigned to the same assignee as the present application. Before this system was marketed, it was widely supposed that when power consumption was reduced in a high intensity discharge lamp, electrode sputtering would result, which would cause damage to the environment within the lamp. Such damage would greatly reduce the life of the lamps and also cause undesirable flickering. Second, the existing dimming circuits for incandescent and fluorescent lamps caused the extinguishment of a high intensity discharge lamp. This is because such circuits actually turn off the lamps with which they operate for short periods of time during each operating cycle. Although this mode of operation was acceptable for incandescent and fluorescent lamp operation, it was not acceptable for operation with high intensity discharge lamps. Such a lamp, once turned off, requires a relatively long cooling period after extinguishment before it can be restarted.
It was discovered, however, that by employing a dimmer circuit that did not cause off time during half cycles in lamp current, but which was controllable for changing its rms value without having dwell time at zero, that a practical high intensity discharge lamp system could be dimmed. The reduction of current through a high intensity discharge lamp could be effective in providing dimming without damage to the lamp by bypassing current around an accompanying ballast element and hence achieving reduction of lamp current for part of a half cycle, provided such operation did not operate to cause bypass current flow at such times when the accompanying ballast element voltage and current are of opposite polarity.
Because phasing of ballast voltage and current was so important, the control circuit and the lamp circuit were operated from the same power connections. This was the case even though it is common in other types of control circuits to have one power circuit for the lamp fixtures and another for the control and switching components. When the control and lamp fixtures in the prior art system were connected separately to a line source, overloads could often occur and fuses would blow. Not only was this a nuisance, but every light fixture had to have a protective fuse or circuit breaker of its own. Further, the control circuit for a three phase circuit was considerably different from a single phase circuit. Therefore, one circuit had to be fabricated for a single phase application and another quite different circuit had to be fabricated for a three phase application, rather than having one basic circuit which permitted modification or simple additional components to be connected, as required, in the field at the time of installation into either a single phase or a three phase power circuit.
It is therefore a feature of this invention to provide improved apparatus as part of a dimming circuit for a high intensity discharge lamp which includes provisions for separate power connections to the lamp and for the control and switching circuit, thereby effectively isolating these components from each other.
It is another feature of this invention to provide an improved dimming circuit for a high intensity discharge lamp which includes provisions for operating in a single phase or a three phase power distribution system with little modification.
[t is still another feature of this invention to provide improved apparatus as part of a dimming circuit for a high intensity discharge lamp including a programmable unijunction transistor as part of a control network, such use increasing the flexibility of control and reducing the cost of components when compared with prior art control networks.
SUMMARY OF THE INVENTION A preferred embodiment of the present invention comprises, in combination with a single high intensity discharge lamp, circuitry operating with two ballast elements connected in series with the lamps and a control circuit for operating a bypass to one of the elements.
Preferably, this bypass includes a gated triac, the voltage for its gate being derived from a transformer that isolates the power distribution circuit for the lamp from a controllable gate source voltage used for determining the conduction time of the triac.
The gate source voltage is controlled by a signal derived from a voltage in phase with the ac power distribution line, such as from a transformer-full-wavebridge-and-zener-diode-regulator connection to the like. A programmable unijunction transistor (PUT) connected to the regulated voltage is also connected to be gated on by a voltage derived from a time constant network. The output of the PUT is applied to the gate of a triac, in the output line from the control circuit. The gate source voltage out of the control circuit is clipped by two cathode-connected zener diodes so that the gated bypass triac in the bypass network is conductive only when the voltage across the bypass to the reactor element is in polarity with the current therethrough.
A variable resistor and diode connection may be connected to each of three bridge rectifiers in a three phase power distribution system and also connected to each of three programmable unijunction transistors in three separate control networks for operating in three separate high intensity discharge lamp networks, one network drawing its power from each of the phases. The simple connection does not require additional fuses for each control network or for each lamp network and does not interfere with the isolation qualities of the control network from the power distribution line for each of the lamp networks, thereby making the single phase system and the three phase system virtually identical.
BRIEF DESCRIPTION OF THE DRAWINGS So that the manner in which the above-recited features, advantages and objects of the invention, as well as others which will become apparent, are attained and can be understood in detail, more particular description of the invention briefly summarized above may be had by reference to the embodiments thereof which are illustrated in the appended drawings, which drawings form a part of this specification. It is noted, however, that the appended drawings illustrate only typical embodiments of the invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments. in The Drawings:
FIG. 1 is a schematic diagram of a preferred embodiment of dimming apparatus in accordance with the present invention.
FIG. 2 is a waveform diagram showing the amplitude and phase relationship existing in the lamp voltage and the range of bright and dim currents in the circuit shown in FIG. 1.
FIG. 2a is a waveform diagram illustrating relative currents to achieve full and dim conditions.
FIG. 2b is a waveform diagram illustrating summing of currents to achieve an intermediate current value between full and dim.
FIG. 3 is a waveform diagram showing the amplitude and phase relationship existing in various important voltages and currents in the circuit shown in FIG. 1.
FIG. 4 is a partial schematic diagram showing the connection of multiple control electronics in a single control system in accordance with the present invention.
FIG. 5 is a block diagram of an alternate embodiment for limiting the timing of the control circuit of the present invention.
FIG. 6 is a block diagram of another alternate embodiment for limiting the timing of the control circuit of the present invention.
FIG. 7 is a block diagram of an alternate embodiment for limiting the timing of the bypass circuit of the present invention.
FIG. 8 is a partial schematic diagram of an alternate control circuit of the present invention.
FIG. 9 is a partial block diagram of an alternate arrangement of the triac module in the present invention.
FIG. 10 is a partial block diagram of another alternate arrangement of the triac module in the present invention.
FIG. 11 is a partial block diagram of an alternate arrangement of the triac module in the present invention, the arrangement also employing a high reactance autotransformer.
FIG. 12 is a partial block diagram of another allternate arrangement of the triac module in the present invention, the arrangement also employing a high reactance autotransformer.
FIG. 13 is a partial block diagram of an alternate arrangement of the triac module in the present invention, the arrangement also employing an autotransformer.
FIG. 14 is a partial block diagram of another alternate arrangement of the triac module in the present invention, the arrangement also employing an autotransformer.
DESCRIPTION OF PREFERRED EMBODIMENT Now referring to the drawings and first to FIG. 1, high intensity discharge lamp 10 is connected in series with two inductive ballast elements 12 and 14, the entire combination being connected between lines 16 and 18. Gated bypass means in the form of traic 20 is connected across element 14, first main terminal 22 of the triac being connected to line 16 and second main terminal 24 being connected to a junction between the two elements. Gate terminal 26 is connected to shunt resistor 28, which is also connected to line 16. Resistor 30 and capacitor 32, connected in series with each other and in parallel with element 14, are provided as a snubber device to provide triac 20 immunity from commutating dv/dt false turn on. Two pairs of diodes 34 and 36 and 38 and 40 connected to gate 26 provide the gate source voltage to triac 20 from transformer 42. These diodes are connected so that two diodes 34 and 36 face forward and two diodes 38 and 40 face backwards, with the junction point between each pair being connected together. Diodes 34, 36, 3B and 40 provide a slight forward voltage drop to block out the residual magnetizing force from transformer 42 and to thereby prevent false firing of triac 20. Everything between and including transformer 42 and its accompanying load resistor 52, and inductor 14 may be considered to be in triac module 15.
When triac 20 is conducting to form a complete bypass around element 14, a maximum amount of current (designated "full lamp current" in FIGS. 2 and 3) flows through lamp 10. On the other hand, when triac 20 is not conducting, then the minimum amount of current flows through lamp 10, as indicated by the dim lamp current curve in FIGS. 2 and 3. By allowing triac 20 to conduct for part of the cycle as shown by the dash lines in FIG. 2, then the current through lamp 10, and hence the illumination therefrom, may be varied between the dim lamp current and full lamp current values. A short period of conduction by triac 20 creates a curve 101, a little longer conduction period creates a curve 103 and a still longer period creates a curve 105. It .is apparent therefore, that merely controlling the period of conduction of triac 20 will achieve controllable illumination of lamp 10.
Control of the conduction of triac is accomplished by the controllable gate voltage means connected to transformer 42. To understand the operation of the control circuit, some additional phase relationships have to be appreciated, which can best be shown by reference to H6. 3. The voltage across element 14 (reactor voltage) is leading the lamp current by approximately 85 and also is leading the line voltage by approximately 30.
Triac 20 should not be rendered conductive until the current through and the voltage across element 14 are both of the same polarity, either both positive or both negative. if traic 20 was rendered conductive when the voltage across element 14 and the current therethrough were not of the same polarity, a phenomenon known as "half cycle conduction would occur. The lamp would appear to flash from dim to full bright each half cycle and would produce an irritating strobing effect to the eye that would also be harmful to the lamp.
Considering the positive polarity cycles, the current through element 14 does not go positive until point 107. At this time, the reactor voltage is already positive. At point 109, the reactor voltage goes negative, although the current through inductive elements 14 is still positive. The range 111 of time over which gate voltage may be applied is hence determined as being the time between points 107 and 109.
Power is applied to transformer 42 via the secondary 44 of power transformer 46 whose primary is connected across lines 16 and 18. One terminal of secondary 44 is connected to fuse or circuit breaker 48. Load resistors 50 and 52 connected to the two sides of the primary of transformer 42 are connected to ground. The power connection from the secondary 44 of transformer 46 to the primary of transformer 42 is through a bidirectional voltage regulating means in the form of cathode-to-cathode zener diodes 54 and 56 and triac 58. It is well known that alternatively zener diodes 54 and 56 may be connected anode-to-anode and operate in the same manner.
It is well known that the gate pulse to a triac controlling an inductive load is desirably a continuously applied gate voltage, rather than an instantaneous pulse. Again referring to FlG. 1, it may be seen that cathodeto-cathode zener diodes 54 and 56 are connected in series with the main terminals of triac 58, the entire combination being connected as previously mentioned in series with secondary 44 of transformer 46. lt is readily apparent that the gate voltage has for its source from secondary 44 a voltage which is in phase with the voltage across lines 16 and 18. This voltage is labeled "gate source voltage on FIG. 3. It is, of course, in phase with the line voltage across lines 16 and 18.
Connected to the gate terminal of triac 58 is the cathode of programmable unijunction transistor 60. The gate connection to PUT 60 is connected to a rectified dc voltage via variable resistor 62. The timing of the conduction of PUT 60 is determined by the voltage differential between the voltage applied via resistor 62 and the voltage applied to the anode of PUT 60. Both the voltage applied to the anode and to the gate of PUT 60 are important to its conduction. The anode voltage must be slightly larger than the gate voltage to cause conduction. That is, conduction is dependent on the arithmetic difference between the voltage applied to the anode and gate. Therefore, the setting of resistor 62 "programs" what anode voltage is required to produce conduction. The dc voltage applied to resistor 62 is developed by bridge rectifier 64 connected to secondary 66 of transformer 46. A zener diode 68 and current limiting resistor 70 insures that the voltage applied to resistor 62 never exceeds a predetermined value.
The output from bridge rectifier 64 is also connected through diode 72, fuse 73 and variable resistor 74 to a time constant control network connected to the anode of PUT 60. This time constant network includes capacitors 76 and 78 and resistor 80. A diode 82 is included in series with the voltage from resistor 74.
A diode 84in the anode circuit of PUT 60 and capacitor 86 in the gate circuit of PUT 60 insure positive reset of PUT 60 following conduction. It should be noted that the operating adjustment for PUT 60 is determined by variable resistor 62. The ultimate control for determining the amount of brightness of lamp 10 is determined by the setting of resistor 74. As PUT 60 ages, the setting of resistor 62 can be changed, as well as permitting an easy setting for initial conditions.
In operation, programmable unijunction PUT 60 is turned on by the voltage difference between the voltage on the anode of PUT 60 (voltage on capacitor 78) and the voltage on the movable contact of resistor 62. On each cycle of ac voltage applied to the bridge, there is a rise to a dc level at the output of this bridge for application to the gate of PUT 60 through resistor 62. [n a more sluggish fashion, a voltage determined by the setting of resistor 74 will be applied to the anode of PUT 60. When the differential in these two voltages is reduced at the gate and anode of PUT 60 to the point of causing conduction, a gate voltage is supplied to triac 58. Triac 58 conducts when the secondary voltage of 44 applied thereto exceeds the zener diode voltage of diodes 54 and 56. When diodes 54 and 56 conduct, there is a complete circuit in secondary winding 44 of transformer 46. This permits voltage to be supplied to transformer 42 for operation in accordance with the diagram shown in FIGS. 2 and 3.
Yet another method of achieving the desired timing of PUT 60 to achieve firing within gate range 11], even without zener diodes 54 and 56, may be accomplished by selecting the components of resistor 74, resistor 75, which is connected between resistor 74 and ground, resistor 80, capacitor 78, the voltage determined by zener diode 68, and the setting of the voltage on the gate of PUT 60 by the setting of the movable arm on resistor 62. The setting is determined by placing variable resistance 74 at its lowest or dim setting.
Referring now to FIG. 2a, there is shown a waveform illustrating summing of currents taken at points l, (through reactor 14) and I (through triac 20) in FIG. 1. If triac 20 is not gated on, no 1. current flows and the only current flow through the lamp (I is This is reflected as the dim state. On the other hand, if triac 20 is gated on during the entire time, then the entire current is bypassed around reactor 14 and through triac 20. Hence, 1. becomes essentially zero and I equals 1,, as shown by the full on state curve.
If triac 20 is gated on to an angle 0 following the occurrence when current through the lamp becomes positive, a triac current I, will be generated which is added to reactor current 1 as shown in FIGS. 2 and 2b. At the same time, current I, that had been rising assumes essentially a steady state I until the time that triac 20 is no longer conducting. Hence, current 1 relative to time is equal to l, before the triac is fired, then equal to plus I while the triac is conductive, and then is equal to I, again after triac commutates.
As shown in FIG. 3, it is necessary that the gate voltage is prevented from continuing past the gate cutoff point. Although the gate voltage may be readily controlled by zener clipping as indicated above and as illustrated in FIG. 3, it is deemed within the scope of the present invention to provide other appropriate circuit means for controlling the gate voltage to prevent voltage past the gate cutoff point from energizing the triac.
Further, in FIG. 3, it is assumed that the ballasting is such that the line voltage, and hence the reactor voltage, leads the lamp current. Should there be a lagging situation so that the phase relationships are the other way, gating means may be provided so that the gate range would still be only while the reactor voltage and lamp current are of the same polarity. Generically, this gating scheme is also within the scope of the present invention.
Once conduction of triac 20 is started, the gate source voltage must return to zero before the reactor voltage reverses polarity. This is accomplished in the circuit shown in FIG. 1 by the zener diodes cutting off when the gate source voltage applied thereto falls below a predetermined value, as shown in FIG. 3.
The turn off point of the zener diodes does not vary. It is apparent, however, that the shutting off of the zener diodes and hence the gate source voltage to triac 20 does not instantaneously render triac 20 nonconductive. The inductance of elements 12 and 14 causes current to continue through triac 20 until the reactor current crosses zero and the triac commutates. The current through lamp 10, after such commutation, is only current through reactor 14 as illustrated in FIGS. 2, 2a, 2b and 3.
Two switches are provided, either of which may be used to replace the variable control of the circuit to a full bright or full dim operation, if desired. Switch 90 is connected between diode 82 and resistor 74. This switch is a three-position switch. When it is on its center connection, connection is made to the variable contact of resistor 74 and operation is as previously described for variable control operation. When placed to the HIGH position, contact is made to the top of resistor 74 and the greatest amount of voltage is applied. The LOW position of the switch disconnects voltage from diode 82.
In operation, the highest setting of resistor 74, causes the anode voltage applied to PUT 60 to reach the level of firing the PUT in the shortest period of time. That is, the critical anode-to-gate voltage difference occurs at the earliest time possible within gate range 111, namely, at point 107. This assures gate voltage to triac 20 the maximum amount of time and hence full lamp current to lamp 10, as explained above. Absence of voltage, or low voltage operation, achieves the opposite effect.
Alternatively, switch 92 may be used to achieve high (full brightness) or low (dim) operation. In the LOW Position of switch 92, there is a disconnect of transformer 46 from transformer 42. This means that no gate voltage is provided triac 20 and hence dim current is always supplied to lamp 10. In the HIGH position of switch 92, a center-tap connection is made from secondary 44 of transformer 46 to transformer 42. This supplies all the gate voltage necessary to keep triac conducting the maximum amount of time and therefore supplies full lamp current to lamp 10. Only part of transformer secondary 44 is used since switch 92 provides operation without having to supply power also to the variable control circuit.
Reset operation of PUT 60 involves capacitor 86, capacitor 78, which is somewhat smaller than capacitor 86, diode 84 and triac 58. As already mentioned, when the exponential voltage rise on the anode of PUT 60 reaches a value that is a predetermined difference to the voltage applied to the gate of PUT 60, PUT 60 conducts. Assuming that the anode voltage never reaches the critical level with respect to the steady state dc level on the gate for conduction, PUT 60 will conduct nevertheless at point 109 shown in FIG. 3 because the voltage on the gate of PUT 60 reduces until the critical predetermined voltage differemce between gate and anode exists. In other words, there is a forced firing of PUT 60. The firing of PUT 60 is caused by capacitor 86 discharging through the path comprising resistor 70, the resistor in the center of bridge 64, capacitor 78 and through the anode-to-gate path of PUT 60.
When PUT 60 turns on, capacitor 78 discharges through the PUT and triggers triac 58. If the secondary voltage of 44 exceeds the zener threshold voltage of zener diodes 54 and 56, then the gate source voltage from this control circuit is produced, as previously described. In any event, because capacitor 86 is bigger than capacitor 78, eventually diode 84 conducts to cause a slight reverse build-up on capacitor 78. Since triac 58 commutates, the cathode of PUT 60 becomes zero, and hence there is an anode-to-cathode reverse bias which turns off the PUT. Moreover, when the line again begins to buildup, the gate voltage of PUT 60 rises to further ensure that gate current stops until the rising voltage on the anode again establishes conduction conditions.
Now referring to FIG. 4, a partial diagram is shown of a three phase connection utilizing the improved dimmer control circuit of the invention. Three lines I6, I8 and 19 provide the three phase power distribution to the circuit. In conventional fashion they are connected to three power transformers 46a, 46b and 46c. Each transformer has connected across its secondary a bridge rectifier circuit 64a, 64b and 640, in the same manner as shown in FIG. 1. Connected to the output of each of these bridge rectifiers is a diode 72a, 72b and 72c, respectively, each connected to fuse 73. Fuse 73 may be viewed as the same fuse 73 shown in FIG. 1. Only one such fuse 73 is required for the three phase connection shown in FIG. 4. Fuse 73 is connected to variable resistor 74 which is connected to ground via a fixed resistor 75. The output from the variable resistor is connected to diode 82, which is also part of the common circuit of each of the three phases. The output from diode 82 is supplied to the time control networks in the respective phases. For example, in the first phase, the connection is made to capacitor 760 and 78a and resistor 800. In the second phase network, connection is made to capacitor 76b and 78b and resistor 80b, and in the third phase, connection is made to capacitor 76c and 78c and resistor 800. The remainder of the components in each of the phases is the same for the single phase circuit shown in FIG. 1.
In operation, setting of dimmer control 74 effects the lamp connected in each of the phases in the same manner as described above with respect to FIG. 1. Note that separate fuses are not required for each of the phases.
In addition to the three phase connection which is shown in FIG. 4, it is also possible to connect multiple single phase connections all through the same variable dimmer control 74 in the same manner. In this instance the diagram would be the same as shown in FIG. 4 except the three power transformers 46a, 46b and 46c would be connected across the same power distribution line.
Further, although a three-phase delta connection is illustrated in FIG. 4, the circuit may be connected to various other three-phase power connections, such as a wye connection.
Now turning to FIGS. 5-7, alternate embodiments of controlling the operation of the FIG. 1 basic circuit is shown. To more fully appreciate the timing reuired in controlling the circuit, reference is made again to the waveform shown in FIG. 3. Gate cutoff point 109 is adjusted to be approximately 30 ahead of the cross-over point for the line voltage. In other words, gate cutoff point 109 occurs 150 after the line voltage. In the basic circuit, PUT 60 is prevented from firing at a time after the reactor voltage (across inductor l4) and the current therethrough (lamp current) are of opposite polarity by the clipping action of zener diodes 54 and 56.
Assuming the absence of zener diodes S4 and 56, an alternate method of achieving PUT 60 from firing later than I50 after the line voltage reverses polarity is shown in FIG. 5. In this embodiment the voltage across the line (voltage from line 16 to 18) is sensed by zerocrossing detector 94 to produce an output at the time the line voltage reverses polarity. The output from zero-crossing detector 94 is applied to one-shot multivibrator 96, which produces a pulse of a predetermined duration. This pulse may be set not to exceed 150 of the cycle of the line voltage, since this line frequency, and hence cycle duration, is well known. This adjustment may be made variable, if desired.
The output from one-shot multivibrator 96 is applied to a transistor switch 98 which shunts the anode of PUT 60 to ground at the end of the pulse from the multivibrator. The connection makes it impossible for PUT 60 to conduct after the switch is closed by the multivibrator. On the following zero-crossing of the line voltage, the multivibrator is again pulsed to produce a similar switching action. As may be seen, this switching occurs every half-cycle.
FIG. 6 shows a circuit which is identical to FIG. 5, except that this embodiment includes peak detector 100, rather than zero-crossing detector 94. That is, the detector is activated on the change of slope of line voltage and produces an output from one-shot multivibrator within a period of 60 following peak detection. Again, this pulse duration may be predeterined to be something less than 60", if desired. It may be seen that peak detection takes place 90 after zero-crossing detection, and therefore, the 60 pulse from the multivibrator is equivalent to the l50 pulse which was described in the FIG. 5 embodiment.
Now referring to FIG. 7, another method of ensuring proper firing of triac 20 in triac module is shown. A current sensing element in the form of a resistor 120, sensing coil or other is placed in series with inductor 14. A connection is made across inductor 14 for sensing the voltage. The current sensing element and the voltage connection are connected to current and voltage sensing means 122, which may be separate current sensor 124 and voltage sensor 126, respectively. Outputs indicative of the presence of a specified polarity of the current through and the voltage across induction 14 are applied to inhibit circuit 128. Inhibit circuit 128 is also connected to control circuit 104, which may include all of the electronics in the control circuit of FIG. 1, except preferably zener diodes 54 and 56.
When there is an output gate signal from control circuit 104 applied to inhibit circuit 128 and also an output from the current and voltage sensors, there is a gate source signal for causing triac 20 in triac module 15 to conduct. The firing of triac 20 produces the operation which has previously been described with respect to inductors 12 and 14 and lamp 10.
Although circuit 128 has been described as an inhibit circuit, it is well-known in the art how to achieve operation as described above by incorporating an enable circuit as circuit 128.
Now referring to FIG. 8, a partial schematic diagram of an alternate control circuit is shown. In this circuit, all components are identical to the circuit shown in FIG. 1. However, it is assumed that diode 82 is connected to a variable dc source 112. Since PUT operates on a voltage difference, the level of the voltage supplied from source 112 ultimately controls the conduction of PUT 60 and hence the brightness of lamp 10. An example of source 112 is a dc control circuit employing a photocell which monitors the ambient light. When the amient light indicates a need for more brightness from lamp 10, the photocell causes an amplifier in the dc control circuit to increase the voltage level to diode 82, which, in turn, causes earlier conduction of PUT 60, as explained above. Hence, there is more brightness provided from lamp 10.
Reset elements 84 and 86 are illustrated in FIG. 8. However, it should be noted that other reset means may be employed, so long as the reset means is synchronized to the line. Suitable reset means connected between the anode of PUT 60 and ground are shown in FIGS. 5 and 6. In addition, separate source means, rather than transformer winding 66 and full-wave rectifier 64, synchronized to the ac power distribution line and acting in part as reset means for PUT 60, may be employed.
FIGS. 9-10 illustrate alternate connections for the circuit of FIG. 1. It may be recalled that triac module 15 has four connections: two terminals to transformer 42 and accompanying load resistor 52 and two power terminals to permit connection in series with lamp 10 and inductive ballast element 12 across lines 16 and 18. FIG. 1 shows one such connection, where inductor 14 is connected to the high line. Alternatively, inductor 14 of module 15 may be connected between inductor l2 and lamp 10, as in FIG. 9, or connected to the low line, as in FIG. 10.
FIGS. 11-14 show various autotransformer connections. FIG. 11 illustrates a high reactance autotransformer 17 connected to lines 16 and 18, inductive element 14 internal to triac module 15 being connected between the halves of autotransformer 17. The secondary of this autotransformer is loosely coupled to the primary, as indicated. The impedance of this secondary is designed to have in a high reactance autotransformer circuit many of the operational characteristics as inductor 12 in the FIG. 1 circuit.
FIG. 12 illustrates another connection of triac module 15 in a circuit employing high reactance autotransformer 17. In this embodiment, triac module 15 and lamp are connected in series and the autotransformer coils are connected together. If desired, the lamp and triac module may be reversed.
Conventional autotransformer 19 is connected in two example alternate arrangements of lamp 10, inductive element 12 and triac module in FIGS. 13 and 14. Any other arrangement previously discussed may be employed, if desired.
While particular embodiments of this invention have been shown and discussed, it will be understood that the invention is not limited thereto, since many modifications may be made and will become apparent to those skilled in the art.
For example, although FIG. 1 illustrates transformer means as the isolation means between the control circuit and the triac module, other isolation means may be employed, such as magnetic isolation means, optical isolation means or sound (transducer) isolation means. In a circuit employing optical isolation, a photo emitter may be used in a network for developing the gate source voltage and a photo detector may be used as the control isolation device driven thereby.
What is claimed is:
1. In combination with a high intensity gas discharge lamp, a dimmer circuit for controlling the brightness thereof, comprising:
ballast means connected to the lamp and connectable to an ac power distribution line;
said ballast means including a reactor portion, gated bypass means for providing at least partial bypass of current around said reactor portion of said ballast means;
isolation means connected to said gated bypass means; and
controllable gas source voltage means operably connected through said isolation means to said gated bypass means for controllably rendering said gated bypass means conductive, and thereby bypassing said reactor portion of said ballast means.
2. A dimmer circuit as set forth in claim 1, wherein said isolation means includes a transformer.
3. A dimmer circuit as set forth in claim 1, wherein said controllable gate source voltage means operates at a voltage reduced from the voltage carried by said ac power distribution line.
4. A dimmer as set forth in claim 1, wherein said ballast means includes a first ballast element in series with said lamp and wherein said reactor portion is a second ballast element in series with said lamp.
5. A dimmer as set forth in claim 1, wherein said gated bypass means includes a triac and said isolation means includes a transformer, the gate connection of said triac being connected to said transformer through at least two inverse parallel diodes to prevent the in ductive voltage buildup from said transformer from falsely firing said triac.
6. A dimmer as described in claim 1, wherein said controllable gate source voltage means includes switch means operable when a predetermined voltage threshold value thereof is exceeded; and variable source voltage means connected to said switch means for producing an amplitude controllable voltage substantially in phase with the line voltage, the time the amplitude of the controllable LII voltage reaching the threshold value of said switch means determining the gating on of said bypass means. 7. A dimmer as described in claim 1, wherein said controllable gate source voltage means includes switch means operable when an applied voltage raises above a predetermined value, the occurrence of said value being set to occur before the voltage across the reactor portion changes polarity with respect to the line current. 8. A dimmer as described in claim 1, wherein said controllable said source voltage means includes first switch means operable when a predetermined voltage threshold value thereof is exceeded;
variable source voltage means connected to said switch means for producing an amplitude controllable voltage substantially in phase with the line voltage, the time the amplitude of the controllable voltage reaching the threshold value of said switch means determining the gating on of said bypass means; and
second switch means operably connected to said variable source voltage means and closeably operable when the amplitude of the controllable voltage raises above a predetermined value, the occurrence of said value occurring before the voltage across the reactor portion changes polarity with respect to the line current.
9. A dimmer as described in claim 1, and including a series resistor and capacitor in parallel with said reactor portion of said ballast means.
10. A dimmer as set forth in claim 1, wherein said gate source voltage means includes sensing means for detecting the polarity of the current through and the voltage across said reactor portion;
control means connected for producing a signal during at least part of each half cycle of said ac power distribution line frequency; and
means connected to said sensing means and said control means to produce a gate source voltage when there is a signal from said control means and which renders said bypass means non-conductive when the voltage across said reactor portion is no longer in the same polarity with the current therethrough.
11. A dimmer as set forth in claim 10, wherein said sensing means includes a voltage sensing means for sensing the voltage across said reactor portion and a current sensing means for sensing the current through said reactor portion.
12. A dimmer as set forth in claim 10, wherein said control means is normally on and said means for producing the gate source voltage is an inhibiting means.
13. A dimmer as set forth in claim 10, wherein said control means is normally off and said means for producing the gate source voltage is an enabling means.
14. A dimmer as set forth in claim 1, wherein said gate source voltage means includes means for deriving a voltage in phase with the voltage supplied by said ac power distribution line, and means for amplitude regulation connected thereto for preventing said gated bypass means from being conductive when the voltage across said reactor portion is no longer in the same polarity with the current therethrough.
15. A dimmer as set forth in claim 14 wherein said amplitude regulation is provided by a pair of cathodeto-cathode connected zener diodes for shifting the amplitude of the voltage in phase with the power distribution voltage so that it decreases below a predetermined level no matter than the time the voltage across said reactor reverses in polarity.
16. A dimmer as set forth in claim 14, wherein said amplitude regulation is provided by a detector sensing the zero crossing of the voltage of said ac power distribution line, a one-shot multivibrator activated by said detector, and a semiconductor switch connected to disenable said gate source voltage means when the voltage across said reactor portion is no longer in the same polarity with the current therethrough.
17. A dimmer as set forth in clailm 14, wherein said amplitude regulation is provided by a detector sensing the peak of the voltage of said ac power distribution line, a one-shot multivibrator activated by said detector, and a semiconductor switch connected to disenable said gate source voltage means when the voltage across said reactor portion is no longer in polarity with the current therethrough.
18. A dimmer as described in claim 1, wherein said isolation means includes a first transformer for reducing the voltage from the voltage carried by said ac power distribution line, and wherein said controllable gate source voltage means includes a second transformer connected across the ac power distribution line to provide a reduced ac voltage;
a full wave bridge rectifier for rectifying the reduced voltage to dc voltage;
a pair of cathode-to-cathode connected zener diodes for shifting the amplitude of the reduced ac voltage in phase with the power distribution voltage so that it goes to zero no later than the time the voltage across said reactor goes to zero;
a triac connected in series with said zener diodes conducting when the gate voltage applied thereto exceeds the reduced voltage from said first transformer and the zener diode voltage; and
programmable unijunction transistor means connected to said rectifier and to said triac for determining the amplitude and timing of the gate voltage applied to said triac.
19. A dimmer as described in claim 18, wherein said programmable unijunction transistor means includes a unijunction transistor; the cathode of which is connected to said triac;
first variable resistor means operably connected to the dc terminals of said rectifier for controlling the voltage applied to the anode of said unijunction transistor,
said first variable resistor means including a resistance divider connected to said rectifier,
a diode connected to the output of said divider, and a time constant network; and
second variable resistor means operably connected to the dc terminals of said rectifier for controlling the voltage level on the gate of said unijunction transistor.
20. The dimmer as described in claim 18, wherein said programmable unijunction transistor means includes reset means for rendering said unijunction transistor conductive when the anode-to-gate voltage does not cause conduction and for rendering said unijunction transistor non-conductive following polarity rever- 6s a capacitor connected to the gate of said unijunction transistor and to said full wave bridge rectifier; and
a diode connected to said anode of said unijunction transistor and to said full wave bridge rectifier.
22. In combination with at least three high intensity gas discharge lamps, a dimmer circuit for controlling the brightnesses thereof, comprising a separate ballast means connected respectively to each of the lamps and connectable to an ac power distribution system,
each of said ballast means including a reactor portion,
separate gated bypass means for respectively providing bypass current around said reactor portion of each of said plurality of ballast means;
separate isolation means connected to each of said gated bypass means; and
commonly controllable gate source voltage means operably connected through said isolation means to each of said gated bypass means for controllably rendering said gated bypass means conductive, and thereby bypassing said reactor portion of each of said ballasts through a time range when the current through said reactor portions and the voltages thereacross are respectively of the same polarity.
23. A dimmer circuit as set forth in claim 22, wherein said separate ballast means are connected respectively to different phases of said ac power distribution system.
24. A dimmer circuit as set forth in claim 22, wherein said separate ballast means are connected to the same phase of said ac power distribution system.
25. A dimmer as described in claim 22, and including a series resistor and capacitor in parallel with said respective reactor portions of said separate ballast means.
26. The dimmer circuit as described in claim 22, wherein each of said isolation means includes a first transformer for reducing the voltage from the voltage carried by said ac power distribution line, and wherein said controllable gate source voltage means includes a second transformer connected across each phase of the ac power distribution line to provide a reduced ac voltage for each phase;
a separate full wave bridge rectifier for rectifying each of the reduced voltages to dc voltage;
a separate pair of cathode-to-cathode connected zener diodes for shifting the amplitude of each reduced ac voltage in phase with the power distribution voltage so that it goes to zero no later than the time the voltage across said respective reactor goes to zero;
a triac connected in series with each pair of said zener diodes conducting when the gate voltage applied thereto exceeds reduced voltage from said first transformer and the zener diode voltage; and
programmable unijunction transistor means connected to each of said bridge rectifiers and to said triac for determining the timing and amplitude of the gate voltage applied to said respective triacs.
27. The dimmer circuit as described in claim 26, wherein each of said programmable unijunction transistor means includes a unijunction transistor, the cathode of which is connected to said triac;
first variable resistor means operably connected to the dc terminals of said rectifier for controlling the voltage applied to the anode of said unijunction 16 sistor conductive when the anode-to-gate voltage does not cause conduction and for rendering said unijunction transistor non-conductive following polarity reversals of said ac power distribution line voltage.
29. A dimmer as described in claim 28, wherein each of said reset means includes a capacitor connected to the gate of said unijunction transistor and to said full wave bridge rectifier; and a diode connected to said anode of said unijunction transistor and to said full wave bridge rectifier.
DATED UNITED STATES PATENT OFFICE July 8,
INVENTOR S :Kenneth P. Holmes and Carl R. Snyder It is certified that error appears in the ahoveidentitied patent and that said Letters Patent are hereby corrected as shown below:
C01. C01. C01. C01. C01. C01.
[SEAL] line line line line line line Signed and Sealed this thirtieth D ay Of September 1 9 75 A nest:
RUTH C. MASON v C. MARSHALL DANN Aries-1mg Officer (mnmr'ssrmu'r u] Parenls and Trademarks UNI'IED STATES PATENT OFFICE CER'IIFICA'IE OF CORRECTION Patent No. 3, I Dated July 8, 1975 Inventor(s) Kenneth P. Holmes and Carl R. Snyder It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:
Bridge rectifier 64 in Figures 1, 4, and 8 should appear as follows:
Signed and Sealed this Twenty-fourth D3) of January I 978 [SEA L] Arresr:
RUTH C. MASON LUTRELLE F. PARKER Arresting Officer Acting Commissioner of Parenrs and Trademark:
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|U.S. Classification||315/194, 315/195, 315/283, 315/199, 315/DIG.400, 315/137, 315/289, 315/144|
|Cooperative Classification||H05B41/40, Y10S315/04|
|Sep 30, 1983||AS||Assignment|
Owner name: WIDE-LITE INTERNATIONAL CORPORATION, P.O. BOX 606,
Free format text: ASSIGNS THE ENTIRE INTEREST. SUBJECT TO AGREEMENT DATED JUNE 30,1983;ASSIGNOR:ESQUIRE, INC.;REEL/FRAME:004190/0815
Effective date: 19830916