US 3894389 A
A digital display for an electronic timepiece admitting of reduced power consumption by providing improved circuitry for driving same. The circuitry applies drive signals to each digit representative of a unit of time in a sequential manner so as to light each unit sequentially. The duty cycle is selected to render all of the display digits visible to the human eye simultaneously.
Description (OCR text may contain errors)
United States Patent Miura et al.
[451 July 15, 1975 [5 ELECTRONIC WATCH 3,760,584 9/1973 Dargent 58/50 R 3,765,163 101973 L t'l. 58 50 R [751 Inventors: Teiii Himshi Takeshita, both 3 781,863 12/1973 F uji ia 58/50 R of Suwa, Japan  Asslgnee: r gg z ggp gs Suwa Selkosha Primary Examiner-Edith Simmons Jackrnon Attorney, Agent, or FirmBlum, Moscovltz, Friedman  Filed: Dec. 18, 1973 & Kaplan  App]. No.: 425,899
 Foreign Application Priority Data  ABSTRACT Dec. 18, 1972 Japan 47-l27003 A digital display for an electronic timepiece admitting of reduced power consumption by providing im-  US. Cl. 58/50 R; 235/92 EA; 340/336 proved circuitry f i i Same The circuitry  Int. Cl. G04b 19/30; H05b 39/09 plies drive Signals to each digit representative of a unit  Fleid of Search 58/50 R; 235/92 EA; of time i a Sequential manner so as to light each unit 340/324 sequentially. The duty cycle is selected to render all of the display digits visible to the human eye simulta-  References Cited neous]y UNITED STATES PATENTS 3,707,071 12/1972 Walton 58/50 R 5 Claims, 5 Drawing Figures I asc/tmmk DIV/DER CW/VTEI? /Z i I DECODER i I l 02/4/15 i H l C l I l r r r r I 7M/IV'6 I CO/VZ'POL r l 1 D/SPLA Y I I i D I I i i I I DA /t/E /3 ELECTRONIC WATCH BACKGROUND OF THE INVENTION In general, this invention is directed to small-sized electronic timepieces such as wrist watches, and in particular to circuitry for driving a digital display in a small-sized electronic timepiece in a manner which produces minimal power consumption.
In small-sized electronic timepieces of the prior art, each of the digital display elements representing units of time such as hours, minutes and seconds are driven simultaneously to thereby render same viewable to the human eye. Because of the excessive amount of power required to light such digital displays, it has been necessary to limit the length of time that the digital display elements could remain lit. If the amount of time is not considerably limited, the increased power consumption caused by lighting the digital display elements will have a marked effect of the life of the battery used in the electronic timepiece, it being recognized that the capacity of such batteries is seriously limited in small sized electronic timepieces by obvious space limitations. Thus, it is necessary to provide a digital display which is easily viewable yet provides minimum power consumption.
SUMMARY OF THE INVENTION Generally speaking, in accordance with the invention, an electronic timepiece circuit is provided for driving a digital display in a manner which reduces the power consumption thereof. The electronic timekeeping circuit includes a high frequency signal generating oscillator, a multi-digit digital display, each digit adapted to display a particular unit of time, and logic circuitry for receiving the high frequency time standard signal from the oscillator and providing same to drive circuits which are adapted to energize the display elements. Within the logic circuit is a timing control circuit which causes the drive signals supplied by the drive circuits to the display elements to be applied to each digit sequentially, the duty cycle being selected so as to render the display elements simultaneously visible to a viewer.
When the display elements are formed from segmented digital display elements, the timing control circuit is further adapted to provide sequential energization of the segments as well, the duty cycle combining with the after-image effect of the display elements to render the display elements simultaneously viewable by the viewer.
Accordingly, it is an object of this invention to provide an improved small-sized electronic timepiece including a digital display wherein power consumption is minimized.
It is a further object of the instant invention to provide an improved small-sized electronic timepiece wherein hours, minutes and seconds are not displayed simultaneously yet appear to be when viewed.
It is a further object of the instant invention to provide an improved small-sized electronic timepiece wherein voltage drops caused by the internal resistance of the digital display are eliminated.
It is still a further object of this invention to provide an improved electronic timepiece including a digital display wherein battery life is extended by the sequential energization of the digital display elements.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
The invention accordingly comprises the features of construction, combination of elements, and arrangement of parts which will be exemplified in the construction hereinafter set forth, and the scope of the invention will be indicated in the claims.
BRIEF DESCRIPTION OF THE DRAWINGS For a fuller understanding of the invention, reference is had to the following description taken in connection with the accompanying drawings, in which:
FIG. 1 is a circuit diagram of an electronic timepiece including a digital display for providing minimal power consumption and constructed in accordance with the instant invention;
FIG. 2 is a wave diagram of signals applied to the display circuit depicted in FIG. 1;
FIG. 3 is a circuit diagram of an electronic timepiece including a digital display constructed in accordance with still another embodiment of the instant invention;
FIG. 4 is a wave diagram of the pulses applied to the digital display depicted in FIG. 3; and
FIG. 5 is a wave diagram of the signals of still another embodiment, the signals being applied to the digital display in accordance with the instant invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIG. 1, an electronic time-keeping circuit in accordance with the invention is provided, including a high-frequency signal generator A, the output of which is applied to logic circuit B, the output of which is, in turn, applied to drive circuits C. Said drive circuits are coupled to a digital display D. The high frequency signal produced by the oscillator of signal generator A is provided to a divider circuit 10 formed from a chain of multi-stage dividers which produce a lower frequency signal; for example, a one-second signal for application to counter/decoder circuit 12, and an intermediate frequency signal for application to timing control circuit 11.
Timing control circuit 11 consists of a digital matrix which produces, from the signal applied thereto, eight sequential pulse signals to more particularly shown in FIG. 2, six of which are applied to the output of timing control circuit 11, which output is applied to drive circuit l3 and counter/decoder circuit 12.
Counter/decoder circuit 12 includes a further divider chain, which produces time-keeping signals representative of each digit of time on a continuous basis from the signal received from divider circuit 10. Display D includes an hour, minute and seconds display having six digits, each of the digits formed of seven segments. The segmented display, generally known as a seven-bar display, is depicted, by way of example, in FIG. 3 of US. Pat. No. 3,756,011, which issued on Sept. 4, 1973. The display elements defining each segment of each digit are preferably formed of gallium arsenide phosphide light-emitting diodes in the timepiece in accordance with the invention. In order to minimize power consumption, each of the six digits of time is sequentially energized for the duration of the associated pulse from timing control circuit 11 as shown in FIG. 2. The duty cycle for the output of timing control circuit 11 is chosen so that one viewing the display would not notice the flickering thereof due to retinal retention. A preferable pulse width is of the order of l/256th of a second. Thus, instead of simultaneously energizing all of the digits, the digits are sequentially displayed at such speeds that it appears that all are lighted simultaneously. Such a display sequence utilizes one-half or less of the power that a digital display utilizes when all of the digits are lit at the same time. The embodiment of FIG. 1 may take two forms. In a first embodiment, like segments on each of the six digits would be connected to a common drive circuit 14, which in turn could be connected to respective decoders or to a common decoder connected to respective counter circuits, the selection of the counter circuit coupled through drive circuit 14 to the digital display being controlled by the pulses from timing control circuit 11 in coordination with the actuation of the digits through drive circuit 13. This embodiment would save substantial circuit elements, requiring only a single drive circuit 14, or if desired, a single decoder for converting the BCD output of the respective counters into a seven signal output suitable for driving the seven bar display. In such an embodiment, a logic circuit incorporated in counter/decoder 12 would perform the selective connection of either the counters or decoders, if more than one decoder is provided.
A second embodiment is depicted in FIG. 3 wherein like reference numerals are applied to like elements. In this embodiment, each of the segments of each of the digits are sequentially actuated. Thus, not only are each of the digits sequentially actuated, but each of the segments within each of the digits are sequentially actuated. A low frequency output of divider 10, for example a l-second signal, is applied to counter/decoder 12' while intermediate frequency outputs are applied to timing control circuit 11'. Said timing control circuit generates seven kinds of segment codes, corresponding to each segment of each digit, and six kinds of digit codes, corresponding to each separate digit. Counter/decoder circuit 12' produces timing signals representative of each digit of time in a chain of counters. As discussed above in connection with FIG. 1, these timekeeping signals can be applied to either a common decoder or to separate decoders associated with each digit of time, the output ofthe common decoder or separate decoders being applied to a drive circuit 14.
The output signals from timing control circuit 11 opcrate through a logic circuit in counter/decoder circuit 12' so that each segment of each digit is sequentially actuated. This effect is achieved by assigning a time slot in the duty cycle to each segment of each digit. The signal applied in each time slot can come from either a common drive circuit 14' or decoder, in which case logic circuitry in counter/decoder circuit 12 would selectively apply the output of the respective counter circuits of the counter chain to the common drive circuit 14, or through separate decoder and drive circuits for each digit, in which case the output of the respective drive circuit would be energized by the signals from timing control 11' through a suitable logic circuit.
Similarly, each of the digits would be separately energized by signals applied from timing control circuit 11 through drive circuit 13'.
It is noted that the segment code signals and the digit code signals applied from divider to timing control circuit 11 may be of 2,048 Hz and 256 Hz respectively. The segment signals and digit signals produced by timing control circuit 1 1 are shown in FIGS. 4a and 4b respectively. Since there are seven segment electrodes in each digit and six digits, there are 42 separate elements that can be energized. If a duty cycle is selected to be less than l/42, each segment of the digit display can be independently and sequentially lit. In this manner, only one segment is energized at any instant, so that the energy required to drive the display is /3 to A that consumed by a conventional digital display wherein all of the digits are simultaneously energized. Moreover, the frequency at which a display is energized is greater than or equal to 32 Hz, the after-image effect of the human eye eliminates the flicker in the display. In this manner, low temperature operation with a continuous display can be achieved in a satisfactory manner.
In a third embodiment of the arrangement in accordance with the invention, advantage is taken of the fact that the viewer cannot efficiently view the six digits of a time display simultaneously. In the third embodiment, both hour digits, both minute digits and both second digits are sequentially displayed in turn, two by two. As more particularly shown in FIG. 5, the gate signals for driving both hour digits is represented by waveform c, the gate signals for driving both minute digits is represented by waveform d, and the gate signals for driving both second digits are represented by waveform e. If the delay time t is set at l/16 second or more, a distinct and readable time display is provided wherein the hours, minutes and seconds are sequentially displayed. Further savings and energy consumption can be achieved by combining the instant embodiment with the embodiment of FIGS. 1 and 3 respectively.
Various embodiments of the invention in accordance with the invention utilize the after-image effect of the human eye, as well as the high light-producing efficiency in relation to current characteristic of light emitting diodes to provide an electronic timepiece having lower power consumption and an enhanced display. The watch construction in accordance with the invention can be simply constructed through the use of integrated circuitry techniques.
It will thus be seen that the objects set forth above, among those made apparent from the preceding description, are efficiently attained and, since certain changes may be made in the above construction, it is intended that all matter contained in the above description or shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.
It is also to be understood that the following claims are intended to cover all of the generic and specific features of the invention herein described, and all statements of the scope of the invention which, as a matter of language, might be said to fall therebetween.
What is claimed is:
I. In an electronic timepiece having oscillator means for producing high frequency timekeeping signals; multi-state divider circuit means for producing a low frequency timing signals from said high frequency timekeeping signal, and digital display means for the digital display of time in response to said timing signals, said digital display means including at least two digits of time each digit of time being defined by a plurality of segments, the selective energization of certain segments effecting the display of numerals from 0 to 9, the improvement which comprises timing control circuit means operatively coupled to each of said segments of said digital display means to sequentially and repetitively energize each segment of each digit of time, said timing circuit control means being coupled to said divider means for receiving an intermediate frequency cycle control signal therefrom whereby each segment of each digit is actuated during a separate slot of each cycle of said timing control circuit means.
2. An electronic timepiece as recited in claim 1, wherein said digital display means includes digits for the display of at least hours and minutes, said timing control circuit means additionally sequentially actuating the hours digits as a unit and the minutes digits as a unit.
3. An electronic timepiece as recited in claim 1,